CN102693707B - Display device and driving method thereof - Google Patents
Display device and driving method thereof Download PDFInfo
- Publication number
- CN102693707B CN102693707B CN201110078894.2A CN201110078894A CN102693707B CN 102693707 B CN102693707 B CN 102693707B CN 201110078894 A CN201110078894 A CN 201110078894A CN 102693707 B CN102693707 B CN 102693707B
- Authority
- CN
- China
- Prior art keywords
- driver circuit
- display driver
- signal
- receive
- described display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The invention discloses a driving method which is used in a display device comprising a plurality of display drive circuits. The driving method comprises the following the steps that: the display drive circuits synchronous receive an initial pulse and generate a synchronous sequence signal; a front display drive circuit transfers a first signal to a rear display drive circuit, so that the rear display drive circuit detects and stores a signal receiving delay according to the first signal, wherein the signal receiving delay refers to a delay between the synchronous sequence signal and the first signal received by the rear display drive circuit; after the signal receiving delay is stored, the rear display drive circuit temporarily stops receiving a system frequency signal and temporarily stops generating the synchronous sequence signal; and the front display drive circuit transfers a second signal to the rear display drive circuit so as to awaken the rear display drive circuit to get ready for receiving one display data.
Description
[technical field]
The application relates to a kind of display device and its driving method, and relate to especially a kind of display device and its driving method, do not have to receive and effectively show that the display driver circuit of data can be by temporary close, will receive before data, described display driver circuit can return back to normal mode, shows data to be ready to synchronous sequence signal and to receive.
[background technology]
With flat-panel screens, it may comprise multiple display driver circuits (as source electrode drive circuit).In the flat-panel screens with multiple display driver circuits, in most running time, most display driver circuit receiving system frequency signal also produces and maintains synchronous sequence signal, so that described display driver circuit can be held time synchronously, avoids missing or grab wrong data.But most running time, most display driver circuit does not really receive and shows data.At this, display driver circuit receives and shows that data are to drive a display panel (not shown) of this display device.So system still needs to provide power to not really receiving the described display driver circuit that shows data, causes system power consumption to reduce.
Fig. 1 shows according to the driving sequential chart of the display driver circuit of prior art.As shown in Figure 1, suppose in having on the display of five display driver circuit 110_1～110_5, during the practical operation of each display driver circuit, T must at least be maintained to this display driver circuit and receives and show till data.During T1～T5 represents respectively the practical operation of display driver circuit 110_1～110_5.X representative is controlled display driver circuit reception data Y and is represented initial pulse (start pulse).Y can send first display driver circuit 110_1 to by time schedule controller (not shown), will when start to receive demonstration data to inform; Afterwards, produce and transmit the display driver circuit of signal X to rear by the display driver circuit in front.In the time that picture starts, signal Y can be transmitted to all display driver circuits.
During in T1, display driver circuit 110_1 receives and shows data, though and display driver circuit 110_2～110_5 does not receive and shows its essential synchronous sequence signal that produces still of data.Similarly, during in T2, display driver circuit 110_1 can be closed (because it has received required demonstration data), now, be that display driver circuit 110_2 will receive demonstration data, though and display driver circuit 110_3～110_5 does not receive and shows its essential synchronous sequence signal that produces still of data.Therefore, display driver circuit (that is the display driver circuit far away apart from time schedule controller, as display driver circuit 110_5) more below, being wasted in the power maintaining on synchronous sequence signal will be more.
In addition, in a picture cycle, each display driver circuit receives demonstration data at short notice, but in its whole picture cycle all at receiving system frequency signal, this is another reason that causes power consumption.
[summary of the invention]
The application system has about a kind of display device and its driving method, it transmits real X signal and wake-up signal etc. by the X between multiple display driver circuits (import and export data) signal wire, the display driver circuit that makes not yet to receive effective demonstration data can be by temporary close, will receive before data, described display driver circuit can return back to normal mode, shows data to be ready to synchronous sequence signal and to receive.
The application's a demonstration example proposes a kind of driving method, is applied in a display device that comprises multiple display driver circuits.This driving method comprises: described display driver circuit is synchronous receives an initial pulse, and produces a synchronous sequence signal; One front display driver circuit of described display driver circuit transmits the rear display driver circuit of a first signal to described display driver circuit, to make this rear display driver circuit detect according to this and store a signal receive delay, this signal receive delay represents the delay between this first signal that this synchronous sequence signal and this rear display driver circuit receive; After storing this signal receive delay, this rear display driver circuit enters a temporary close pattern, also temporarily stops producing this synchronous sequence signal temporarily to stop receiving a system frequency signal; This front display driver circuit transmits a secondary signal to this rear display driver circuit, to wake this rear display driver circuit up; This rear display driver circuit recovers to receive this system frequency signal; And this rear display driver circuit regenerates this synchronous sequence signal and prepares to receive demonstration data.
Another demonstration example of the application proposes a kind of display device, comprising: multiple serial connection display driver circuits.Described display driver circuit is synchronous receives an initial pulse, and produces a synchronous sequence signal.One front display driver circuit of described display driver circuit transmits the rear display driver circuit of a first signal to described display driver circuit, to make this rear display driver circuit detect according to this and store a signal receive delay, this signal receive delay represents the delay between this first signal that this synchronous sequence signal and this rear display driver circuit receive.After storing this signal receive delay, this rear display driver circuit enters a temporary close pattern, also temporarily stops producing this synchronous sequence signal temporarily to stop receiving a system frequency signal.This front display driver circuit transmits a secondary signal to this rear display driver circuit, to wake this rear display driver circuit up.This rear display driver circuit recovers to receive this system frequency signal.This rear display driver circuit regenerates this synchronous sequence signal and prepares to receive one and shows data.
For the above-mentioned and other side to the application has better understanding, special embodiment below, and coordinate appended graphicly, be described in detail below:
[brief description of the drawings]
Fig. 1 shows according to the driving sequential chart of the display driver circuit of prior art.
Fig. 2 shows according to the driving sequential chart of the display driver circuit of the application the first embodiment.
Fig. 3 shows according to the signal receive delay D of the application the first embodiment.
Fig. 4 shows the online signal timing diagram of X signal between previous display driver circuit and the next display driver circuit of the application the first embodiment.
Fig. 5 shows how detecting and storage assembly receive delay D of the application the first embodiment.
Fig. 6 to Fig. 7 shows how the application the first embodiment's regenerates synchronous sequence signal SYN_CLK.
Fig. 8 shows according to a kind of operational flowchart of the display driver circuit of the application the first embodiment.
Fig. 9 shows according to the driving sequential chart of the display driver circuit of the application the second embodiment.
Figure 10 shows according to the driving sequential chart of the display driver circuit of the application the 3rd embodiment.
[primary clustering symbol description]
110_1～110_5,210_1～210_5: display driver circuit
910: operational amplifier SW1～SW4: switch
1010:D type flip-flop 1020: phase inverter
1110～1165: step
[embodiment]
The first embodiment
Fig. 2 shows according to the driving sequential chart of display driver circuit 210_1～210_5 of the application the first embodiment, during T6～T10 represents respectively the practical operation of these five display driver circuits.Due to the relation of the signal lead between each display driver circuit 210_1～210_5, send the sequential of signal and next display driver circuit by previous display driver circuit and receive between the sequential of signal and occur postponing, as shown in Figure 3.In Fig. 3, SYS_CLK representative system sequential, SYN_CLK represents synchronous sequence signal, X_N_OUT represents the X signal of being sent by N display driver circuit, X_ (N+1) _ IN represents the X signal being received by (N+1) individual display driver circuit, and D_ (N+1) represents the signal receive delay of (N+1) individual display driver circuit.That is to say, D_ (N+1) represents the delay between signal X and the synchronous sequence signal SYN_CLK that (N+1) individual display driver circuit receives.In the present embodiment, in sequential T21, display driver circuit 210_1～210_5 synchronously produces X signal and transmits X signal.Each display driver circuit can calculate itself signal receive delay D, stores this and postpones D.In the present embodiment, considering delay D, synchronous to make between synchronous sequence signal SYN_CLK that display driver circuit produces separately.
Please also refer to Fig. 2 and Fig. 4.Fig. 4 is presented at the online signal timing diagram of X signal between previous display driver circuit and next display driver circuit.In sequential T41, display driver circuit 210_1 can transmit X signal to display driver circuit 210_2, to allow display driver circuit 210_2 calculate and store the signal receive delay D (sequential T41 is the sequential T21 in Fig. 2) of itself.Display driver circuit 210_2 can enter temporary close pattern with save power consumption (that is, display driver circuit 210_2 not receiving system frequency SYS_CLK, do not receive show data, also do not produce synchronous sequence signal SYN_CLK), as shown in sequential T42.Display driver circuit 210_1 will send wake-up signal (in sequential T43) via X signal wire, to wake next display driver circuit 210_2 up, makes next display driver circuit 210_2 receiving system frequency signal SYS_CLK again.Then, display driver circuit 210_1 transmits an X signal (in sequential T44) to allow next display driver circuit 210_2 regenerate synchronous sequence signal SYN_CLK by X signal wire.When display driver circuit 210_1 can transmit real X signal (sequential T45) by X signal wire will start in to receive demonstration data to inform next display driver circuit 210_2.
Although in Fig. 2, for display driver circuit 210_1～210_5, the sequential T41 of Fig. 4 in during complete in T21, that is T41 is longer than T21, the application is not limited to this.Such as, T41 can be longer or shorter than or equal to T21, and this is all in the application's spirit scope.Taking display driver circuit 210_2 as example, sequential T42～T45 of Fig. 4 in during complete in T71.
Next, how explanation is detected to also storage assembly receive delay D.When knowing, the application is not limited to this.Explain as example as 8 as 4T shows data at this width taking X signal.Please refer to Fig. 5, utilize signal A1～A4 to detect X_ (N) _ IN, wherein X_ (N) _ IN is the received X signal of this display driver circuit.To the testing result judgement of signal A1～A4, can learn the scope of D value and store.Such as, if input is to X_ (N) _ IN signal in during signal A1 is high levels, represent D=0～1T, now setup parameter B1～B4, such as but be not limited to B1=1, B2=B3=B4=0.If X_ (N) _ IN signal detected in during signal A2 is high levels, represent D=1～2T, now setup parameter B1～B4, such as but be not limited to B2=1, B1=B3=B4=0.If X_ (N) _ IN signal detected in during signal A3 is high levels, represent D=2～3T now setup parameter B1～B4, such as but be not limited to B3=1, B1=B2=B4=0.If X_ (N) _ IN signal detected in during signal A4 is high levels, represent D=3～4T, now setup parameter B1～B4, such as but be not limited to B4=1, B1=B2=B3=0.
So just can judge the signal receive delay D of display driver circuit and store; Afterwards, can make display driver circuit enter temporary close pattern, with temporarily not receiving system frequency signal temporarily do not produce synchronous sequence signal yet.
Now be illustrated in and enter after temporary close pattern, how display driver circuit regenerates synchronous sequence signal.Owing to detecting and storage assembly receive delay D, therefore, next display driver circuit can regenerate synchronous sequence signal SYN_CLK by receiving the X signal (the sequential T44 of Fig. 4) being transmitted by a upper display driver circuit, makes display driver circuit just revert to normal condition before reception shows data.
Fig. 6 to Fig. 7 shows how to regenerate synchronous sequence signal SYN_CLK.The X_N_IN that previous display driver circuit is sent postpones 1T～7T.In Fig. 6, X_N_IN_3T postpones 3T by signal X_N_IN and obtains, and all the other can the rest may be inferred.Signal B1～B4 is gauge tap SW1～SW4 respectively, inputs to operational amplifier 910 by one of X_N_IN_3T～X_N_IN_6T, to produce trigger pip RST.Trigger the D type flip-flop 1010 in Fig. 7 with signal RST, to regenerate correct synchronous sequence signal SYN_CLK.As shown in Figure 7, synchronous sequence signal SYN_CLK more feedbacks to D type flip-flop 1010 by phase inverter 1020.
Now please refer to Fig. 8, it shows according to a kind of operational flowchart of the display driver circuit of the application the first embodiment.As shown in Figure 8, in step 1110, judge whether all display driver circuits all receive initial pulse Y.In principle, all display driver circuits should be able to synchronously receive initial pulse Y.All display driver circuits produce synchronous sequence signal SYN_CLK, as shown in step 1115.Then, non-first display driver circuit (taking Fig. 2 as example, non-first display driver circuit refers to display driver circuit 210_2～210_5) execution step 1120～1150; Non-last display driver circuit (taking Fig. 2 as example, non-last display driver circuit refers to display driver circuit 210_1～210_4) execution step 1155～1165.
In step 1120, non-first display driver circuit 210_2～210_5 receives the X signal being transmitted by previous display driver circuit.In step 1125, according to received an X signal and synchronous sequence signal SYN_CLK, non-first display driver circuit 210_2～210_5 detects and storage assembly receive delay D, the delay between an X signal and synchronous sequence signal SYN_CLK that its representative receives.In step 1130, non-first display driver circuit 210_2～210_5 enters temporary close pattern (stop receiving system frequency SYS_CLK, and stop producing synchronous sequence signal SYN_CLK).In step 1135 and 1140, if non-first display driver circuit 210_2～210_5 receives the 2nd X signal (wake-up signal) being transmitted by previous display driver circuit, non-first display driver circuit 210_2～210_5 recovers receiving system frequency signal SYS_CLK.In step 1145 and 1150, if non-first display driver circuit 210_2～210_5 receives the 3rd X signal being transmitted by previous display driver circuit, non-first display driver circuit 210_2～210_5 regenerates synchronous sequence signal (this represents that non-first display driver circuit 210_2～210_5 under temporary close pattern has returned back to normal mode originally) according to signal receive delay D, and wait for the 4th X signal (inform when will receive show data) that transmitted by previous display driver circuit with prepare to receive show data (such as, show that data are transmitted by time schedule controller).
After step 1150, last display driver circuit 210_5 can be back to step 1110, and middle display driver circuit 210_2～210_4 (meaning also non-last display driver circuit 210_5 of non-first display driver circuit 210_1) continues to step 1160.
In step 1155, when all display driver circuits all produce after synchronous sequence signal SYN_CLK, non-last display driver circuit 210_1～210_4 can transmit an X signal to display driver circuit below, so that display driver circuit below can be detected according to this and storage assembly receive delay D.In step 1160, non-last display driver circuit 210_1～210_4 transmit the 2nd X signal to display driver circuit below to wake display driver circuit below up.In step 1165, non-last display driver circuit 210_1～210_4 transmit the 3rd X signal to display driver circuit below to allow display driver circuit below can regenerate synchronous sequence signal SYN_CLK, and non-last display driver circuit 210_1～210_4 transmits the 4th X signal (real X signal) and shows data to display driver circuit below to inform when display driver circuit below will start to receive.
In addition, the display driver circuit of the application the first embodiment has another kind of operating process, and it is different from Fig. 8 and is in, all display driver circuits and all performs step 1155～1165 but non-first display driver circuit still performs step 1120～1150.Note that in Fig. 8, non-last display driver circuit execution step 1155～1165, that is last display driver circuit does not carry out 1155～1165.
What is more, the display driver circuit of the application the first embodiment has more another kind of operating process, its be different from Fig. 8 be in, all display driver circuits all perform step 1120～1165.Note that in Fig. 8 non-last display driver circuit execution step 1155～1165 (that is last display driver circuit does not carry out 1155～1165); And, in Fig. 8, not non-first display driver circuit execution step 1120～1150 (that is first display driver circuit do not carry out 1120～1150).
The second embodiment
Fig. 9 shows according to the driving sequential chart of display driver circuit 210_1～210_5 of the application the second embodiment, during T11～T15 represents respectively the practical operation of these five display driver circuits.The second embodiment and the first embodiment different be in, in the second embodiment, previous display driver circuit does not need to transmit the display driver circuit of the 3rd X signal (signal passing in the sequential T44 of Fig. 4) to rear.Namely, after receiving the wake-up signal that previous display driver circuit transmits, when the display driver circuit at rear can receive the real X signal (when the display driver circuit of informing rear will start in to receive demonstration data) being transmitted by previous display driver circuit, the display driver circuit at rear can produce synchronous sequence signal SYN_CLK according to this.
For this reason, in the second embodiment, first learn, the display driver circuit at rear is after receiving wake-up signal, how long just can be ready to receive signal, thus, previous display driver circuit just can be estimated out, send real X signal before, when send second X signal (wake-up signal).
The 3rd embodiment
Figure 10 shows according to the driving sequential chart of display driver circuit 210_1～210_5 of the application the 3rd embodiment, during T16～T20 represents respectively the practical operation of these five display driver circuits.The 3rd embodiment and the first embodiment different be in, in the 3rd embodiment, previous display driver circuit does not need to transmit the 3rd X and the 4th X signal (signal passing in sequential T44 and the T45 of Fig. 4) display driver circuit to rear.Namely, after receiving the wake-up signal that previous display driver circuit transmits, the display driver circuit at rear can wake and regenerate same clock signal SYN_CLK up, learns that the time point of real X signal receives data with correct starting by the 2nd X signal simultaneously.
For this reason, in the 3rd embodiment, must first learn, how long the display driver circuit at rear, after receiving wake-up signal, just can be ready to receive signal, thus, previous display driver circuit just can be estimated the pulse width of second X signal, so that real X signal is contained in wherein.
Based on above-mentioned explanation, existing this skill person is when knowing the way that how to change above-mentioned the first embodiment, and to be suitable for the second embodiment, its details does not repeat in this.
In addition, though in above-described embodiment, first display driver circuit 210_1 receives signal X, but in other possibility of the application embodiment, first display driver circuit 210_1 can receive signal X, and this is still in the application's spirit scope.
In sum, although this application has discloses as above with embodiment, so it is not in order to limit the application.Under the application, in technical field, have and conventionally know the knowledgeable, not departing from the application's spirit and scope, when being used for a variety of modifications and variations.Therefore, the application's protection domain is when being as the criterion depending on the accompanying claim person of defining.
Claims (16)
1. a driving method, is applied in a display device that comprises multiple display driver circuits, and this driving method comprises:
Described display driver circuit is synchronous to be received an initial pulse and produces a synchronous sequence signal;
One front display driver circuit transmits a first signal to a rear display driver circuit, to make this rear display driver circuit detect according to this and store a signal receive delay, this signal receive delay represents the delay between this first signal that this synchronous sequence signal and this rear display driver circuit receive;
After storing this signal receive delay, this rear display driver circuit temporarily stops receiving a system frequency signal and temporarily stops producing this synchronous sequence signal; And
This front display driver circuit transmits a secondary signal to this rear display driver circuit, shows data to wake this rear display driver circuit up to prepare receiving.
2. driving method according to claim 1, is characterized in that, wakes this rear display driver circuit up and comprises with this step of preparing these demonstration data of reception:
This rear display driver circuit receives this secondary signal to recover to receive this system frequency signal;
This rear display driver circuit receives one the 3rd signal to regenerate this synchronous sequence signal; And
This rear display driver circuit receives one the 4th signal to prepare to receive these demonstration data.
3. driving method according to claim 1, is characterized in that, wakes this rear display driver circuit up and comprises with this step of preparing these demonstration data of reception:
After receiving this secondary signal that this front display driver circuit transmits, this rear display driver circuit receives one the 3rd signal being transmitted by this front display driver circuit, to inform that when this rear display driver circuit will start in to receive these demonstration data, and this rear display driver circuit recovers according to this to receive this system frequency signal and regenerates this synchronous sequence signal.
4. driving method according to claim 1, is characterized in that,
Non-first display driver circuit of described display driver circuit receives this first signal being transmitted by its next-door neighbour's last display driver circuit;
According to this received first signal and this synchronous sequence signal, this non-first display driver circuit of described display driver circuit detects and stores this signal receive delay;
Temporarily stop receiving this system frequency signal and temporarily stop producing after this synchronous sequence signal in this non-first display driver circuit of described display driver circuit, if this non-first display driver circuit of described display driver circuit receives this secondary signal, this non-first display driver circuit of described display driver circuit recovers to receive this system frequency signal;
If this non-first display driver circuit of described display driver circuit receives one the 3rd signal being transmitted by its next-door neighbour's last display driver circuit, this non-first display driver circuit of described display driver circuit regenerates this synchronous sequence signal according to this signal receive delay; And
This non-first display driver circuit of described display driver circuit receives one the 4th signal being transmitted by its front display driver circuit to prepare to receive these demonstration data.
5. driving method according to claim 4, is characterized in that,
When described display driver circuit produces after this synchronous sequence signal, non-last display driver circuit of described display driver circuit transmits the rear display driver circuit of this first signal to its next-door neighbour, to allow its rear display driver circuit detect and store this signal receive delay;
This non-last display driver circuit of described display driver circuit transmit this secondary signal to its next-door neighbour's a rear display driver circuit to wake its next-door neighbour's a rear display driver circuit up;
This non-last display driver circuit of described display driver circuit transmit the 3rd signal to its next-door neighbour's a rear display driver circuit to allow its next-door neighbour's a rear display driver circuit regenerate this synchronous sequence signal; And
This non-last display driver circuit of described display driver circuit transmit the 4th signal to its next-door neighbour's a rear display driver circuit to inform when its next-door neighbour's a rear display driver circuit will start to receive this demonstration data.
6. driving method according to claim 4, is characterized in that,
When described display driver circuit produces after this synchronous sequence signal, described display driver circuit transmits this first signal to its rear display driver circuit, to allow its rear display driver circuit detect and store this signal receive delay;
Described display driver circuit transmit this secondary signal give its rear display driver circuit to wake its rear display driver circuit up;
Described display driver circuit transmit the 3rd signal give its rear display driver circuit to allow its rear display driver circuit regenerate this synchronous sequence signal; And
Described display driver circuit transmit the 4th signal give its rear display driver circuit to inform when its rear display driver circuit will start to receive this demonstration data.
7. driving method according to claim 1, is characterized in that,
Described display driver circuit receives this first signal being transmitted by its front display driver circuit;
According to this received first signal and this synchronous sequence signal, described display driver circuit detects and stores this signal receive delay;
Temporarily stop receiving this system frequency signal and temporarily stop producing after this synchronous sequence signal in described display driver circuit, if described display driver circuit receives this secondary signal, described display driver circuit recovers to receive this system frequency signal;
If described display driver circuit receives one the 3rd signal being transmitted by its front display driver circuit, described display driver circuit regenerates this synchronous sequence signal according to this signal receive delay; And
Described display driver circuit waits for that one the 4th signal being transmitted by its front display driver circuit is to prepare to receive these demonstration data.
8. driving method according to claim 7, is characterized in that,
When described display driver circuit produces after this synchronous sequence signal, described display driver circuit transmits this first signal to its rear display driver circuit, to allow its rear display driver circuit detect and store this signal receive delay;
Described display driver circuit transmit this secondary signal give its rear display driver circuit to wake its rear display driver circuit up;
Described display driver circuit transmit the 3rd signal give its rear display driver circuit to allow its rear display driver circuit regenerate this synchronous sequence signal; And
Described display driver circuit transmit the 4th signal give its rear display driver circuit to inform when its rear display driver circuit will start to receive this demonstration data.
9. a display device, comprising:
Multiple serial connection display driver circuits;
Wherein,
Described display driver circuit is synchronous to be received an initial pulse and produces a synchronous sequence signal;
One front display driver circuit transmits a first signal to a rear display driver circuit, to make this rear display driver circuit detect according to this and store a signal receive delay, this signal receive delay represents the delay between this first signal that this synchronous sequence signal and this rear display driver circuit receive;
After storing this signal receive delay, this rear display driver circuit temporarily stops receiving a system frequency signal and temporarily stops producing this synchronous sequence signal; And
This front display driver circuit transmits a secondary signal to this rear display driver circuit, prepares to receive demonstration data to wake this rear display driver circuit up.
10. display device according to claim 9, is characterized in that,
This rear display driver circuit receives this secondary signal to recover to receive this system frequency signal;
This rear display driver circuit receives one the 3rd signal to regenerate this synchronous sequence signal; And
This rear display driver circuit receives one the 4th signal to prepare to receive these demonstration data.
11. display device according to claim 9, is characterized in that,
After receiving this secondary signal that this front display driver circuit transmits, this rear display driver circuit receives one the 3rd signal being transmitted by this front display driver circuit, to inform that when this rear display driver circuit will start in to receive these demonstration data, and this rear display driver circuit recovers according to this to receive this system frequency signal and regenerates this synchronous sequence signal.
12. display device according to claim 9, is characterized in that,
Non-first display driver circuit of described display driver circuit receives this first signal being transmitted by its next-door neighbour's last display driver circuit;
According to this received first signal and this synchronous sequence signal, this non-first display driver circuit of described display driver circuit detects and stores this signal receive delay;
Temporarily stop receiving this system frequency signal and temporarily stop producing after this synchronous sequence signal in this non-first display driver circuit of described display driver circuit, if this non-first display driver circuit of described display driver circuit receives this secondary signal, this non-first display driver circuit of described display driver circuit recovers to receive this system frequency signal;
If this non-first display driver circuit of described display driver circuit receives one the 3rd signal being transmitted by its next-door neighbour's last display driver circuit, this non-first display driver circuit of described display driver circuit regenerates this synchronous sequence signal according to this signal receive delay; And
This non-first display driver circuit of described display driver circuit receives one the 4th signal being transmitted by its front display driver circuit to prepare to receive these demonstration data.
13. display device according to claim 12, is characterized in that,
When described display driver circuit produces after this synchronous sequence signal, non-last display driver circuit of described display driver circuit transmits the rear display driver circuit of this first signal to its next-door neighbour, to allow its next-door neighbour's a rear display driver circuit detect and store this signal receive delay;
This non-last display driver circuit of described display driver circuit transmit this secondary signal to its next-door neighbour's a rear display driver circuit to wake its next-door neighbour's a rear display driver circuit up;
This non-last display driver circuit of described display driver circuit transmit the 3rd signal to its next-door neighbour's a rear display driver circuit to allow its next-door neighbour's a rear display driver circuit regenerate this synchronous sequence signal; And
This non-last display driver circuit of described display driver circuit transmit the 4th signal to its next-door neighbour's a rear display driver circuit to inform when its next-door neighbour's a rear display driver circuit will start to receive this demonstration data.
14. display device according to claim 12, is characterized in that,
When described display driver circuit produces after this synchronous sequence signal, described display driver circuit transmits this first signal to its rear display driver circuit, to allow its rear display driver circuit detect and store this signal receive delay;
Described display driver circuit transmit this secondary signal give its rear display driver circuit to wake its rear display driver circuit up;
Described display driver circuit transmit the 3rd signal give its rear display driver circuit to allow its rear display driver circuit regenerate this synchronous sequence signal; And
Described display driver circuit transmit the 4th signal give its rear display driver circuit to inform when its rear display driver circuit will start to receive this demonstration data.
15. display device according to claim 9, is characterized in that,
Described display driver circuit receives this first signal being transmitted by its front display driver circuit;
According to this received first signal and this synchronous sequence signal, described display driver circuit detects and stores this signal receive delay;
Temporarily stop receiving this system frequency signal and temporarily stop producing after this synchronous sequence signal in described display driver circuit, if described display driver circuit receives this secondary signal, described display driver circuit recovers to receive this system frequency signal;
If described display driver circuit receives one the 3rd signal being transmitted by its front display driver circuit, described display driver circuit regenerates this synchronous sequence signal according to this signal receive delay; And
Described display driver circuit waits for that one the 4th signal being transmitted by its front display driver circuit is to prepare to receive these demonstration data.
16. display device according to claim 15, is characterized in that,
When described display driver circuit produces after this synchronous sequence signal, described display driver circuit transmits this first signal to its rear display driver circuit, to allow its rear display driver circuit detect and store this signal receive delay;
Described display driver circuit transmit this secondary signal give its rear display driver circuit to wake its rear display driver circuit up;
Described display driver circuit transmit the 3rd signal give its rear display driver circuit to allow its rear display driver circuit regenerate this synchronous sequence signal; And
Described display driver circuit transmit the 4th signal give its rear display driver circuit to inform when its rear display driver circuit will start to receive this demonstration data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110078894.2A CN102693707B (en) | 2011-03-22 | 2011-03-22 | Display device and driving method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110078894.2A CN102693707B (en) | 2011-03-22 | 2011-03-22 | Display device and driving method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102693707A CN102693707A (en) | 2012-09-26 |
| CN102693707B true CN102693707B (en) | 2014-11-05 |
Family
ID=46859094
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110078894.2A Active CN102693707B (en) | 2011-03-22 | 2011-03-22 | Display device and driving method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102693707B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103366714B (en) * | 2013-06-28 | 2016-03-02 | 广东威创视讯科技股份有限公司 | splicing display device synchronous display method and system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000242240A (en) * | 1999-02-24 | 2000-09-08 | Sharp Corp | Display element driving device and display module using the device |
| CN1287345C (en) * | 2001-11-30 | 2006-11-29 | 富士通株式会社 | Semiconductor device and liquid-crystal panel displaying driver |
| CN101051448A (en) * | 2006-03-31 | 2007-10-10 | 恩益禧电子股份有限公司 | Semiconductor integrated circuit device used in data line driver of plane type display apparatus |
| CN1808554B (en) * | 2004-12-01 | 2011-02-09 | 三星电子株式会社 | Driver routing signals to display device with minimized wiring |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4907797B2 (en) * | 2001-08-21 | 2012-04-04 | ルネサスエレクトロニクス株式会社 | Semiconductor integrated circuit and liquid crystal display device |
| JP2007279399A (en) * | 2006-04-06 | 2007-10-25 | Toshiba Corp | Display control apparatus |
| JP2011059492A (en) * | 2009-09-11 | 2011-03-24 | Renesas Electronics Corp | Source driver for display device and control method thereof |
-
2011
- 2011-03-22 CN CN201110078894.2A patent/CN102693707B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000242240A (en) * | 1999-02-24 | 2000-09-08 | Sharp Corp | Display element driving device and display module using the device |
| CN1287345C (en) * | 2001-11-30 | 2006-11-29 | 富士通株式会社 | Semiconductor device and liquid-crystal panel displaying driver |
| CN1808554B (en) * | 2004-12-01 | 2011-02-09 | 三星电子株式会社 | Driver routing signals to display device with minimized wiring |
| CN101051448A (en) * | 2006-03-31 | 2007-10-10 | 恩益禧电子股份有限公司 | Semiconductor integrated circuit device used in data line driver of plane type display apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102693707A (en) | 2012-09-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106033663B (en) | Internal clock signal control for display device, display driver and display device system | |
| CN103680378B (en) | Time schedule controller, display device and driving method thereof | |
| US10074339B2 (en) | Receiver circuit and operating method of the same | |
| CN105786250A (en) | Shift register circuit and driving method thereof | |
| CN104103322B (en) | Shift register circuit | |
| CN104537994B (en) | GOA drive circuit applied to flat panel display and flat panel display | |
| CN101770404B (en) | Watchdog circuit capable of keeping status and method for keeping restart status thereof | |
| CN102693707B (en) | Display device and driving method thereof | |
| CN102760495B (en) | Image display system, shift register and shift register control method | |
| KR102423645B1 (en) | Apparatus for transmitting and receiving a signal, source driver for receiving a status information signal and display device having the same | |
| CN102542976A (en) | Method for triggering source driver and display | |
| KR101853736B1 (en) | Display apparatus | |
| CN104992687A (en) | Display and driving method thereof | |
| CN103092745B (en) | The control method of system journal record and device | |
| CN104036735A (en) | Display driving apparatus, and driving method of display panel | |
| CN110707811B (en) | Fault node positioning method and device of high-voltage multi-converter system | |
| CN104978068A (en) | Touch display driving method, system, display device and application processor | |
| TWI459344B (en) | Display device and driving method applicable thereto | |
| TW201416855A (en) | System power-on monitoring method and electronic apparatus | |
| CN102929828A (en) | Data transmission method and device supporting standard and non-standard I2C (Inter-Integrated Circuit) interface simultaneously | |
| CN114598566A (en) | Communication system and method based on SPI bus | |
| US8680892B2 (en) | Reset pulse encoding and decoding scheme with no internal clock | |
| WO2011104582A1 (en) | Apparatus, display module and methods for controlling the loading of frames to a display module | |
| CN102508738B (en) | Backup method of service information of multi-core processor, inner core and backup inner core | |
| CN105959193A (en) | Train control method and system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |