CN102654973A - Pixel circuit and drive method thereof as well as display panel - Google Patents

Pixel circuit and drive method thereof as well as display panel Download PDF

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CN102654973A
CN102654973A CN2011102331490A CN201110233149A CN102654973A CN 102654973 A CN102654973 A CN 102654973A CN 2011102331490 A CN2011102331490 A CN 2011102331490A CN 201110233149 A CN201110233149 A CN 201110233149A CN 102654973 A CN102654973 A CN 102654973A
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switching transistor
connected
line
gate
transistor
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CN2011102331490A
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CN102654973B (en
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吴博
祁小敬
谭文
高永益
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Abstract

The invention discloses a pixel circuit and relates to the technical field of organic light emitting display. The grid of a first switch transistor of the circuit is connected with a grid line, the source of the first switch transistor is connected with a data line and the drain of the first switch transistor is connected with a first end of a first storage capacitor; the grid of a third switch transistor is connected with the grid line, the source of the third switch transistor is connected with a power line and the drain of the third switch transistor is connected with a first end of a second storage capacitor; the grid of a drive transistor is connected with the second end of the first storage capacitor and a second end of a second storage capacitor, the source of the drive transistor is connected with the first end of the second storage capacitor and the cathode of an OLED (Organic Light Emitting Display) device so as to provide a drive current for the OLED device, and the anode of the OLED device is connected with the power line. The invention further discloses a drive method and an OLED panel. According to the invention, by compensating the drift of the threshold voltage of the drive transistor, the uniformity of the current flowing through the OLED device is improved, and the display effect is enhanced.

Description

像素电路及其驱动方法、显示面板 A pixel circuit and a driving method of the display panel

技术领域 FIELD

[0001] 本发明涉及有机发光显示技术领域,特别涉及一种像素电路及其驱动方法、显示面板。 [0001] The present invention relates to an organic light emitting display technical field, particularly, to a pixel circuit and a driving method of a display panel.

背景技术 Background technique

[0002]有源矩阵有机发光二极体面板(Active Matrix/Organic Light Emitting Diode,AMOLED)能够发光是由驱动薄膜场效应晶体管(Thin Film Transistor, TFT)在饱和状态时产生的电流所驱动,因为输入相同的灰阶电压时,不同的临界电压会产生不同的驱动电流,造成电流的不一致性。 [0002] An active matrix OLED panel (Active Matrix / Organic Light Emitting Diode, AMOLED) capable of emitting light are driven by current generated in the saturated state the driving thin film transistor (Thin Film Transistor, TFT), because when the same input gray scale voltages, different threshold voltages will produce different drive currents, causing inconsistency current. 低温多晶娃技术(Low Temperature Poly-silicon, LTPS)制程上Vth的均匀性非常差,同时Vth也有漂移,因此,传统的2T1C电路亮度均匀性很差。 Low-temperature polycrystalline baby technique (Low Temperature Poly-silicon, LTPS) Vth on process uniformity is very poor, but also drift Vth, and therefore, the conventional 2T1C circuit poor luminance uniformity.

[0003] 图I为传统的采用2个TFT晶体管,I个电容组成的电压驱动型像素电路结构(2T1C)。 [0003] Figure I is a conventional TFT using two transistors, a voltage-driven type I pixel circuit structure (2T1C) the capacitor. 其中开关管T2将数据线上的电压传输到驱动管Tl的栅极,驱动管Tl将这个数据电压转化为相应的电流供给OLED器件,在正常工作时,驱动管Tl应处于饱和区,在一行的 Wherein the switching transistor T2 to transmit data line voltage to the gate of Tl drive tube, drive tube Tl this data voltage converted to the corresponding current supply OLED device, during normal operation, the drive tube Tl should be in the saturation region, in a row of

扫描时间内提供恒定电流。 A constant current during the scanning period. 其电流可表示为: Which current can be expressed as:

I W 9 I W 9

[0004] Ioled = —//„ • Cox • — • (Vdata - Voled - Vthn ) [0004] Ioled = - // "• Cox • - • (Vdata - Voled - Vthn)

[0005] 其中ii n为载流子迁移率,Cox为栅氧化层电容,W/L为晶体管宽长比,Vdata为数据电压,Voled为OLED工作电压,为所有像素单元共享,Vthn为晶体管Tl的阈值电压。 [0005] where ii n is the carrier mobility, Cox is the gate oxide capacitance, W / L is the transistor width to length ratio, Vdata is a data voltage Voled is an OLED operating voltage to all the pixel units sharing, Vthn of the transistor Tl threshold voltage. 由上式可知,如果不同像素单元之间的Vthn不同,则电流存在差异。 From the above equation, if Vthn different between different pixel units, the current differences. 如果像素的Vthn随时间发生漂移,则可能造成先后电流不同,导致残影。 If the drift Vthn pixels over time, it may result in different currents has led to blur. 且由于OLED器件非均匀性引起OLED工作电压不同,也会导致电流差异。 Since the OLED device and inhomogeneity OLED operate at different voltages, will lead to current difference. 最终会导致亮度均匀性很差,显示效果不好。 Eventually lead to poor luminance uniformity, good display effect.

发明内容 SUMMARY

[0006]( 一)要解决的技术问题 [0006] (a) To solve technical problems

[0007] 本发明要解决的技术问题是:如何精确地补偿驱动晶体管的阈值电压漂移,以控制流过OLED的电流的均匀性。 [0007] The present invention is to solve the technical problem: how accurately compensate the drive transistor threshold voltage shift, to control the uniformity of the current flowing through the OLED.

[0008] ( 二)技术方案 [0008] (ii) Technical Solution

[0009] 为解决上述技术问题,本发明提供了一种像素电路,包括:栅线、数据线、电源线、第一信号线、第二信号线、接地极、驱动晶体管、第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第一存储电容、第二存储电容和OLED器件, [0009] In order to solve the above technical problem, the present invention provides a pixel circuit, comprising: gate lines, data lines, power lines, a first signal line, a second signal line, a ground electrode, the driving transistor, a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a first storage capacitor, the storage capacitor and the second OLED device,

[0010] 所述第一开关晶体管的栅极连接所述栅线,源极连接所述数据线,漏极连接第一存储电容的第一端; [0010] The gate of the first switching transistor is connected to the gate line, a source connected to the data line, a drain connected to a first terminal of the first storage capacitor;

[0011] 所述第三开关晶体管的栅极连接所述栅线,源极连接所述电源线,漏极连接所述第二存储电容的第一端; [0011] the gate of the third switching transistor is connected to the gate line, a source connected to said power supply line, a drain connected to the first terminal of the second storage capacitor;

[0012] 所述驱动晶体管的栅极连接所述第一存储电容的第二端和第二存储电容的第二端,源极连接所述第二存储电容的第一端和所述OLED器件的阴极,用于为所述OLED器件提供驱动电流,所述OLED器件阳极连接所述电源线; [0012] The gate of the driving transistor is connected to the second end and the second end of the second storage capacitor, a first storage capacitor connected to the source electrode of the second storage capacitor and a first terminal of the OLED device a cathode for providing a driving current to the OLED device, the OLED device anode connected to the power supply line;

[0013] 所述第二开关晶体管用于根据所述第一信号线控制所述驱动晶体管的栅极和漏极的通断,所述第四开关晶体管用于根据所述第二信号线控制所述驱动晶体管的漏极和所述接地极的通断。 [0013] The second switching transistor for on-off controlling the gate and drain of the driving transistor according to the first signal line, a fourth switching transistor for controlling the second signal according to the line the drain of said drive transistor and the ground electrode on and off.

[0014] 其中,所述第二开关晶体管的栅极连接第一信号线,源极连接所述驱动晶体管的栅极,漏极连接所述驱动晶体管的漏极。 [0014] wherein a first signal line connected to the gate of the second switching transistor, a source connected to the gate of the driving transistor, a drain connected to the drain of the driving transistor.

[0015] 其中,所述第四开关晶体管的栅极连接第二信号线,源极连接接地极,漏极连接所述驱动晶体管的漏极。 [0015] wherein a second signal line connected to the gate of the fourth switching transistor, a source connected to ground, a drain connected to the drain of the driving transistor.

[0016] 其中,所述驱动晶体管、第一开关晶体管、第二开关晶体管、第三开关晶体管及第四开关晶体管均为P型TFT。 [0016] wherein the driving transistor, a first switching transistor, the second switching transistor, the third switching transistor and a fourth switching transistor are P type TFT. [0017] 本发明还提供了一种上述任一项所述的像素电路的驱动方法,包括以下步骤: [0017] The present invention further provides a method of driving the pixel circuit of any preceding one, comprising the steps of:

[0018] SI :分别施加低电压至栅线、第一信号线和第二信号线,导通所述第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管,施加高电压至数据线,使得所述驱动晶体管达到饱和状态; [0018] SI: a low voltage are respectively applied to the gate line, a first signal line and second signal line, said first switching transistor is turned on, the second switching transistor, a third switching transistor, a fourth switching transistor, a high voltage is applied to the data line, so that the driving transistor is saturated;

[0019] S2:施加一高电压至所述第二信号线,关断所述第四开关晶体管,第一存储电容放电,使得第二存储电容充电至所述驱动晶体管的阈值电压; [0019] S2: applying a high voltage to the second signal line, said fourth switching transistor is turned off, the first storage capacitor is discharged, so that the second storage capacitor is charged to the threshold voltage of the driving transistor;

[0020] S3:施加一高电压至所述第一信号线,关断所述第二开关晶体管,施加一低电压至所述数据线; [0020] S3: applying a high voltage to the first signal line, said second switching transistor is turned off, a low voltage is applied to the data line;

[0021] S4:施加一高电压至所述栅线,关断所述第一开关晶体管和第三开关晶体管,施加一低电压至所述第二信号线,导通所述第四开关晶体管,利用存储在所述第二存储电容的电压驱动所述OLED器件发光。 [0021] S4: applying a high voltage to the gate line, said first switching transistor is turned off and the third switching transistor, a low voltage is applied to the second signal line, said fourth switching transistor is turned on, using the stored light emission in the second storage capacitor voltage driving the OLED device.

[0022] 本发明还提供了一种显示面板,包括上述任一项所述的像素电路。 [0022] The present invention further provides a pixel circuit for a display panel, comprising the any of the above.

[0023] 其中,所述像素电路形成在阵列基板上,所述阵列基板上设置有多条数据线和栅线,所述多条数据线和栅线限定了多个所述的像素电路;所述阵列基板还包括驱动芯片,用于为所述栅线、数据线、第一信号线和第二信号线提供时序信号,为电源线提供电源信号。 [0023] wherein the pixel circuit is formed on the array substrate, the array substrate disposed on a plurality of data lines and the gate lines, the plurality of data lines and gate lines defining a plurality of said pixel circuits; the said array substrate further comprises a driving chip for data line to the gate line, a first signal line and second signal lines to provide a timing signal to provide a signal to the power supply line.

[0024](三)有益效果 [0024] (c) beneficial effect

[0025] 通过本发明的像素电路及其驱动方法有效地补偿了P型TFT驱动管的阈值电压的非均匀性,改善了流过OLED的电流的均匀性,达到了更好的显示效果。 [0025] By driving the pixel circuit and method of the present invention effectively compensates for the non-uniformity of the threshold voltage of the P-type driving transistor TFT, improved uniformity of current flowing through the OLED, to achieve a better display effect.

附图说明 BRIEF DESCRIPTION

[0026] 图I是现有技术中的2T1C像素电路结构示意图; [0026] FIG. I is a schematic diagram of a pixel circuit configuration of 2T1C prior art;

[0027] 图2是本发明实施例的一种像素电路结构示意图; [0027] FIG. 2 is a schematic circuit diagram of a pixel structure of an embodiment of the present invention;

[0028] 图3是驱动图2中电路的时序信号图; [0028] FIG. 2 FIG. 3 is a driving timing signal of the circuit of FIG;

[0029] 图4是图2中电路工作过程中各阶段的等效电路图。 [0029] FIG. 4 is an equivalent circuit diagram of each stage in the circuit of FIG. 2 during operation.

具体实施方式 Detailed ways

[0030] 下面结合附图和实施例,对本发明的具体实施方式作进一步详细描述。 [0030] The following embodiments and the accompanying drawings, specific embodiments of the present invention will be further described in detail. 以下实施例用于说明本发明,但不用来限制本发明的范围。 The following examples serve to illustrate the present invention but are not intended to limit the scope of the present invention.

[0031] 实施例I[0032] 本实施例中采用5T2C电路通过补偿Vth,使得驱动管的I = K (Vgs-Vth)2和驱动晶体管的阈值电压Vth无关,达到流过OLED的电流一致,改善均匀性。 [0031] Example I [0032] The present embodiment employed 5T2C circuit by compensating Vth of, so that the I drive tube = threshold voltage Vth K (Vgs-Vth) 2 and a driving transistor regardless reaches flows consistent with the OLED current, improve uniformity. 具体如图2所示,本实施例的像素电路包括:栅线SCAN、数据线DATA、电源线V、第一信号线CR1、第二信号线CR2、接地极GND、第一开关晶体管Tl、第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4、驱动晶体管DTFT、第一存储电容Cl、第二存储电容C2和OLED器件。 Specifically, as shown in FIG. 2, the pixel circuit of this embodiment comprises: a gate line SCAN, the data line DATA, the power supply line V, a first signal line CR1, a second signal line CR2, grounding the GND, a first switching transistor Tl, the first second switching transistor T2, a third switching transistor T3, a fourth switching transistor T4, the driving transistor DTFT, a first storage capacitor Cl, the second storage capacitor C2 and the OLED device. 其中,5个晶体管都为P型晶体管。 Wherein the five transistors are P-type transistors. [0033] 第一开关晶体管Tl的栅极连接栅线SCAN,源极连接数据线DATA,漏极连接第一存储电容Cl的第一端,在预充和补偿阶段,根据栅线SCAN的控制信号向第一存储电容Cl提供数据线DATA的电压Vdata。 A gate connected to the gate lines [0033] The first switching transistor Tl SCAN, a source connected to a data line DATA, a drain connected to a first end of the first storage capacitor Cl, and the compensating precharge phase, the control signal according to the gate line SCAN providing voltage Vdata of the data line dATA to the first storage capacitor Cl. 第三开关晶体管T3的栅极连接栅线SCAN,源极连接电源线V,漏极连接第二存储电容C2的第一端,在预充和补偿阶段,根据栅线SCAN的控制信号向第二存储电容C2提供电源电压VDD。 Third switching transistor T3 is connected to the gate of the gate line SCAN, a source connected to the power supply line V, a drain connected to a first end of the second storage capacitor C2, and the pre-charge compensation stage gate line according to a second control signal SCAN a storage capacitor C2 provides the power supply voltage VDD. 驱动晶体管DTFT的栅极连接第一存储电容Cl的第二端和第二存储电容C2的第二端,源极连接第二存储电容C2的第一端和OLED器件的阴极,用于为OLED器件提供驱动电流,OLED器件阳极连接电源线V。 And the second ends of the second storage capacitor C2 is connected to the gate of the driving transistor DTFT first storage capacitor Cl, a source electrode connected to a cathode C2 of the second storage capacitor and a first terminal of the OLED device, the OLED device is used providing the driving current, OLED devices connected to the anode power source line V. 第一存储电容Cl在补偿阶段时通过驱动晶体管DTFT放电,使得A、B点间的电压为驱动晶体管DTFT的阈值电压,此时,第二存储电容C2的电压也为驱动晶体管DTFT的阈值电压。 First storage capacitor Cl at the compensation stage through the drive transistor DTFT discharge, so that A, point B is the voltage between the threshold voltage of the driving transistor DTFT at this time, the voltage of the second storage capacitor C2 is also the threshold voltage of the transistor DTFT. 第二开关晶体管T2用于根据第一信号线CRl控制驱动晶体管DTFT的栅极和漏极的通断,本实施例中,第二开关晶体管T2的栅极连接第一信号线CR1,源极连接驱动晶体管DTFT的栅极,漏极连接驱动晶体管DTFT的漏极。 Second switching transistor T2 for controlling the gate and drain of the driving transistor DTFT-off according to a first signal line CRl, according to the present embodiment, the gate of the second switching transistor T2 is connected to a first signal line CR1, the source is connected DTFT gate of the driving transistor, a drain connected to the drain of the driving transistor DTFT. 第四开关晶体管T4用于根据第二信号线CR2控制驱动晶体管DTFT的漏极和接地极GND的通断,本实施例中,第四开关晶体管T4的栅极连接第二信号线CR2,源极连接接地极GND,漏极连接驱动晶体管DTFT的漏极。 The fourth switching transistor T4 GND electrode for the drain-off in accordance with a second signal line and the ground controls the driving transistor DTFT CR2, and the present embodiment, the gate of the fourth switching transistor T4 is connected to the second signal line CR2, the source electrode connected to the ground GND, a drain connected to the drain of the driving transistor DTFT.

[0034] 本实施例还提供了上述像素电路的驱动方法。 [0034] The present embodiment further provides a method of driving the pixel circuits. 如图3所示,为驱动该电路的时序信号图,可看出包括(a)〜⑷四个阶段。 As shown in FIG 3, is a timing signal diagram of the driving circuit, it can be seen comprising (a) ~⑷ four stages.

[0035] 阶段(a),其等效电路图如图4中(a)所示。 [0035] Stage (a), which is an equivalent circuit diagram of FIG. 4 (a) shown in FIG. 栅线SCAN的信号、第一信号线CRl的信号、第二信号线CR2的信号均为低电压,第一开关晶体管Tl、第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4都导通,数据线DATA的信号Vdata输入高电压Vh。 The gate signal line SCAN, the first signal line a signal CRl, CR2 second signal lines are low-voltage signal, the first switching transistor Tl, the second switching transistor T2, the third switching transistor T3, a fourth switching transistor T4 are turned on, the data signal Vdata line dATA input high voltage Vh. 此时,A点电压VA为GND的电压,B点电压VB为电源线V的电压VDD,C点电压VC为Vh,驱动晶体管DTFT的栅源电压Vgs = VAB = -VDD,远小于Vth,驱动晶体管DTFT为饱和状态。 At this point, A point voltage VA to voltage GND, B node voltage VB is the voltage V of the power source line VDD, C point voltage VC is Vh, the gate-source voltage Vgs of the driving transistor DTFT = VAB = -VDD, far less than Vth, the drive DTFT transistor saturated state. 第一存储电容Cl的电压为Vh,第二存储电容C2的电压为VDD。 Voltage of the first storage capacitor Cl is Vh, a voltage of the second storage capacitor C2 is VDD.

[0036] 阶段(b),其等效电路图如图4中(b)所示。 [0036] Stage (b), which is an equivalent circuit diagram of FIG. 4 (b) shown in FIG. 第二信号线CR2的信号变为高电压,第四开关晶体管T4关闭,断开A点与GND的连接,B点电压保持为电源线V的电压VDD。 A second signal line CR2 becomes a high voltage signal, the fourth switching transistor T4 is turned off, disconnecting the GND connecting point A, B of the voltage holding point voltage V of the power source line VDD. 此时,驱动晶体管DTFT等效为一个二极体,第一存储电容Cl通过驱动晶体管DTFT开始放电,直至VAB等于驱动晶体管DTFT的阈值电压Vth。 At this time, the driving transistor DTFT is equivalent to a diode, a first storage capacitor Cl begins to discharge through the drive transistor DTFT, until the drive transistor DTFT VAB is equal threshold voltage Vth. A点电压为VB+Vth = VDD+Vth,第一存储电容Cl 两端电压为Vcl = VC-VA = Vh-Vth-VDD。 A point voltage is VB + Vth = VDD + Vth, a voltage across the first storage capacitor Cl is Vcl = VC-VA = Vh-Vth-VDD.

[0037] 阶段(c),其等效电路图如图4中(C)所示。 [0037] Stage (c), which is an equivalent circuit diagram in FIG. 4 (C) shown in FIG. 第一信号线CRl的信号变为高电压,第二开关晶体管T2关闭,数据线DATA信号写入低电压Vl,由于C点电压突变为Vl (VI < Vh),A点电压会由VDD+Vth下降为VDD+Vth+(Vl-Vh) X cl/(cl+c2),B点电压仍为VDD,此时第二存储电容C2两端电压为Vc2 = VA-VB = Vth+(Vl-Vh) Xcl/(cl+c2),cl和c2分别为第一存储电容Cl和第二存储电容C2的电容值。 CRl first signal line becomes a high voltage signal, the second switching transistor T2 is turned off, the data signal line DATA is written the low voltage Vl, since the voltage at point C is mutated to Vl (VI <Vh), A point voltage of VDD + Vth falls to VDD + Vth + (Vl-Vh) X cl / (cl + c2), B-point voltage is still VDD, at this time the voltage across the second storage capacitor C2 is Vc2 = VA-VB = Vth + (Vl-Vh) Xcl / (cl + c2), cl and c2, respectively, the capacitance value of the first storage capacitor Cl and the second storage capacitor C2 is.

[0038] A点电压变化推导如下:根据电荷守恒,即在第一存储电容Cl和第二存储电容C2连通的电极A点,没有电荷的增加或减少。 [0038] A voltage change point is derived as follows: According to charge conservation, i.e. at the point the electrode A first storage capacitor Cl and the second storage capacitor C2 communication, no increase or decrease in charge. 假设在阶段(b),A点电压为VA,VA = VDD+Vth ;阶段(c)A点电压为VA',B点电压保持VDD。 Assuming stage (b), A point voltage is VA, VA = VDD + Vth; stage (c) A point voltage VA ', B-point voltage holding VDD.

[0039]在阶段(b)时,A 点电荷Q = cl (Vh-VA)+c2 (VB-VA) = cl [Vh- (VDD+Vth)]+c2 [VDD- (VDD+Vth) ] = cI (Vh-VDD-Vth) -c2 X Vth ;在阶段(c)时,A 点电荷Q =cl(Vdata-VA' )+c2(VB-VA' ) = cl(Vl-VA' )+c2(VDD-VA') [0039] In stage (b), A point charge Q = cl (Vh-VA) + c2 (VB-VA) = cl [Vh- (VDD + Vth)] + c2 [VDD- (VDD + Vth)] = cI (Vh-VDD-Vth) -c2 X Vth; in stage (c), A point charge Q = cl (Vdata-VA ') + c2 (VB-VA') = cl (Vl-VA ') + c2 (VDD-VA ')

[0040] 由电荷守恒可知,阶段(b)时的A点电荷与阶段(C)时的A点电荷相等,SP :cl (Vh-VDD-Vth)-c2XVth = cl (Vl-VA' )+c2(VDD-VA'),便可推出阶段(c)时的A 点电压VA' = VDD+Vth+ (Vl-Vh) Xcl/(cl+c2)。 [0040] understood by the conservation of charge, the point A is equal to the point A and the charge phase (C) at stage (b) the charge, SP: cl (Vh-VDD-Vth) -c2XVth = cl (Vl-VA ') + c2 (VDD-VA '), can be introduced at point a when the voltage VA of the stage (c)' = VDD + Vth + (Vl-Vh) Xcl / (cl + c2).

[0041] 阶段(d),其等效电路图如图4中(d)所示。 [0041] Stage (d), which is an equivalent circuit diagram in FIG. 4 (d),. 栅线SCAN的信号变为高电压,第二信号线CR2的信号变为低电压,第一开关晶体管Tl、第三开关晶体管T3关闭,第四开关晶体管T4导通,驱动晶体管DTFT工作,OLED器件开始发光,B点电压变为VDD-Vth_oled。 Gate line SCAN signal becomes a high voltage, a second signal line CR2 signal goes LOW, the first switching transistor Tl, the third switching transistor T3 is turned off, the fourth switching transistor T4 is turned on, the driving transistor DTFT work, the OLED device light emission is started, B-point voltage becomes VDD-Vth_oled. 由于第二存储电容C2的电压保持作用,保持驱动晶体管DTFT的栅源电压Vgs不变,相应的A点电压会变为:Vth+(Vl-Vh) Xcl/(cl+c2)+VDD-Vth_oled,驱动晶体管5 的栅源电压Vgs = VAB=Vth+(Vl-Vh) Xcl/(cl+c2),即为第二存储电容C2的电压。 Since the second storage capacitor C2 the voltage holding function of holding the drive transistor gate-source voltage Vgs DTFT constant, the corresponding voltage at point A becomes: Vth + (Vl-Vh) Xcl / (cl + c2) + VDD-Vth_oled, 5 drive transistor gate-source voltage Vgs = VAB = Vth + (Vl-Vh) Xcl / (cl + c2), is the voltage of the second storage capacitor C2. 由该电压驱动OLED器件,此时流过OLED 器件的电流为:I = K(Vgs-Vth)2 = K[Vth+(Vl-Vh) X cl/(cl+c2)-Vth)2 =K[ (Vl-Vh) Xcl/(cl+c2)]2,该电流I使OLED开始发光,直到下一帧。 The current generated by the driving voltage of the OLED device, the OLED device is flowing at this time is: I = K (Vgs-Vth) 2 = K [Vth + (Vl-Vh) X cl / (cl + c2) -Vth) 2 = K [ (Vl-Vh) Xcl / (cl + c2)] 2, the current I OLED that the light emission is started, until the next frame. 其中WK = W/LXCXu,W是驱动晶体管DTFT沟道的宽度,L是驱动晶体管DTFT沟道的长度,C是驱动晶体管DTFT沟道与栅极间的电容,u是驱动晶体管DTFT沟道的载流子迁移率。 Wherein WK = W / LXCXu, W is the channel width of the driving transistor DTFT, L is the channel length of the driving transistor DTFT, C is the capacitance between the channel and the gate of the driving transistor DTFT, u is the carrier of a channel of the driving transistor DTFT mobility.

[0042] 由上述电流I的公式可看出,其中没有出现Vth,即I和驱动晶体管DTFT的阈值电压Vth没有关系。 [0042] As can be seen from the formula of the current I, where Vth does not occur, i.e., I, and the drive transistor threshold voltage Vth of the DTFT not matter. 另外,电路中流过OLED的电流只与输入的数据线电压Vh、VI及电容有关,保持驱动晶体管DTFT工作在饱和区,驱动电流不受电源线IR-Dix)p(内阻压降)影响。 Further, the circuit current flowing through the OLED only the data input line voltage Vh, VI and related capacitor holding the drive transistor DTFT in the saturation region, the driving current from the power source line IR-Dix) p (resistance drop) impact. 因此,本实施例中的像素电路可以改善电流的均匀性,达到亮度的均匀,提高显示效果。 Thus, the pixel circuit according to the present embodiment can improve the uniformity of the current embodiment, to achieve uniform brightness, improving the display effect.

[0043] 实施例2 [0043] Example 2

[0044] 本实施例中提供了一种显示面板,包括实施例I中的像素电路,该像素电路形成在阵列基板上,该阵列基板上设置有多条数据线和栅线,多条数据线和栅线限定了多个上述的像素电路;阵列基板还包括驱动芯片,用于为栅线、数据线、第一信号线和第二信号线提供时序信号,为电源线提供电源信号。 [0044] The present embodiment provides a display panel including a pixel circuit in Example I embodiment, the pixel circuit is formed on the array substrate, the array substrate disposed on a plurality of data lines and the gate lines, a plurality of data lines and gate lines defining a plurality of pixel circuits; array substrate further includes a driving chip, for providing a timing signal to the gate lines, data lines, a first signal line and second signal line, provides power for the power line signal.

[0045] 以上实施方式仅用于说明本发明,而并非对本发明的限制,有关技术领域的普通技术人员,在不脱离本发明的精神和范围的情况下,还可以做出各种变化和变型,因此所有等同的技术方案也属于本发明的范畴,本发明的专利保护范围应由权利要求限定。 [0045] The above embodiments are merely illustrative of the present invention, and are not restrictive of the invention, relating to ordinary skill in the art, without departing from the spirit and scope of the present invention, can make various changes and modifications , all equivalent technical solutions also within the scope of the present invention, the scope of the present invention patent is defined by the appended claims.

Claims (7)

1. 一种像素电路,包括:栅线、数据线、电源线、第一信号线、第二信号线、接地极、驱动晶体管、第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第一存储电容、第二存储电容和OLED器件,其特征在于, 所述第一开关晶体管的栅极连接所述栅线,源极连接所述数据线,漏极连接第一存储电容的第一端; 所述第三开关晶体管的栅极连接所述栅线,源极连接所述电源线,漏极连接所述第二存储电容的第一端; 所述驱动晶体管的栅极连接所述第一存储电容的第二端和第二存储电容的第二端,源极连接所述第二存储电容的第一端和所述OLED器件的阴极,用于为所述OLED器件提供驱动电流,所述OLED器件阳极连接所述电源线; 所述第二开关晶体管用于根据所述第一信号线控制所述驱动晶体管的栅极和漏极的通断,所述第四开关晶体管 1. A pixel circuit comprising: gate lines, data lines, power lines, a first signal line, a second signal line, a ground electrode, the driving transistor, a first switching transistor, a second switching transistor, a third switching transistor, the first fourth switching transistor, a first storage capacitor, the storage capacitor and the second OLED device, wherein the gate line connected to a gate of the first switching transistor, a source connected to the data line, a drain connected to a first memory a first terminal of the capacitor; said third gate connected to the gate line of the switching transistor, a source connected to the power supply line, a drain connected to a first end of the second storage capacitor; a gate of the driving transistor the first storage capacitor connected to a second end and a second end of the second storage capacitor, a source connected to the first end of the second storage capacitor and a cathode of the OLED device, the OLED device for providing driving current, the anode of the OLED device is connected to the power source line; the second switching transistor for controlling the driving of the gate and drain of the transistor on-off signal according to said first line, said fourth switching transistor 于根据所述第二信号线控制所述驱动晶体管的漏极和所述接地极的通断。 The ground and the drain of said second signal line for controlling the driving transistor on and off.
2.如权利要求I所述的像素电路,其特征在于,所述第二开关晶体管的栅极连接第一信号线,源极连接所述驱动晶体管的栅极,漏极连接所述驱动晶体管的漏极。 2. The pixel circuit according to claim I, characterized in that the gate of the second switching transistor is connected to a first signal line, a source connected to the gate of the drive transistor, connected to the drain of the driving transistor drain.
3.如权利要求I所述的像素电路,其特征在于,所述第四开关晶体管的栅极连接第二信号线,源极连接接地极,漏极连接所述驱动晶体管的漏极。 3. The pixel circuit according to claim I, characterized in that a second signal line connected to the gate of the fourth switching transistor, a source connected to ground, a drain connected to the drain of the driving transistor.
4.如权利要求I〜3中任一项所述的像素电路,其特征在于,所述驱动晶体管、第一开关晶体管、第二开关晶体管、第三开关晶体管及第四开关晶体管均为P型TFT。 The pixel circuit according I~3 claims, wherein said driving transistor, a first switching transistor, the second switching transistor, the third and the fourth switching transistor are P-type switching transistor TFT.
5. 一种如权利要求I〜4中任一项所述的像素电路的驱动方法,包括以下步骤: SI :分别施加低电压至栅线、第一信号线和第二信号线,导通所述第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管,施加高电压至数据线,使得所述驱动晶体管达到饱和状态; S2:施加一高电压至所述第二信号线,关断所述第四开关晶体管,第一存储电容放电,使得第二存储电容充电至所述驱动晶体管的阈值电压; S3:施加一高电压至所述第一信号线,关断所述第二开关晶体管,施加一低电压至所述数据线; S4 :施加一高电压至所述栅线,关断所述第一开关晶体管和第三开关晶体管,施加一低电压至所述第二信号线,导通所述第四开关晶体管,利用存储在所述第二存储电容的电压驱动所述OLED器件发光。 A driving method of a pixel circuit according to any one of the I~4 claim, comprising the steps of: SI: a low voltage are respectively applied to the gate line, a first signal line and second signal lines, are turned on said first switching transistor, the second switching transistor, a third switching transistor, a fourth switching transistor, a high voltage is applied to the data line, so that the driving transistor is saturated; S2: applying a high voltage to the second signal line , turning off the fourth switching transistor, a first storage capacitor is discharged, so that the second storage capacitor is charged to the threshold voltage of the driving transistor; S3: applying a high voltage to the first signal line, said first off second switching transistor, a low voltage is applied to the data line; S4: applying a high voltage to the gate line, said first switching transistor is turned off and the third switching transistor, a low voltage is applied to said second signal line, the fourth switching transistor is turned on, using the stored light emission in the second storage capacitor voltage driving the OLED device.
6. 一种显示面板,其特征在于,包括权利要求I〜4中任一项所述的像素电路。 A display panel comprising a pixel circuit as claimed in claim in any one of the I~4.
7.如权利要求6所述的显示面板,其特征在于,所述像素电路形成在阵列基板上,所述阵列基板上设置有多条数据线和栅线,所述多条数据线和栅线限定了多个所述的像素电路;所述阵列基板还包括驱动芯片,用于为所述栅线、数据线、第一信号线和第二信号线提供时序信号,为电源线提供电源信号。 The display panel according to claim 6, wherein said pixel circuit is formed on the array substrate, the array substrate disposed on a plurality of data lines and the gate lines, the plurality of data lines and gate lines defining a plurality of said pixel circuits; the array substrate further comprises a driving chip, a data line to the gate line, a first signal line and second signal lines to provide a timing signal to provide a signal to the power supply line.
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