CN102646710A

CN102646710A - Super-junction vertical double-diffusion metal oxide semiconductor tube

Info

Publication number: CN102646710A
Application number: CN2012101010124A
Authority: CN
Inventors: 孙伟锋; 祝靖; 吴逸凡; 钱钦松; 陆生礼; 时龙兴
Original assignee: Southeast University
Current assignee: Southeast University
Priority date: 2012-04-06
Filing date: 2012-04-06
Publication date: 2012-08-22
Anticipated expiration: 2032-04-06
Also published as: CN102646710B

Abstract

The invention provides a super-junction vertical double-diffusion metal oxide semiconductor tube, comprising an N-type heavily-doped silicon substrate which is used as a drain region, wherein drain electrode metal is arranged on the lower surface of the N-type heavily-doped silicon substrate; an N-type doped silicon epitaxial layer is arranged on the upper surface of the N-type heavily-doped silicon substrate; a discontinuous P-type doped columnar semiconductor region is arranged in the N-type doped silicon epitaxial layer; a first P-type doped semiconductor region is arranged on the P-type doped columnar semiconductor region; the first P-type doped semiconductor region is arranged in the N-type doped silicon epitaxial layer; and the first P-type doped semiconductor region is internally provided with a second P-type doped semiconductor contact region and an N-type doped semiconductor source region. The super-junction vertical double-diffusion metal oxide semiconductor tube is characterized in that: the N-type doped semiconductor source region is connected with active electrode metal; the second P-type doped semiconductor contact region is connected with substrate metal; polycrystalline silicon which is used as an resistor is arranged below the active electrode metal and the substrate metal; and the polycrystalline silicon is respectively connected with the active electrode metal and the substrate metal, and top layer metal is connected with the substrate metal.

Description

A kind of ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube

Technical field

The invention belongs to the semiconductor power device technology field; Relate to and receive the silicon system high voltage power device that mobile ion stains to be influenced; The silicon system of being specially adapted to ultra-junction longitudinal bilateral diffusion metal oxide field-effect transistor (Superjunction VDMOS, promptly hyperconjugation VDMOS all is abbreviated as hyperconjugation VDMOS once); In particular, relate to a kind of terminal structure that under the high temperature reverse bias condition, has the silicon system hyperconjugation VDMOS of high reliability.

Background technology

At present; Power device in the application in fields such as daily life, production more and more widely; Power metal oxide semiconductor field-effect transistor particularly; Because they have switching speed, less drive current, the safety operation area of broad faster, therefore received numerous researchers' favor.Nowadays, power device is just towards improving operating voltage, increase operating current, reducing conducting resistance and integrated direction develops.The invention of ultra knot is the technical milestone of power metal oxide semiconductor field-effect transistor.

Power device not only gains great popularity in sophisticated technology fields such as national defence, space flight, aviations, and in industry, fields such as civilian household electrical appliances are paid attention to by people too.Growing along with power device, its reliability has also become the focus of people's common concern.Power device is that electronic equipment provides the power supply of desired form and motor device that driving is provided, and almost all electronic equipments and motor device all need be used power device, so the research of device reliability is had great important.

The definition of reliability be product under defined terms with official hour in, accomplish the ability of predetermined function.So-called defined terms mainly refers to use the conditions and environment condition.Service condition is meant that those will enter into product or material internal and acting stress condition, like electric stress, chemical stress and physical stress.The scope of reliability test is very extensive, its objective is in order to examine electronic products such as electronic devices and components in storage, transportation and the course of work, possibly run into various complicated mechanical, environmental condition.

Under the condition that device drain terminal voltage rises rapidly, the reacting condition of voltage forms displacement current on parasitic capacitance, and displacement current acts on the parasitic triode base resistance and produces voltage, causes parasitic triode to be opened, and makes device failure.Therefore, the reliability of raising device drain terminal change in voltage has extremely important meaning.

Summary of the invention

The invention provides super-junction metal oxide field effect transistor with high reliability; Related structure is when parasitic triode is opened; Electric current flows through the resistance that connects source electrode, makes the emitter current potential raise, and lets the potential difference of parasitic triode base and emitter reduce; Thereby suppress the unlatching of parasitic triode, improve the reliability of device drain terminal change in voltage.

The present invention adopts following technical scheme:

A kind of ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube; Comprise: the double N type heavily doped silicon substrate of doing the drain region; Lower surface at N type heavily doped silicon substrate is provided with drain metal, is provided with N type doped epitaxial silicon layer at the upper surface of N type heavily doped silicon substrate, in N type doped epitaxial silicon layer, is provided with and is interrupted discontinuous P type doping column semiconductor region; On P type doping column semiconductor region, be provided with the first type doped semiconductor area; And a P type doped semiconductor area is positioned at N type doped epitaxial layer, in a P type doped semiconductor area, is provided with the 2nd P type heavily-doped semiconductor contact zone and N type heavily-doped semiconductor source region, is being provided with gate oxide and gate oxide above the N type doped epitaxial silicon layer above the N type doped epitaxial silicon layer segment between the adjacent P type doping column semiconductor region; Above gate oxide, be provided with polysilicon gate; On polysilicon gate, be provided with the first type oxide layer, it is characterized in that, on N type heavily-doped semiconductor source region, be connected with source metal; On the 2nd P type heavily-doped semiconductor contact zone, be connected with substrate metal; Below source metal and substrate metal, be provided with polysilicon, and polysilicon is connected with substrate metal with source metal respectively, on substrate metal, is connected with top-level metallic as resistance.

Compared with prior art, the present invention has following advantage:

1, a kind of ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube structure that the present invention relates to is compared with traditional ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube structure; Substrate metal and source metal are separated, and couple together substrate metal and source metal with polysilicon resistance.When parasitic triode was opened, electric current flow through the resistance that connects source electrode, made the emitter current potential raise, and let the potential difference of parasitic triode base and emitter reduce, thereby suppressed the unlatching of parasitic triode, improved device drain terminal change in voltage reliability; Simultaneously, compare with traditional ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube structure in a kind of ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube structure that the present invention relates to, the area of device can not increase.

Description of drawings

Fig. 1 is the overall structure sketch map of the related a kind of ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube of content of the present invention.

Fig. 2 be a kind of ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube structure involved in the present invention overlook the level sketch map.

Fig. 3 is the profile of a kind of ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube architecture active area involved in the present invention among Fig. 2.

Fig. 4 is a kind of ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube structural transition district profile involved in the present invention among Fig. 2.

Fig. 5 is the section principle schematic of the related a kind of ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube architecture of summary of the invention.

Embodiment

A kind of ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube; Comprise: the double N type heavily doped silicon substrate 2 of doing the drain region; Lower surface at N type heavily doped silicon substrate 2 is provided with drain metal 1; Upper surface at N type heavily doped silicon substrate 2 is provided with N type doped epitaxial silicon layer 3, in N type doped epitaxial silicon layer 3, is provided with to be interrupted discontinuous P type doping column semiconductor region 4, on P type doping column semiconductor region 4, is provided with a P type doped semiconductor area 5; And a P type doped semiconductor area 5 is positioned at N type doped epitaxial layer 3; In a P type doped semiconductor area 5, be provided with the 2nd P type heavily-doped semiconductor contact zone 7 and N type heavily-doped semiconductor source region 6,, above gate oxide 8, be provided with polysilicon gate 9 being provided with gate oxide 8 and gate oxide 8 above the N type doped epitaxial silicon layer 3 above the N type doped epitaxial silicon layer segment between the adjacent P type doping column semiconductor region 4; On polysilicon gate 9, be provided with the first type oxide layer 10; On N type heavily-doped semiconductor source region 6, be connected with source metal 11, on the 2nd P type heavily-doped semiconductor contact zone 7, be connected with substrate metal 12, below source metal 11 and substrate metal 12, be provided with polysilicon 13 as resistance; And polysilicon 13 is connected with substrate metal 12 with source metal 11 respectively, on substrate metal 12, is connected with top-level metallic 14.

With reference to the accompanying drawings, specific embodiments of the invention is made more detailed explanation:

Fig. 1 is the overall structure sketch map of the super-junction metal oxide field effect transistor with high reliability that the present invention relates to.Wherein I is the termination environment, and II is a transition region, and III is an active area, the concrete term of reference of IV.

Fig. 2 be the super-junction metal oxide field effect transistor structure with high reliability of the present invention overlook the level sketch map; The top layer level is represented with solid line; Level below the top layer level dots; Generalized section along AA ', BB ' among Fig. 2 is respectively Fig. 3, Fig. 4, can see top-down Rankine-Hugoniot relations successively at all levels through Fig. 3 and 4.15 for connecting the hole of top-level metallic 14 and substrate metal 12 among Fig. 2, and 16 is the hole that polysilicon resistance 13 connects source metal 11 and substrate metal 12.

Claims

1. ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube; Comprise: the double N type heavily doped silicon substrate (2) of doing the drain region; Lower surface at N type heavily doped silicon substrate (2) is provided with drain metal (1); Upper surface at N type heavily doped silicon substrate (2) is provided with N type doped epitaxial silicon layer (3); In N type doped epitaxial silicon layer (3), be provided with and be interrupted discontinuous P type doping column semiconductor region (4), on P type doping column semiconductor region (4), be provided with a P type doped semiconductor area (5), and a P type doped semiconductor area (5) is positioned at N type doped epitaxial layer (3); In a P type doped semiconductor area (5), be provided with the 2nd P type heavily-doped semiconductor contact zone (7) and N type heavily-doped semiconductor source region (6); Be provided with the top that gate oxide (8) and gate oxide (8) are positioned at the N type doped epitaxial silicon layer segment between the adjacent P type doping column semiconductor region (4) in the top of N type doped epitaxial silicon layer (3), be provided with polysilicon gate (9), on polysilicon gate (9), be provided with the first type oxide layer (10) in gate oxide (8) top; It is characterized in that; On N type heavily-doped semiconductor source region (6), be connected with source metal (11), on the 2nd P type heavily-doped semiconductor contact zone (7), be connected with substrate metal (12), be provided with polysilicon (13) as resistance in the below of source metal (11) and substrate metal (12); And polysilicon (13) is connected with substrate metal (12) with source metal (11) respectively, on substrate metal (12), is connected with top-level metallic (14).