CN102621730B - Liquid crystal panel - Google Patents
Liquid crystal panel Download PDFInfo
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- CN102621730B CN102621730B CN201210092447.7A CN201210092447A CN102621730B CN 102621730 B CN102621730 B CN 102621730B CN 201210092447 A CN201210092447 A CN 201210092447A CN 102621730 B CN102621730 B CN 102621730B
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Abstract
The invention provides a liquid crystal panel. The liquid crystal panel comprises a first data line, a scanning line, a pixel, a first storage capacitor line and a second storage capacitor line, wherein the data line is formed on the liquid crystal panel in a first direction and provides an input voltage; the scanning line is formed on the liquid crystal panel in a second direction which is vertical to the first vertical direction; the pixel is formed at the intersection between the data line and the scanning line and comprises a first sub-pixel and a second sub-pixel; the first storage capacitor line is connected with a second end of a first storage capacitor electrically; and the second storage capacitor line is connected with a second end of a second storage capacitor electrically.
Description
Present patent application is the divisional application of following patent application:
Application number: 200710092107.3
The applying date: on 04 02nd, 2007
Denomination of invention: liquid crystal indicator and driving method thereof
Technical field
The present invention relates to a kind of liquid crystal indicator, the pixel being particularly involved in a kind of liquid crystal indicator distinguishes the driving method of mode and liquid crystal indicator.
Background technology
Liquid crystal indicator is one of a kind of flat-panel screens common at present, it has high resolving power, lightweight, thickness is thin and the advantage such as low power consumption, therefore, the use of current liquid crystal indicator is more and more general, except can using as general calculator display organization, also can be used as the Touch Screen of man-machine interface, and also can be combined with video-signal system and use as TV.
But, although liquid crystal indicator is more and more universal, there is the problem that some technically need to solve further also, the problem of such as wide viewing angle.From the above, the visual angle of liquid crystal indicator is relevant with its γ characteristic, refers to the gray scale of image and the relation of brightness in this γ characteristic, and Fig. 1 shows the gray scale of an existing multi-domain vertical alignment-type liquid crystal display panel to the performance diagram of light transmittance.Please refer to Fig. 1, curve L1 to curve L3 represent front viewing multi-domain vertical alignment-type liquid crystal display panel time viewed light transmittance.Wherein, curve L1 is ruddiness penetrance, and curve L2 is green glow penetrance, and curve L3 is blue light penetrance.But, when watching multi-domain vertical alignment-type liquid crystal display panel with the angle (just oblique 60 degree) tilted, under same operating voltage, the light transmittance observed can change and be curve L4, curve L5 and curve L6 from making curve L1, curve L2 and curve L 3 drift about respectively.
Continue referring to Fig. 1, as can see from Figure 1, in the region of higher gray scale with lower gray scale, the light transmittance of curve L1 is close with the light transmittance of curve L4, the light transmittance of curve L2 is close with the light transmittance of curve L5, and the light transmittance of curve L3 is close with the light transmittance of curve L6.But in mid gray regions, the light transmittance of curve L1, curve L2 and curve L3 differs greatly with the light transmittance of corresponding curve L4, curve L5 and curve L6 respectively.That is, higher gray scale is comparatively slight with the color shift phenomenon of lower gray scale, and the color shift phenomenon of middle gray is more serious.
As shown in Figure 2, it is presented at image that the dead ahead of screen and diagonally forward see normalizing light (normalized luminance) graph of a relation in same grayscale, and wherein dotted line is ideal value, solid line is actual value, in detail, in ideally, the γ characteristic of the image seen with diagonally forward in the dead ahead of screen is identical, therefore as indicated by the dashed line in figure 1, its normalizing light relation is the straight line that a slope is 1, but, in fact, the problem that liquid crystal indicator has visual angle wide not, so when user watches image in the dead ahead of screen and diagonally forward, the γ characteristic of its image seen is not identical, that is the normalizing light of image that user sees with diagonally forward in the dead ahead of screen is not identical, the normalizing light of the image usually seen in dead ahead can be greater than the normalizing light of the image that diagonally forward is seen, therefore, in the picture of many kens LCD screen that different angles are watched, its luminance difference causes the result of each blend of colors different, its color manifested still has little bit different, and then cause the phenomenon of colour cast.
For solving the problem, have a kind of design in prior art, it utilizes the conclusion learnt from Fig. 1, and namely higher gray scale is comparatively slight with the color shift phenomenon of the coloured light of lower gray scale, changes circuit layout design further to improve the phenomenon of colour cast.This prior art a pixel cell is divided into two different regions of light transmittance.The light transmittance in one region is higher, shows the color of higher gray scale; The light transmittance in another region is lower, shows the color of lower gray scale.Specifically, become the color of gray scale in the color mixture of lower gray scale with the color of higher gray scale, and though then user face or with tilt angle to watch the multi-domain vertical alignment-type liquid crystal display panel after improvement, all can watch close color.
Please refer to Fig. 3, it illustrates existing many kens liquid crystal indicator 1, it comprises liquid crystal panel 100, source electrode driver 102 and gate drivers 104.Wherein, liquid crystal panel 100 comprises n*m pixel 10, display is reportedly delivered to multiple pixel 10 by data line D (1) ~ D (n) by source electrode driver 102, sweep signal is sent to liquid crystal panel 100 by sweep trace S (1) ~ S (m) and opens each row pixel 10 with sequence by gate drivers 104, and respectively the first bias voltage signal and the second bias voltage signal is sent to each pixel 10 on liquid crystal panel 100 by the first capacitor storage beam B1 (1) ~ B1 (m) and the second capacitor storage beam B2 (1) ~ B2 (m).As shown in Figures 4 and 5, existing technology proposes the pixel region separation structure of liquid crystal indicator 1, it has the multiple pixels 10 arranged in a matrix fashion, and each pixel 10 comprises one first sub-pixel 11 and one second sub-pixel 12, and each first sub-pixel 11 comprises a liquid crystal capacitance C
lC1, a storage capacitors C
sT1and a switch module M
1, each second sub-pixel 12 comprises a liquid crystal capacitance C
lC2, a storage capacitors C
sT2and a switch module M
2; In addition, liquid crystal indicator 1 also comprises multi-strip scanning line S (1) ~ S (m), a plurality of data lines D (1) ~ D (n) and many capacitor storage beam 15, wherein capacitor storage beam 15 comprises many first capacitor storage beam B1 (1) ~ B1 (m) and the second capacitor storage beam B2 (1) ~ B2 (m), sweep trace S (1) ~ S (m) and the parallel mutual setting of capacitor storage beam 15, and data line D (1) ~ D (n) is arranged with sweep trace S (1) ~ S (m) is vertical.As shown in Figure 4, to be arranged between the first sub-pixel 11 and the second sub-pixel 12 for a certain pixel 10, i-th sweep trace S (i) and to be connected to switch module M
1and switch module M
2grid, jth bar data line D (j) is by switch module M
1be connected to liquid crystal capacitance C
lC1and storage capacitors C
sT1, and by switch module M
2be connected to liquid crystal capacitance C
lC2and storage capacitors C
sT2, in addition, storage capacitors C
sT1and storage capacitors C
sT2be connected to i-th the first capacitor storage beam B1 (i) and i-th the second capacitor storage beam B2 (i) respectively, wherein, i-th the second capacitor storage beam B2 (i) shares same entity circuit layout with the i-th+1 the first capacitor storage beam B1 (i+1).
As shown in Figure 5, it shows circuit layout's schematic diagram of several pixel 10, and wherein region A represents the viewing area of the first sub-pixel 11, and region B represents the viewing area of the second sub-pixel 12, and region A and region B is arranged alternately along scan-line direction; At this for a polarity switching mode for reversion (dot inversion), namely in same pixel, its polarity in the pixel voltage of adjacent image time is different, and the polarity of the pixel voltage of neighbor is also different.When a pixel 10 activated, its time sequential routine as shown in Figure 6, for region A, in the first image time f1, after i-th sweep trace S (i) exports scanning signal, article i-th, the first capacitor storage beam B1 (i) can change low voltage level into, therefore, and pixel voltage (the i.e. liquid crystal capacitance C of region A
lC1capacitance) the storage capacitors C that can be subject to
sT1impact, slightly reduced to " X-Δ V " by " X " originally.In the second image time f2, under i-th sweep trace S (i) exports after one scan signal, i-th the first capacitor storage beam B1 (i) can transform back into high-voltage level again, now, and pixel voltage (the i.e. liquid crystal capacitance C of region A
lC1capacitance) the storage capacitors C that can be subject to
sT1impact, be slightly upgraded to "-X+ Δ V " by "-X " originally.In addition, for region B, in the first image time f1, scanning signal is exported and after half sequential at i-th sweep trace S (i), article i-th, the second capacitor storage beam B2 (i) can change high-voltage level into, therefore, pixel voltage (the i.e. liquid crystal capacitance C of region B
lC2capacitance) the storage capacitors C that can be subject to
sT2impact, be slightly upgraded to " X+ Δ V " by " X " originally.In the second image time f2, next pulse signal is exported and after half sequential at i-th sweep trace S (i), article i-th, the second capacitor storage beam B2 (i) can transform back into low voltage level again, now, and pixel voltage (the i.e. liquid crystal capacitance C of region B
lC2capacitance) the storage capacitors C that can be subject to
sT2impact, slightly reduced to "-X-Δ V " by "-X " originally.
As mentioned above, same pixel is distinguished into two sub-pixels by prior art again, and utilizes the mode of the pixel voltage of control two sub-pixel, uses the γ characteristic improving liquid crystal indicator 1, as shown in Figure 7.But, as shown in Figure 5, this kind of mode can make the pixel voltage difference of the first sub-pixel 11 be " X-Δ V " (at first image time f1) or "-X+ Δ V " (at second image time f2), such as produce a lower gray scale color, such as, and the pixel voltage difference making the second sub-pixel 12 is " X+ Δ V " (at first image time f1) or "-X-Δ V " (at second image time f2), produces a higher gray scale color; As mentioned above, when being mixed into gray scale color in higher gray scale color with lower gray scale color, the phenomenon of colour cast can be improved.
Please refer to shown in Fig. 8, it is the penetrance of display and the relation curve of voltage.When input voltage X shows in low penetration rate, due to fixing Δ V, the clear zone that can cause is unequal with dark space brightness, but the magnitude of voltage that this phenomenon inputs by amendment corrects; When the performance of input voltage X at high penetration, brightness can be caused to decline because of fixing Δ V, as in Fig. 8, because fixing Δ V, penetrance T (X-Δ V) fall is caused to be greater than penetrance T (X+ Δ V) ascensional range (namely T (X-Δ V) and the difference of T (X) are greater than the difference of T (X+ Δ V) and T (X)).In addition, because maximum voltage value is generally fixing, so cannot do to change by adjustment input signal, display overall brightness therefore can be caused to be deteriorated.
Therefore, how to provide a kind of can improve image display γ characteristic and improve liquid crystal indicator and the driving method thereof of Chromatically compensated ability further, one of the important topic of present displays industry just.
Summary of the invention
Because above-mentioned problem, object of the present invention can improve the γ characteristic of image display and the liquid crystal indicator of the Chromatically compensated ability of further raising and driving method thereof for providing a kind of.
To achieve these goals, according to a kind of liquid crystal indicator of the present invention, it comprises the multiple pixels arranged in a matrix fashion, each pixel at least comprises one first sub-pixel and one second sub-pixel, each first or second sub-pixel comprises a liquid crystal capacitance and a storage capacitors, and the liquid crystal capacitance of the first sub-pixel and the ratio of storage capacitors are less than the liquid crystal capacitance of the second sub-pixel and the ratio of storage capacitors, wherein, in one first pixel in all pixels and one second pixel, first sub-pixel of the first pixel and the first sub-pixel of the second pixel shift to install, and the second sub-pixel of the second sub-pixel of the first pixel and the second pixel shifts to install.
In addition, to achieve these goals, a data line, a scanning linear, a pixel, one first capacitor storage beam and one second capacitor storage beam is comprised according to a kind of liquid crystal panel of the present invention.Wherein, data line to be formed on liquid crystal panel with a first direction and to provide an input voltage, scanning linear is formed on liquid crystal panel with a second direction vertical with first direction, pixel is formed at the infall of data line and sweep trace, and comprise one first sub-pixel and one second sub-pixel, first sub-pixel comprises one first switch, one first liquid crystal capacitance and one first storage capacitors, one first end of the first switch is connected to sweep trace, one second end of the first switch is connected to data line, the first end of one three-terminal link in the first liquid crystal capacitance of the first switch and a first end of the first storage capacitors, second sub-pixel comprises a second switch, one second liquid crystal capacitance and one second storage capacitors, one first end of second switch is connected to sweep trace, one second end of second switch is connected to data line, the first end of one three-terminal link in the second liquid crystal capacitance of second switch and a first end of the second storage capacitors, first capacitor storage beam is electrically connected one second end of the first storage capacitors, second capacitor storage beam is electrically connected one second end of the second storage capacitors, in this, when scanning linear activation, first switch module and second switch assembly are conducting, the first sub-pixel and the second sub-pixel is imported into make the signal of data line, then, when after scanning linear solution energy, the level of the first capacitor storage beam and the second capacitor storage beam changes respectively, one first offset voltage is had to make the pixel voltage of the first sub-pixel and an input voltage, the pixel voltage of the second sub-pixel and input voltage have one second offset voltage, to make the pixel voltage of the first sub-pixel different from the pixel voltage of the second sub-pixel, and the first offset voltage is different from the second offset voltage.
Moreover to achieve these goals, the driving method according to a kind of liquid crystal panel of the present invention is applied to a liquid crystal panel, and first driving method comprises the following steps:, activation scanning linear is to make the first switch module and second switch assembly for conducting; Then, the signal of data line is imported into the first sub-pixel and the second sub-pixel; Finally, separating can scanning linear.Wherein, when after scanning linear solution energy, the level of the first capacitor storage beam and the second capacitor storage beam changes respectively, one first offset voltage is had to make the pixel voltage of the first sub-pixel and an input voltage, the pixel voltage of the second sub-pixel and input voltage have one second offset voltage, to make the pixel voltage of the first sub-pixel different from the pixel voltage of the second sub-pixel, and the first offset voltage is different from the second offset voltage.
From the above, because at least comprising one first sub-pixel and one second sub-pixel according in each pixel of liquid crystal indicator of the present invention, and the liquid crystal capacitance of the first sub-pixel and the ratio of storage capacitors are less than the liquid crystal capacitance of the second sub-pixel and the ratio of storage capacitors, so liquid crystal indicator of the present invention and driving method thereof can make its γ value level off to ideal value, and then effectively improve the γ characteristic of image display, and improve Chromatically compensated ability further, use the phenomenon improving misalignment, and then better image display quality is provided.
Accompanying drawing explanation
Fig. 1 shows the performance diagram of gray scale to light transmittance of existing multi-domain vertical alignment-type liquid crystal display panel;
Fig. 2 shows the normalizing light graph of a relation of existing liquid crystal indicator;
Fig. 3 shows the overall schematic of existing many kens liquid crystal indicator;
Fig. 4 shows the schematic equivalent circuit of the pixel of another kind of existing liquid crystal indicator;
Circuit layout's schematic diagram of Fig. 5 display liquid crystal indicator as shown in Figure 4;
Fig. 6 shows time sequential routine figure during actuating region A as shown in Figure 5 and region B;
The normalizing light graph of a relation of Fig. 7 display existing liquid crystal indicator as shown in Figure 4;
Fig. 8 shows penetrance and the input voltage graph of a relation of existing liquid crystal indicator;
Fig. 9 display is according to the overall schematic of many kens liquid crystal indicator of present pre-ferred embodiments;
Figure 10 display is according to the schematic equivalent circuit of the pixel of the liquid crystal indicator of first embodiment of the invention;
Figure 11 A shows the schematic diagram according to the liquid crystal panel of first embodiment of the invention;
Figure 11 B to Figure 11 E show as the liquid crystal panel of Figure 11 A various different structures along CC ' hatching line sectional view;
Circuit layout's schematic diagram of Figure 12 display liquid crystal indicator as shown in Figure 10;
Figure 13 shows time sequential routine figure during actuating region A as shown in figure 12 and region B;
Figure 14 shows penetrance and the input voltage graph of a relation of the liquid crystal indicator of first embodiment of the invention;
Figure 15 display is according to the schematic equivalent circuit of the pixel of the liquid crystal indicator of second embodiment of the invention;
Circuit layout's schematic diagram of Figure 16 display liquid crystal indicator as shown in figure 15;
The normalizing light graph of a relation of Figure 17 display liquid crystal indicator as shown in figure 15;
Figure 18 display is according to the schematic equivalent circuit of the pixel of the liquid crystal indicator of third embodiment of the invention;
Circuit layout's schematic diagram of Figure 19 display liquid crystal indicator as shown in figure 18; And
The entity circuit layout schematic diagram of Figure 20 display liquid crystal indicator as shown in figure 18.
Reference numeral illustrates:
1,2,3,4 liquid crystal indicators
10,20,20 (j), 20 (j+1) pixel
11,21,21 (j), 21 (j+1) first sub-pixel
12,22,22 (j), 22 (j+1) second sub-pixel
S (1) ~ S (m), S (i), S (i+1) sweep trace
D (1) ~ D (n), D (j), D (j+1) data line
15 capacitor storage beam
B1 (1) ~ B1 (m), B1 (i), B1 (i+1) first capacitor storage beam
B2 (1) ~ B2 (m), B2 (i), B2 (i+1) second capacitor storage beam
26,26 (j), 26 (j+1) the 3rd sub-pixel
27,27 (j), 27 (j+1) the 4th sub-pixel
The region of A, B, C, D sub-pixel
C
lC1, C
lC2, C
lC3, C
lC4liquid crystal capacitance
C
sT1, C
sT2, C
sT3, C
sT4storage capacitors
L1, L2, L3, L4, L5, L6 curve
M
1, M
2, M
3, M
4switch module
100,200 liquid crystal panels
102,202 source electrode drivers
104,204 gate drivers
F1 first image time
F2 second image time
206 upper substrates
207 common electrodes
208 infrabasal plates
209,210,211,212,209 ', 210 ' transparency electrode
ML1 the first metal layer
ML2 second metal level
Embodiment
Hereinafter with reference to relevant drawings, the liquid crystal indicator according to present pre-ferred embodiments and driving method thereof are described.
First be noted that, liquid crystal indicator according to present pre-ferred embodiments can be a multi-zone vertical alignment nematic (MVA, Multi-Domain Vertically Aligned) type liquid crystal indicator, a twisted-nematic (Twisted-Nematic) type liquid crystal indicator, an optical compensation curved OCB (OpticallyCompensated Bend) type liquid crystal indicator, an ASM (Axisymmetric aligned) type liquid crystal indicator, an IPS (In-plane Switching) type liquid crystal indicator; In addition, driving method according to the liquid crystal indicator of present pre-ferred embodiments can be (dotinversion) formula driving method that a bit reverses, namely in same frame time, the data signals polarity putting on a pixel cell is contrary with the data signals polarity putting on adjacent pixel unit.Also can be row reversion (column inversion) formula driving method, row reversion (row inversion) formula driving method, frame reversion (frame inversion) formula driving method or other kind of multi-point reverse driving method (manydots inversion).
[the first embodiment]
Please refer to Fig. 9, it illustrates one many kens liquid crystal indicator 2 of first embodiment of the invention, it comprises liquid crystal panel 200, source electrode driver 202 and gate drivers 204.Wherein, liquid crystal panel 200 comprises n*m pixel 20, display is reportedly delivered to multiple pixel 20 by data line D (1) ~ D (n) by source electrode driver 202, sweep signal is sent to liquid crystal panel 200 by sweep trace S (1) ~ S (m) and opens each row pixel 20 with sequence by gate drivers 204, and respectively the first bias voltage signal and the second bias voltage signal is sent to each pixel 20 on liquid crystal panel 200 by the first capacitor storage beam B1 (1) ~ B1 (m) and the second capacitor storage beam B2 (1) ~ B2 (m).Wherein, data line D (1) ~ D (n) to be formed on liquid crystal panel 200 with a first direction and to provide an input voltage, scanning linear S (1) ~ S (m) is formed on liquid crystal panel 200 with a second direction, pixel 20 is formed at the infall of data line D (1) ~ D (n) and sweep trace S (1) ~ S (m), and comprise one first sub-pixel and one second sub-pixel, first sub-pixel comprises one first switch, one first liquid crystal capacitance and one first storage capacitors, one first end of the first switch is connected to one of sweep trace S (1) ~ S (m), one second end of the first switch is connected to one of data line D (1) ~ D (n), the first end of one three-terminal link in the first liquid crystal capacitance of the first switch and a first end of the first storage capacitors, second sub-pixel comprises a second switch, one second liquid crystal capacitance and one second storage capacitors, one first end of second switch is connected to one of sweep trace S (1) ~ S (m), one second end of second switch is connected to one of data line D (1) ~ D (n), the first end of one three-terminal link in the second liquid crystal capacitance of second switch and a first end of the second storage capacitors, first capacitor storage beam is electrically connected one second end of the first storage capacitors, second capacitor storage beam is electrically connected one second end of the second storage capacitors, after having the structure about the first sub-pixel and the second sub-pixel to be specified in.In the present invention, when scanning linear S (1) ~ S (m) activation, first switch module and second switch assembly are conducting, the first sub-pixel and the second sub-pixel is imported into make the signal of data line D (1) ~ D (n), then, when after scanning linear solution energy S (1) ~ S (m), the level of the first capacitor storage beam B1 (1) ~ B1 (m) and the second capacitor storage beam B2 (1) ~ B2 (m) changes respectively, one first offset voltage is had to make the pixel voltage of the first sub-pixel and an input voltage, the pixel voltage of the second sub-pixel and input voltage have one second offset voltage, to make the pixel voltage of the first sub-pixel different from the pixel voltage of the second sub-pixel, and the first offset voltage is different from the second offset voltage.
Please refer to shown in Figure 10, according to the liquid crystal indicator 2 of present pre-ferred embodiments, comprise multiple pixel 20, it arranges in a matrix fashion, and each pixel 20 at least comprises one first sub-pixel 21 and one second sub-pixel 22, such as, pixel 20 (j) at least comprises one first sub-pixel 21 (j) and one second sub-pixel 22 (j), pixel 20 (j+1) at least comprises one first sub-pixel 21 (j+1) and one second sub-pixel 22 (j+1), by that analogy.
In the present embodiment, each sub-pixel comprises a liquid crystal capacitance, a storage capacitors and a switch module; As shown in Figure 10, each first sub-pixel 21 comprises a liquid crystal capacitance C
lC1, a storage capacitors C
sT1and a switch module M
1, each second sub-pixel 22 comprises a liquid crystal capacitance C
lC2, a storage capacitors C
sT2and a switch module M
2; In the present embodiment, switch module M
1and switch module M
2a thin film transistor (TFT) (TFT) or MIM switch module can be respectively.In addition, liquid crystal indicator 2 also comprises multi-strip scanning line S (1) ~ S (m), a plurality of data lines D (1) ~ D (n) and many capacitor storage beam 25, and wherein capacitor storage beam 25 comprises many first capacitor storage beam B1 (1) ~ B1 (m) and the second capacitor storage beam B2 (1) ~ B2 (m); In the present embodiment, sweep trace S (1) ~ S (m) and the parallel mutual setting of capacitor storage beam 25, and data line D (1) ~ D (n) is arranged with sweep trace S (1) ~ S (m) is vertical.
As shown in Figure 10, for a certain pixel 20 (j), i-th sweep trace S (i) to be arranged between the first sub-pixel 21 and the second sub-pixel 22 and to be connected to switch module M
1and switch module M
2grid, use gauge tap assembly M
1and switch module M
2on off state, jth bar data line D (j) is by switch module M
1be connected to liquid crystal capacitance C
lC1and storage capacitors C
sT1, and by switch module M
2be connected to liquid crystal capacitance C
lC2and storage capacitors C
sT2, in addition, storage capacitors C
sT1and storage capacitors C
sT2be connected to i-th the first capacitor storage beam B1 (i) and i-th the second capacitor storage beam B2 (i) respectively, wherein, the present embodiment i-th the second capacitor storage beam B2 (i) shares same entity circuit layout with the i-th+1 the first capacitor storage beam B1 (i+1).
From the above, as i-th sweep trace S (i) output signal gauge tap assembly M
1and switch module M
2on off state when being conducting, corresponding jth bar data line D (j) can input the liquid crystal capacitance C of a data line signal to the first relative sub-pixel 21
lC1and storage capacitors C
sT1, and the liquid crystal capacitance C of the second relative sub-pixel 22
lC2and storage capacitors C
sT2.
The structure of each liquid crystal capacitance and storage capacitors will be described in detail in detail below, and with the connection relationship of data line and capacitor storage beam.In the present embodiment, each liquid crystal capacitance is defined by a common electrode, a liquid crystal layer and a pixel electrode to form, and common electrode and pixel electrode are relative by liquid crystal layer and establish, in addition, each storage capacitors is stored common electrode and defined by a storage electrode, an insulation course and and form, and to store common electrode and storage electrode be relative by insulation course and establish, wherein, storage electrode is electrically connected with pixel electrode, and be electrically connected to relative data line by relative switch module, in addition, in arbitrary pixel, the common electrode of the first sub-pixel is electrically connected mutually with the common electrode of the second sub-pixel, the ground connection while of such as, and the storage common electrode of the first sub-pixel is separated setting, that is first the storage common electrode of sub-pixel be connected to two adjacent capacitor storage beam respectively with the storage common electrode of the second sub-pixel, wherein, two adjacent capacitor storage beam have identical amplitude, its phase differential can differ the sequential of a sweep signal as the present embodiment, namely the different time within the same picture time changes the level of the first capacitor storage beam B1 (1) ~ B1 (m) and the second capacitor storage beam B2 (1) ~ B2 (m), also within the same picture time, the level of the first capacitor storage beam B1 (1) ~ B1 (m) and the second capacitor storage beam B2 (1) ~ B2 (m) can be changed simultaneously.
In addition, the liquid crystal panel 200 of above-mentioned first embodiment can have several structure, for making content of the present invention clearly understand, slightly explains for four kinds of examples at this.Figure 11 A is the schematic diagram of the liquid crystal panel 200 of the first embodiment, it comprises multiple first sub-pixel 21 (j), 21 (j+1) and multiple second sub-pixel 22 (j), 22 (j+1), and comprises multi-strip scanning line S (i) and S (i+1), many first capacitor storage beam B1 (i) and B1 (i+1) and many second capacitor storage beam B2 (i) and B2 (i+1).In addition, Figure 11 B to Figure 11 E be liquid crystal panel 200 various different structures along CC ' hatching line sectional view.In addition, the present embodiment i-th the second capacitor storage beam B2 (i) also can adopt with the i-th+1 the first capacitor storage beam B1 (i+1) and not share same entity circuit layout.
As shown in Figure 11 B, liquid crystal panel 200 comprises upper substrate 206, common electrode 207, infrabasal plate 208, transparency electrode 209,210 and first layer metal ML1 and second layer metal ML2, two second layer metal ML2 are respectively in order to couple transparency electrode 209 and 210 to data line D (1) ~ D (n), two first layer metal ML1 form the first capacitor storage beam B1 and the second capacitor storage beam B2, and the first metal layer ML1 forms storage capacitors C with the second corresponding metal level ML2
sT1or C
sT2.Figure 11 C is the sectional view of the second liquid crystal panel structure along CC ' hatching line, its is in transparency electrode 209 and 210 different from the first structure is electrically connected with the first metal layer ML1, and the second metal level ML2 forms the first capacitor storage beam B1 and the second capacitor storage beam B2.Figure 11 D is the sectional view of the third liquid crystal panel structure along CC ' hatching line, and its is in different from the first structure is also electrically connected with transparency electrode 211,212 in the first metal layer ML1, to increase storage capacitors C
sT1with C
sT2capacitance.Figure 11 E is the sectional view along CC ' hatching line of the 4th kind of liquid crystal panel structure, and they are different from the first structure is in having lacked the second metal level.Should be noted, the design of the capacitor storage beam (or bias line) in above-mentioned liquid crystal panel structure is only citing, not for limiting the scope of the invention, identical effect that those skilled in the art can also utilize other structural design to realize, all should be contained in scope of the present invention.
In addition, in the present embodiment, the storage common electrode of time pixel that the storage common electrode of the second sub-pixel in arbitrary pixel is disposed adjacent with along a data line direction or the first sub-pixel of last pixel can be connected to same capacitor storage beam (comprising one first capacitor storage beam B1 and one second capacitor storage beam B2) simultaneously.
As shown in Figure 10, please also refer to two pixels 20 (j), 20 (j+1) that are disposed adjacent along scan line direction, wherein, the first sub-pixel 21 (j) in pixel 20 (j) shifts to install with the first sub-pixel 21 (j+1) of a secondary pixel 20 (j+1), and the second sub-pixel 22 (j) of pixel 20 (j) shifts to install with the second sub-pixel 22 (j+1) of a secondary pixel 20 (j+1), for making the feature of the present embodiment clearly, please refer to shown in Figure 12, it shows adjacent two pixels 20 (j), circuit layout's schematic diagram of 20 (j+1), wherein region A represents the viewing area of the first sub-pixel 21 (j), region B represents the viewing area of the second sub-pixel 22 (j), wherein, referring to Figure 11 B and Figure 12, region A shown in Figure 12 is the transparency electrode 209 shown in Figure 11 B, region B shown in Figure 12 is the transparency electrode 210 shown in Figure 11 B, capacitor storage beam B1 (i) shown in Figure 12, B2 (i) is the first metal layer ML1 shown in Figure 11 B, and the second metal level ML2 shown in Figure 11 B is positioned at capacitor storage beam B1 (i), B2 (i) and region A, overlapping place of region B.As shown in Figure 12, first sub-pixel 21 (j), 21 (j+1) of adjacent two pixels 20 (j), 20 (j+1) shift to install, and second sub-pixel 22 (j) of adjacent two pixels 20 (j), 20 (j+1), 22 (j+1) also shift to install.
In the present embodiment, refer again to shown in Figure 10, in adjacent two pixels 20 (j) arranged along scan-line direction, 20 (j+1), first sub-pixel 21 (j) of pixel 20 (j) is similar to mirror image with the first sub-pixel 21 (j+1) of an adjacent pixel 20 (j+1) and shifts to install, and the second sub-pixel 22 (j) of pixel 20 (j) is also similar to mirror image with the second sub-pixel 22 (j+1) of a time pixel 20 (j+1) shifts to install; In detail, first with the boundary (i.e. i-th sweep trace S (i)) of the first sub-pixel 21 (j) and the second sub-pixel 22 (j) for axis of symmetry, the mirror image of the first sub-pixel 21 (j) of pixel 20 (j) is obtained in the position of the second sub-pixel 22 (j), then this mirror image is moved a pixel along scan-line direction, namely can obtain the first sub-pixel 21 (j+1) of a time pixel 20 (j+1), therefore claim the first sub-pixel 21 (j) and the first sub-pixel 21 (j+1) to be similar to mirror image in the present embodiment and shift to install; In like manner, if with the boundary (i.e. i-th sweep trace S (i)) of the first sub-pixel 21 (j) and the second sub-pixel 22 (j) for axis of symmetry, the mirror image of the second sub-pixel 22 (j) of a certain pixel 20 (j) is obtained in the position of the first sub-pixel 21 (j), then this mirror image is moved a pixel along scan-line direction, namely can obtain the second sub-pixel 22 (j+1) of a time pixel 20 (j+1), therefore claim the second sub-pixel 22 (j) and the second sub-pixel 22 (j+1) to be similar to mirror image in the present embodiment and shift to install.
From aforementioned explanation (such as Figure 11 B, 11C, 11D, 11E), the area difference that the present invention can utilize first layer metal (such as ML1), second layer metal (such as ML2) or transparency electrode (such as 209,210) to overlap each other adjusts the size of sub-pixel storage capacitors.Also can adjust transparency electrode (such as 209 simultaneously, 210) relative to the overlapping area size of common electrode (such as 207), adjust the size of sub-pixel liquid crystal capacitance, make as shown in Figure 10, in arbitrary pixel 20 (j) or 20 (j+1), the storage capacitors C of the first sub-pixel 21 (j) or 21 (j+1)
sT1than liquid crystal capacitance C
lC1ratio be less than the storage capacitors C of the second sub-pixel 22 (j) or 22 (j+1)
sT2than liquid crystal capacitance C
lC2ratio (i.e. C
sT1/ C
lC1< C
sT2/ C
lC2).
Then, please refer to shown in Figure 13, time sequential routine during its display actuating one pixel 20 (j) or 20 (j+1), at this for a polarity switching mode for reversion (dot inversion), namely in same pixel, its polarity in the pixel voltage of adjacent image time is different, and the polarity of the pixel voltage of neighbor is also different.For region A (as Figure 12), in the first image time f1, after i-th sweep trace S (i) exports scanning signal, i-th the first capacitor storage beam B1 (i) can change low voltage level into, therefore, pixel voltage (the i.e. liquid crystal capacitance C of region A
lC1capacitance) the storage capacitors C that can be subject to
sT1impact, slightly reduce to " X-Δ V by " X " originally
1", in the second image time f2, under i-th sweep trace S (i) exports after one scan signal, i-th the first capacitor storage beam B1 (i) can transform back into high-voltage level again, now, and pixel voltage (the i.e. liquid crystal capacitance C of region A
lC1capacitance) the storage capacitors C that can be subject to
sT1impact, be slightly upgraded to "-X+ Δ V by "-X " originally
1", therefore the brightness of region A can decline a little; In addition, for region B, in the first image time f1, pulse signal is exported and after half sequential at i-th sweep trace S (i), article i-th, the second capacitor storage beam B2 (i) can change high-voltage level into, therefore, pixel voltage (the i.e. liquid crystal capacitance C of region B
lC2capacitance) the storage capacitors C that can be subject to
sT2impact, be slightly upgraded to " X+ Δ V by " X " originally
2", then, in the second image time f2; export next pulse signal and after half sequential at i-th sweep trace S (i); i-th the second capacitor storage beam B2 (i) can transform back into low voltage level again, now, pixel voltage (the i.e. liquid crystal capacitance C of region B
lC2capacitance) the storage capacitors C that can be subject to
sT2impact, slightly reduce to "-X-Δ V by "-X " originally
2", therefore the brightness of region B can promote a little; From the above, due to (C
sT1/ C
lC1< C
sT2/ C
lC2), so Δ V
1< Δ V
2, so comparison domain A and region B can find that the brightness of region A is a bit larger tham in the brightness of region B, in this, region A and region B can be decided to be dark space and clear zone respectively.
Moreover, because the pixel voltage difference of the first sub-pixel 21 (j) or 21 (j+1) is " X-Δ V
1" (at the first image time f1) or "-X+ Δ V
1" (at the second image time f2), such as produce a lower gray scale, and the pixel voltage of the second sub-pixel 22 (j) or 22 (j+1) difference is " X+ Δ V
2" (at the first image time f1) or "-X-Δ V
2" (at the second image time f2), such as produce a higher gray scale, and the storage capacitors C of the first sub-pixel 21 (j) or 21 (j+1)
sT1with liquid crystal capacitance C
lC1ratio be less than the storage capacitors C of the second sub-pixel 22
sT2with liquid crystal capacitance C
lC2ratio (C
sT1/ C
lC1< C
sT2/ C
lC2), that is Δ V
1be less than Δ V
2, so the amplitude that the brightness of region A declines can be less than the amplitude of the luminance raising of region B; For example, if X is 5 volts, Δ V
1be 0.2 volt, Δ V
2it is 0.8 volt, then the pixel voltage difference of region A is 5-0.2=4.8 volt, the pixel voltage of region B is poor is 5+0.8=5.8 volt, therefore, the mean pixel voltage difference of the liquid crystal indicator 2 of present pre-ferred embodiments can be increased to (4.8+5.8)/2=5.3 volt, and it is a little more than existing mean pixel voltage difference (5 volts); In addition, please comparison diagram 8 and Figure 14, when the performance of input voltage X at high penetration, penetrance T (the X-Δ V of the present embodiment
1) fall is less than existing penetrance T (X-Δ V) fall (i.e. T (X-Δ V
1) be less than the difference of T (X-Δ V) and T (X) with the difference of T (X)), and the penetrance T of the present embodiment (X+ Δ V
2) ascensional range is greater than existing penetrance T (X+ Δ V) ascensional range (i.e. T (X+ Δ V
2) be greater than the difference of T (X+ Δ V) and T (X) with the difference of T (X)), so the higher gray area of the present embodiment and the brightness of lower gray scale are all greater than existing higher gray area and the brightness of lower gray scale.It can thus be appreciated that the present invention can suitably utilize Δ V
1and Δ V
2value adjust the brightness of the first sub-pixel 21 (j), 21 (j+1) and the second sub-pixel 22 (j), 22 (j+1), effectively promote the overall brightness of liquid crystal indicator simultaneously, and obtain preferably low aberration γ characteristic.
[the second embodiment]
Please refer to shown in Figure 15, it illustrates one many kens liquid crystal indicator 3 of second embodiment of the invention, in the present embodiment, each pixel 20 also comprises one the 3rd sub-pixel 26, and each 3rd sub-pixel 26 comprises a liquid crystal capacitance C
lC3, a storage capacitors C
sT3and a switch module M
3.In addition, in the present embodiment, the storage capacitors C of the second sub-pixel 22
sT2than liquid crystal capacitance C
lC2ratio be less than the storage capacitors C of the 3rd sub-pixel 26
sT3than liquid crystal capacitance C
lC3ratio (C
sT2/ C
lC2< C
sT3/ C
lC3), and adjacent two pixels 20 (j) are with 20 (j+1), the 3rd sub-pixel 26 (j) of pixel 20 (j) shifts to install with the 3rd sub-pixel 26 (j+1) of an adjacent pixel 20 (j+1).In the present embodiment, in adjacent two pixels 20 (j) arranged along scan-line direction and 20 (j+1), the first sub-pixel 21 (j+1) of the first sub-pixel 21 (j) of pixel 20 (j), the second sub-pixel 22 (j) and the 3rd sub-pixel 26 (j) and a time pixel 20 (j+1), the second sub-pixel 22 (j+1) and the 3rd sub-pixel 26 (j+1) are similar to mirror image respectively and shift to install.
As previously mentioned, each sub-pixel can with the center of the boundary of two pixels for axis of symmetry shifts to install, or with the boundary of each sub-pixel for line of symmetry mirror image is arranged.For example, in the present embodiment, first with the boundary (i.e. i-th sweep trace S (i)) of the first sub-pixel 21 (j) and the second sub-pixel 22 (j) for axis of symmetry, the mirror image of the first sub-pixel 21 (j) of pixel 20 (j) is obtained in the second sub-pixel 22 (j) and the position of the 3rd sub-pixel 26 (j), then this mirror image is moved a pixel along scan-line direction, namely the first sub-pixel 21 (j+1) of a time pixel 20 (j+1) can be obtained, therefore claim the first sub-pixel 21 (j) and the first sub-pixel 21 (j+1) to be similar to mirror image in the present embodiment to shift to install, in like manner, if with the boundary (i.e. i-th sweep trace S (i)) of the first sub-pixel 21 (j) and the second sub-pixel 22 (j) for axis of symmetry, the mirror image of the second sub-pixel 22 (j) of pixel 20 (j) and the combination of the 3rd sub-pixel 26 (j) is obtained in the position of the first sub-pixel 21 (j), then this mirror image is moved a pixel along scan-line direction, namely time the second sub-pixel 22 (j+1) of a pixel 20 (j+1) and the combination of the 3rd sub-pixel 26 (j+1) can be obtained, therefore the combination approximation of the combination of the second sub-pixel 22 (j) and the 3rd sub-pixel 26 (j) and the second sub-pixel 22 (j+1) and the 3rd sub-pixel 26 (j+1) is claimed to shift to install in mirror image in the present embodiment.As shown in figure 16, circuit layout's schematic diagram of its adjacent two pixels 20 (j) of display and 20 (j+1), wherein region A represents the viewing area of the first sub-pixel 21 (j) and 21 (j+1), region B represents the viewing area of the second sub-pixel 22 (j) and 22 (j+1), region C represents the viewing area of the 3rd sub-pixel 26 (j) and 26 (j+1), wherein, referring to Figure 11 B and Figure 16, region A shown in Figure 16 is the transparency electrode 209 shown in Figure 11 B, region B shown in Figure 16 is the transparency electrode 210 shown in Figure 11 B, region C shown in Figure 16 is also a transparency electrode 210 ' (Figure 11 B does not show), capacitor storage beam B1 (i) shown in Figure 16, B2 (i) is the first metal layer ML1 shown in Figure 11 B, and the second metal level ML2 shown in Figure 11 B is positioned at capacitor storage beam B1 (i), B2 (i) and region A, overlapping place of region B.As shown in Figure 16, adjacent two pixels 20 (j) are similar to mirror image with 22 (j+1) and the 3rd sub-pixel 26 (j) respectively with 26 (j+1) with first sub-pixel 21 (j) of 20 (j+1) shift to install with 21 (j+1), the second sub-pixels 22 (j).
Please refer to shown in Figure 17, the present embodiment is that same pixel is distinguished into three sub-pixels again, so the normalizing light of image that user sees with diagonally forward in the dead ahead of screen can than existing mode (as shown in Figure 7) close to ideal state (slope be the straight line of 1); In addition, the present embodiment can also utilize the mode of the brightness of control three sub-pixel, use the γ characteristic improving liquid crystal indicator 3 further, such as, the brightness of control area C can be greater than the brightness of region B and the brightness of region B is greater than the brightness of region A, therefore the combination of comparison domain A and region B and region C can find region B and being combined as clear zone of region C and region A is dark space; In addition, because the brightness of region A, region B and region C is neither identical, and the luminance difference of region A, region B and region C can respectively according to the storage capacitors C of the first sub-pixel 21
sT1than liquid crystal capacitance C
lC1ratio (C
sT1/ C
lC1), the storage capacitors C of the second sub-pixel 22
sT2than liquid crystal capacitance C
lC2ratio (C
sT2/ C
lC2) and the storage capacitors C of the 3rd sub-pixel 26
sT3than liquid crystal capacitance C
lC3ratio (C
sT3/ C
lC3) decide, so the normalizing light relation in the dead ahead of screen and diagonally forward can be changed to more resilient, and then the γ characteristic of adjustment liquid crystal indicator 3.
[the 3rd embodiment]
Certainly, same pixel can be distinguished into again the sub-pixel of four or more according to liquid crystal indicator of the present invention, the technician that its embodiment should be this utilization can realize with reference to above-described embodiment.To illustrate that same pixel region is divided into the embodiment of four sub-pixels below, please refer to shown in Figure 18, it is the another kind of liquid crystal indicator 4 of display, in the present embodiment, each pixel 20 comprises one first sub-pixel 21, one second sub-pixel 22, one the 3rd sub-pixel 26, and one the 4th sub-pixel 27, such as, pixel 20 (j) at least comprises one first sub-pixel 21 (j), one second sub-pixel 22 (j), one the 3rd sub-pixel 26 (j), and one the 4th sub-pixel 27 (j), pixel 20 (j+1) at least comprises one first sub-pixel 21 (j+1) and one second sub-pixel 22 (j+1), one the 3rd sub-pixel 26 (j+1), and one the 4th sub-pixel 27 (j+1), by that analogy, wherein the first sub-pixel 21 (j) and 21 (j+1) are responsible for showing darker signal with the second sub-pixel 22 (j) and 22 (j+1), 3rd sub-pixel 26 (j) and 26 (j+1) and the 4th sub-pixel 27 (j) and 27 (j+1) are responsible for the brighter signal of display.Wherein the structure of the first sub-pixel 21 (j) and 21 (j+1), the second sub-pixel 22 (j) and 22 (j+1) and the 3rd sub-pixel 26 (j) and 26 (j+1) as previously mentioned, so repeat no more; In the present embodiment, the 4th sub-pixel 27 (j) and 27 (j+1) comprise a liquid crystal capacitance C respectively
lC4, a storage capacitors C
sT4and a switch module M
4.In the present embodiment, the storage capacitors of each sub-pixel and liquid crystal capacitance design can be as follows: the storage capacitors C of the first sub-pixel 21 (j) or 21 (j+1)
sT1than liquid crystal capacitance C
lC1ratio be less than the storage capacitors C of the second sub-pixel 22
sT2than liquid crystal capacitance C
lC2ratio (C
sT1/ C
lC1< C
sT2/ C
lC2), the storage capacitors C of the second sub-pixel 22 (j) or 22 (j+1)
sT2than liquid crystal capacitance C
lC2ratio be less than the storage capacitors C of the 3rd sub-pixel 26 (j) or 26 (j+1)
sT3than liquid crystal capacitance C
lC3ratio (C
sT2/ C
lC2< C
sT3/ C
lC3), the storage capacitors C of the 3rd sub-pixel 26 (j) or 26 (j+1)
sT3than liquid crystal capacitance C
lC3ratio be less than the storage capacitors C of the 4th sub-pixel 27 (j) or 27 (j+1)
sT4than liquid crystal capacitance C
lC4ratio (C
sT3/ C
lC3< C
sT4/ C
lC4), i.e. C
sT1/ C
lC1< C
sT2/ C
lC2< C
sT3/ C
lC3< C
sT4/ C
lC4.Namely control the storage capacitors C of each sub-pixel
sTnwith liquid crystal capacitance C
lCn, the offset voltage that can produce under making to be subject to the impact of capacitor storage beam signal is Δ V
n, the offset voltage that wherein the first sub-pixel produces is Δ V
1, the offset voltage that the second sub-pixel produces is Δ V
2, the offset voltage that the 3rd sub-pixel produces is Δ V
3, the offset voltage that the 4th sub-pixel produces is Δ V
4, finally make Δ V
1< Δ V
2< Δ V
3< Δ V
4.
In addition, in the present embodiment, design also can be as follows for the storage capacitors of each sub-pixel and liquid crystal capacitance: the storage capacitors C of the first sub-pixel 21 (j) or 21 (j+1)
sT1than liquid crystal capacitance C
lC1ratio equal the storage capacitors C of the 3rd sub-pixel 26 (j) or 26 (j+1)
sT3than liquid crystal capacitance C
lC3ratio (C
sT1/ C
lC1=C
sT3/ C
lC3), the storage capacitors C of the second sub-pixel 22 (j) or 22 (j+1)
sT2than liquid crystal capacitance C
lC2ratio equal the storage capacitors C of the 4th sub-pixel 27 (j) or 27 (j+1)
sT4than liquid crystal capacitance C
lC4ratio (C
sT2/ C
lC2=C
sT4/ C
lC4), the storage capacitors C of the 3rd sub-pixel 26 (j) or 26 (j+1)
sT3than liquid crystal capacitance C
lC3ratio be less than the storage capacitors C of the 4th sub-pixel 27 (j) or 27 (j+1)
sT4than liquid crystal capacitance C
lC4ratio (C
sT3/ C
lC3< C
sT4/ C
lC4), i.e. C
sT1/ C
lC1=C
sT3/ C
lC3< C
sT2/ C
lC2=C
sT4/ C
lC4, namely Δ V
1=Δ V
3< Δ V
2=Δ V
4.
In the present embodiment, in adjacent two pixels 20 (j) arranged along scan-line direction and 20 (j+1), the first sub-pixel 21 (j) of pixel 20 (j), the second sub-pixel 22 (j), the 3rd sub-pixel 26 (j) and the 4th sub-pixel 27 (j) are similar to mirror image with the first sub-pixel 21 (j+1) of a secondary pixel 20 (j+1), the second sub-pixel 22 (j+1), the 3rd sub-pixel 26 (j+1) and the 4th sub-pixel 27 (j+1) respectively and shift to install.In detail, first with the boundary (i.e. i-th sweep trace S (i)) of the first sub-pixel 21 (j) and the second sub-pixel 22 (j) for axis of symmetry, the mirror image of the first sub-pixel 21 (j) of pixel 20 (j) and the combination of the 4th sub-pixel 27 (j) is obtained in the second sub-pixel 22 (j) and the position of the 3rd sub-pixel 26 (j), then this mirror image is moved a pixel along scan-line direction, namely the first sub-pixel 21 (j+1) of a time pixel 20 (j+1) and the 4th sub-pixel 27 (j+1) can be obtained, therefore the combination approximation of the combination of the first sub-pixel 21 (j) and the 4th sub-pixel 27 (j) and the first sub-pixel 21 (j+1) and the 4th sub-pixel 27 (j+1) is claimed to shift to install in mirror image in the present embodiment, in like manner, if with the boundary (i.e. i-th sweep trace S (i)) of the first sub-pixel 21 (j) and the second sub-pixel 22 (j) for axis of symmetry, the mirror image of the second sub-pixel 22 (j) of pixel 20 (j) and the combination of the 3rd sub-pixel 26 (j) is obtained in the position of the first sub-pixel 21 (j) and the 4th sub-pixel 27 (j), then this mirror image is moved a pixel along scan-line direction, namely time the second sub-pixel 22 (j+1) of a pixel 20 (j+1) and the combination of the 3rd sub-pixel 26 (j+1) can be obtained, therefore the combination approximation of the combination of the second sub-pixel 22 (j) and the 3rd sub-pixel 26 (j) and the second sub-pixel 22 (j+1) and the 3rd sub-pixel 26 (j+1) is claimed to shift to install in mirror image in the present embodiment.As shown in figure 19, circuit layout's schematic diagram of its adjacent two pixels 20 (j) of display and 20 (j+1), wherein region A represents the viewing area of the first sub-pixel 21 (j) and 21 (j+1), region B represents the viewing area of the second sub-pixel 22 (j) and 22 (j+1), region C represents the viewing area of the 3rd sub-pixel 26 (j) and 26 (j+1), region D represents the viewing area of the 4th sub-pixel 27 (j) and 27 (j+1), wherein, referring to Figure 11 B and Figure 19, region A shown in Figure 19 is the transparency electrode 209 shown in Figure 11 B, region B shown in Figure 19 is the transparency electrode 210 shown in Figure 11 B, region C shown in Figure 19 and region D is also respectively a transparency electrode 210 ' and a transparency electrode 209 ' (Figure 11 B does not show), capacitor storage beam B1 (i) shown in Figure 19, B2 (i) is the first metal layer ML1 shown in Figure 11 B, and the second metal level ML2 shown in Figure 11 B is positioned at capacitor storage beam B1 (i), B2 (i) and region A, overlapping place of region B.As shown in Figure 19, adjacent two pixels 20 (j) are similar to mirror image with 26 (j+1) and the 4th sub-pixel 27 (j) respectively with 27 (j+1) and shift to install with 21 (j+1), the second sub-pixel 22 (j) with 22 (j+1), the 3rd sub-pixel 26 (j) with first sub-pixel 21 (j) of 20 (j+1).
In addition, the entity circuit layout schematic diagram of Figure 20 display liquid crystal indicator as shown in figure 18, wherein the first capacitor storage beam B1 (i), B1 (i+1) and the second capacitor storage beam B2 (i) adopt circuit layout design as shown in Figure 11 B.Moreover, please refer to shown in Figure 19, the present embodiment is that same pixel is distinguished into four sub-pixels again, so the normalizing light of image that user sees with diagonally forward in the dead ahead of screen can than existing mode (as shown in Figure 5) close to ideal state (slope be the straight line of 1); In addition, the present embodiment can also utilize the mode of the brightness of control four sub-pixel, use the γ characteristic improving liquid crystal indicator 4 further, such as, can control area C brightness is greater than the brightness of region B, the brightness of region B is greater than the brightness of region D and the brightness of region D is greater than the brightness of region A, therefore the combination of comparison domain A and region D and the combination of region B and region C can find region B and region C be combined as clear zone and region A and region D be combined as dark space; In addition, because the brightness of region A, region B, region C and region D is neither identical, and the luminance difference of region A, region B and region C can respectively according to the storage capacitors C of the first sub-pixel 21
sT1than liquid crystal capacitance C
lC1ratio (C
sT1/ C
lC1), the storage capacitors C of the second sub-pixel 22
sT2than liquid crystal capacitance C
lC2ratio (C
sT2/ C
lC2), the storage capacitors of the 3rd sub-pixel 26 compares C
sT3liquid crystal capacitance C
lC3ratio (C
sT3/ C
lC3) and the storage capacitors C of the 4th sub-pixel 27
sT4than liquid crystal capacitance C
lC4ratio (C
sT4/ C
lC4) decide, so user flexibly can change the normalizing light relation in the dead ahead of screen and diagonally forward, and then the γ characteristic of adjustment liquid crystal indicator 4.
In addition, invention further discloses a kind of driving method of liquid crystal panel, it is applied to above-mentioned liquid crystal panel, and comprise the following step: first, and activation scanning linear is to make the first switch module and second switch assembly for conducting; Then, the signal of data line is imported into the first sub-pixel and the second sub-pixel; Finally, separating can scanning linear.In the present invention, when after scanning linear solution energy, the level of the first capacitor storage beam and the second capacitor storage beam changes respectively, has one first offset voltage (as Δ V to make the pixel voltage of the first sub-pixel and an input voltage
1), the pixel voltage of the second sub-pixel and input voltage have one second offset voltage (as Δ V
2), to make the pixel voltage of the first sub-pixel different from the pixel voltage of the second sub-pixel, and the first offset voltage is different from this second offset voltage.Because the driving method of liquid crystal panel of the present invention is described in more detail in above-described embodiment, so repeat no more.
In sum, because at least comprising one first sub-pixel and one second sub-pixel according in each pixel of liquid crystal indicator of the present invention, and the liquid crystal capacitance of the first sub-pixel and the ratio of storage capacitors are less than the liquid crystal capacitance of the second sub-pixel and the ratio of storage capacitors, so liquid crystal indicator of the present invention and driving method thereof can make its γ value level off to ideal value, and then effectively improve the γ characteristic of image display, and improve Chromatically compensated ability further, use the phenomenon improving misalignment, and then better image display quality is provided.
The foregoing is only illustrative, but not be restricted.Anyly do not depart from spirit of the present invention and category, and to its equivalent modifications of carrying out or change, all should be contained in claim of the present invention.
Claims (6)
1. a liquid crystal panel, comprising:
One data line, to be formed on this liquid crystal panel with a first direction and to provide an input voltage;
One scanning linear, be formed on this liquid crystal panel with a second direction, this first direction is vertical with this second direction;
One pixel, is formed at the infall of this data line and this sweep trace, comprises:
One first sub-pixel, comprise one first switch, one first liquid crystal capacitance and one first storage capacitors, wherein, one first end of this first switch is connected to this sweep trace, one second end of this first switch is connected to this data line, the first end of one three-terminal link in this first liquid crystal capacitance of this first switch and a first end of this first storage capacitors, and
One second sub-pixel, comprise a second switch, one second liquid crystal capacitance and one second storage capacitors, wherein, one first end of this second switch is connected to this sweep trace, one second end of this second switch is connected to this data line, the first end of one three-terminal link in this second liquid crystal capacitance of this second switch and a first end of this second storage capacitors, this first storage capacitors is less than the ratio of this second storage capacitors than this second liquid crystal capacitance than the ratio of this first liquid crystal capacitance;
One first capacitor storage beam, is electrically connected one second end of this first storage capacitors; And
One second capacitor storage beam, is electrically connected one second end of this second storage capacitors;
Wherein, when this scanning linear activation, this first switch module and this second switch assembly are conducting, this first sub-pixel and this second sub-pixel is imported into make the signal of this data line, then, when after this scanning linear solution energy, the level of this first capacitor storage beam and this second capacitor storage beam changes respectively, one first offset voltage is had to make the pixel voltage of this first sub-pixel and an input voltage, the pixel voltage of this second sub-pixel and this input voltage have one second offset voltage, to make the pixel voltage of this first sub-pixel different from the pixel voltage of this second sub-pixel, and this first offset voltage is different from this second offset voltage,
Wherein, this first sub-pixel is a dark space, and this second sub-pixel is a clear zone.
2. liquid crystal panel as claimed in claim 1, also comprises a bias generating circuit, is formed on the substrate of this liquid crystal panel, and produces a bias voltage signal with in this first scanning linear solution energy this first capacitor storage beam of rear drive and this second capacitor storage beam.
3. liquid crystal panel as claimed in claim 1, wherein this pixel also comprises one the 3rd sub-pixel, it comprises one the 3rd switch, one the 3rd liquid crystal capacitance and one the 3rd storage capacitors, one first end of the 3rd switch is connected to this sweep trace, one second end of the 3rd switch is connected to this data line, the first end of one three-terminal link in the 3rd liquid crystal capacitance of the 3rd switch and a first end of the 3rd storage capacitors, this second capacitor storage beam is electrically connected one second end of the 3rd storage capacitors, when this scanning linear activation, this first switch module, this second switch assembly and the 3rd switch module are conducting, this the first sub-pixel is imported into make the signal of this data line, this second sub-pixel and the 3rd sub-pixel, then, when after this scanning linear solution energy, this first capacitor storage beam, the level of this second capacitor storage beam and the 3rd capacitor storage beam changes respectively, this the first offset voltage is had to make the pixel voltage of this first sub-pixel and this input voltage, the pixel voltage of this second sub-pixel and this input voltage have this second offset voltage, the pixel voltage of the 3rd sub-pixel and this input voltage have one the 3rd offset voltage, to make the pixel voltage of this first sub-pixel, the pixel voltage of this second sub-pixel and the pixel voltage of the 3rd sub-pixel different, and this first offset voltage, this second offset voltage and the 3rd offset voltage different.
4. liquid crystal panel as claimed in claim 3, wherein this pixel also comprises one the 4th sub-pixel, it comprises one the 4th switch, one the 4th liquid crystal capacitance and one the 4th storage capacitors, one first end of the 4th switch is connected to this sweep trace, one the 4th end of the 4th switch is connected to this data line, the first end of one three-terminal link in the 4th liquid crystal capacitance of the 4th switch and a first end of the 4th storage capacitors, this first capacitor storage beam is electrically connected one second end of the 4th storage capacitors, when this scanning linear activation, this first switch module, this second switch assembly, 3rd switch module and the 4th switch module are conducting, this the first sub-pixel is imported into make the signal of this data line, this second sub-pixel, 3rd sub-pixel and the 4th sub-pixel, then, when after this scanning linear solution energy, this first capacitor storage beam, this second capacitor storage beam, the level of the 3rd capacitor storage beam and the 4th capacitor storage beam changes respectively, this the first offset voltage is had to make the pixel voltage of this first sub-pixel and this input voltage, the pixel voltage of this second sub-pixel and this input voltage have this second offset voltage, the pixel voltage of the 3rd sub-pixel and this input voltage have the 3rd offset voltage, the pixel voltage of the 4th sub-pixel and this input voltage have one the 4th offset voltage, to make the pixel voltage of this first sub-pixel, the pixel voltage of this second sub-pixel, the pixel voltage of the 3rd sub-pixel and the pixel voltage of the 4th sub-pixel different, and this first offset voltage, this second offset voltage, 3rd offset voltage and the 4th offset voltage different.
5. liquid crystal panel as claimed in claim 1, wherein said switch module at least comprises a thin film transistor (TFT) respectively.
6. liquid crystal panel as claimed in claim 1, wherein this liquid crystal panel is a multi-domain perpendicular alignment-type liquid crystal panel, a twisted nematic liquid crystals display device, an optical compensation curved OCB type liquid crystal indicator, an ASM type liquid crystal panel or an IPS type liquid crystal panel.
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| CN201210092447.7A CN102621730B (en) | 2007-04-02 | 2007-04-02 | Liquid crystal panel |
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| CN201210092447.7A CN102621730B (en) | 2007-04-02 | 2007-04-02 | Liquid crystal panel |
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| CN105116658A (en) * | 2015-09-23 | 2015-12-02 | 京东方科技集团股份有限公司 | Hook face display substrate and manufacturing method thereof, liquid crystal display panel and display device |
| KR102473306B1 (en) * | 2015-11-18 | 2022-12-05 | 삼성디스플레이 주식회사 | Display device |
| CN105381556A (en) * | 2015-11-19 | 2016-03-09 | 宁波祖创电子科技有限公司 | Intelligent wearable type air purifier |
| KR102493218B1 (en) * | 2016-04-04 | 2023-01-30 | 삼성디스플레이 주식회사 | Liquid crystal display device |
| CN107527584A (en) * | 2017-09-11 | 2017-12-29 | 京东方科技集团股份有限公司 | Driving method, image element circuit and the display device of image element circuit |
| CN108922490B (en) * | 2018-09-07 | 2021-05-25 | 惠科股份有限公司 | Display panel driving method and display device |
| CN109343501A (en) * | 2018-12-09 | 2019-02-15 | 刘宸祎 | A kind of sensor distributed control means of smart home |
| US10930234B1 (en) * | 2020-02-28 | 2021-02-23 | A.U. Vista, Inc. | Gray scale liquid crystal display panel with multiplexed analog gray levels |
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