CN102611424A - Method for realizing integral operation by using resistance changing device - Google Patents

Abstract

The invention discloses a method for realizing integral operation by using a resistance changing device, relating to the technical field of a semiconductor integrated circuit and manufacturing of the semiconductor integrated circuit. The method comprises the following steps of: S1, carrying out time sampling on a signal to be input; S2, carrying out reset operation on the resistance changing device; S3, inputting the signal to be input, which is carried out by the time sampling, into an anode of the resistance changing device; S4, inputting pre-set voltage on the anode of the resistance changing device; S5, reading a current value on the resistance changing device; S6, calculating and obtaining a current resistance value of the resistance changing device; and S7, calculating a difference value between an initial resistance value and the current resistance value of the resistance changing device, and obtaining a voltage integral value of the signal to be input according to a corresponding relation between the difference value and the voltage integral value of the signal to be input. The integral operation method disclosed by the invention utilizes the characteristics of the resistance changing device to realize an integrator, and has the characteristics of being simple in structure, high in speed, low in operation voltage and current, compatible in process and low in cost.

Description

Utilize resistance to become device and realize the integral operation method

Technical field

The present invention relates to semiconductor integrated circuit and manufacturing technology field thereof, particularly a kind of utilization resistance becomes device and realizes the integral operation method.

Background technology

Integrator is the vitals in the active power filtering device, and the traditional calculating circuit normally utilizes RC active integrator or MOS SC integrator to realize integral operation.But will obtain accurate electric capacity on the one hand in the RC integrator circuit is difficult to; Though the SC integrating circuit can be with realizing that accurate capacity ratio solves this problem on the other hand, the shortcoming of this integrating circuit is that effect of parasitic capacitance is big and circuit structure is complicated.Integral and calculating is comparatively complicated process, but utilizes the method for similar cerebral neuron and network to realize that many-valued integration and storage will have higher efficient and simpler structure, is an important directions of following information science development.At present proposed to realize the several different methods of many-valued storage and calculating, but these methods need very complicated circuitry structure usually.From to the demand of high-performance, high integration, we hope novel integrator have simple in structure, at a high speed, low operating voltage and electric current, process compatible, advantage such as with low cost, but the current integrator that does not still have to satisfy above-mentioned condition occurs.

Summary of the invention

The technical problem that (one) will solve

The technical problem that the present invention will solve is: how implementation structure simply, at a high speed, low operating voltage and electric current, process compatible and integrator with low cost.

(2) technical scheme

For solving the problems of the technologies described above, the invention provides a kind of utilization resistance and become device realization integral operation method, may further comprise the steps:

S1: the treat input signal continuous to time domain carries out time sampling at interval according to Preset Time;

S2: resistance is become device carry out reset operation, be initial resistivity value so that said resistance becomes the resistance value of device;

S3: the input signal of treating after the time sampling is imported the positive electrode that said resistance becomes device;

S4: said treat that input signal input is accomplished after, become in said resistance on the positive electrode of device and import predeterminated voltage;

S5: read said resistance and become the current value on the device;

S6:, calculate and obtain the current resistance value that said resistance becomes device according to said predeterminated voltage and the current value that reads;

S7: calculate initial resistivity value that said resistance becomes device and the difference between the current resistance value, and treat the corresponding relation between the voltage integrating meter value of input signal according to said difference and said, to obtain the said voltage integrating meter value of treating input signal.

Preferably, difference described in the step S7 and said treat between the integrated value of input signal corresponding relation as shown in the formula,

S _N＝λΔt(R ₀-R _n)

Wherein, S _NFor treating the voltage integrating meter value of input signal, λ is the linear relationship factor between resistance change and the magnitude of voltage, and Δ t is said Preset Time interval, R ₀Be the initial resistivity value of said resistance change device, R _nBecome the current resistance value of device for said resistance.

Preferably, also comprise step before the step S3:

S21: the input signal of treating after the said time sampling is carried out frequency conversion through frequency changer circuit, to obtain the proportional frequency variation signal of magnitude of voltage before amplitude identical and pulse duration and the frequency conversion;

In step S3, said frequency variation signal is imported the positive electrode that said resistance becomes device.

Preferably, difference described in the step S7 and said treat between the integrated value of input signal corresponding relation as shown in the formula,

S _N＝αβΔt(R ₀-R _n)

Wherein, S _NFor treating the voltage integrating meter value of input signal, α is the linear relationship factor of pulse duration and magnitude of voltage in the frequency changer circuit, and β is the linear relationship factor of pulse duration and resistance change, R ₀Be the initial resistivity value of said resistance change device, R _nBecome the current resistance value of device for said resistance.

(3) beneficial effect

The present invention utilizes resistance to become Devices Characteristics, realizes integrator, have simple in structure, at a high speed, low operating voltage and electric current, process compatible and characteristics with low cost.

Description of drawings

Fig. 1 is the structural representation that resistance becomes device;

Fig. 2 is when on the positive electrode of resistance change device shown in Figure 1, applying direct impulse, the theory relation sketch map between pulse height and the resistance value;

Fig. 3 is when on the positive electrode of resistance change device shown in Figure 1, applying direct impulse, the theory relation sketch map between pulse duration and the resistance value;

Fig. 4 is when on the positive electrode of resistance change device shown in Figure 1, applying negative-going pulse, the theory relation sketch map between pulse height (absolute value) and the resistance value;

Fig. 5 is when on the positive electrode of resistance change device shown in Figure 1, applying negative-going pulse, the theory relation sketch map between pulse duration and the resistance value;

Fig. 6 is that the resistance value of said resistance change device and the test between the pulse number concern sketch map when on resistance shown in Figure 1 becomes the positive electrode of device, applying the certain signal of pulse duration and pulse height.

Fig. 7 is the flow chart that becomes device realization integral operation method according to the utilization resistance of one embodiment of the present invention;

Fig. 8 is the flow chart that becomes device realization integral operation method according to the utilization resistance of another embodiment of the present invention.

Embodiment

Below in conjunction with accompanying drawing and embodiment, specific embodiments of the invention describes in further detail.Following examples are used to explain the present invention, but are not used for limiting scope of the present invention.

At present, a kind ofly utilize the novel non-volatility memorizer of resistance variations to have at a high speed (＜5ns), low operating voltage (＜1V), high storage density, can with advantages such as CMOS process compatible, become the strong competitor of semiconductor memory of future generation.This being called as, the device of " resistance-variable storing device (RRAM) " generally had the structure of metal-insulator-metal type; Promptly between the double layer of metal electrode, add one deck and have the dielectric thin-film material that resistance becomes characteristic; It generally is metal oxide that these resistances become materials, and common have a N _iO, T _iO ₂, H _fO ₂, Z _rO ₂, WO ₃, Ta ₂O ₅Or the like.The working method of resistance-variable storing device comprises one pole and bipolar two kinds, and the former applies the voltage of single polarity at the device two ends, and resistance value that the control resistance becomes material is changed between high low resistance state to utilize applied voltage to vary in size, to realize writing and wiping of data; And the latter utilizes the voltage control resistance that applies opposed polarity to become the conversion of material resistance value.

Because RRAM (i.e. resistance becomes device) its resistance under suitable electric current and voltage control can accurately be controlled, so RRAM is considered to have the potentiality as multivalued logic device.Special operation can make RRAM realize various computings and logic function.

What the present invention proposed is to utilize the memristor function of RRAM unit to realize many-valued integral and calculating, studies its operator scheme, proposes to utilize RRAM to realize the method for integral operation.

With reference to Fig. 1, said RRAM is at Si/SiO ₂Physical vapor deposition on the/Ti substrate (PVD) layer of metal, like platinum (Pt), thickness is 5-100nm; PVD or atomic layer deposition (ALD) layer of metal oxide again is like hafnium oxide (HfO ₂), thickness 5-30nm; PVD layer of metal or other electric conducting material again are like titanium nitride (TiN); Method through the chemical wet etching device that obtains isolating is drawn positive electrode on TiN at last, on Pt, draws negative electrode, during work, and negative electrode ground connection.Fig. 2 is when on the positive electrode of resistance change device shown in Figure 1, applying direct impulse, the theory relation sketch map between pulse height and the resistance value; Fig. 3 is when on the positive electrode of resistance change device shown in Figure 1, applying direct impulse, the theory relation sketch map between pulse duration and the resistance value; Fig. 4 is when on the positive electrode of resistance change device shown in Figure 1, applying negative-going pulse, the theory relation sketch map between pulse height and the resistance value; Fig. 5 is when on the positive electrode of resistance change device shown in Figure 1, applying negative-going pulse, the theory relation sketch map between pulse duration and the resistance value; Therefore, can know between pulse duration (pulse height) and resistance value linear.

Fig. 6 is that said resistance becomes the resistance value of device and the test between the pulse number concern sketch map, has more verified the resistance overlaying relation that hinders the change device according to Fig. 6 when on resistance shown in Figure 1 becomes the positive electrode of device, applying the certain signal of pulse duration and pulse height.

Fig. 7 is the flow chart that becomes device realization integral operation method according to the utilization resistance of one embodiment of the present invention, and with reference to Fig. 7, the method for this execution mode may further comprise the steps:

S1: the treat input signal continuous to time domain carries out time sampling at interval according to Preset Time;

S2: resistance is become device carry out reset operation, be initial resistivity value so that said resistance becomes the resistance value of device;

S3: the input signal of treating after the time sampling is imported the positive electrode that said resistance becomes device;

S4: said treat that input signal input is accomplished after, become in said resistance on the positive electrode of device and import predeterminated voltage;

S5: read said resistance and become the current value on the device;

S6:, calculate and obtain the current resistance value that said resistance becomes device according to said predeterminated voltage and the current value that reads;

S7: calculate initial resistivity value that said resistance becomes device and the difference between the current resistance value, and treat the corresponding relation between the voltage integrating meter value of input signal according to said difference and said, to obtain the said voltage integrating meter value of treating input signal.

The formula of the discrete time territory integration of the said voltage integrating meter value of treating input signal is:

$S_N=\underset{j=0}{\overset{N-1}{\mathrm{\Σ}}}(V_j*\mathrm{\Δt})$

Wherein, V _jBe the magnitude of voltage that obtains in j the sampling period (being the Preset Time interval), and Δ t is the sampling period, N is a sampling period number of treating input signal.

So owing to treat that the magnitude of voltage of input signal is directly proportional with magnitude of voltage:

$R_j=\frac{1}{\mathrm{\λ}}{V}_j$

Wherein, λ is a constant, R _jIt is the resistance change in j sampling period.

The relation that two formula can obtain voltage integrating meter value and resistance change above the simultaneous is:

$S_N=\underset{j=0}{\overset{N-1}{\mathrm{\Σ}}}({\mathrm{\λR}}_j*\mathrm{\Δt})$

Put in order:

$S_N=\mathrm{\λ}*\mathrm{\Δt}\underset{j=0}{\overset{N-1}{\mathrm{\Σ}}}\left(R_j\right)$

In addition, because

Therefore can get S _N=λ Δ t (R ₀-R _n), preferably, difference described in the step S7 and said treat between the integrated value of input signal corresponding relation as shown in the formula,

S _N＝λΔt(R ₀-R _n)

Wherein, S _NFor treating the voltage integrating meter value of input signal, λ is the linear relationship factor between resistance change and the magnitude of voltage, and Δ t is said Preset Time interval, R ₀Be the initial resistivity value of said resistance change device, R _nBecome the current resistance value of device for said resistance.

Fig. 8 is the flow chart that becomes device realization integral operation method according to the utilization resistance of another embodiment of the present invention; With reference to Fig. 8, method of this execution mode and method shown in Figure 7 are basic identical, and difference is, also comprises step before the step S3:

S21: the input signal of treating after the said time sampling is carried out frequency conversion through frequency changer circuit, to obtain the proportional frequency variation signal of magnitude of voltage before amplitude identical and pulse duration and the frequency conversion;

In step S3, said frequency variation signal is imported the positive electrode that said resistance becomes device.

The formula of the discrete time territory integration of the said voltage integrating meter value of treating input signal is:

$S_N=\underset{j=0}{\overset{N-1}{\mathrm{\Σ}}}(V_j*\mathrm{\Δt})$

Wherein, V _jBe the magnitude of voltage that obtains in j the sampling period (being the Preset Time interval), and Δ t is the sampling period, N is a sampling period number of treating input signal.

So because pulse duration is directly proportional with the linear relationship factor of magnitude of voltage in the frequency changer circuit:

$T_j=\frac{1}{\mathrm{\α}}{V}_j$

Wherein, T _jBe the pulse duration in j sampling period of frequency variation signal, α is a constant.

In addition, so have because pulse duration and resistance change are linear relationship:

$R_j=\frac{1}{\mathrm{\β}}{T}_j$

Wherein, R _jBe the resistance change in j sampling period, β is a constant.

The relation that three formula can obtain voltage integrating meter value and resistance change above the simultaneous is:

$S_N=\underset{j=0}{\overset{N-1}{\mathrm{\Σ}}}({\mathrm{\α\βR}}_j*\mathrm{\Δt})$

Put in order:

$S_N=\mathrm{\α\β}*\mathrm{\Δt}\underset{j=0}{\overset{N-1}{\mathrm{\Σ}}}\left(R_j\right)$

In addition, because

Therefore can get S _N=α β Δ t (R ₀-R _n), preferably, difference described in the step S7 and said treat between the integrated value of input signal corresponding relation as shown in the formula,

S _N＝αβΔt(R ₀-R _n)

Wherein, S _NFor treating the voltage integrating meter value of input signal, α is the linear relationship factor of pulse duration and magnitude of voltage in the frequency changer circuit, and β is the linear relationship factor of pulse duration and resistance change, R ₀Be the initial resistivity value of said resistance change device, R _nBecome the current resistance value of device for said resistance.

Embodiment 1

Present embodiment is based on method shown in Figure 8, in the present embodiment, establishes α=5*10 ^-4V/ns gets β=22ns/ Ω by experimental data, can know according to the Nyquist law

Get final product (wherein, Δ t _sBe the signal period), the product of α β Δ t can be 10 through regulating ^-8～10 ⁸Between arbitrary value, and

Be the resistance change of integration end back RRAM, so just realized becoming the voltage integrating meter device of device based on resistance.

Advantage of the present invention is: utilize resistance to become device and can realize integrating function; This integration device is simple in structure, it is integrated to be convenient to, with traditional silicon base CMOS process compatible, very be fit to large-scale production, device has at a high speed (ns magnitude), low operating voltage advantages such as (a few volts) simultaneously, meets the requirement of following high performance device.

Above execution mode only is used to explain the present invention; And be not limitation of the present invention; The those of ordinary skill in relevant technologies field under the situation that does not break away from the spirit and scope of the present invention, can also be made various variations and modification; Therefore all technical schemes that are equal to also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.

Claims (4)

1. one kind is utilized resistance to become device realization integral operation method, it is characterized in that, may further comprise the steps:

S1: the treat input signal continuous to time domain carries out time sampling at interval according to Preset Time;

S2: resistance is become device carry out reset operation, be initial resistivity value so that said resistance becomes the resistance value of device;

S3: the input signal of treating after the time sampling is imported the positive electrode that said resistance becomes device;

S4: said treat that input signal input is accomplished after, become in said resistance on the positive electrode of device and import predeterminated voltage;

S5: read said resistance and become the current value on the device;

S6:, calculate and obtain the current resistance value that said resistance becomes device according to said predeterminated voltage and the current value that reads;

S7: calculate initial resistivity value that said resistance becomes device and the difference between the current resistance value, and treat the corresponding relation between the voltage integrating meter value of input signal according to said difference and said, to obtain the said voltage integrating meter value of treating input signal.

2. the method for claim 1 is characterized in that, difference described in the step S7 and said treat between the integrated value of input signal corresponding relation as shown in the formula,

S _N＝λΔt(R ₀-R _n)

Wherein, S _NFor treating the voltage integrating meter value of input signal, λ is the linear relationship factor between resistance change and the magnitude of voltage, and Δ t is said Preset Time interval, R ₀Be the initial resistivity value of said resistance change device, R _nBecome the current resistance value of device for said resistance.

3. the method for claim 1 is characterized in that, also comprises step before the step S3:

S21: the input signal of treating after the said time sampling is carried out frequency conversion through frequency changer circuit, to obtain the proportional frequency variation signal of magnitude of voltage before amplitude identical and pulse duration and the frequency conversion;

In step S3, said frequency variation signal is imported the positive electrode that said resistance becomes device.

4. method as claimed in claim 3 is characterized in that, difference described in the step S7 and said treat between the integrated value of input signal corresponding relation as shown in the formula,

S _N＝αβΔt(R ₀-R _n)

Wherein, S _NFor treating the voltage integrating meter value of input signal, α is the linear relationship factor of pulse duration and magnitude of voltage in the frequency changer circuit, and β is the linear relationship factor of pulse duration and resistance change, R ₀Be the initial resistivity value of said resistance change device, R _nBecome the current resistance value of device for said resistance.

Images