CN102607615B - Gain self-compensating method for linear array CCD (Charge-coupled Device) pixel level signal and compensating circuit - Google Patents

Gain self-compensating method for linear array CCD (Charge-coupled Device) pixel level signal and compensating circuit Download PDF

Info

Publication number
CN102607615B
CN102607615B CN201210093677.5A CN201210093677A CN102607615B CN 102607615 B CN102607615 B CN 102607615B CN 201210093677 A CN201210093677 A CN 201210093677A CN 102607615 B CN102607615 B CN 102607615B
Authority
CN
China
Prior art keywords
signal
gain
reset
circuit
analog switch
Prior art date
Application number
CN201210093677.5A
Other languages
Chinese (zh)
Other versions
CN102607615A (en
Inventor
江俊峰
刘铁根
孟祥娥
刘琨
王少华
尹金德
吴凡
Original Assignee
天津大学
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 天津大学 filed Critical 天津大学
Priority to CN201210093677.5A priority Critical patent/CN102607615B/en
Publication of CN102607615A publication Critical patent/CN102607615A/en
Application granted granted Critical
Publication of CN102607615B publication Critical patent/CN102607615B/en

Links

Abstract

本发明提供一种线阵CCD像元级信号增益自补偿方法及电路,应用于空间型低相干干涉解调系统中输出信号的平坦化处理。 The present invention provides a line CCD pixel signal level from the gain compensation method and circuit type used in low spatial coherence interferometer system flattening process demodulates the output signal. 解调系统硬件部分包括CPLD控制电路、线阵CCD器件、增益自补偿电路、放大滤波电路和数据采集电路。 CPLD demodulation system hardware includes a control circuit, linear CCD, since the gain compensation circuit, amplifying circuit and a data acquisition circuit filter. 其中增益自补偿电路由数字电位器、运算放大器、模拟开关(S1、S2)和电阻(R1、R2)组成,动态控制线阵CCD的信号增益。 Wherein the gain from the digital potentiometer by the compensation circuit, an operational amplifier, an analog switch (S1, S2) and resistors (R1, R2) composition, dynamic control linear CCD signal gain. 解调时,CPLD控制电路输出线阵CCD的驱动时钟,同时输出同步时钟信号到增益自补偿电路,在每个像元周期同步控制模拟开关和数字电位器阻值调节,根据预设的增益参数表格,实时动态改变运放增益,实现每个像元信号增益的独立精细调整。 Demodulation, CPLD control clock driver circuit outputs linear CCD, while the output from the synchronous clock signal to the gain compensation circuit, each cell cycle synchronization control of analog switch and the digital potentiometer resistance adjustment, according to a predetermined gain parameter tables, real-time dynamic changes in amplifier gain to achieve fine-tune each individual pixel signal gain. 此方法能够有效改善光照不均匀对低相干干涉解调精度的影响。 This method can improve the accuracy of demodulation of uneven light impact on low coherence interferometry.

Description

线阵CCD像元级信号增益自补偿方法及补偿电路 Linear CCD pixel level signal from the compensation method and the gain compensation circuit

技术领域 FIELD

[0001] 本发明涉及线阵CCD输出信号处理领域,具体涉及了一种线阵CCD像元级信号增益自补偿方法和电路实现,使其适用于压力、温度、应力和位移等低相干干涉传感领域和分光光谱分析领域。 [0001] relates to Linear CCD output signal processing according to the present invention, particularly relates to a linear CCD pixel signal level from the gain compensation method and circuit implementation, making it suitable for pressure, temperature, stress and displacement low coherence interferometer pass a sense of spectroscopic analysis and field areas.

背景技术 Background technique

[0002] 低相干干涉是高精度测量绝对位移的常用方法,其中采用光楔完成光程差空间扫描的解调装置可以获得高精度且稳定的测量,它需要通过CCD器件接收低相干干涉条纹。 [0002] Low coherence interferometer is a common method for high-precision measurement of absolute displacement, wherein the demodulation means using an optical wedge space complete scanning optical path difference can be obtained with high accuracy and stable measurement, it requires a CCD device receives the low coherent interference fringes. 通常在低相干干涉系统中,光源发出的光不是均匀分布,中心强而两边弱,因此到达线阵CCD面上的照度也不均匀,含有位移信息的低相干干涉条纹在照度不均匀的背景信号上随着被测物理量的变换发生平移,因此低相干干涉条纹落在不同照度区域形成的信号对比度不同,信噪比不同,从而影响系统的解调精度。 Generally in the low coherence interferometer system, the light emitted from the light source is not evenly distributed, and on both sides of the center intensity is weak, thus reaching the surface of the linear CCD illuminance is not uniform, low coherence interference fringe displacement information containing the illuminance unevenness in the background signal converting the measured physical quantity as a translation occur, so the low coherence interference fringes fall on different illumination regions are formed in different contrast signals, different SNR, which affects the demodulation accuracy of the system.

[0003] 线阵C⑶传感器输出的模拟电压与入射光照度、帧转移频率有关,且随着入射光照度的增加而增大,随着帧转移频率的增大而减小。 [0003] Analog voltage and the illuminance of the incident light C⑶ linear sensor output, frame transfer frequency, and with the increase of the illuminance of incident light is increased, as the frame transfer frequency increases is reduced. 目前调节CCD输出信号电压的方法有两种,一种是通过调节外部光照照度,另一种是调整CCD的感光时间。 There are two ways to adjust the CCD output signal voltage, a method by adjusting the ambient light illuminance, the other is to adjust the CCD photosensitive time. 其中调节外部光照照度的方法是通过调节光源功率,改变CCD接受的光照照度,从而实现调节CCD输出信号的模拟电压,这种方法受到光源和光路系统光照分布均匀性的限制,无法进行像元级的精细调整。 Wherein the method of adjusting the ambient light illuminance by adjusting the light power change CCD receiving light illuminance, so that analog voltage regulating CCD output signal, this process is subject light source and the optical system illumination distribution limiting uniformity can not be pixel level the fine adjustment. 调整CCD感光时间的方法是通过调整CCD的积分时间,使得CCD光敏单元累积电荷,从而改变CCD输出信号的模拟电压,但受CCD转移时钟频率、驱动电路主频的限制,只能对CCD 输出信号增益进行整帧的调整,不能做到按像元的精细调整。 The method is to adjust the CCD sensor time by adjusting the integration time of the CCD, so that the accumulated charge CCD photosensitive cells, thereby changing the output signal of the CCD analog voltage, however, is limited by the frequency of the driving circuit CCD transfer clock frequency, only the CCD output signal adjust the gain of the entire frame, fine adjustment of the press do not like elements.

发明内容 SUMMARY

[0004] 本发明的目的在于克服上述方法的不足,提供一种空间型低相干干涉解调系统中的线阵CCD像元级信号增益自补偿方法。 [0004] The object of the present invention to overcome the disadvantages of the above method, there is provided a spatial meta-type low coherent interference signal gain level from linear CCD image compensation method in the demodulation system. 根据线阵CCD每个像元的照度调节其动态增益, 得到较强的信号输出,使得对不同照度区域的像元都能充分的利用CCD的动态范围,增强局部信号的对比度,观测到局部区域的细节,提高解调系统的精度。 The illumination of each pixel linear CCD element dynamic gain adjustment to obtain a strong signal output, so that the dynamic range of the pixel can be fully utilized in different regions of the CCD illumination, enhancing the contrast of the local signal, the local region is observed detail, improve the accuracy of demodulation system.

[0005] 本发明提供的线阵CCD像元级信号增益自补偿方法是在解调系统中硬件部分设有增益自补偿电路。 [0005] meta-level signal gain from the linear CCD image compensation method according to the present invention is provided in the demodulation system from the hardware part is provided with a gain compensation circuit.

[0006] 解调系统硬件部分如图2所示,包括CPLD控制电路、线阵CCD、放大滤波电路和数据采集电路,增益自补偿电路连接在线阵CCD与放大滤波电路之间。 [0006] demodulation hardware of the system shown in Figure 2, a control circuit comprising a CPLD, CCD linear array, and a data acquisition circuit amplifying and filtering circuits, since the gain compensation circuit connected between the amplifier linear CCD filter circuit. CPLD控制电路输出线阵CCD的转移时钟、驱动时钟和复位时钟;同时输出同步复位时钟信号到增益自补偿电路, 在每个像元周期同步控制第一模拟开关S1、第二模拟开关S2和数字电位器阻值调节,根据预设的增益参数表格,动态改变增益自补偿电路中运算放大电路的增益,实现每个像元信号增益的独立精细调整。 CPLD control circuit outputs the transfer clock line CCD driving clock and reset clock; clock synchronous reset signal while the output from the gain compensation circuit, each cell in the synchronization control cycle of the first analog switch S1, the second analog switch S2 and digital potentiometer resistance adjusting gain parameter according to a preset table, dynamically change the gain from the gain compensation circuit operational amplifier, to achieve a fine adjustment of each individual pixel signal gain.

[0007] 本发明提供的空间型低相干干涉解调系统中线阵CCD像元级信号增益自补偿电路由运算放大器、数字电位器、第一模拟开关S1、第二模拟开关S2以及第一电阻R1和第二电阻R2组成。 [0007] The present invention provides a space-type low coherence interferometer system demodulation linear CCD pixel signal level from the gain compensation circuit of an operational amplifier, a digital potentiometer, a first analog switch S1, a second analog switch S2 and a first resistor R1 and a second resistor R2 form.

[0008] 运算放大器的正相输入端接地,反相输入端通过第一电阻R1连接到线阵C⑶信号输出端;运算放大器的反相输入端与输出端之间连接由两个并联支路构成的负反馈电路, 其中一路是第一模拟开关S1与数字电位器R的串联支路;另一路是第二模拟开关S2与第二电阻R2的串联支路,以此形成运算放大电路的负反馈电路。 [0008] The non-inverting input of the operational amplifier to ground, inverting input is connected to the signal output line array C⑶ through the first resistor Rl; connected between the inverting input terminal of the operational amplifier and the output terminal constituted by the two parallel branches a negative feedback circuit, is the way in which the series branch with a first analog switch S1 digital potentiometer R; the second series branch is another way analog switch S2 and the second resistor R2, thereby forming a negative feedback circuit of the operational amplifier circuit.

[0009] 本发明提供的线阵C⑶像元级信号增益自补偿方法是: [0009] The present invention provides linear C⑶ the pixel level signal from the compensation gain is:

[0010] 第1、解调系统启动前,默认状态设为第一模拟开关S1断开,第二模拟开关S2闭合。 [0010] First, before starting demodulation system, the default state is a first analog switch S1 is turned off, a second analog switch S2 is closed.

[0011] 第2、系统启动,线阵CCD的输出信号接到上述增益自补偿电路的输入端,随着解调电路的启动,解调系统的CPLD控制电路输出线阵CCD的转移时钟、驱动时钟和复位时钟, 同时CPLD控制电路输出同步复位时钟给第一模拟开关S1和第二模拟开关S2。 [0011] 2, the system starts, the output signal of the line CCD connected to the input from the gain compensation circuit, with the start of the demodulation circuit, CPLD demodulation system control circuit outputs the transfer clock line CCD driving clock and reset the clock, and resets CPLD control circuit outputs a clock synchronized to a first analog switch S1 and the second analog switch S2.

[0012] 第3、线阵CCD在各路时钟的作用下开始输出像元信号,像元信号按时间分为复位信号与有效信号两个部分,线阵CCD不同像元输出的复位信号电压相同,有效信号不同,当复位时钟为高电平时,线阵CCD复位并输出复位信号,第一模拟开关S1断开,第二模拟开关S2闭合,第二电阻R2接入到运算放大电路。 [0012] 3, under the action of linear CCD clock start brightest pixel output signal, pixel signal reset signal in time into two parts with the active signal, except as the reset signal voltage output from the same element linear CCD , different effective signal is high when the clock is reset, the reset line CCD and outputs a reset signal, a first analog switch S1 is turned off, a second analog switch S2 is closed, access to the second resistor R2 of the operational amplifier.

[0013] 第4、CPLD根据预先设定的增益参数表格调节数字电位器R的阻值,调节时间小于线阵C⑶复位时间,保证线阵C⑶输出有效像元信号之前,数字电位器达到稳定状态。 [0013] The first 4, CPLD adjusting the resistance of the digital potentiometer gain parameter R in accordance with a preset table, adjusting linear C⑶ time is less than the reset time, before the line array pixel signal output valid C⑶ guaranteed to reach steady state digital potentiometer . 当复位时钟为低电平时,线阵CCD输出有效信号,第一模拟开关S1闭合,第二模拟开关S2断开, 数字电位器接入到运算放大电路,有效像元信号增益调整,复位时钟低电平结束,开始下一个像元信号的调整。 When reset clock low linear CCD output valid signal, a first analog switch S1 is closed, a second analog switch S2 is open, the access to the digital potentiometer operational amplifier circuit, the effective pixel signal gain adjustment, low reset clock end level, a signal to adjust the yuan as the next start.

[0014] 线阵CCD像元输出信号与复位时钟同步,CPLD输出同步复位时钟信号到增益自补偿电路,在每个像元周期同步控制第一模拟开关(S1)、第二模拟开关(S2)和数字电位器(R)的阻值调节,根据预设的增益参数表格,动态改变运算放大电路的增益,实现每个像元信号增益的独立精细调整。 [0014] Linear CCD pixel clock synchronized with the reset output signal, CPLD outputs a synchronization clock signal to reset the gain compensation circuit since, in each cell cycle synchronization control first analog switch (Sl), a second analog switch (S2) and adjusting the digital potentiometer resistance (R), the parameter table according to a predetermined gain, the gain of the operational amplifier circuit to change dynamically to achieve fine adjustment of each individual pixel signal gain.

[0015] 线阵CCD像元级信号增益自补偿电路对线阵CCD输出的复位信号和有效信号进行分开调整。 [0015] Linear CCD pixel signal level from the gain compensation circuit of the reset signal and the valid signal output from the linear CCD adjusted separately. 线阵C⑶复位信号采用统一增益的放大,保证每个像元有效信号基地电压相同, 线阵CCD有效信号进行按像元增益调整,当复位时钟为高电平时,线阵CCD输出复位信号电压Vn,通过增益自补偿电路输出信号电压 Linear C⑶ unity-gain amplification using a reset signal to ensure that each cell the same as the base voltage valid signal, linear CCD effective signal gain adjustment by pixel, when the reset clock is high, the reset signal line array CCD output voltage Vn , by the compensation circuit the output signal from the voltage gain

Figure CN102607615BD00051

. 式中:¾为第一电阻(R1)的阻值,R2为第二电阻(R2)的阻值; Where: ¾ of a first resistor (R1) resistance, R2 the second resistor (R2) resistance;

[0016] 当复位时钟为低电平时,线阵C⑶输出有效像元信号电压Vi2,通过增益自补偿电路输出信号电压 [0016] When the clock is reset to a low level, the output line array C⑶ voltage Vi2 is effective pixel signal, the output signal from the voltage gain compensation circuit

Figure CN102607615BD00052

. 式中:¾为第一电阻(R1)的阻值,R为根据增益参数表格调整后的数字电位器的阻值。 Where: ¾ of a first resistor (R1) of the resistance, R is the resistance of the digital potentiometer adjustment according to the gain parameter table. 从而完成线阵CCD像元级增益补偿,使不同照度区域的像元都能充分的利用CCD的动态范围,增强局部信号的对比度,观测到局部区域的细节,提高解调系统的精度。 Thereby completing the line CCD pixel level gain compensation, so that the pixel can be sufficiently different illumination areas by the CCD dynamic range, local contrast enhancement signal, the details of the local region is observed to improve the accuracy of the demodulation system.

[0017] 本发明的优点和有益效果: [0017] The advantages and benefits of the present invention:

[0018] 空间型低相干干涉解调仪的线阵CCD像元级信号增益自补偿电路实现每个像元信号增益的独立精细调整,能够有效改善光照不均匀对低相干干涉解调精度的影响。 [0018] The low spatial coherence interferometer type demodulator linear CCD pixel signal level from the gain compensation circuit to achieve fine adjustment of each image element signals independent of gain, can improve the unevenness of the influence of light of low coherence interferometer demodulation accuracy .

附图说明 BRIEF DESCRIPTION

[0019] 图1为光纤法珀传感的空间型低相干干涉系统的解调装置框图。 [0019] FIG. 1 is a sensing space Perot type optical low-coherence method block diagram of a demodulation apparatus of the interferometric system.

[0020] 图2为空间型低相干干涉系统解调电路结构图。 [0020] FIG. 2 is a type of low spatial coherence interferometer system demodulator circuit configuration of FIG.

[0021] 图3为线阵(XD像元级增益自补偿电路的原理图。 [0021] FIG. 3 is a linear array (XD pixel level schematic circuit of a self-compensating gain.

[0022] 图4为空间型低相干干涉系统背景信号图。 [0022] FIG. 4 is a spatial low-coherence interferometry system of FIG background signal.

[0023] 图5为空间型低相干干涉系统未经过增益补偿采集到的信号图。 [0023] FIG. 5 is a spatial low-coherence interferometry system of FIG gain compensation signal not collected through.

[0024] 图6为空间型低相干干涉系统经过增益补偿电路后采集到的线阵CCD的信号图。 [0024] FIG. 6 is a signal diagram low spatial coherence type linear CCD system after gain compensation circuit is collected interference.

[0025] 图中,1宽带光源,2光耦合器,3光纤FP传感器,4自聚焦准直透镜,5光楔,6线阵(XD器件。 [0025] FIG, 1 a broadband light source, optical coupler 2, an optical fiber FP sensor 3, 4 GRIN lens, optical wedge 5, 6 linear array (XD device.

具体实施方式 Detailed ways

[0026] 实施例: [0026] Example:

[0027] 附图1是本发明方法涉及的一个基于线阵CCD检测的低相干干涉解调系统装置图,结合外界大气压力的测量,对本方法进行说明。 [0027] Figure 1 is a method of the present invention relates to a system of interference demodulation means based on low-coherence FIG linear CCD detector, combined with the measurement of ambient atmospheric pressure, the present method will be described.

[0028] 宽带光源1发出的光经光耦合器2入射到光纤FP传感器3,从传感器3的两个端面发射的光发生近似双光束干涉,光程差为FP腔长的两倍,腔长随着外界大气压强呈线性变化。 [0028] light is emitted from the optical coupler 2 broadband light source 1 is incident to the optical fiber sensor 3 FP, approximately two-beam interference of light emitted from the two end faces of sensor 3 occurs twice as long as the optical path difference of FP cavity, the cavity length with the outside atmospheric pressure changes linearly. 被调制过的光信号从光耦合器2的出口导出,通过自聚焦准直透镜4形成能量集中的细光束出射。 Modulated optical signal is derived from the outlet of the optical coupler 2, forming a small concentrated beam energy emitted through the self-focusing collimator lens 4. 该细光束透过光楔5完成光程差的扫描,最终投影到线阵CCD 6,线阵(XD 6的有效像元数为3000。光楔5形成光程差扫描,当光楔5引起的光程差和传感器3 引起的光程差相匹配时,在线阵CCD 6相应的局部像元处产生低相干干涉条纹。 The beamlets transmitted through the optical wedge 5 is completed scanning the optical path difference, ultimately to the projected linear CCD 6, the linear array (effective number of pixels is 3000. XD 6 5 optical wedge scanning an optical path difference, caused when the wedge 5 3 when the optical path difference due to optical path difference and the sensor match line array CCD 6 membered corresponding partial image is generated at a low coherent interference fringes.

[0029] 低相干干涉解调系统的解调电路结构如附图2所示,解调电路包括CPLD控制电路、线阵CCD、增益自补偿电路、放大滤波电路和数字采集电路,增益自补偿电路连接在线阵CCD与放大滤波电路之间。 [0029] The low-coherence interferometric demodulation circuit demodulates the system configuration as shown in Figure 2, the demodulation circuit comprises a control circuit CPLD, the CCD linear array, since the gain compensation circuit, amplifying circuit and a digital filter acquisition circuit, since the gain compensation circuit the connection between the amplifier linear CCD filter circuit. 其中控制电路CPLD向线阵CCD输出转移时钟(TCLK)、驱动时钟(CRx)和复位时钟(RS),同时CPLD输出同步复位时钟到增益自补偿电路。 Wherein the control circuit to the CPLD output line CCD transfer clock (TCLK), the drive clock (the CRx) and the reset clock (RS), while the clock is reset to synchronize CPLD output from the gain compensation circuit. 在每个像元周期同步控制第一模拟开关S1和第二模拟开关S2,并根据预先设定的增益参数表格调节数字电位器的阻值,动态改变增益自补偿电路的增益,实现像元级信号的增益调整。 In each cell cycle synchronization control of the first analog switch S1 and the second analog switch S2, the digital potentiometer and the resistance adjusting gain parameter according to a preset table or dynamically change the gain of the gain from the compensation circuit, pixel level achieved gain adjustment signal.

[0030] 附图3是线阵C⑶增益自补偿电路的原理图。 [0030] Figure 3 is a linear array from C⑶ gain compensation circuit schematic. 其中包括一个运算放大器,数字电位器,第一模拟开关S1、第二模拟开关S2以及第一电阻R1和第二电阻R2。 Which comprises an operational amplifier, a digital potentiometer, a first analog switch S1, a second analog switch S2 and the first resistor R1 and second resistor R2.

[0031] 运算放大器的正相输入端接地,反相输入端通过第一电阻R1连接到线阵C⑶信号输出端;运算放大器的反相输入端与输出端之间连接由两个并联支路构成的负反馈电路, 其中一路是第一模拟开关S1与数字电位器R的串联支路;另一路是第二模拟开关S2与第二电阻R2的串联支路,以此形成运算放大电路的负反馈电路。 [0031] The non-inverting input of the operational amplifier to ground, inverting input is connected to the signal output line array C⑶ through the first resistor Rl; connected between the inverting input terminal of the operational amplifier and the output terminal constituted by the two parallel branches a negative feedback circuit, is the way in which the series branch with a first analog switch S1 digital potentiometer R; the second series branch is another way analog switch S2 and the second resistor R2, thereby forming a negative feedback circuit of the operational amplifier circuit.

[0032] 本发明提供的线阵C⑶像元级信号增益自补偿方法是: [0032] The present invention provides a linear array C⑶ the pixel level signal from the gain compensation method is:

[0033] 第1、解调系统启动前,默认状态设为第一模拟开关S1断开,第二模拟开关S2闭合。 [0033] First, before starting demodulation system, the default state is a first analog switch S1 is turned off, a second analog switch S2 is closed.

[0034] 第2、系统启动,线阵CCD的输出信号接到上述增益自补偿电路的输入端,随着解调电路的启动,解调系统的CPLD控制电路输出线阵CCD的转移时钟、驱动时钟和复位时钟, 同时CPLD控制电路输出同步复位时钟给第一模拟开关S1和第二模拟开关S2。 [0034] 2, the system starts, the output signal of the line CCD connected to the input from the gain compensation circuit, with the start of the demodulation circuit, CPLD demodulation system control circuit outputs the transfer clock line CCD driving clock and reset the clock, and resets CPLD control circuit outputs a clock synchronized to a first analog switch S1 and the second analog switch S2.

[0035] 第3、线阵CCD在各路时钟的作用下开始输出像元信号,像元信号按时间分为复位信号与有效信号两个部分,线阵CCD不同像元输出的复位信号电压相同,有效信号不同,当复位时钟为高电平时,线阵CCD复位并输出复位信号,第一模拟开关S1断开,第二模拟开关S2闭合,第二电阻R2接入到运算放大电路。 [0035] 3, under the action of linear CCD clock start brightest pixel output signal, pixel signal reset signal in time into two parts with the active signal, except as the reset signal voltage output from the same element linear CCD , different effective signal is high when the clock is reset, the reset line CCD and outputs a reset signal, a first analog switch S1 is turned off, a second analog switch S2 is closed, access to the second resistor R2 of the operational amplifier.

[0036] 第4、CPLD根据预先设定的增益参数表格调节数字电位器R的阻值,调节时间小于线阵C⑶复位时间,保证线阵C⑶输出有效像元信号之前,数字电位器达到稳定状态。 [0036] The first 4, CPLD adjusting the resistance of the digital potentiometer gain parameter R in accordance with a preset table, adjusting linear C⑶ time is less than the reset time, before the line array pixel signal output valid C⑶ guaranteed to reach steady state digital potentiometer . 当复位时钟为低电平时,线阵CCD输出有效信号,第一模拟开关S1闭合,第二模拟开关S2断开, 数字电位器接入到运算放大电路,有效像元信号增益调整,复位时钟低电平结束,开始下一个像元信号的调整。 When reset clock low linear CCD output valid signal, a first analog switch S1 is closed, a second analog switch S2 is open, the access to the digital potentiometer operational amplifier circuit, the effective pixel signal gain adjustment, low reset clock end level, a signal to adjust the yuan as the next start.

[0037] 线阵CCD像元输出信号与复位时钟同步,CPLD输出同步复位时钟信号到增益自补偿电路,在每个像元周期同步控制第一模拟开关(S1)、第二模拟开关(S2)和数字电位器(R)的阻值调节,根据预设的增益参数表格,动态改变运算放大电路的增益,实现每个像元信号增益的独立精细调整。 [0037] Linear CCD pixel clock synchronized with the reset output signal, CPLD outputs a synchronization clock signal to reset the gain compensation circuit since, in each cell cycle synchronization control first analog switch (Sl), a second analog switch (S2) and adjusting the digital potentiometer resistance (R), the parameter table according to a predetermined gain, the gain of the operational amplifier circuit to change dynamically to achieve fine adjustment of each individual pixel signal gain.

[0038] 线阵CCD像元级信号增益自补偿电路对线阵CCD输出的复位信号和有效信号进行分开调整。 [0038] Linear CCD pixel signal level from the gain compensation circuit of the reset signal and the valid signal output from the linear CCD adjusted separately. 线阵C⑶复位信号采用统一增益的放大,保证每个像元有效信号基地电压相同, 线阵CCD有效信号进行按像元增益调整,当复位时钟为高电平时,线阵CCD输出复位信号电压Vn,通过增益自补偿电路输出信号电压 Linear C⑶ unity-gain amplification using a reset signal to ensure that each cell the same as the base voltage valid signal, linear CCD effective signal gain adjustment by pixel, when the reset clock is high, the reset signal line array CCD output voltage Vn , by the compensation circuit the output signal from the voltage gain

Figure CN102607615BD00071

3式中 3 formula

Figure CN102607615BD00072

为第一电阻(R1)的阻值,R2为第二电阻(R2)的阻值; Is a resistance of the first resistor (R1), R2 of the second resistor (R2) resistance;

[0039] 当复位时钟为低电平时,线阵C⑶输出有效像元信号电压Vi2,通过增益自补偿电路输出信号电压 [0039] When the clock is reset to a low level, the output line array C⑶ voltage Vi2 is effective pixel signal, the output signal from the voltage gain compensation circuit

Figure CN102607615BD00073

. 式中:¾为第一电阻(R1)的阻值,R为根据增益参数表格调整后的数字电位器的阻值。 Where: ¾ of a first resistor (R1) of the resistance, R is the resistance of the digital potentiometer adjustment according to the gain parameter table. 从而完成线阵CCD像元级增益补偿,使不同照度区域的像元都能充分的利用CCD的动态范围,增强局部信号的对比度,观测到局部区域的细节,提高解调系统的精度。 Thereby completing the line CCD pixel level gain compensation, so that the pixel can be sufficiently different illumination areas by the CCD dynamic range, local contrast enhancement signal, the details of the local region is observed to improve the accuracy of the demodulation system.

[0040] 空间型低相干干涉解调系统中线阵CCD像元级信号增益自补偿电路的具体实施步骤如下: [0040] type low spatial coherence interferometer system demodulation linear CCD image DETAILED DESCRIPTION step from meta-level signal gain compensation circuit is as follows:

[0041] 首先,获取并预设CCD像元对应的增益参数表格,增益参数是依据空间型低相干干涉解调系统的背景信号给出的,解调系统启动前,将光纤FP传感器用具有相同反射率的光纤反射镜代替。 [0041] First, a CCD camera and a preset gain parameter table element corresponding to the gain parameter is based on the spatial low-coherence interference signal demodulation system of the background given, before starting demodulation system, the optical fiber sensor having the same FP an optical fiber instead of the mirror reflectivity. 启动系统后,CCD接收到不含有干涉条纹的背景信号,此时CPLD控制电路不对增益自补偿电路控制,增益电路处于默认状态,模拟开关S1断开,S2闭合,电阻R2 接入到运放电路负反馈中。 After starting the system, the CCD received signal does not contain background interference fringes, CPLD control circuit at this time does not self-compensating gain control circuit, a gain circuit in the default state, the analog switch S1 is opened, S2 is closed, the resistor R2 to access operational amplifier circuit negative feedback. CCD输出的背景信号通过放大滤波电路、数据采集电路传输到上位机。 CCD output background signal by amplifying filter circuit, transmission data acquisition circuit to the host computer. 上位机对接收到的背景信号进行拟合,得到近似的背景曲线y = f(x),如图4所示, 由3 = f(x)*k(x)计算出不同像元X对应的增益参数k,从而得到增益调整的参数表格,并下载到CPLD中。 PC background signal received by curve fitting the approximate curve background y = f (x), shown in Figure 4 by 3 = f (x) * k (x) is calculated corresponding to different pixel X gain parameter k, so as to obtain a gain adjustment parameter table, and downloaded into the CPLD.

[0042] 其次,对空间型低相干干涉解调系统中输出信号的平坦化处理。 [0042] Next, the spatial low-coherence interferometer system flattening process demodulates the output signal. 接入FP传感器。 Access FP sensor. 启动系统后,CPLD输出线阵C⑶的转移时钟TCLK、驱动时钟CRx、复位时钟RS、同时输出同步复位时钟给模拟开关SI、S2。 After starting the system, the transfer clock the CPLD output line array C⑶ TCLK, the CRx clock driver, the clock is reset the RS, while the output clock synchronous reset to the analog switches SI, S2. 线阵CCD在各路时钟的作用下开始输出像元信号,当复位时钟RS高电平,线阵(XD复位并输出像元复位信号电压Vu,通过R1接入到增益自补偿电路,此时模拟开关S1断开,S2闭合,电阻R2接入到运算放大电路,输出信号电压 Linear CCD under the action of the brightest pixel clock output start signal, a high level when the reset clock RS, linear array (XD reset and the reset signal output cell voltages Vu, R1 gain access through the self compensating circuit, this time analog switch S1 is open, S2 is closed, the resistor R2 access to the operational amplifier, the output signal voltage

Figure CN102607615BD00081

•式中:¾为第一电阻(R1)的阻值,R2为第二电阻(R2)的阻值。 • in formula: ¾ of a first resistor (R1) resistance, R2 the second resistor (R2) resistance. CPLD根据预先设定的增益参数表格调节数字电位器的阻值R。 Table CPLD adjusting the resistance of the digital potentiometer in accordance with a predetermined gain parameter R. 调节时间小于CCD复位时间,保证CCD输出有效像元信号之前,数字电位器达到稳定状态。 CCD reset time is less than the conditioning time, prior to ensure effective pixel CCD output signal reaches a steady state digital potentiometer. 当复位时钟RS低电平,线阵CCD输出有效像元信号电压Vi2,模拟开关S1闭合,S2断开,数字电位器接入到运算放大电路。 When the reset clock RS low linear CCD output voltage Vi2 is effective pixel signal, the analog switch S1 is closed, S2 is turned off, the access to the digital potentiometer operational amplifier. 输出信号电压 Output signal voltage

Figure CN102607615BD00082

. 式中:R为调整后的数字电位器的阻值。 The formula wherein: R is a resistance of the digital potentiometer is adjusted. 复位时钟RS低电平结束,开始一个像元信号的增益调整。 Low end of the reset clock RS, a start pixel gain adjustment signal.

[0043] 实验中,未启用增益自动补偿时,接收到的低相干干涉信号如图4所示。 [0043] In the experiment, when the automatic gain compensation is not enabled, the received low-coherence interference signal shown in FIG. 在照度弱的区域,干涉信号受照度的影响,对比度差,信噪比低。 In the region of weak illumination, illumination by the influence of interference signal, poor contrast, low signal to noise ratio. 启用增益自补偿电路调整后,接收到的低相干干涉信号如图5所示,低相干干涉信号得到明显增强,有效改善了光照不均匀对低相干干涉解调精度的影响。 Since the gain compensation circuit enabled to adjust, the received signal is shown low coherence interferometer, the low coherence interference signal 5 significantly enhanced to effectively improve the effect of unevenness of the low-coherence light interference demodulation accuracy.

Claims (3)

1. 一种空间型低相干干涉解调系统中线阵CCD像元级信号增益动态自补偿方法,该方法使用的增益动态自补偿电路由运算放大器、数字电位器、第一模拟开关(S1)、第二模拟开关(S2)以及第一电阻(R1)和第二电阻(R2)组成; 所述的运算放大器的正相输入端接地,反相输入端通过第一电阻(R1)连接到线阵CCD 信号输出端;运算放大器的反相输入端与输出端之间连接由两个并联支路构成的负反馈电路,其中一路是第一模拟开关(S1)与数字电位器(R)串联支路,另一路是第二模拟开关(S2)与第二电阻(R2)的串联支路; 其特征在于该补偿方法是: 第1、解调系统启动前,默认状态设为第一模拟开关(S1)断开,第二模拟开关(S2)闭合; 第2、系统启动,线阵CCD的输出信号接到所述增益动态自补偿电路的输入端,随着解调电路的启动,解调系统的CPLD控制电路输出线 A spatial low-coherence interference signal gain stage self-compensating element Dynamic linear CCD image demodulation system, the gain of the self-compensating dynamic method uses an operational amplifier circuit, a digital potentiometer, a first analog switch (Sl), a second analog switch (S2) and a first resistor (R1) and a second resistor (R2) composition; said operational amplifier inverting input to ground, inverting input is connected via a first resistor (R1) linear CCD signal output terminal; a connector negative feedback circuit constituted by the two parallel branches between the inverting input terminal of the operational amplifier and an output terminal, wherein the first way is an analog switch (S1) and the digital potentiometer (R) series arrangement another way is a second analog switch (S2) and a second resistor (R2) series arrangement; wherein the compensation method is: first, before the demodulation system startup, a default state to a first analog switch (S1 ) opens, a second analog switch (S2) is closed; the second, the system starts, the output signal of linear CCD self-compensating dynamic gain to the input of the circuit, with the start of the demodulation circuit, demodulation system CPLD control circuit output line CCD的转移时钟、驱动时钟和复位时钟, 同时CPLD控制电路输出同步复位时钟给第一模拟开关(S1)和第二模拟开关(S2); 第3、线阵CCD在各路时钟的作用下开始输出像元信号,像元信号按时间分为复位信号与有效信号两个部分,线阵CCD不同像元输出的复位信号电压相同,有效信号不同,当复位时钟为高电平时,线阵CCD复位并输出复位信号,第一模拟开关(S1)断开,第二模拟开关(S2)闭合,第二电阻(R2)接入到运算放大电路; 第4、CPLD根据预先设定的增益参数表格调节数字电位器(R)的阻值,调节时间小于线阵C⑶复位时间,保证线阵C⑶输出有效像元信号之前,数字电位器达到稳定状态; 当复位时钟为低电平时,线阵CCD输出有效信号,第一模拟开关(S1)闭合,第二模拟开关(S2)断开,数字电位器(R)接入到运算放大电路,有效像元信号增益调整,复位时钟 Transfer clock of the CCD driving clock and reset the clock, and resets CPLD control circuit outputs a clock synchronized to a first analog switch (S1) and a second analog switch (S2); a third linear CCD clock start under the action of the brightest pixel output signal, pixel signal reset signal in time into two parts with the active signal, different linear CCD element like the reset signal voltage output from the same, different effective signal is high when the clock is reset, the reset line CCD and outputs a reset signal, a first analog switch (S1) is turned off, a second analog switch (S2) is closed, a second resistor (R2) to access the operational amplifier circuit; a first 4, CPLD gain parameter adjusted in accordance with a preset table or digital potentiometer (R) of the resistance, the settling time is less than the linear C⑶ reset time, before the line array C⑶ ensure effective pixel output signal reaches a steady state digital potentiometer; reset when the clock is low, the output of linear CCD effective signal, a first analog switch (S1) is closed, a second analog switch (S2) is turned off, the digital potentiometer (R) to access the operational amplifier circuit gain adjustment effective pixel signal, a reset clock 电平结束,开始下一个像元信号的调整。 End level, a signal to adjust the yuan as the next start.
2. 根据权利要求1所述的方法,其特征在于:线阵CCD像元输出信号与复位时钟同步, CPLD输出同步复位时钟信号到增益动态自补偿电路,在每个像元周期同步控制第一模拟开关(S1)、第二模拟开关(S2)和数字电位器(R)的阻值调节,根据预设的增益参数表格,动态改变运算放大电路的增益,实现每个像元信号增益的独立精细调整。 2. The method according to claim 1, wherein: Linear CCD pixel clock synchronized with the reset output signal, CPLD outputs a synchronization clock signal to reset the gain from the dynamic compensation circuit, each cell in a first cycle synchronization control analog switch (Sl), a second analog switch (S2) and the digital potentiometer (R), the resistance adjusting gain parameter according to a preset table dynamically change the gain of the operational amplifier circuit, to achieve each individual pixel signal gain fine adjustment.
3. 根据权利要求1或2所述的方法,其特征在于:在每个像元周期,当复位时钟为高电平时,线阵CCD复位并输出像元复位信号电压 3. The method of claim 1 or claim 2, wherein: in each cell cycle, is reset when the clock is high, and outputs the reset line CCD pixel reset signal voltage
Figure CN102607615BC00021
y,通过增益动态自补偿电路输出信号电压,式中:p为第一电阻(R1)的% κι 阻值,i?2为第二电阻(R2)的阻值; 当复位时钟为低电平时,线阵CCD输出有效像元信号电压^,通过增益动态自补偿电路输出信号电压 y, by the dynamic gain compensation circuit output signal voltage from the formula: p is a first resistor (R1) of the resistance% κι, i 2 is a second resistor (R2) resistance; low level when the reset clock? linear CCD pixel signal voltage output valid ^, by a gain compensation circuit output signals from the dynamic voltage
Figure CN102607615BC00022
;式中:i?为调整后的数字电位器的阻值; CCD每个像元输出信号分为复位信号与有效信号两个部分,增益动态自补偿电路对CCD复位信号统一增益调整,保证每个像元有效信号基地电压相同,对有效信号进行不同增益调整,实现不同照度区域的像元都能充分的利用CCD的动态范围,增强局部信号的对比度,观测到局部区域的细节,提高解调系统的精度。 ; Where:? I is a resistance of the digital potentiometer is adjusted; CCD output signal for each pixel is divided into two signal reset signal and the active portion, since the gain of the dynamic compensation circuit unity gain adjustment signal of the CCD is reset to ensure that each the effective pixel signal of the same base voltage, different effective signal gain adjustment, the picture elements can take full advantage of CCD regions of different luminance dynamic range to enhance the contrast of the local signal, the details of the local region is observed to improve demodulation accuracy of the system.
CN201210093677.5A 2012-03-29 2012-03-29 Gain self-compensating method for linear array CCD (Charge-coupled Device) pixel level signal and compensating circuit CN102607615B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210093677.5A CN102607615B (en) 2012-03-29 2012-03-29 Gain self-compensating method for linear array CCD (Charge-coupled Device) pixel level signal and compensating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210093677.5A CN102607615B (en) 2012-03-29 2012-03-29 Gain self-compensating method for linear array CCD (Charge-coupled Device) pixel level signal and compensating circuit

Publications (2)

Publication Number Publication Date
CN102607615A CN102607615A (en) 2012-07-25
CN102607615B true CN102607615B (en) 2015-01-21

Family

ID=46525206

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210093677.5A CN102607615B (en) 2012-03-29 2012-03-29 Gain self-compensating method for linear array CCD (Charge-coupled Device) pixel level signal and compensating circuit

Country Status (1)

Country Link
CN (1) CN102607615B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN85105064B (en) * 1984-07-09 1987-04-08 株式会社堀场制作所 Infrared spectrum analyser gauging mechamism
US6198349B1 (en) * 1998-03-09 2001-03-06 Ricoh Company, Ltd. Variable gain amplifier having a maximum attenuation-factor limiting resistor
CN101542899A (en) * 2007-03-19 2009-09-23 松下电器产业株式会社 AGC circuit
CN101800860B (en) * 2009-02-06 2012-05-30 中国科学院空间科学与应用研究中心 Gain filter circuit applicable to scientific-grade CCDs

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07254830A (en) * 1994-03-16 1995-10-03 Fujitsu Ltd Electronic volume control circuit
JP2010171886A (en) * 2009-01-26 2010-08-05 Asahi Kasei Electronics Co Ltd Electronic volume circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN85105064B (en) * 1984-07-09 1987-04-08 株式会社堀场制作所 Infrared spectrum analyser gauging mechamism
US6198349B1 (en) * 1998-03-09 2001-03-06 Ricoh Company, Ltd. Variable gain amplifier having a maximum attenuation-factor limiting resistor
CN101542899A (en) * 2007-03-19 2009-09-23 松下电器产业株式会社 AGC circuit
CN101800860B (en) * 2009-02-06 2012-05-30 中国科学院空间科学与应用研究中心 Gain filter circuit applicable to scientific-grade CCDs

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JP特开2010-171886A 2010.08.05 *
JP特开平7-254830A 1995.10.03 *

Also Published As

Publication number Publication date
CN102607615A (en) 2012-07-25

Similar Documents

Publication Publication Date Title
EP1994361B1 (en) A fourier-domain optical coherence tomography imager
US8451452B2 (en) Method for depth resolved wavefront sensing, depth resolved wavefront sensors and method and apparatus for optical imaging
US20080137094A1 (en) Optical tomographic imaging apparatus
Knuettel et al. Stationary low-coherence light imaging and spectroscopy using a CCD camera
EP0448480A1 (en) Projection-type display apparatus with feedback loop for correcting all the defects of the projected image
CN101320138B (en) Method and equipment for simultaneously acquiring stereo and multispectral image
US7728985B2 (en) Polarization-sensitive common path optical coherence reflectometry/tomography device
JP2009162639A (en) Optical tomography imaging system
de Boer et al. Stable carrier generation and phase-resolved digital data processing in optical coherence tomography
US20120188555A1 (en) Systems and methods for complex conjugate artifact resolved optical coherence tomography
CN101361360B (en) Method and apparatus for setting black level in an imager using both optically black and tied pixels
US9506740B2 (en) System and method for calibrated spectral domain optical coherence tomography and low coherence interferometry
Mosset et al. Spatially noiseless optical amplification of images
Sacchet et al. Simultaneous dual-band ultra-high resolution full-field optical coherence tomography
US7027161B2 (en) Adaptive optical system with self-referencing contrast control
EP2527901B1 (en) Confocal imaging device using spatially modulated illumination with electronic rolling shutter detection
KR20070062456A (en) Process, system and software arrangement for a chromatic dispersion compensation using reflective layers in optical coherence tomography (oct) imaging
KR101165026B1 (en) Image correction data generation system, image correction data generation method, image correction data generation program, and image correction circuit
WO2010062853A3 (en) Scan error correction in low coherence scanning interferometry
Esposito et al. Laboratory characterization and performance of the high-order adaptive optics system for the Large Binocular Telescope
FR2485729A1 (en) Thermographic pyrometer for measuring the distance of an object temperature
JP2010056795A (en) Imaging apparatus and method of controlling the same
EP1505365A2 (en) Method and apparatus for self-calibration of a tunable-source phase shifting interferometer
TW463497B (en) Method of measuring spectral responsivity characteristic of image pick-up device and method of configuring imaging data
JP5167274B2 (en) Phase modulator and phase modulation method

Legal Events

Date Code Title Description
C06 Publication
C10 Request of examination as to substance
C14 Granted