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CN102595101A - Front-end acquisition device of contour video monitoring system - Google Patents

Front-end acquisition device of contour video monitoring system Download PDF

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CN102595101A
CN102595101A CN 201210053360 CN201210053360A CN102595101A CN 102595101 A CN102595101 A CN 102595101A CN 201210053360 CN201210053360 CN 201210053360 CN 201210053360 A CN201210053360 A CN 201210053360A CN 102595101 A CN102595101 A CN 102595101A
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end
circuit
fpga
device
controller
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CN 201210053360
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Chinese (zh)
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孙南
查长军
韦穗
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安徽大学
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Abstract

The invention relates to a front-end acquisition device of a contour video monitoring system. The device comprises a photoelectric sensor group used for acquiring contour information, wherein the output end of the photoelectric sensor group is connected with the input end of a field programmable gate array (FPGA) controller; the input end of the FPGA controller is also connected with the output ends of a crystal oscillator circuit, a configuration downloading circuit and a reset circuit respectively; and the output end of the FPGA controller is connected with a serial port circuit. The contour characteristics of different types of objects are acquired through the photoelectric sensor group, the signal data acquired by the photoelectric sensor group is received by the FPGA controller, the serial port circuit is arranged, the signal data is transmitted into a computer terminal through the serial port circuit to be processed and identified, and finally, video monitoring on the different types of objects is realized. In all, photoelectric sensors and the FPGA controller are adopted in the front-end acquisition device, so the front-end acquisition device is low in cost and simple in structure and can acquire the contours of the different types of objects.

Description

一种轮廓视频监控系统的前端采集装置 Collecting apparatus contour distal video surveillance system

[0001] [0001]

技术领域 FIELD

[0002] 本发明涉及视频监控领域,尤其是一种轮廓视频监控系统的前端采集装置。 [0002] The present invention relates to a video monitor, and in particular a device for collecting the front end of the contour of the video surveillance system.

[0003] [0003]

背景技术 Background technique

[0004]目前的视频监控系统是多媒体技术、视频压缩编码技术、计算机网络和人工智能等技术的综合运用,并向着智能化方向不断发展。 [0004] The current video surveillance system is a multi-media technology, video compression encoding technology integrated use of technology, computer networks and artificial intelligence, and evolving towards intelligent direction. 从功能上看,视频监控可用于安全防范、 信息获取和指挥调度等方面,可以提供生产流程控制、大型公共设施的安防、医疗监护、远程教育等多种服务。 From a functional point of view, video surveillance can be used for security, access to information and command scheduling, etc., can provide the production process control, security, medical monitoring, distance education and other large public facilities of various services. 从应用领域上看,视频监控在各行各业都得到了广泛的应用,例如档案室、博物馆、机要部门、交通违章和流量监控、住宅小区、停车场的无人监控等,然而这些监控系统都是安装在有限范围的某一指定区域。 From the applications point of view, video surveillance in all walks of life have been widely used, such as archives, museums, confidential departments, traffic violations and traffic monitoring, residential areas, parking unattended, etc. However, these monitoring systems They are installed in a specified area of ​​a limited range.

[0005] 对于一个国家而言,边境经常是非法移民、走私者和恐怖分子出入的关键地方,对国家的安全具有很大挑战。 [0005] For a country, the border is often the key to place illegal immigrants, smugglers and terrorists out and has great challenges to national security. 我国与周边国家的陆地边界大约有2. 2万公里长,其中有许多是遥远而无人居住的地方,目前,这些地方实行自动监控相当困难,采用现有的视频监控系统不仅成本难以估量,而且受到高流量的数据限制。 Our land borders with neighboring countries are about 22,000 km long, many of which are remote and uninhabited places, at present, where automatic monitoring quite difficult using the existing video surveillance system implementation costs not only inestimable, but also by the high flow of data limitations. 目前,还没有出现根据不同类型物体的外形轮廓特征不同,实现对整个边境监控的监控系统。 Currently, there is no different characteristics of different types according to the contour of the object, to achieve control of the entire system is monitored border.

[0006] [0006]

发明内容 SUMMARY

[0007] 本发明的目的在于提供一种成本低、结构简单、能够实现对不同类型物体轮廓采集的轮廓视频监控系统的前端采集装置。 [0007] The object of the present invention is to provide a low cost, simple structure can be realized acquisition device contour of the front end of the video surveillance system for different types of object contours collected.

[0008]为实现上述目的,本发明采用了以下技术方案:一种轮廓视频监控系统的前端采集装置,包括用于采集轮廓信息的光电传感器组,光电传感器组的输出端与FPGA控制器的输入端相连,FPGA控制器的输入端还分别与晶振电路、下载配置电路、复位电路的输出端相连,FPGA控制器的输出端与串口电路相连。 [0008] To achieve the above object, the present invention employs the following technical solution: a device profile acquisition distal video surveillance system, comprising an input for acquiring profile information of the photosensor group, the output of the photosensor is set with the FPGA controller is connected to terminal, an input terminal of the FPGA controller is further oscillator circuit, respectively, to download circuit configuration, the output of the reset circuit is connected to the output terminal of the FPGA controller and the serial port circuit.

[0009] 由上述技术方案可知,本发明通过光电传感器组采集不同类型物体的外形轮廓特征,由FPGA控制器接收光电传感器采集的信号数据,并设置串口电路,通过串口电路送入计算机终端进行处理、识别,最终实现对不同类型物体的视频监控。 [0009] From the above technical solution, the present invention is collected by the photosensor group contour characteristics of different types of objects, the received signal data collected by the photosensor FPGA controller, and the serial circuit is provided, through the serial port into the computer terminal processing circuit , identification, and ultimately video monitoring different types of objects. 总之,本发明采用光电传感器和FPGA控制器,成本低、结构简单、能够实现对不同类型物体轮廓采集。 In summary, the present invention employs a photoelectric sensor and a FPGA controller, low cost, simple structure, it is possible to collect different types of object contour.

[0010] [0010]

附图说明 BRIEF DESCRIPTION

[0011] 图I为本发明的电路框图; [0011] I a block circuit diagram of the present invention;

图2、3、4、5、6、7分别为图I中传感器输入接口电路、FPGA控制器、晶振电路、下载配置电路、复位电路、RS232接口电路的电路原理图。 FIG 2,3,4,5,6,7 respectively input I of FIG sensor interface circuitry, FPGA controller, crystal oscillator circuit, download configuration circuit, reset circuit, circuit schematics RS232 interface circuit.

[0012] [0012]

具体实施方式 detailed description

[0013] 一种轮廓视频监控系统的前端采集装置,包括用于采集轮廓信息的光电传感器组,光电传感器组的输出端与FPGA控制器3的输入端相连,FPGA控制器3的输入端还分别与晶振电路4、下载配置电路5、复位电路6的输出端相连,FPGA控制器3的输出端与串口电路相连,如图I所示,所述的FPGA控制器3控制光电传感器组进行数据采集以及串口传送数据。 Input of distal collecting apparatus [0013] An outline of a video surveillance system, comprising a photosensor for collecting profile information group, the group is connected to the input of the photosensor and an output terminal 3 of the controller FPGA, the FPGA controller 3 also were 4 is connected to the output side of the oscillator circuit is configured to download circuit 5, the reset circuit 6, the FPGA controller output terminal is connected to the serial circuit 3, as shown in FIG. I, the FPGA controller 3 controls data acquisition photosensor group and serial transmission of data.

[0014] 如图I所示,所述的光电传感器组采用反射式光电传感器组1,反射式光电传感器组I的输出端与传感器输入接口电路2的输入端相连,传感器输入接口电路2的输出端与FPGA控制器3的输出端相连;所述的串口电路采用RS232串口电路7,FPGA控制器3的输出端通过RS232串口电路7与计算机主机的串口相连。 [0014] As shown in FIG I, the group of photosensors employing a reflective photoelectric sensor group 1, group I reflective photoelectric sensor of the sensor output and the input terminal of the interface circuit 2 is connected to the output of the sensor input interface circuit 2 end of the FPGA controller is connected to the output terminal 3; said circuit using serial RS232 serial port circuit 7, the output terminal of the FPGA controller 3 is connected via RS232 serial port circuit 7 to the host computer. 本装置还包括电源电路,电源电路分别向传感器输入接口电路2、FPGA控制器3、晶振电路4、下载配置电路5、复位电路6、RS232 串口电路7供电。 The present apparatus further comprises a power supply circuit, a power supply circuit, respectively, to the sensor input interface circuit 2, FPGA controller 3, crystal oscillator circuit 4, download configuration circuit 5, a reset circuit 6, 7 RS232 serial circuit power supply.

[0015] 如图3所示,所述的FPGA控制器3包括芯片U3A、U3B、U3C、U3D ;如图2所示,所述的传感器输入接口电路2由排针接口JPl、双排针接口JP2以及排阻RPl、RP2、RP3、RP4组成,双排针接口JP2的5VCC引脚与反射式光电传感器组I的正极相连,双排针接口JP2的GND引脚与反射式光电传感器组I的负极相连,为反射式光电传感器组I提供+5V直流工作电压。 [0015] As shown, the controller 3 includes a FPGA chip U3A, U3B, U3C, U3D 3; 2, said sensor interface circuit 2 by the input pin interfaces JPl, double needle hub JP2 and exclusion RPl, RP2, RP3, RP4 composition, pin connected 5VCC reflective photoelectric sensor group of positive double needle hub of JP2 I, double-pin connector JP2 GND pin of the reflection type photoelectric sensor group I connected to the negative, providing DC voltage of + 5V reflective photoelectric sensor group I. 排针接口JPl与反射式光电传感器组I的信号输出端相连。 JPl pin interfaces with the signal output terminal group I reflective photoelectric sensor is connected.

[0016] 如图6所示,所述的复位电路6包括电阻Rl,电阻Rl与电阻R2并联后接3. 3VCC, 电阻Rl与按钮开关SI串联,电阻R2与按钮开关S2串联,按钮开关SI、S2并联后接地,二极管D2的阳极接在电阻R2与按钮开关S2之间,二极管D2的阴极接排阻RP2的第7引脚, 以备系统升级使用。 [0016] As shown in FIG. 6, the reset circuit 6 includes a resistor Rl, a resistor Rl connected in parallel with the resistor R2 3. 3VCC, SI resistor Rl in series with the push-button switch, push button switch S2 and a resistor R2 connected in series, the push button switch SI , S2 grounded in parallel, the anode of diode D2 is connected between the resistor R2 and the button switch S2, the cathode of the diode D2 connected exclusion RP2 seventh pin, used to prepare the system upgrade. 电阻Rl与按钮开关SI之间引出线与芯片U3C的第92引脚相连,电阻R2与按钮开关S2之间引出线与芯片U3A的第14引脚相连。 The first pin 92 between the resistor Rl and the push-button switch is connected to lead SI and the chip of U3C, pin 14 is connected to the first lead between the chip resistor R2 of U3A with the button switch S2. 按钮开关SI作为软件复位,按照用户代码来进行复位;按钮开关S2作为硬件复位,按下按钮开关S2时,标号nCONFIG引线为低电平,此时所有的FPGA代码重新从配置芯片Al里面读到FPGA控制器3中,程序重新开始运行。 SI software reset button switch as according to the user code reset; as a hardware reset button switch S2, switch S2 when the button is pressed, numeral nCONFIG leads to a low level, at which time all FPGA code re-read from the configuration device inside Al FPGA controller 3, the program resumes running.

[0017] 如图4所示,所述的晶振电路4包括芯片Y1,其第2引脚接地,其第3引脚接芯片U3C的第93引脚,其第4引脚分两路,一路接3. 3VCC,另一路通过电容接地,有源晶振为系统提供20MHz的全局时钟。 [0017] As shown in FIG. 4, the circuit 4 includes a chip crystal Y1, which is the second ground pin, the third pin is connected to its chip U3C first pin 93, which pin 4 two routes, along then 3. 3VCC, another way to provide a global system clock of 20MHz is grounded via the capacitor, active crystal. 如图7所示,所述的RS232串口电路7包括芯片U4,其第12引脚通过电阻R8接芯片U3B的第56引脚,其第11引脚接芯片U3B的第55引脚,其第13引脚与接口J2的第3引脚相连,其第14引脚与接口J2的第2引脚,其第15引脚与接口J2 的第5引脚相连,将反射式光电传感器组I采集到信息数据传输给计算机终端,计算机终端再根据采集到的数字信号利用压缩传感算法进行处理、识别。 7, the RS232 serial circuit U4 includes a chip 7 which has a first pin 12 through a first resistor R8 is connected to pin 56 of chip U3B, which is connected to pin 11 of chip 55 of the pin U3B, its pin 3 is connected to 13-pin interface of J2, its 14-pin interface of the second pin J2, which is connected to pin 5 of J2 15-pin interface of the reflective photoelectric sensor acquisition group I the information data to the computer terminal, computer terminal and then processed to capture a digital signal with a compression sensing algorithm according to the identification.

[0018] 如图5所示,所述的下载配置电路5包括配置芯片Al以及JTAG接口JP3、JP4,JTAG 接口JP3的第1、3、5、9引脚分别与芯片U3C的第88、90、89、95引脚相连,JTAG接口JP4的第1、5、7、9引脚分别与芯片U3A的第24、14、13、25引脚相连,JTAG接口JP4的第3引脚与芯片U3C的第86引脚相连,配置芯片Al的第1、2、5、6引脚分别与芯片U3A的第12、13、25、24引脚相连,电阻R3、R4、R9的一端分别与芯片U3A的第22、23、21引脚相连,电阻R3、R4、 R9的另一端并联后接地,电阻RIO、Rll的一端分别与芯片U3C的第87、86引脚相连,电阻R12的一端与芯片U3A的第14引脚相连,电阻R10、R11、R12的另一端并联后接3. 3VCC。 [0018] 88, 90 shown in the first, the configuration circuit 5 comprises downloading the configuration Al, and JTAG interface chip JP3, JP4, JP3 JTAG interface pins of each chip 1,3,5,9 FIG. 5 U3C , 89,95 is connected to the pin, the JTAG interface to JP4 1,5,7,9 first pin is connected to the first chip U3A pin 24,14,13,25 respectively, of the JTAG interface to the chip pin 3 of JP4 U3C the first pin 86 is connected to the first configuration Al 1,2,5,6 chip pins of the chip are connected 12,13,25,24 U3A pin, the end of the resistor R3, R4, R9 are chip U3A the first pin is connected 22,23,21, resistors R3, R4, R9, the other end of the parallel ground resistance the RIO, Rll are respectively connected to one end of the first chip of U3C pins 87,86, one end of the chip resistor R12 U3A the first pin 14 is connected to resistors R10, R11, R12 and the other end of the parallel connection 3. 3VCC. 若通过JTAG接口JP3下载程序时,系统掉电后需重新向FPGA控制器3下载,若通过JTAG接口JP4下载程序时,用户程序代码将存储在配置芯片Al中,系统每次上电后,用户程序代码将自动从配置芯片Al中读入FPGA控制器3,然后运行。 If the JTAG interface JP3 download, the download to be re-power from the system controller to the FPGA 3, if the download JP4 through the JTAG interface, a program code stored in the user configuration and Al chip, each power system, the user program code automatically from the configuration device reads Al FPGA controller 3, and then run.

[0019] 如图2所示,所述的排阻RP3的第16、15、14、13、12、11、10、9引脚分别与排针接口芯片JPl的第1、2、3、4、5、6、7、8引脚相连,排阻RP4的第16、15、14、13、12、11、10、9引脚分别与排针接口芯片JPl的第9、10、11、12、13、14、15、16引脚相连,排阻RPl的第16、15、14、 13、12、11、10、9引脚分别与排针接口芯片JPl的第17、18、19、20、21、22、23、24引脚相连,排阻RP2的第16、15、14、13、12、11引脚分别与排针接口芯片JPl的第25、26、27、28、29、30引脚相连,排阻RP3的第1、2、3、4、5、6引脚分别与芯片U3A的第1、2、3、4、5、6引脚相连,排阻RP3的第7、8引脚分别与芯片U3B的第37,38引脚相连,排阻RP4的第1、2、3、4、5、6、7引脚分别与芯片U3B的第39、40、41、42、49、50、51引脚相连,排阻RP4的第8引脚与芯片U3C的第73引脚相连;排阻RPl的第1、2、3、4、5引脚分别与芯片U3C的第74、75 [0019] 2, the exclusion of 16,15,14,13,12,11,10,9 RP3 pin respectively pin of the interface chip 1,2,3,4 JPl , 5,6,7,8 pin is connected, RP4 exclusion of pins respectively 16,15,14,13,12,11,10,9 pin of the interface chip JPl 9,10,11,12 connected to pins 13,14,15,16, 16,15,14 exclusion of RPl, 13,12,11,10,9 pin respectively pin of the interface chip JPl 17,18,19,20 , connected to pins 21,22,23,24, 16,15,14,13,12,11 exclusion of RP2 pin respectively pin of the interface chip JPl 25,26,27,28,29,30 pin is connected, exclusion of 1,2,3,4,5,6 RP3 are connected to pins of the chip U3A pin 1,2,3,4,5,6, 7 exclusion of RP3, 8 are connected to pins 37, 38 of the pin chips U3B, RP4 exclusion of 1,2,3,4,5,6,7 pins are first 39,40,41,42 U3B of the chip, pins 50, 51 are connected, is connected to pin 8 of RP4 exclusion and the pin 73 of the chip U3C; exclusion of RPl 1,2,3,4,5 pins are chip 74 of U3C 75 、76、77、78引脚相连,排阻RPl的第6、7、8引脚分别与芯片U3D的第109、110、111引脚相连,从而将反射式光电传感器组I的输出信号送入FPGA控制器3,实现信号采集;排阻RP2的第1、2、3、4、5、 6引脚分别与芯片U3D的第112、113、127、128、129、130引脚相连。 , Connected to pins 77, 78, exclusion of RPl 6,7,8 pins are connected to pins 109, 110 of the chip U3D, whereby the output signal of the reflective photoelectric sensor into Group I FPGA controller 3, signal acquisition; 1,2,3,4,5, 6-pin RP2 are connected to the first exclusion 112,113,127,128,129,130 ​​U3D the pin chip.

[0020] 总之,本发明低成本、系统简单,便于安装,通过反射式光电传感器组I对前端的人、动物或汽车等物体进行信息的采集,并将信息传递至FPGA控制器3,实现前端视频的采集,FPGA控制器3再通过RS232串口电路7将前端采集到的信息传输至计算机的串口,由后台计算机进一步对人、动物或汽车等外形轮廓图像进行识别,实现监控功能。 [0020] In summary, the present invention is a low cost, the system is simple, easy to install, to collect information on the I other front-end person, animal or object by car group reflective photoelectric sensor, and the information is transmitted to the FPGA controller 3, to achieve the front end video capture, FPGA controller 3 then transmit information to a computer through RS232 serial port circuit 7 to the leading end of the serial collection, further contour images of people, animals or a car identified by a background computer, implement monitoring.

Claims (8)

  1. 1. 一种轮廓视频监控系统的前端采集装置,其特征在于:包括用于采集轮廓信息的光电传感器组,光电传感器组的输出端与FPGA控制器(3)的输入端相连,FPGA控制器(3)的输入端还分别与晶振电路(4)、下载配置电路(5)、复位电路(6)的输出端相连,FPGA控制器(3)的输出端与串口电路相连。 An acquisition device contour of the front end of a video surveillance system, characterized by: a photosensor for collecting the contour information set, the output of the photosensor group with FPGA controller (3) connected to the input, the controller FPGA ( output 3) are also respectively input of oscillator circuit (4), download configuration circuit (5), the reset circuit (6) is connected to the output terminal of the FPGA controller (3) to the serial circuit.
  2. 2.根据权利要求I所述的轮廓视频监控系统的前端采集装置,其特征在于:所述的光电传感器组米用反射式光电传感器组(I),反射式光电传感器组(I)的输出端与传感器输入接口电路(2)的输入端相连,传感器输入接口电路(2)的输出端与FPGA控制器(3)的输出端相连;所述的串口电路采用RS232串口电路(7),FPGA控制器(3)的输出端通过RS232 串口电路(7)与计算机主机的串口相连。 The distal acquisition device contour of the video surveillance system as claimed in claim I, wherein: said group of photosensor reflective photoelectric sensor with a meter group (I), the output of the reflection-type photosensor group (I) is with sensor input interface circuit (2) connected to the input, the sensor input connected to the output terminal of the interface circuit (2) and the FPGA controller (3) an output terminal; a circuit using serial RS232 serial circuit (. 7), the control FPGA an output terminal (3) is connected to the serial port of the host computer through the RS232 serial circuit (7).
  3. 3.根据权利要求2所述的轮廓视频监控系统的前端采集装置,其特征在于:装置还包括电源电路,电源电路分别向传感器输入接口电路(2)、FPGA控制器(3)、晶振电路(4)、下载配置电路(5 )、复位电路(6 )、RS232串口电路(7 )供电。 3. The front end of the profile acquisition device 2 video surveillance system according to claim, characterized in that: the device further comprises a power supply circuit, a power supply circuit, respectively, to the sensor input interface circuit (2), the FPGA controller (3), the crystal oscillator circuit ( 4), download configuration circuit (5), the reset circuit (6), RS232 serial circuit (7) supply.
  4. 4.根据权利要求2所述的轮廓视频监控系统的前端采集装置,其特征在于:所述的FPGA控制器(3)包括芯片U3A、U3B、U3C、U3D ;所述的传感器输入接口电路(2)由排针接口JP1、双排针接口JP2以及排阻RP1、RP2、RP3、RP4组成,双排针接口JP2的5VCC引脚与反射式光电传感器组(I)的正极相连,双排针接口JP2的GND引脚与反射式光电传感器组(I) 的负极相连,排针接口JPl与反射式光电传感器组(I)的信号输出端相连。 4. The front end of the acquisition device contour of the video surveillance system 2, characterized in that: the FPGA controller (3) including a chip U3A, U3B, U3C, U3D; said sensor input interface circuit (2 ) by a pin interfaces JP1, JP2 and double needle hub exclusion RP1, RP2, RP3, RP4 composition, pin connected 5VCC reflective photoelectric sensor group (I) is a positive double-pin connector JP2, double needle hub JP2 and GND pin of the negative electrode reflective photoelectric sensor group (I) is connected to the signal output terminal pin is connected to the interface and the reflection type photoelectric sensor JPl group (I) is.
  5. 5.根据权利要求4所述的轮廓视频监控系统的前端采集装置,其特征在于:所述的复位电路(6)包括电阻Rl,电阻Rl与电阻R2并联后接3. 3VCC,电阻Rl与按钮开关SI串联, 电阻R2与按钮开关S2串联,按钮开关S1、S2并联后接地,二极管D2的阳极接在电阻R2与按钮开关S2之间,二极管D2的阴极接排阻RP2的第7引脚,电阻Rl与按钮开关SI之间引出线与芯片U3C的第92引脚相连,电阻R2与按钮开关S2之间引出线与芯片U3A的第14 引脚相连。 The distal end 4 of the acquisition device contour of the video surveillance system according to claim, wherein: said reset circuit (6) comprises a rear resistor Rl, a resistor Rl connected in parallel with the resistor R2 3. 3VCC, resistors Rl and button switch SI series resistor R2 and the button switch S2 in series, push button switches S1, S2 after the parallel ground, the anode of diode D2 is connected between the resistor R2 and the button switch S2, the cathode of the diode D2 connected exclusion RP2 seventh pin, the first pin 92 between the resistor Rl and the push-button switch is connected to lead SI and the chip of U3C, pin 14 is connected to the first lead between the chip resistor R2 of U3A with the button switch S2.
  6. 6.根据权利要求4所述的轮廓视频监控系统的前端采集装置,其特征在于:所述的晶振电路(4)包括芯片Yl,其第2引脚接地,其第3引脚接芯片U3C的第93引脚,其第4引脚分两路,一路接3. 3VCC,另一路通过电容接地;所述的RS232串口电路(7)包括芯片U4,其第12引脚通过电阻R8接芯片U3B的第56引脚,其第11引脚接芯片U3B的第55引脚,其第13引脚与接口J2的第3引脚相连,其第14引脚与接口J2的第2引脚,其第15引脚与接口J2的第5引脚相连。 The distal end 4 of the acquisition device contour of the video surveillance system as claimed in claim, wherein: said crystal oscillator circuit (4) comprises a chip Yl that the second ground pin, the third pin is connected to its chip of U3C pin 93, which pin 4 two routes, then all the way 3. 3VCC, another path to ground via a capacitor; the RS232 serial circuit (7) comprises a chip U4 which has a first pin 12 connected through a resistor R8 chip U3B the pin 56, which is connected to pin 11 of chip 55 of the pin U3B, pin 3 which is connected to the interface J2 pin 13, which pin 14 of the second interface pin J2, which 5 is connected to pin 15 of the pin J2 interfaces.
  7. 7.根据权利要求4所述的轮廓视频监控系统的前端采集装置,其特征在于:所述的下载配置电路(5)包括配置芯片Al以及JTAG接口JP3、JP4,JTAG接口JP3的第1、3、5、9引脚分别与芯片U3C的第88、90、89、95引脚相连,JTAG接口JP4的第1、5、7、9引脚分别与芯片U3A的第24、14、13、25引脚相连,JTAG接口JP4的第3引脚与芯片U3C的第86引脚相连,配置芯片Al的第1、2、5、6引脚分别与芯片U3A的第12、13、25、24引脚相连,电阻R3、 R4、R9的一端分别与芯片U3A的第22、23、21引脚相连,电阻R3、R4、R9的另一端并联后接地,电阻R10、R11的一端分别与芯片U3C的第87、86引脚相连,电阻R12的一端与芯片U3A 的第14引脚相连,电阻R10、R11、R12的另一端并联后接3. 3VCC0 The distal end 4 of the acquisition device contour of the video surveillance system as claimed in claim, wherein: said download circuit configuration (5) and Al chip configuration including JTAG interface JP3, JP4, JTAG interface of 1,3 JP3 , 5, 9 and the second pin are respectively connected U3C 88,90,89,95 pin chips, the JTAG interface to JP4 of 1,5,7,9 U3A pin of the chip, respectively 24,14,13,25 pin is connected, is connected to the JTAG interface to JP4 of the chip pin 3 of U3C pin 86, the first configuration Al 1,2,5,6 chip pins are incorporated in the first chip of U3A 12,13,25,24 pin is connected, the resistor R3, one end of R4, R9 is connected to the first chip U3A pin 22,23,21 respectively, resistors R3, R4, R9, the other end of the parallel ground, resistors R10, R11 are respectively an end of the chip of U3C 87,86 connected to the first pin, pin 14 is connected to one end of the resistor R12 of the chip U3A, resistors R10, R11, R12 and the other end of the parallel contact 3. 3VCC0
  8. 8.根据权利要求4所述的轮廓视频监控系统的前端采集装置,其特征在于:所述的排阻RP3的第16、15、14、13、12、11、10、9引脚分别与排针接口芯片JPl的第1、2、3、4、5、6、7、·8引脚相连,排阻RP4的第16、15、14、13、12、11、10、9引脚分别与排针接口芯片JPl的第9、 10、11、12、13、14、15、16 引脚相连,排阻RPl 的第16、15、14、13、12、11、10、9 引脚分别与排针接口芯片JPl 的第17、18、19、20、21、22、23、24引脚相连,排阻1^2的第16、15、14、13、12、11 引脚分别与排针接口芯片JPl的第25、26、27、28、29、30引脚相连,排阻RP3的第1、2、3、4、·5、6引脚分别与芯片U3A的第1、2、3、4、5、6引脚相连,排阻RP3的第7、8引脚分别与芯片U3B的第37,38引脚相连,排阻RP4的第1、2、3、4、5、6、7引脚分别与芯片U3B的第39、40、 41、42、49、50、51引脚相连,排阻RP4的第8引脚与芯片U3C的第73 The distal end 4 of the acquisition device contour of the video surveillance system as claimed in claim, wherein: said first 16,15,14,13,12,11,10,9 exclusion RP3 row pins, respectively of needle hub chip JPl 1,2,3,4,5,6,7, 8-pin is connected, RP4 exclusion of pins respectively 16,15,14,13,12,11,10,9 JPl pin of the interface chip 9, 10,11,12,13,14,15,16 pin is connected, RPl exclusion of pins respectively 16,15,14,13,12,11,10,9 the first pin is connected 17,18,19,20,21,22,23,24 JPl pin interface chip, the first 16,15,14,13,12,11 exclusion pin ^ 1 and pin 2 are JPl interface chip connected to the first pin 25,26,27,28,29,30, 1,2,3 exclusion of RP3 1,2,3,4, 5,6-pin, respectively, of the chip U3A , 4,5,6 pin is connected, seventh and eighth pins exclusion RP3 is connected to the first pin 37, 38 respectively U3B chip, the exclusion of 1,2,3,4,5,6 RP4, 7 and the second pins 39 and 40 respectively, connected 41,42,49,50,51 pin, pin 8 and the die chip RP4 U3C exclusion of U3B 73 脚相连,排阻RPl的第1、2、3、4、5引脚分别与芯片U3C的第74、75、76、77、78引脚相连,排阻RPl的第6、7、8引脚分别与芯片U3D的第109、110、111引脚相连,排阻RP2的第1、2、3、4、5、6引脚分别与芯片U3D 的第112、113、127、128、129、130 引脚相连。 Pin is connected, the exclusion RPl 1,2,3,4,5 pin is connected to the first pin chip 74,75,76,77,78 respectively U3C, pin exclusion of RPl 6,7,8 109, 110, respectively, and the second pin is connected to the chip U3D, 1,2,3,4,5,6 exclusion RP2 of the chip pins are first 112,113,127,128,129,130 ​​U3D pin.
CN 201210053360 2012-03-03 2012-03-03 Front-end acquisition device of contour video monitoring system CN102595101A (en)

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