CN102594485A - Transmission level processing method of transmission channel, apparatus and equipment thereof - Google Patents
Transmission level processing method of transmission channel, apparatus and equipment thereof Download PDFInfo
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- CN102594485A CN102594485A CN2011100027960A CN201110002796A CN102594485A CN 102594485 A CN102594485 A CN 102594485A CN 2011100027960 A CN2011100027960 A CN 2011100027960A CN 201110002796 A CN201110002796 A CN 201110002796A CN 102594485 A CN102594485 A CN 102594485A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
- H04L1/0068—Rate matching by puncturing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
Abstract
The invention discloses a transmission level processing method of a transmission channel, an apparatus and equipment thereof. The method, the apparatus and the equipment are used to reduce a storage space which needs to be occupied in a processing flow and to improve transmission level processing efficiency of the transmission channel. The method comprises the following steps: after a check code is added to an original transmission block, carrying out channel coding and acquiring a coding data bit; when a rate matching mode is a punching mode, carrying out rate matching operation to the coding data bit according to a determined rate matching punching pattern and storing; carrying out bit merging and scrambling operation to the coding data bit, after that, carrying out data interleaving and constellation graph rearrangement and outputting an obtained transmission level processing data bit; when the rate matching mode is a repetition mode, carrying out the bit merging and scrambling operation after the coding data bit is stored; carrying out the rate matching operation to the obtained coding data bit according to the determined rate matching repetition pattern, after that, carrying out the data interleaving and constellation graph rearrangement and outputting the obtained transmission level processing data bit.
Description
Technical field
The present invention relates to moving communicating field, relate in particular to a kind of transmitting stage processing method, device and equipment of transmission channel.
Background technology
3GPP (3rd Generation Partnership Project; 3G (Third Generation) Moblie standardization body) introduced HSDPA (High Speed Downlink Packet Access; High speed downlink packet inserts) technology and HSUPA (High Speed Uplink Packet Access; High Speed Uplink Packet inserts) technology; HSDPA technology and HSUPA technology all are applicable to various GSMs, for example TD-SCDMA (Time Division Synchronized CDMA, time-division synchronization CDMA; CDMA:Code DivisionMultiple Access, code division multiple access inserts) system, WCDMA (Wideband CDMA, wideband CDMA) system etc.
The HSDPA technology is through AMC (Adaptive Modulation and Coding; Adaptive modulation and coding), HARQ (Hybrid Automatic Repeat Request; Hybrid automatic retransmission request) series of key techniques such as, and in NodeB (base station), introduce MAC-hs (Media Access Control), can realize that NodeB is to different UEs (User Equipment; Subscriber equipment) fast dispatch obtains higher user's peak rate and cell data throughput simultaneously.In the HSDPA technology, transmission channel HS-DSCH (High Speed Downlink Shared Channel, high speed descending sharing channel) is used to transmit the downlink data that sends to UE.
The HSUPA technology has strengthened the message transmission rate and the availability of frequency spectrum of up link greatly through employing HARQ, based on fast dispatch and many yards series of key techniques such as transmission of NodeB; Also increase a transmission channel E-DCII (Enhanced Dedicated Transport Channel, enhanced uplink dedicated transmission channel) simultaneously newly, be used to transmit the upstream data of UE (User Equipment, subscriber equipment).
The processing of transmission channel comprises that transmitting stage is handled and physical level is handled, and is that example describes with the TD-SCDMA system that supports the HSUPA technology.E-DCH is main uplink data channels, in each TTI (Transmission Time Interval, Transmission Time Interval), carries a transmitting stage deal with data bit, and is mapped to the data division of physical channel E-PUCH (enhanced uplink physical channel).Stipulate according to the 3GPP agreement; The transmitting stage of E-DCH is handled and is comprised: add steps such as CRC (Cyclic Redundancy Check, CRC), code block segmentation, chnnel coding (being generally the TURBO coding), HARQ processing, bit scramble, data interlacing, Constellation Rearrangement.Wherein, HARQ handles and to comprise that bit separation, rate-matched and bit merge three steps, and rate-matched is meant that the data bit of transmission channel is perforated or repeats, with the bearing capacity of coupling physical channel.Data bit number in transmission channel may change in different TTI.When in different TTI, when the data bit number that transmitted changed, data bit will be perforated or repeat, and was identical with the data bit-rate of guaranteeing data bit-rate and the physical channel that is distributed after transmission channel is multiplexing.Punching is exactly that the current data bit is removed, and simultaneously follow-up each data bit is moved forward one successively, and repeating is exactly between current data bit and back one data bit, to insert a current data bit.
In the prior art, the transmitting stage handling process of E-DCH, the regulation that is based on the 3GPP agreement is carried out each step operation in proper order.As shown in Figure 1, the transmitting stage processing method of E-DCH comprises: add CRC, carry out the code block segmentation operation afterwards; Carry out the chnnel coding operation after the code block segmentation, the encoded data bits that chnnel coding obtains is carried out the HARQ processing, obtain transmitting stage deal with data bit through bit scramble, data interlacing, Constellation Rearrangement etc. again.
As shown in Figure 2, be the HARQ process chart, the HARQ handling process comprises that bit separation, rate-matched and bit merge.Concrete; After receiving the encoded data bits that chnnel coding obtains; Store encoded data bits into a block storage for example among the RAM1, when encoded data bits is write RAM1, realize bit separation, obtain systematic bits, first check bit and three sequences of second check bit; The rate adaptation operating of when from RAM1, reading encoded data bits, punching or repeating; Encoded data bits after the rate-matched is redispatched to another block storage RAM2 for example, can realize the bit union operation to the encoded data bits of storing among the RAM2 according to the interlacing rule that bit merges; Encoded data bits after bit merges is carried out subsequent treatment again.
In the prior art, when realizing in proper order that according to the 3GPP agreement transmitting stage of E-DCH is handled, handling process is more clearly, and implementation method is fairly simple.But; The transmitting stage processing method of E-DCH has been carried out twice storage to the encoded data bits after the chnnel coding, thereby need have been taken more memory space; For example; The transmission rate of E-DCH reaches as high as 2.23MHZ, and maximum transmitting stage deal with data bit is 11160 bits, and then the data bit number that need store afterwards through chnnel coding (being generally the TURBO coding) of original transmitted piece is 11160bit * 3 ≈ 34kbit to the maximum; Encoded data bits after the rate-matched can be stored once more, and the memory space that causes taking is bigger, for chip design, causes chip area bigger, and especially for UE, bigger chip area will have a strong impact on follow-up integrated design.And the transmitting stage handling process of E-DCH is that order is carried out, and the processing time is longer, causes treatment effeciency lower.
According to 3GPP agreement regulation, the transmitting stage handling process basically identical of the transmitting stage handling process of HS-DSCH and E-DCH that is to say, in the GSM of supporting the HSDPA technology, the problems referred to above exist equally.
Can know that by above analysis in the transmitting stage handling process of existing transmission channel, it is bigger to exist the memory space that need take, and the lower problem of treatment effeciency.
Summary of the invention
The embodiment of the invention provides a kind of transmitting stage processing method and device of transmission channel, in order to the memory space that need take in the minimizing handling process, and the transmitting stage treatment effeciency of lifting transmission channel.
The embodiment of the invention provides a kind of subscriber equipment, in order to required chip area in the chip design that reduces subscriber equipment, promotes the treatment effeciency of subscriber equipment.
A kind of transmitting stage processing method of transmission channel comprises:
The original transmitted piece is added check code carry out chnnel coding afterwards;
When rate matching pattern is the punching pattern; Rate-matched punching pattern based on determining carries out rate adaptation operating to the encoded data bits that chnnel coding obtains; And the encoded data bits after the memory rate coupling; The interlacing rule that merges according to bit carries out bit merging and scrambling operation to the encoded data bits of storage, and the encoded data bits after bit merging and the scrambling is carried out data interlacing and Constellation Rearrangement, the transmitting stage deal with data bit that output obtains;
When rate matching pattern is repeat pattern; The encoded data bits that chnnel coding obtains is stored; The interlacing rule that merges according to bit carries out bit merging and scrambling operation to the encoded data bits of storage; Carry out rate-matched and scrambling operation according to the dateout bit after the rate-matched repetitions patterns bit merging of determining, the encoded data bits after rate-matched and the scrambling is carried out data interlacing and Constellation Rearrangement, the transmitting stage deal with data bit that output obtains.
A kind of transmitting stage processing unit of transmission channel comprises that check code adds module, data interlacing and Constellation Rearrangement module, also comprises channel coding module, rate-matched module, bit merging and scrambling module and memory, wherein:
Said check code adds module, is used for sending to said channel coding module with after the original transmitted piece interpolation check code;
Said channel coding module; Be used for the original transmitted piece that has added check code is carried out exporting after the chnnel coding; When rate matching pattern is the punching pattern; Send the output enable signal and start rate adaptation operating for said rate-matched module, and the encoded data bits after the rate-matched is stored in the memory; When rate matching pattern was repeat pattern, the encoded data bits that chnnel coding is obtained stored in the memory;
Said rate-matched module; Be used for when rate matching pattern is the punching pattern; Under the triggering of the output enable signal that said channel coding module is sent, start, and the encoded data bits that chnnel coding obtains is carried out rate adaptation operating based on the rate-matched punching pattern of determining; When rate matching pattern is repeat pattern; Merge the triggering startup down of the output enable signal that sends with scrambling module at said bit, and carry out exporting to data interlacing and Constellation Rearrangement module after rate-matched, the scrambling based on the data after the rate-matched repetitions patterns bit merging of determining;
Said bit merges and scrambling module; Be used for when rate matching pattern is the punching pattern, the interlacing rule that merges according to bit carries out exporting to said data interlacing and Constellation Rearrangement module after bit merging and the scrambling operation to the encoded data bits of storing in the memory; When rate matching pattern is repeat pattern; The interlacing rule that merges according to bit carries out exporting to said data interlacing and Constellation Rearrangement module after bit merging and the scrambling operation to the encoded data bits of storing in the memory, and sends the output enable signal and start rate adaptation operating for said rate-matched module;
Said data interlacing and Constellation Rearrangement module are used for the encoded data bits that receives is carried out data interlacing and Constellation Rearrangement, the transmitting stage deal with data bit that output obtains.
A kind of subscriber equipment comprises the transmitting stage processing unit of above-mentioned transmission channel.
The transmitting stage processing method and the device of the transmission channel that the embodiment of the invention provides are carried out different transmitting stage parallel processing flow processs according to different rate matching pattern.When rate matching pattern is the punching pattern; Executed in parallel rate adaptation operating when the encoded data bits that the delivery channel coding obtains; Encoded data bits after memory rate is mated again; To the encoded data bits of storage carry out bit merge operate with scrambling after, carry out data interlacing and Constellation Rearrangement, obtain transmitting stage deal with data bit; When rate matching pattern is repeat pattern; Elder generation's memory encoding data bit; Again the encoded data bits of storage is carried out bit merging and scrambling operation; The output bit merge and scrambling after encoded data bits the time executed in parallel rate adaptation operating, carry out data interlacing and Constellation Rearrangement then, obtain transmitting stage deal with data bit.Owing in handling process, no matter be punching pattern or repeat pattern, only need encoded data bits of storage, thereby saved the memory space that need take, thereby reduced the chip area in the chip design.And, when rate matching pattern is the punching pattern, executed in parallel rate adaptation operating when the encoded data bits that the delivery channel coding obtains; When rate matching pattern is repeat pattern, the output bit merge and scrambling after encoded data bits the time executed in parallel rate adaptation operating, therefore, shortened the transmitting stage processing time of transmission channel, promoted treatment effeciency.
The subscriber equipment that the embodiment of the invention provides; Adopt the transmitting stage processing unit of above-mentioned transmission channel; Because this processing unit has been saved the memory space that need take, thus chip area required in the chip design of subscriber equipment can be reduced, because this processing unit adopts the parallel processing flow process; Shortened the transmitting stage processing time of transmission channel, so can promote the treatment effeciency of subscriber equipment.
Other features and advantages of the present invention will be set forth in specification subsequently, and, partly from specification, become apparent, perhaps understand by embodiment of the present invention.The object of the invention can be realized through the structure that in the specification of being write, claims and accompanying drawing, is particularly pointed out and obtained with other advantages.
Description of drawings
Fig. 1 is in the prior art, the transmitting stage processing method implementing procedure figure of E-DCH;
Fig. 2 is in the prior art, is the HARQ process chart;
Fig. 3 is in the embodiment of the invention, the transmitting stage process flow figure of transmission channel;
Fig. 4 is in the embodiment of the invention, the structured flowchart of the transmitting stage processing unit of transmission channel;
Fig. 5 is in the embodiment of the invention, when rate matching pattern is the punching pattern, and the transmitting stage process flow figure of transmission channel;
Fig. 6 is in the embodiment of the invention, when rate matching pattern is repeat pattern, and the transmitting stage process flow figure of transmission channel.
Embodiment
Method, device and equipment that the embodiment of the invention provides a kind of transmitting stage of transmission channel to handle, in order to the memory space that need take in the minimizing handling process, and the transmitting stage treatment effeciency of lifting transmission channel.
The transmitting stage processing method of the transmission channel that the embodiment of the invention provides; Be applicable to various GSMs based on the HSUPA technology; And based on the various GSMs of HSDPA technology, concrete during based on the HSUPA technology, described transmission channel is meant E-DCH; During based on the HSDPA technology, described transmission channel is meant HS-DSCH.
Need to prove that during the transmitting stage of transmitting stage channel was handled, rate matching pattern can comprise: punching pattern, repeat pattern or direct mode operation; Wherein, Lead directly to and be meant that data bit directly passes through, can think that without rate adaptation operating this situation of the embodiment of the invention does not relate to.The rate matching pattern that the embodiment of the invention relates to comprises punching pattern and repeat pattern.
Below in conjunction with Figure of description the preferred embodiments of the present invention are described; Be to be understood that; Preferred embodiment described herein only is used for explanation and explains the present invention; And be not used in qualification the present invention, and under the situation of not conflicting, embodiment and the characteristic among the embodiment among the present invention can make up each other.
As shown in Figure 3, the embodiment of the invention provides a kind of transmitting stage processing method of transmission channel, comprises the steps:
S301, carry out chnnel coding after the original transmitted piece added check code;
Wherein, described chnnel coding generally adopts the TURBO coding, and described interpolation check code is generally and adds CRC.
S302, when rate matching pattern is the punching pattern; Rate-matched punching pattern based on determining carries out rate adaptation operating to the encoded data bits that chnnel coding obtains; And the encoded data bits after the memory rate coupling; The interlacing rule that merges according to bit carries out bit merging and scrambling operation to the encoded data bits of storage, and the encoded data bits after bit merging and the scrambling is carried out data interlacing and Constellation Rearrangement, the transmitting stage deal with data bit that output obtains;
Preferable, for the follow-up bit merging and the facility of scrambling, can the encoded data bits after the rate-matched be carried out the bit separation operation, obtain systematic bits, first check bit and second check bit; And the systematic bits that obtains, first check bit and second check bit stored in the different address segment respectively.In the practical implementation, can memory be divided into 3 address fields, first address field is used for the storage system bit, and second address field is used for storing second check bit, and the 3rd address field is used for storing first check bit.After encoded data bits storage after rate-matched is accomplished; The interlacing rule that merges according to bit carries out bit merging and scrambling operation to the encoded data bits of storage; And the encoded data bits after bit merging and the scrambling is carried out data interlacing and Constellation Rearrangement, the transmitting stage deal with data bit that output obtains.
In the practical implementation; When rate matching pattern is the punching pattern; Generally can determine rate-matched punching pattern according to the parameters of rate matching of high level configuration; Described high-rise configuration is meant that RRC (Radio Resource Control, the Radio Resource control) signaling through RNC (radio network controller) is configured;
The rate-matched punching pattern that described basis is determined carries out rate adaptation operating to the encoded data bits that chnnel coding obtains, and specifically comprises:
According to rate-matched punching pattern, confirm redundant encoded data bits in the encoded data bits that chnnel coding obtains;
The encoded data bits of the redundancy of determining is given up.
S303, when rate matching pattern is repeat pattern; The encoded data bits that chnnel coding obtains is stored; The interlacing rule that merges according to bit carries out bit merging and scrambling operation to the encoded data bits of storage; Carry out rate-matched and scrambling operation according to the dateout bit after the rate-matched repetitions patterns bit merging of determining, the encoded data bits after rate-matched and the scrambling is carried out data interlacing and Constellation Rearrangement, the transmitting stage deal with data bit that output obtains.
Preferable, for the follow-up bit merging and the facility of scrambling, can the encoded data bits that chnnel coding obtains be carried out the bit separation operation, obtain systematic bits, first check bit and second check bit; And the systematic bits that obtains, first check bit and second check bit stored in the different address segment respectively.Concrete storage mode and rate matching pattern are similar when being the punching pattern, and its implementation process can repeat no more with reference to the enforcement of punching pattern here.
In the practical implementation; When rate matching pattern is repeat pattern; Generally can determine the rate-matched repetitions patterns according to the parameters of rate matching of high level configuration; Dateout bit after the rate-matched repetitions patterns bit that described basis is determined merges carries out rate adaptation operating, specifically comprises:
Based on the rate-matched repetitions patterns of determining by the parameters of rate matching of high level configuration, need in the output data bit after bit merges to confirm the encoded data bits of repetition;
Repeat to read the encoded data bits of determining that needs repetition.
In the practical implementation; Because general at present QPSK (the Quadrature Phase Shift Keying that adopts of HSDPA modulation and HSUPA modulation; QPSK) and 16QAM (QuadratureAmplitude Modulation; Quadrature amplitude modulation) dual mode, described Constellation Rearrangement can be the 16QAM Constellation Rearrangement, also can be the QPSK Constellation Rearrangement.
Need explain, just in order to express easily, and provide concrete number of steps S302 and S303, not represent two sequential relationships between the step.
In the embodiment of the invention; Consideration based on the storage resources of saving hardware memory; The several steps (chnnel coding, bit separation, rate-matched and bit merge and bit scramble) that the transmitting stage of transmission channel is handled cooperatively interacts; Employing changes the handling process and the method in the initial moment of rate-matched that transmitting stage is handled according to the different rates match pattern, in the storage resources of saving memory, has also shortened the transmitting stage processing time.
Based on same inventive concept; The embodiment of the invention provides a kind of transmitting stage processing unit of transmission channel; Because the principle of this device solves technical problem is similar with the transmitting stage processing method of transmission channel, so the enforcement of this device can repeat part and repeat no more referring to the enforcement of method.
As shown in Figure 4; A kind of possibility structure of the transmitting stage processing unit of the transmission channel that the embodiment of the invention provides; Comprise that check code adds module 401, data interlacing and Constellation Rearrangement module 402; Comprise that also channel coding module 403, rate-matched module 404, bit merge and scrambling module 405 and memory 406, wherein:
Check code adds module 401, is used for sending to channel coding module 403 with after the original transmitted piece interpolation check code;
Channel coding module 403; Be used for the original transmitted piece that has added check code is carried out exporting after the chnnel coding; When rate matching pattern is the punching pattern; Send the output enable signal and start rate adaptation operating for rate-matched module 404, and the encoded data bits after the rate-matched is stored in the memory 406; When rate matching pattern was repeat pattern, the encoded data bits that chnnel coding is obtained stored in the memory 406;
Rate-matched module 404; Be used for when rate matching pattern is the punching pattern; Under the triggering of the output enable signal that said channel coding module 403 is sent, start, and the encoded data bits that chnnel coding obtains is carried out rate adaptation operating based on the rate-matched punching pattern of determining; When rate matching pattern is repeat pattern; Merge the triggering startup down of the output enable signal that sends with scrambling module 405 at said bit, and carry out exporting to data interlacing and Constellation Rearrangement module 402 after rate-matched, the scrambling based on the data bit after the rate-matched repetitions patterns bit merging of determining;
Bit merges and scrambling module 405; Be used for when rate matching pattern is the punching pattern, the interlacing rule that merges according to bit carries out exporting to data interlacing and Constellation Rearrangement module 402 after bit merging and the scrambling operation to the encoded data bits of storage in the memory 406; When rate matching pattern is repeat pattern; The interlacing rule that merges according to bit carries out exporting to said data interlacing and Constellation Rearrangement module 402 after bit merging and the scrambling operation to the encoded data bits of storage in the memory 406, and sends the output enable signal and start rate adaptation operating for rate-matched module 404;
Data interlacing and Constellation Rearrangement module 402 are used for the encoded data bits that receives is carried out data interlacing and Constellation Rearrangement, the transmitting stage deal with data bit that output obtains.
Preferable, channel coding module 403 specifically is used for when the rate-matched mode is punching, and the encoded data bits after the rate-matched is carried out the bit separation operation, obtains systematic bits, first check bit and second check bit; And the systematic bits that obtains, first check bit and second check bit stored into respectively in the different address fields of memory.
Preferable, channel coding module 403 specifically is used for when rate matching pattern is repetition, and the coded data that chnnel coding obtains is carried out the bit separation operation, obtains systematic bits, first check bit and second check bit; And the systematic bits that obtains, first check bit and second check bit stored into respectively in the different address fields of memory.
In the practical implementation; Rate-matched module 404; Specifically be used for after starting under the triggering of the output enable signal that said channel coding module 403 is sent; According to the rate-matched punching pattern of determining by the parameters of rate matching of high level configuration, confirm redundant encoded data bits in the encoded data bits that chnnel coding obtains; The encoded data bits of the redundancy of determining is given up.
Concrete; When rate matching pattern is the punching pattern; When after the original transmitted piece that 403 pairs of channel coding module have been added check code carries out chnnel coding, exporting; Send output enable signal triggering rate-matched module 404 and start rate adaptation operating; Rate-matched module 404 disposes the parameters of rate matching of getting off according to high level and confirms rate-matched punching pattern in encoded data bits output, and confirms redundant encoded data bits in the encoded data bits that chnnel coding obtains according to this rate-matched punching pattern; The encoded data bits of the redundancy of determining is given up.
In the practical implementation; Rate-matched module 404; Specifically be used for merging under the triggering of the output enable signal that sends with scrambling module after the startup at said bit; According to the rate-matched repetitions patterns of determining by the parameters of rate matching of high level configuration, need in the dateout bit after bit merges to confirm the encoded data bits of repetition; Again read the encoded data bits of determining that needs repetition.
Concrete; When rate matching pattern is repeat pattern; Bit merges that the interlacing rule that merges according to bit with scrambling module 405 carries out to the encoded data bits of storing in the memory that bit merges and scrambling when exporting to data interlacing and Constellation Rearrangement module 402 after operating; Sending the output enable signal starts rate adaptation operating for rate-matched module 404; The encoded data bits of rate-matched module 404 after merging and scrambling reads from memory in the encoded data bits output; Dispose the parameters of rate matching of getting off according to high level and confirm rate-matched punching pattern; And confirm according to this rate-matched punching pattern whether needs repeat the current encoded data bits that reads, if when confirming that the current encoded data bits that reads needs repetition, then bit merges and from the memory address identical with the present encoding data bit, reads one time encoded data bits again with scrambling module 405.
The memory that relates in the embodiment of the invention is generally RAM (random access memory), also can be the memory of other type.
For the convenience of describing, the each several part of the transmitting stage processing unit of above transmission channel is divided into each module (or unit) according to function and describes respectively.Certainly, when embodiment of the present invention, can in same or a plurality of softwares or hardware, realize the function of each module (or unit).
In the practical implementation; To the GSM of supporting the HSUPA technology, the transmitting stage processing unit operated by rotary motion of described transmission channel is in UE (subscriber equipment), because this processing unit has been saved the memory space that need take; So can reduce chip area required in the chip design of UE; Because this processing unit adopts the parallel processing flow process, has shortened the transmitting stage processing time of transmission channel, so can promote the treatment effeciency of UE.To the GSM of supporting the HSDPA technology, the transmitting stage processing unit operated by rotary motion of described transmission channel can reduce chip area required in the chip design of NodeB accordingly in NodeB (base station), promotes the treatment effeciency of NodeB.
The execution mode of embodiment describes the method flow that the embodiment of the invention provides through concrete device block diagram below for a better understanding of the present invention.
Embodiment one
As shown in Figure 5, when being the punching pattern for rate matching pattern, the transmitting stage process flow figure of transmission channel comprises:
S501, check code add module the original transmitted piece that receives are added check code;
S502, check code add module the original transmitted piece that has added check code are sent to channel coding module;
S503, channel coding module to the interpolation that receives after the original transmitted piece of check code carries out chnnel coding, obtain encoded data bits;
In the time of S504, channel coding module outputting encoded data bit, send the output enable signal to the rate-matched module;
S505, rate-matched module are carried out rate-matched according to the output enable signal enabling that receives to encoded data bits;
Concrete; The rate-matched module generates the rate-matched punching pattern that the high-rise parameters of rate matching that disposes is determined according to the parameter of high level configuration; Confirm redundant encoded data bits in the encoded data bits that chnnel coding obtains, in channel coding module outputting encoded data bit, the encoded data bits of redundancy is given up.
Encoded data bits after S506, the rate-matched stores in the memory;
S507, bit merge and scrambling module encoded data bits after the reading rate coupling from memory is carried out bit merging and scrambling operation;
S508, bit merge and scrambling module merges bit and scrambling after encoded data bits export to data interlacing and Constellation Rearrangement module.
Embodiment two
As shown in Figure 6, when being repeat pattern for rate matching pattern, the transmitting stage of transmission channel is handled the implementing procedure sketch map, comprising:
S601, check code add module the original transmitted piece that receives are added check code;
S602, check code add module the original transmitted piece that has added check code are sent to channel coding module;
S603, channel coding module to the interpolation that receives after the original transmitted piece of check code carries out chnnel coding, obtain encoded data bits;
S604, channel coding module store encoded data bits in the memory into;
S605, memory stores encoded data bits;
S606, bit merging and scrambling module read encoded data bits from memory carries out exporting after bit merging and the scrambling operation, and the while is to rate-matched module transmission output enable signal;
S607, rate-matched module are according to the output enable signal enabling that receives, and the encoded data bits after bit merging and the scrambling is carried out rate-matched;
Concrete; The rate-matched module generates the rate-matched repetitions patterns that the high-rise parameters of rate matching that disposes is determined according to the parameter of high level configuration; Need in the encoded data bits that chnnel coding obtains to confirm the encoded data bits of repetition, read the encoded data bits of determining that needs repetition again.
S608, carried out the encoded data bits after the rate-matched and exported to data interlacing and Constellation Rearrangement module.
The transmitting stage processing method and the device of the transmission channel that the embodiment of the invention provides are carried out different transmitting stage parallel processing flow processs according to different rate matching pattern.When rate matching pattern is the punching pattern; Executed in parallel rate adaptation operating when the encoded data bits that the delivery channel coding obtains; Encoded data bits after memory rate is mated again; To the encoded data bits of storage carry out bit merge operate with scrambling after, carry out data interlacing and Constellation Rearrangement, obtain transmitting stage deal with data bit; When rate matching pattern is repeat pattern; Elder generation's memory encoding data bit; Again the encoded data bits of storage is carried out bit merging and scrambling operation; The output bit merge and scrambling after encoded data bits the time executed in parallel rate adaptation operating, carry out data interlacing and Constellation Rearrangement then, obtain transmitting stage deal with data bit.Owing in handling process, no matter be punching pattern or repeat pattern, only need encoded data bits of storage, thereby saved the memory space that need take, thereby reduced the chip area in the chip design.And, when rate matching pattern is the punching pattern, executed in parallel rate adaptation operating when the encoded data bits that the delivery channel coding obtains; When rate matching pattern is repeat pattern, the output bit merge and scrambling after encoded data bits the time executed in parallel rate adaptation operating, therefore, shortened the transmitting stage processing time of transmission channel, promoted treatment effeciency.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, belong within the scope of claim of the present invention and equivalent technologies thereof if of the present invention these are revised with modification, then the present invention also is intended to comprise these changes and modification interior.
Claims (11)
1. the transmitting stage processing method of a transmission channel is characterized in that, comprising:
The original transmitted piece is added check code carry out chnnel coding afterwards;
When rate matching pattern is the punching pattern; Rate-matched punching pattern based on determining carries out rate adaptation operating to the encoded data bits that chnnel coding obtains; And the encoded data bits after the memory rate coupling; The interlacing rule that merges according to bit carries out bit merging and scrambling operation to the encoded data bits of storage, and the encoded data bits after bit merging and the scrambling is carried out data interlacing and Constellation Rearrangement, the transmitting stage deal with data bit that output obtains;
When rate matching pattern is repeat pattern; The encoded data bits that chnnel coding obtains is stored; The interlacing rule that merges according to bit carries out bit merging and scrambling operation to the encoded data bits of storage; Carry out rate-matched and scrambling operation according to the dateout bit after the rate-matched repetitions patterns bit merging of determining, the encoded data bits after rate-matched and the scrambling is carried out data interlacing and Constellation Rearrangement, the transmitting stage deal with data bit that output obtains.
2. the method for claim 1 is characterized in that, the encoded data bits after the said memory rate coupling specifically comprises:
Encoded data bits after the rate-matched is carried out the bit separation operation, obtain systematic bits, first check bit and second check bit; And
The systematic bits that obtains, first check bit and second check bit are stored in the different address segment respectively.
3. according to claim 1 or claim 2 method is characterized in that the said encoded data bits that chnnel coding is obtained is stored, and specifically comprises:
The encoded data bits that chnnel coding obtains is carried out the bit separation operation, obtain systematic bits, first check bit and second check bit; And
The systematic bits that obtains, first check bit and second check bit are stored in the different address segment respectively.
4. the method for claim 1 is characterized in that, the rate-matched punching pattern that said basis is determined carries out rate adaptation operating to the encoded data bits that chnnel coding obtains, and specifically comprises:
According to the rate-matched punching pattern of determining by the parameters of rate matching of high level configuration, confirm redundant encoded data bits in the encoded data bits that chnnel coding obtains;
The encoded data bits of the redundancy of determining is given up.
5. the method for claim 1 is characterized in that, the dateout bit after the rate-matched repetitions patterns bit that said basis is determined merges carries out rate adaptation operating, specifically comprises:
Based on the rate-matched repetitions patterns of determining by the parameters of rate matching of high level configuration, need in the output data bit after bit merges to confirm the encoded data bits of repetition;
Repeat to read the encoded data bits of determining that needs repetition.
6. the transmitting stage processing unit of a transmission channel comprises that check code adds module, data interlacing and Constellation Rearrangement module, it is characterized in that, also comprises channel coding module, rate-matched module, bit merging and scrambling module and memory, wherein:
Said check code adds module, is used for sending to said channel coding module with after the original transmitted piece interpolation check code;
Said channel coding module; Be used for the original transmitted piece that has added check code is carried out exporting after the chnnel coding; When rate matching pattern is the punching pattern; Send the output enable signal and start rate adaptation operating for said rate-matched module, and the encoded data bits after the rate-matched is stored in the memory; When rate matching pattern was repeat pattern, the encoded data bits that chnnel coding is obtained stored in the memory;
Said rate-matched module; Be used for when rate matching pattern is the punching pattern; Under the triggering of the output enable signal that said channel coding module is sent, start, and the encoded data bits that chnnel coding obtains is carried out rate adaptation operating based on the rate-matched punching pattern of determining; When rate matching pattern is repeat pattern; Merge the triggering startup down of the output enable signal that sends with scrambling module at said bit, and carry out exporting to data interlacing and Constellation Rearrangement module after rate-matched, the scrambling based on the output data bit after the rate-matched repetitions patterns bit merging of determining;
Said bit merges and scrambling module; Be used for when rate matching pattern is the punching pattern, the interlacing rule that merges according to bit carries out exporting to said data interlacing and Constellation Rearrangement module after bit merging and the scrambling operation to the encoded data bits of storing in the memory; When rate matching pattern is repeat pattern; The interlacing rule that merges according to bit carries out exporting to said data interlacing and Constellation Rearrangement module after bit merging and the scrambling operation to the encoded data bits of storing in the memory, and sends the output enable signal and start rate adaptation operating for said rate-matched module;
Said data interlacing and Constellation Rearrangement module are used for the encoded data bits that receives is carried out data interlacing and Constellation Rearrangement, the transmitting stage deal with data bit that output obtains.
7. device as claimed in claim 6 is characterized in that,
Said channel coding module specifically is used for when rate matching pattern is the punching pattern, and the encoded data bits after the rate-matched is carried out the bit separation operation, obtains systematic bits, first check bit and second check bit; And the systematic bits that obtains, first check bit and second check bit stored into respectively in the different address fields of memory.
8. like claim 6 or 7 described devices, it is characterized in that,
Said channel coding module specifically is used for when rate matching pattern is repeat pattern, and the coded data that chnnel coding obtains is carried out the bit separation operation, obtains systematic bits, first check bit and second check bit; And the systematic bits that obtains, first check bit and second check bit stored into respectively in the different address fields of memory.
9. device as claimed in claim 6 is characterized in that,
Said rate-matched module; Specifically be used for after starting under the triggering of the output enable signal that said channel coding module is sent; According to the rate-matched punching pattern of determining by the parameters of rate matching of high level configuration, confirm redundant encoded data bits in the encoded data bits that chnnel coding obtains; The encoded data bits of the redundancy of determining is given up.
10. device as claimed in claim 6 is characterized in that,
Said rate-matched module; Specifically be used for merging under the triggering of the output enable signal that sends with scrambling module after the startup at said bit; According to the rate-matched repetitions patterns of determining by the parameters of rate matching of high level configuration, need in the dateout bit after bit merges to confirm the encoded data bits of repetition; Again read the encoded data bits of determining that needs repetition.
11. a subscriber equipment is characterized in that, comprises like the arbitrary described device of claim 6 to 10.
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| CN201110002796.0A CN102594485B (en) | 2011-01-07 | 2011-01-07 | A kind of transmitting stage processing method of transmission channel, device and equipment |
| PCT/CN2011/074173 WO2012092742A1 (en) | 2011-01-07 | 2011-05-17 | Method, apparatus and device for transmission stage processing of transmission channels |
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| CN101027860A (en) * | 2004-08-25 | 2007-08-29 | 诺基亚公司 | An uplink coding and multiplexing implementation |
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Effective date of registration: 20151111 Address after: Dameisha Yantian District of Shenzhen City, Guangdong province 518085 Building No. 1 Patentee after: SHENZHEN ZTE MICROELECTRONICS TECHNOLOGY CO., LTD. Address before: 518057 Nanshan District Guangdong high tech Industrial Park, South Road, science and technology, ZTE building, Ministry of Justice Patentee before: ZTE Corporation |
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Application publication date: 20120718 Assignee: Xi'an Chris Semiconductor Technology Co. Ltd. Assignor: SHENZHEN ZTE MICROELECTRONICS TECHNOLOGY CO., LTD. Contract record no.: 2019440020036 Denomination of invention: Transmission level processing method of transmission channel, apparatus and equipment thereof Granted publication date: 20150812 License type: Common License Record date: 20190619 |