CN102540594A - Pixel array, display panel, liquid crystal displayer and method for driving pixel array - Google Patents

Pixel array, display panel, liquid crystal displayer and method for driving pixel array Download PDF

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CN102540594A
CN102540594A CN2010105828903A CN201010582890A CN102540594A CN 102540594 A CN102540594 A CN 102540594A CN 2010105828903 A CN2010105828903 A CN 2010105828903A CN 201010582890 A CN201010582890 A CN 201010582890A CN 102540594 A CN102540594 A CN 102540594A
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electrode
lateral electric
electric fields
pel array
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CN102540594B (en
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马骏
吴勇
罗熙曦
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Shanghai Tianma Microelectronics Co Ltd
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Shanghai Tianma Microelectronics Co Ltd
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Abstract

The invention discloses a pixel array, a display panel, a liquid crystal displayer and a method for driving the pixel array. The pixel array is formed on a substrate, and each pixel unit in the pixel array comprises a scanning line, two data lines, two thin film transistors (TFTs), a pixel electrode layer and a lateral electric field layer. Grids of the two TFTs are all in electrical connection with the scanning line, the source drain of one TFT is electrically connected between the pixel electrode layer and one data line, and the source drain of the other TFT is electrically connected between the lateral electric field layer and the other data line. An insulating layer is arranged between the lateral electric field layer and the pixel electrode layer, an overlapping region of the lateral electric field layer and the pixel electrode layer is provided with a first opening, and the lateral electric field layer is made of light-reflecting conducting materials. The pixel array can improve opening rate of the vertical alignment (VA) liquid crystal displayer while being capable of being distributed in a liquid crystal domain according to the central symmetry rule.

Description

The driving method of pel array, display panel, LCD and pel array
Technical field
The present invention relates to the display technique field, particularly relate to the driving method of a kind of pel array, display panel, LCD and pel array.
Background technology
For homeotropic alignment (VA) type LCD (LCD); When its upper and lower base plate adds voltage; The liquid crystal molecule that is held on the negative permittivity between the upper and lower base plate is toppled over from arranging to transfer to being parallel to base plan perpendicular to base plan; Thereby the generation optical path difference makes the demonstration module that is able to see through LCD substrate outside band polaroid backlight.
Observe from the normal direction of base plan, toppling over of liquid crystal molecule has region direction property.A slice liquid crystal molecule zone with identical toppling direction forms the farmland; And the liquid crystal molecule with different toppling directions is regional, also with regard to the intersection on adjacent two farmlands, just forms the farmland line.The liquid crystal molecule at line place, farmland is pushed by the influence of both sides lqiuid crystal molecule tipping direction simultaneously, can't confirm toppling direction, also can't topple over even receive electric field action, so farmland line part all the time can't printing opacity.The VA LCD distributes the farmland that has symmetry in the pixel region all the time through the distribution on control farmland, obtains wide viewing angle symmetrically and evenly thus.Therefore, keep the symmetry on farmland stable, the position distribution of standard farmland line is the important topic of VA liquid crystal pixel design.
Existing a kind of through mode VA LCD is established one deck conducting metal at pixel ITO (tin indium oxide) periphery pad, and imposes suitable drive waveforms, thus generation rule lateral edge electric field, and then the drive liquid crystal molecule produces the distribution of symmetrical farmland.
Referring to Fig. 1~Fig. 3, Fig. 1 is the structural representation of a pixel region of said VA LCD simultaneously; Fig. 2 a is the corresponding VA LCD of Fig. 1 applies drive waveforms to side direction electric field metal wire at retrace interval a sequential chart; To be the corresponding VA LCD of Fig. 1 apply the sequential chart of drive waveforms in retrace interval and five equilibrium interim to Fig. 2 b to side direction electric field metal wire; Fig. 3 is the schematic cross-section along A-A line among Fig. 1.
As shown in Figure 1, have grid metal 101a on the first glass substrate 10a, grid metal 101a can be aluminium.The grid metal can be divided into grid line 1011a and lateral electric fields metal wire 1012a according to the purposes difference.Lateral electric fields metal wire 1012a in all pixels links together through bus outside the viewing area of whole VA LCD, has identical current potential all the time.Have on the grid metal 101a to have the first insulation course 102a, have amorphous silicon 103a on the first insulation course 102a on the grid line 1011a, amorphous silicon 103a goes up and forms active leakage metal 104a.With amorphous silicon 103a is that the N type is doped to example, and the source is leaked metal 104a and comprised leakage metal wire 1041a and source electrode 1042a, and metal 104a is leaked in the source can be the aluminium molybdenum alloy.By grid line 1011a and the interlaced pixel region array of cooking up of leakage metal wire 1041a; Grid line 1011a and the position of leaking metal wire 1041a intersection in each pixel region; Grid line 1011a, the first insulation course 102a, amorphous silicon 103a, source are leaked metal 104a and are constituted thin film transistor (TFT) (TFT) structure, and TFT is positioned at the shielded area of black matrix".The source is leaked to have on the metal 104a and the first insulation course 102a and is had the second insulation course 105a; Have the first ito glass layer 106a on the second insulation course 105a; The first ito glass layer 106a forms with the source electrode 1042a of TFT through the via hole 1051a on the second insulation course 105a and is electrically connected, and the first ito glass layer 106a has the transmission region 1061a that is not blocked by lateral electric fields metal wire 1012a.The second glass substrate 20a is relative with the first glass substrate 10a, has the second ito glass layer 201a on the second glass substrate 20a.Clamping has liquid crystal layer 30a between the first glass substrate 10a and the second glass substrate 20a.
Definition grid line 1011a along the direction of leaking metal wire 1041a provide in order sweep signal during be S during the frame scan, the tempus intercalare of S is retrace interval H during the frame scan.If total n bar grid line 1011a, Fig. 2 a shows the sequential chart that side direction electric field metal wire 1012a is applied drive waveforms at retrace interval H; The five equilibrium interim D that Fig. 2 b shows S during retrace interval H and frame scan applies the sequential chart of drive waveforms to side direction electric field metal wire 1012a.
Electric Field Distribution when Fig. 3 shows schematic cross-section and the generation rule lateral electric fields of A-A line in Fig. 1.Because this lateral electric fields can keep during frame scan, and consolidated once more, so the liquid crystal molecule in the pixel region has definite and toppling direction that be centrosymmetric and distribute all the time, form symmetrical farmland at next retrace interval.
The lateral electric fields metal wire 1012a and the first ito glass layer 106a need accurate contraposition, and it is consistent to make lateral electric fields metal wire 1012a be positioned at first ito glass layer 106a proportion on every side, and the lateral electric fields inclined degree of generation just can be consistent.In case deviation (referring to Fig. 4) appears in this two-layer contraposition; The capital makes somewhere lateral electric fields metal wire 1012a expose the area too small (referring to Fig. 4 lower left corner) of the first ito glass layer 106a; The lateral field of liquid crystal molecule can't exert an influence; The no longer center symmetry so the farmland at transmission region 1061a place distributes, the visual angle symmetry of VA LCD is affected.More serious, the VA LCD is produced after receiving pressed by external force can't the self-demonstration non-uniform phenomenon of eliminating.
To this, another kind of through mode VA LCD has appearred.Fig. 5 is the structural representation of a pixel region of said VA LCD; Fig. 6 a is the corresponding VA LCD of Fig. 5 applies drive waveforms to side direction electric field metal wire at retrace interval a sequential chart; To be the corresponding VA LCD of Fig. 5 apply the sequential chart of drive waveforms in retrace interval and five equilibrium interim to Fig. 6 b to side direction electric field metal wire; Fig. 7 is the schematic cross-section along B-B line among Fig. 5.
As shown in Figure 5, have grid line 1011b on the first glass substrate 10b, grid line 1011b can be aluminium.Have on the grid line 1011b and have the first insulation course 102b, have amorphous silicon 103b on the first insulation course 102b on the grid line 1011b, amorphous silicon 103b goes up and forms active leakage metal 104b.With amorphous silicon 103b is that the N type is doped to example, and the source is leaked metal 104b and comprised leakage metal wire 1041b and source electrode 1042b, and metal 104b is leaked in the source can be the aluminium molybdenum alloy.By grid line 1011b and the interlaced pixel region array of cooking up of leakage metal wire 1041b; Grid line 1011b and the position of leaking metal wire 1041b intersection in each pixel region; Grid line 1011b, the first insulation course 102b, amorphous silicon 103b, source are leaked metal 104b and are constituted the TFT structure, and TFT is positioned at the shielded area of black matrix".The source is leaked to have on the metal 104b and the first insulation course 102b and is had the second insulation course 105b; Have the first ito glass layer 106b on the second insulation course 105b, the first ito glass layer 106b forms with the source electrode 1042b of TFT through the via hole 1051b on the second insulation course 105b and is electrically connected.Has the 3rd insulation course 107b on the first ito glass layer 106b; Has lateral electric fields metal wire 108b on the 3rd insulation course 107b; Lateral electric fields metal wire 108b in all pixels links together through bus outside the viewing area of whole VA LCD, has identical current potential all the time.The first ito glass layer 106b has the transmission region 1061b that is not blocked by lateral electric fields metal wire 108b.The second glass substrate 20b is relative with the first glass substrate 10b, has the second ito glass layer 201b on the second glass substrate 20b, and the second ito glass layer 201b keeps common potential (for example 0V).Clamping has liquid crystal layer 30b between the first glass substrate 10b and the second glass substrate 20b.
If total n bar grid line 1011b, then among Fig. 6 a, during S was frame scan, H was a retrace interval; Among Fig. 6 b, during S was frame scan, H was a retrace interval, and D is five equilibrium interim.
For the drive waveforms shown in Fig. 6 a; S during frame scan; The second ito glass layer 201b keeps common potential (for example being 0V); Have on the first ito glass layer 106b different separately demonstration current potentials (scope that for example, shows current potential is-5V~+ 5V), full frame lateral electric fields metal wire 108b also keeps common potential.At retrace interval H, by bus give full frame lateral electric fields metal wire 108b provide a noble potential pulse (for example noble potential can for+15V), make transmission region 1061b form Electric Field Distribution shown in Figure 7.Finish at retrace interval, when arriving during the next frame scan, the full frame lateral electric fields metal wire 108b and the first insulation course 102a return common potential.During lateral electric fields metal wire 108b was noble potential, its relative potential difference (PD) to the first ito glass layer 106b made the ito glass layer 106b periphery of winning form lateral electric fields.Owing to defined transmission region 1061b in the lateral electric fields metal wire 108b pattern; This zone is only determined by the pattern of lateral electric fields metal wire 108b itself; Even therefore deviation appears in the aligning accuracy of the lateral electric fields metal wire 108b and the first ito glass layer 106b pattern; Can also form accurate centrosymmetric lateral electric fields accurately and distribute, make the liquid crystal farmland to distribute thus according to the center rules of symmetry.During frame scan; Only form approximate uniform electric field in the pixel region by the first ito glass layer 106b and the second ito glass layer 201b; This moment, liquid crystal molecule relied on the location of the lateral electric fields of retrace interval, had definite toppling direction, and kept until the arrival of retrace interval next time always.
For the drive waveforms shown in Fig. 6 b; Lateral electric fields metal wire 108b not only has noble potential at retrace interval H; And during frame scan some five equilibrium interim D (2 Along ents for example of S; Be mid point) time also have a noble potential pulse, this moment, the grid line 1011b as sweep trace stopped to provide signal.This type of drive makes that the appearance of lateral electric fields is more frequent, keeps also just more firm.
But because lateral electric fields metal wire 108b itself is opaque, reduced the aperture opening ratio of VA LCD, influenced module brightness.
Summary of the invention
The driving method that the purpose of this invention is to provide a kind of pel array, display panel, LCD and pel array with when the liquid crystal farmland distributes according to the center rules of symmetry, improves the transmitance and the aperture opening ratio of VA LCD.
At first, the invention provides a kind of pel array, said pel array is formed on the substrate, and each pixel cell in the said pel array comprises: a sweep trace, two data lines, two TFT, pixel electrode layer and lateral electric fields layers; The grid of two TFT all is electrically connected with sweep trace, and the source-drain electrode of one of them TFT is electrically connected on pixel electrode layer and wherein between data line, the source-drain electrode of another TFT is electrically connected between lateral electric fields layer and another data line; One insulation course is set between lateral electric fields layer and the pixel electrode layer, and the lateral electric fields layer has first opening of printing opacity in the overlapping region with pixel electrode layer, and the lateral electric fields layer adopts reflective conductive material.
Secondly; The invention provides a kind of display panel; Said display panel comprises and is formed with first substrate of pel array as stated; Have second substrate of conductive layer, and be held on the liquid crystal layer between first substrate and second substrate, it is relative with the one side that second substrate has conductive layer that first substrate has the one side of pel array.
Once more, the invention provides a kind of LCD, said LCD comprises aforesaid display panel.
At last, the invention provides a kind of driving method of aforesaid pel array, said method comprises:
During each frame scan; On the sweep trace of arranging along the data line direction, import the cut-in voltage pulse in order; Be connected electrically in first drive signal of input drives liquid crystal molecules on the data line of same TFT with pixel electrode layer, be connected electrically in second drive signal of input control lateral electric fields on the data line of same TFT with the lateral electric fields layer;
The repetition period of first drive signal is 2 times of each cut-in voltage pulse duration, and first drive signal is equivalent reverse in the drive potential in preceding semiperiod and later half cycle;
The repetition period of second drive signal equals the repetition period of first drive signal, and second drive signal all the time with first drive signal in the same way;
In the preceding semiperiod of second drive signal; The value of initial potential is greater than the drive potential value of first drive signal; The value of follow-up current potential can guarantee that the gray scale curve of pixel electrode layer and lateral electric fields layer matches; Second half in second drive signal is interim, and the value of initial potential is greater than the drive potential value of first drive signal, and the value of follow-up current potential can guarantee that the gray scale curve of pixel electrode layer and lateral electric fields layer matches; Said initial potential is used to excite lateral electric fields, and follow-up current potential is used for cremasteric reflex GTG current potential.
The driving method of pel array of the present invention, display panel, LCD and pel array; Adopt reflective conductive material as the lateral electric fields layer; First opening that can pass through backlight sees through the VA LCD, and light on every side can be appeared from second substrate by the reflection of lateral electric fields layer, realizes the half-reflection and half-transmission effect; Improve the luminance brightness that each pixel region appears, improved the aperture opening ratio of whole VA LCD; In addition; Because the lateral electric fields layer has blocked the one part of pixel electrode layer; After the lateral electric fields layer applies voltage, can inspire the lateral electric fields that is positioned at first edge of opening, this lateral electric fields can inwardly be squeezed into the tilting electric field with first open centre symmetry with the electric field of pixel electrode layer and conductive layer formation; Obtain liquid crystal farmland, and then obtain wide viewing angle symmetrically and evenly according to the distribution of center rules of symmetry.
Description of drawings
Fig. 1 is the structural representation of a pixel region of existing a kind of VA LCD;
Fig. 2 a is the sequential chart that the VA LCD applies drive waveforms among Fig. 1 to side direction electric field metal wire at retrace interval;
Fig. 2 b is the sequential chart that the VA LCD applies drive waveforms among Fig. 1 to side direction electric field metal wire in retrace interval and five equilibrium interim;
Fig. 3 is the schematic cross-section along A-A line among Fig. 1;
Fig. 4 is along the schematic cross-section of A-A line when the contraposition deviation appears in VA LCD lateral electric fields metal wire and first ito glass among Fig. 1;
Fig. 5 is the structural representation of a pixel region of existing another kind of VA LCD;
Fig. 6 a is the sequential chart that the VA LCD applies drive waveforms among Fig. 5 to side direction electric field metal wire at retrace interval;
Fig. 6 b is the sequential chart that the VA LCD applies drive waveforms among Fig. 5 to side direction electric field metal wire in retrace interval and five equilibrium interim;
Fig. 7 is the schematic cross-section along B-B line among Fig. 5;
Fig. 8 is the structural representation of a pixel region that has the VA LCD of pel array of the present invention;
Fig. 9 is the schematic cross-section along C-C line among Fig. 8;
Figure 10 is the sequential chart that pel array applies drive waveforms among Fig. 8 to side direction electric field metal level during frame scan.
Embodiment
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, below in conjunction with accompanying drawing and embodiment the embodiment of the invention done further detailed explanation.
Embodiment one
Present embodiment provides a kind of pel array; Please be simultaneously referring to Fig. 8, Fig. 9; Said pel array is formed on first substrate 10 of VA LCD; Said VA LCD also comprise second substrate 20 and be held on first substrate 10 and second substrate 20 between liquid crystal layer 30, the second substrates 20 to have the one side that conductive layer 201, the first substrates 10 have pel array relative with the one side that second substrate 20 has conductive layer 201.
Each pixel cell in the said pel array comprises: sweep trace 101, two data lines 1040, two TFT, pixel electrode layer 106 and lateral electric fields layers 108.
The material of sweep trace 101 can be aluminium; The material of data line 1040 can be the aluminium molybdenum alloy; The material of pixel electrode layer 106 can be ITO; Lateral electric fields layer 108 adopts reflective conductive material, the common metal material, because the reflective function of aluminium is better, and cost is lower, and the material of lateral electric fields layer 108 is preferably aluminium.
The grid of said two TFT all is electrically connected with sweep trace 101; The source-drain electrode of one of them TFT is electrically connected on pixel electrode layer 106 and wherein between data line 1040, the source-drain electrode of another TFT is electrically connected between lateral electric fields layer 108 and another data line 1040; Lateral electric fields layer 108 on the pixel electrode layer 106 and and pixel electrode layer 106 between an insulation course 107 is set, lateral electric fields layer 108 and the overlapping region of pixel electrode layer 106 have first opening 1061 of printing opacity.
Two data lines 1040 of each pixel cell be positioned at said pixel cell over against both sides, a sweep trace 101 and two data lines 1040 intersect vertically and define the pixel region of said pixel cell.
Said pel array also comprises first insulation course 102, and sweep trace 101 and data line 1040 are positioned at the both sides of first insulation course 102.The material of first insulation course 102 can be silicon nitride, and thickness can be taken as 500-
Figure BDA0000037398080000071
Be formed with amorphous silicon layer 103 on first insulation course 102 on the sweep trace 101, the source-drain electrode of then said two TFT is all through amorphous silicon layer 103 and first insulation course 102 and sweep trace 101 insulation as grid.Therefore, generally can first insulation course 102 be referred to as gate insulator.
Said two data lines 1040 are respectively first data line 1043 and second data line 1044 that is parallel to each other and insulate; Said two TFT are respectively a TFT and the 2nd TFT; The source-drain electrode of the one TFT comprises that the source-drain electrode of first electrode 10411 and second electrode, 10412, the two TFT comprises third electrode 10421 and the 4th electrode 10422, wherein; First electrode 10411 is a source/drain; Second electrode 10412 is and first electrode, 10412 corresponding drain/sources, and third electrode 10421 is a source/drain, and the 4th electrode 10422 is and third electrode 10421 corresponding drain/sources; First data line 1043, second data line 1044, first electrode 10411, second electrode 10412, third electrode 10421 and the 4th electrode 10422 all are positioned at same one deck, and metal level 104 is leaked in the source that promptly is positioned on the amorphous silicon layer 103 and first insulation course 102.First electrode 10411 can be the extension of first data line 1043 to pixel region, and third electrode 10421 also can be the extension of second data line 1044 to pixel region, and the material that metal level 104 is leaked in the source can be the aluminium molybdenum alloy.
Because first data line 1043 insulate with second data line 1044, for preventing the signal mutual interference mutually on pixel electrode layer 106 and the lateral electric fields layer 108, amorphous silicon 1031 and the amorphous silicon 1032 among the 2nd TFT among the TFT break off each other.
Sweep trace 101, first insulation course 102, amorphous silicon 1031, first electrode 10411 and second electrode 10412 constitute a TFT, and sweep trace 101, first insulation course 102, amorphous silicon 1032, third electrode 10421 and the 4th electrode 10422 constitute the 2nd TFT.The one TFT and the 2nd TFT are positioned at the shielded area of black matrix".
Amorphous silicon 1031 and/or 1032 can be that the N type mixes, and also can be that the P type mixes.For example, the amorphous silicon 1031 of a TFT mixes for the N type, and the amorphous silicon 1032 of the 2nd TFT mixes for the P type, and first electrode 10411 and the 4th electrode 10422 are drain electrode so, and second electrode 10412 is source electrode with third electrode 10421; Other situation by that analogy.First electrode 10411, second electrode 10412, third electrode 10421 and the 4th electrode 10422 all can be through amorphous silicon layer 103 and first insulation course 102 and sweep trace 101 insulation as grid.
Said pel array also comprises second insulation course 105, and the source is leaked metal level 104 and is positioned at second insulation course, 105 both sides with pixel electrode layer 106.The material of second insulation course 105 can be silicon nitride, and thickness can be taken as 500-
Figure BDA0000037398080000081
second insulation course 105 and is generally passivation layer.
First insulation course 102 and second insulation course 105 all cover entire pixel array.
First electrode 10411 is electrically connected with first data line 1043, and second electrode 10412 is electrically connected with pixel electrode layer through the via hole 1051 in second insulation course 105; Insulation course 107 between pixel electrode layer 106 and the lateral electric fields layer 108 can be referred to as the 3rd insulation course 107; Third electrode 10421 is electrically connected with second data line 1044, and the 4th electrode 10422 is electrically connected with lateral electric fields layer 108 through the via hole 1052 that runs through second insulation course 105 and the 3rd insulation course 107.Pixel electrode layer 106 insulate through the 3rd insulation course 107 with lateral electric fields layer 108.
The 3rd insulation course 107 can be organic insulator, and thickness can be 1.5~2 microns, and the material of organic insulator can be photoresist etc.The material of the 3rd insulation course 107 also can be inorganic insulation layer, for example is silicon nitride layer.
The 3rd insulation course 107 preferably also has second opening corresponding with first opening 1061, and the light that sends of VA backlight of LCD can directly penetrate liquid crystal layer 30, the brightness that improves whole VA LCD after passing through pixel electrode layer 106 thus.
Each pixel cell can also comprise the public electrode that is used to form pixel storage capacitor, and this public electrode and sweep trace 101 are positioned at same one deck.
Because lateral electric fields layer 108 has blocked one part of pixel electrode layer 106; After lateral electric fields layer 108 applies voltage; Can inspire the lateral electric fields that is positioned at first opening, 1061 edges; This lateral electric fields can inwardly be squeezed into pixel electrode layer 106 and the electric field that conductive layer 201 forms with first opening, 1061 centrosymmetric tilting electric fields (referring to Fig. 9), obtains the liquid crystal farmland according to the distribution of center rules of symmetry, and obtains wide viewing angle symmetrically and evenly thus.
The 3rd insulation course 107 can also have the surface profile of fluctuating, and the lateral electric fields layer 108 on such the 3rd insulation course 107 also has the surface profile of fluctuating.The lateral electric fields layer 108 of contoured surface is beneficial to extraneous light and when arriving lateral electric fields layer 108 surface, reflects away along different directions; Luminance brightness to regional transmission (i.e. first opening 1061) and reflector space (being the surface of lateral electric fields layer 108) evenly compensates, and improves the aperture opening ratio of VA LCD.
Because the height that rises and falls will reach the effect that just can reach above-mentioned even reflection about 0.8 micron; Therefore the 3rd insulation course 107 needs to select organic insulator; Usually the thickness of organic insulator can reach 1.5~2 microns; The organic photoresist of the 3rd insulation course 107 first-selected employings can cover on the pixel electrode layer 106 and second insulation course 105 through modes such as spin coatings.After the 3rd insulation course 107 forms; Can use half to transfer mask plate that the 3rd insulation course 107 is made public; Obtain upper surface after the cleaning and have the 3rd protruding insulation course 107, on the 3rd insulation course 107, deposit lateral electric fields layer 108 afterwards, the upper surface of lateral electric fields layer 108 also is convex.
The pel array of present embodiment; Adopt reflective conductive material as lateral electric fields layer 108; First opening 1061 that can pass through backlight sees through the VA LCD, and light on every side can be appeared from second substrate 20 by 108 reflection of lateral electric fields layer, realizes the half-reflection and half-transmission effect; Improve the luminance brightness that each pixel region appears, improved the aperture opening ratio of whole VA LCD; In addition; Because lateral electric fields layer 108 has blocked one part of pixel electrode layer 106; After lateral electric fields layer 108 applies voltage, can inspire the lateral electric fields that is positioned at first opening, 1061 edges, this lateral electric fields can inwardly be squeezed into pixel electrode layer 106 and the electric field that conductive layer 201 forms with first opening, 1061 centrosymmetric tilting electric fields; Obtain liquid crystal farmland, and then obtain wide viewing angle symmetrically and evenly according to the distribution of center rules of symmetry.
Embodiment two
Present embodiment provides a kind of display panel; Comprise first substrate that is formed with like embodiment one described pel array; Second substrate with conductive layer; And being held on the liquid crystal layer between first substrate and second substrate, it is relative with the one side that second substrate has conductive layer that first substrate has the one side of pel array.Said liquid crystal layer is the liquid crystal layer of negative permittivity.Upper substrate 20 can be glass substrate with infrabasal plate 10.
Second substrate has conductive layer towards the one side of liquid crystal layer, and the material of conductive layer can be ITO.First substrate and second substrate can be glass substrate.
Embodiment three
Present embodiment provides a kind of LCD, and said LCD comprises the two described display panels like embodiment.
Embodiment four
Present embodiment provides a kind of driving method of above-mentioned pel array, and wherein the conductive layer 201 on second substrate 20 remains common potential (for example 0V).Said driving method comprises:
Figure 10 is the corresponding pel array S during frame scan of Fig. 8 applies drive waveforms to side direction electric field metal level 108 a sequential chart.S during each frame scan; On the sweep trace of arranging along data line 1040 directions 101, import the cut-in voltage pulse in order; Go up first drive signal of input drives liquid crystal molecules at the data line (i.e. first data line 1043) that is connected electrically in same TFT with pixel electrode layer 106, go up second drive signal that lateral electric fields is controlled in input at the data line (i.e. second data line 1044) that is connected electrically in same TFT with lateral electric fields layer 108.Length during the frame scan depends on display frequency, and for example display frequency is 60Hz, then is 1/60s during the frame scan.
If total m bar sweep trace; The repetition period T of first drive signal is 2 times of each cut-in voltage pulse duration t; First drive signal is equivalent reverse in the drive potential in preceding semiperiod and later half cycle, and the value with the drive potential F of first drive signal is that 5V is that example describes below.
The repetition period E of second drive signal equals the repetition period T of first drive signal, and second drive signal all the time with first drive signal in the same way.
In the preceding semiperiod of second drive signal, (value for example+10V) is greater than the drive potential value F of first drive signal, preferred 5V≤O-F≤15V for initial potential O; (gray scale curve wanting to guarantee pixel electrode layer 106 and lateral electric fields layer 108 of value for example+2.5V) matches follow-up current potential L, and the image seen at first opening 1061 and lateral electric fields layer 108 of user is continuous consistent like this.The gray scale curve of pixel electrode layer 106 and lateral electric fields layer 108 matches, and needs the liquid crystal of first opening, 1061 tops and the optical path difference of lateral electric fields layer 108 top liquid crystal to equate, promptly satisfies formula: Δ N 1d 1=2 Δ N 2d 2, Δ N represents the anisotropy of liquid crystal poor, and d represents light path, wherein, Δ N 1The anisotropy that is first opening, 1061 top liquid crystal is poor, d 1Be the thickness (being the thickness of VA LCD liquid crystal cell) of first opening, 1061 top liquid crystal, Δ N 2For the anisotropy of lateral electric fields layer 108 top liquid crystal poor, d 2Thickness for lateral electric fields layer 108 top liquid crystal.Because Δ N is utilizing above-mentioned formula to confirm Δ N along with current potential increases monotone increasing in the certain potentials scope 1With Δ N 2After, just can correspondingly obtain the value of the follow-up current potential L of lateral electric fields layer 108.Different liquid crystal molecule Δ N is different with the numerical relation of current potential, can follow-uply detect through IC to obtain.Generally can the value of follow-up current potential L be taken as value half the of the drive potential F of first drive signal.
In like manner; Second half in second drive signal is interim; ((5V), (value for example-2.5V) can guarantee that the gray scale curve of pixel electrode layer 106 and lateral electric fields layer 108 matches to follow-up current potential to value for example-10V) to initial potential greater than the drive potential value of first drive signal.Said initial potential is used to excite lateral electric fields, and follow-up current potential is used for cremasteric reflex GTG current potential.After lateral electric fields is excited, can keep always, and keep through new excitation in during next frame scan always.The driving method of present embodiment is during frame scan, to excite lateral electric fields, is different from prior art and excites lateral electric fields at retrace interval.
The driving method of the pel array of present embodiment; Exist in the process in each cut-in voltage pulse; The signal of elder generation's potential value on importing greater than first data line 1043 on second data line 1044 is to excite lateral electric fields; This lateral electric fields inwardly is squeezed into pixel electrode layer 106 and the electric field that conductive layer 201 forms with first opening, 1061 centrosymmetric tilting electric fields, obtains the liquid crystal farmland according to the distribution of center rules of symmetry, obtains wide viewing angle symmetrically and evenly; Input can guarantee that the signal that the gray scale curve of pixel electrode layer 106 and lateral electric fields layer 108 matches comes cremasteric reflex GTG current potential on second data line 1044 afterwards; Light around making can be appeared from upper substrate by 108 reflection of lateral electric fields layer; Realize the half-reflection and half-transmission effect; Improve the luminance brightness that each pixel region appears, improved the aperture opening ratio of whole VA LCD.
Need to prove; In this article; Relational terms such as first and second grades only is used for an entity or operation are made a distinction with another entity or operation, and not necessarily requires or hint relation or the order that has any this reality between these entities or the operation.And; Term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability; Thereby make and comprise that process, method, article or the equipment of a series of key elements not only comprise those key elements; But also comprise other key elements of clearly not listing, or also be included as this process, method, article or equipment intrinsic key element.Under the situation that do not having much more more restrictions, the key element that limits by statement " comprising ... ", and be not precluded within process, method, article or the equipment that comprises said key element and also have other identical element.
The above is merely preferred embodiment of the present invention, is not to be used to limit protection scope of the present invention.All any modifications of within spirit of the present invention and principle, being done, be equal to replacement, improvement etc., all be included in protection scope of the present invention.

Claims (22)

1. pel array, said pel array is formed on the substrate, it is characterized in that, and each pixel cell in the said pel array comprises: a sweep trace, two data lines, two thin film transistor (TFT) TFT, pixel electrode layer and lateral electric fields layers; The grid of two TFT all is electrically connected with sweep trace, and the source-drain electrode of one of them TFT is electrically connected on pixel electrode layer and wherein between data line, the source-drain electrode of another TFT is electrically connected between lateral electric fields layer and another data line; One insulation course is set between lateral electric fields layer and the pixel electrode layer, and the lateral electric fields layer has first opening of printing opacity in the overlapping region with pixel electrode layer, and the lateral electric fields layer adopts reflective conductive material.
2. pel array as claimed in claim 1; It is characterized in that; Two data line bits of said each pixel cell in said pixel cell over against both sides, a said sweep trace and said two data lines intersect vertically the definition said pixel cell pixel region.
3. pel array as claimed in claim 2 is characterized in that said pel array also comprises first insulation course, and said sweep trace and said data line bit are in the said first insulation course both sides.
4. pel array as claimed in claim 3 is characterized in that, is formed with amorphous silicon layer on first insulation course on the said sweep trace, and the source-drain electrode of then said two TFT is all through amorphous silicon layer and first insulation course and sweep trace insulation as grid.
5. pel array as claimed in claim 4 is characterized in that, said two data lines are respectively first data line and second data line that is parallel to each other and insulate; Said two TFT are respectively a TFT and the 2nd TFT; The source-drain electrode of the one TFT comprises first electrode and second electrode, and the source-drain electrode of the 2nd TFT comprises third electrode and the 4th electrode, wherein; First electrode is a source/drain; Second electrode is and the corresponding drain/source of first electrode, and third electrode is a source/drain, and the 4th electrode is and the corresponding drain/source of third electrode; Metal level is leaked in the source that first data line, second data line, first electrode, second electrode, third electrode and the 4th electrode all are positioned on the amorphous silicon layer and first insulation course.
6. pel array as claimed in claim 5 is characterized in that said pel array also comprises second insulation course, and metal level is leaked in said source and said pixel electrode layer is positioned at the said second insulation course both sides; First electrode is electrically connected with first data line, and second electrode is electrically connected with pixel electrode layer through the via hole in second insulation course; Insulation course between pixel electrode layer and the lateral electric fields layer is the 3rd insulation course, and third electrode is electrically connected with second data line, and the 4th electrode is electrically connected with the lateral electric fields layer through the via hole that runs through second insulation course and the 3rd insulation course.
7. pel array as claimed in claim 6 is characterized in that, first insulation course and second insulation course all cover entire pixel array.
8. like each the described pel array among the claim 1-7, it is characterized in that said lateral electric fields layer also has second opening corresponding with first opening with insulation course between the said pixel electrode layer.
9. pel array as claimed in claim 8 is characterized in that, the insulation course between said lateral electric fields layer and the said pixel electrode layer is an organic insulator.
10. pel array as claimed in claim 9 is characterized in that, the thickness of said organic insulator is 1.5~2 microns.
11. pel array as claimed in claim 9 is characterized in that, the material of said organic insulator is a photoresist.
12. each the described pel array as among the claim 1-7 is characterized in that the insulation course between said lateral electric fields layer and the said pixel electrode layer is a silicon nitride layer.
13. each the described pel array as among the claim 1-7 is characterized in that the insulation course between said lateral electric fields layer and the said pixel electrode layer has the surface profile of fluctuating.
14. each the described pel array as among the claim 1-7 is characterized in that said reflective conductive material is a metal material.
15. pel array as claimed in claim 14 is characterized in that, said metal material is an aluminium.
16. each the described pel array as among the claim 1-7 is characterized in that each pixel cell also comprises the public electrode that is used to form pixel storage capacitor, this public electrode and sweep trace are positioned at same one deck.
17. display panel; It is characterized in that; Said display panel comprises first substrate that is formed with like each the said pel array among the claim 1-16; Have second substrate of conductive layer, and be held on the liquid crystal layer between first substrate and second substrate, it is relative with the one side that second substrate has conductive layer that first substrate has the one side of pel array.
18. display panel as claimed in claim 17 is characterized in that, said liquid crystal layer is the liquid crystal layer of negative permittivity.
19. a LCD is characterized in that, said LCD comprises like claim 17 or 18 described display panels.
20. the driving method like each the described pel array among the claim 1-16 is characterized in that, said method comprises:
During each frame scan; On the sweep trace of arranging along the data line direction, import the cut-in voltage pulse in order; Be connected electrically in first drive signal of input drives liquid crystal molecules on the data line of same TFT with pixel electrode layer, be connected electrically in second drive signal of input control lateral electric fields on the data line of same TFT with the lateral electric fields layer;
The repetition period of first drive signal is 2 times of each cut-in voltage pulse duration, and first drive signal is equivalent reverse in the drive potential in preceding semiperiod and later half cycle;
The repetition period of second drive signal equals the repetition period of first drive signal, and second drive signal all the time with first drive signal in the same way;
In the preceding semiperiod of second drive signal; The value of initial potential is greater than the drive potential value of first drive signal; The value of follow-up current potential can guarantee that the gray scale curve of pixel electrode layer and lateral electric fields layer matches; Second half in second drive signal is interim, and the value of initial potential is greater than the drive potential value of first drive signal, and the value of follow-up current potential can guarantee that the gray scale curve of pixel electrode layer and lateral electric fields layer matches; Said initial potential is used to excite lateral electric fields, and follow-up current potential is used for cremasteric reflex GTG current potential.
21. driving method as claimed in claim 20 is characterized in that, the value of the follow-up current potential of second drive signal is the half the of the first drive potential value.
22., it is characterized in that the difference span of the drive potential value of the value of said initial potential and first drive signal is 5V~15V like claim 20 or 21 described driving methods.
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CN105824157A (en) * 2015-01-28 2016-08-03 群创光电股份有限公司 Liquid crystal display panel
CN113299239A (en) * 2021-04-21 2021-08-24 福州大学 Active array display device regulated and controlled by electric field

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CN101403838A (en) * 2008-04-21 2009-04-08 友达光电股份有限公司 LCD panel and its driving method
CN101852953A (en) * 2009-03-30 2010-10-06 北京京东方光电科技有限公司 TFT-LCD (Thin Film Transistor Liquid Crystal Display) array substrate and manufacturing method thereof, as well as liquid crystal display panel
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CN113299239B (en) * 2021-04-21 2022-04-08 福州大学 Active array display device regulated and controlled by electric field

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