CN102508636A - Program stream control method for vector processor and system - Google Patents
Program stream control method for vector processor and system Download PDFInfo
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- CN102508636A CN102508636A CN2011103404094A CN201110340409A CN102508636A CN 102508636 A CN102508636 A CN 102508636A CN 2011103404094 A CN2011103404094 A CN 2011103404094A CN 201110340409 A CN201110340409 A CN 201110340409A CN 102508636 A CN102508636 A CN 102508636A
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Abstract
The invention discloses a program stream control method for a vector processor and a system. The method includes steps of outputting a vector data processing state when a vector data processing unit executes a vector data operation instruction outputted by a fetch unit; acquiring a the vector data processing state by the aid of a program stream control unit; generating a program stream changing mark according to the vector data processing state; starting to sequentially obtain instructions from program stream changing addresses by the aid of the fetch unit according to the program steam changing mark; and outputting acquired instructions to the vector data processing unit. The system comprises the fetch unit, the vector data processing unit and the program stream control unit, the vector data processing unit consists of a state generating unit used for generating the vector data processing state, and an output end of the state generating unit is connected with the program stream control unit. The program stream control method for the vector process and the system have the advantages that a program stream can be changed during processing, vector data processing time is saved, data processing volume is reduced, and data processing efficiency is high.
Description
Technical field
The present invention relates to field of microprocessors, be specifically related to a kind of program flow control method and system that is used for vector processor.
Background technology
Application algorithms such as radio communication, image/video processing comprise a large amount of vector operations, for example carry out the addition of 16 pairs of data etc.Vector processor is a kind of processor of support vector data manipulation, just can carry out the add operation of above-mentioned 16 pairs of data through a vector instruction of vector processor.In the prior art, the program flow of vector processor control is general through scalar program current control (comprise branch, redirect or the invocation of procedure/return etc.) realization.But the program flow control method of this scalar program current control is difficult to the algorithm of dealing with complicated.For example the algorithm with search for character in vector data is an example, when a certain element match search character in the vector data, just can stop search.Because it is related that scalar program method of flow control and the treatment state of each vector element have no, this program flow control method can not stop search after searching character, just can stop search after finishing but need compare all vector datas.
As shown in Figure 1, the program flow control system of prior art comprises gets finger unit, vector data processing unit and program flow control module, gets to refer to that the unit links to each other with vector data processing unit, program flow control module respectively.Get and refer to that the unit is used to obtain the program flow address of program flow control module output, and the vector data operational order is provided, the program flow steering order is provided for the program flow control module for the vector data processing unit; The vector data processing unit comprise one or more can execute vector the arithmetic element of instruction, be used to carry out and get the vector data operational order that refers to that the unit provides; The program flow control module is deciphered the program flow steering order of carrying out, and generating routine flow control flag and program flow address also send to and get the finger unit.But; Because it is independent each other during each arithmetic element execute vector data manipulation instruction of vector data processing unit; For example when carrying out above-mentioned search for character; Must be after all arithmetic element computings finish, the program flow control module just can be carried out new program flow, and the scalar program current control can not effectively be handled the algorithm relevant with the vector data treatment state; Can not in processing procedure, flow by reprogramming, have the problem that the vector data processing time is long, the deal with data amount is big, data-handling efficiency is low.
Summary of the invention
The technical matters that the present invention will solve is to the problems referred to above, provide a kind of can be in processing procedure reprogramming stream, practice thrift the vector data processing time, reduce the deal with data amount, the program flow control method and the system that are used for vector processor that data-handling efficiency is high.
In order to solve the problems of the technologies described above; The technical scheme that the present invention adopts is: a kind of program flow control method that is used for vector processor, and implementation step is following: the vector data processing unit of vector processor is output vector data processing state when executing any vector instruction sequence; The program flow control module of vector processor obtains said vector data treatment state, changes address and program flow change sign according to said vector data treatment state generator program stream; Getting of vector processor refers to that the unit changes sign according to program flow and begins to obtain instruction in proper order from program flow change address, and the vector data processing unit is exported in the instruction that will get access to.
Be used for the further improvement of the program flow control method of vector processor as the present invention: said program flow control module comprises according to the detailed step that vector data treatment state generator program stream changes address and program flow change sign: at first current program flow steering order is deciphered; The triggering state of the present procedure flow control instructions that said vector data treatment state and said decoding are obtained compares, if mate then program flow control module generator program stream changes the address changes with program flow and indicate.
The present invention also provides a kind of program flow control system that is used for vector processor; Comprise getting and refer to unit, vector data processing unit and program flow control module; Said vector data processing unit comprises the state generation unit that is used to generate the vector data treatment state; The output terminal of said state generation unit links to each other with said program flow control module; Output vector data processing state was given the program flow control module when said state generation unit executed any vector instruction sequence at the vector data processing unit, and said program flow control module changes address and program flow according to said vector data treatment state generator program stream and changes and indicate and export to and gets the finger unit; Said getting refers to that the unit changes sign according to said program flow and begins to obtain instruction in proper order from program flow change address, and the vector data processing unit is exported in the instruction that will get access to.
Be used for the further improvement of the program flow control system of vector processor as the present invention: said program flow control module comprises the program flow steering order processing unit that is used for the program flow steering order is deciphered, be used in real time changing the Vector Processing state processing unit that address and program flow change sign according to decode results generating routine stream; Said program flow steering order processing unit refers to that the unit links to each other with getting; The input end of said Vector Processing state processing unit links to each other with program flow steering order processing unit, state generation unit respectively; The output terminal of said Vector Processing state processing unit refers to that the unit links to each other with getting; Said Vector Processing state processing unit compares the triggering state of the present procedure flow control instructions that the vector data treatment state of state generation unit output and the decoding of said program flow steering order processing unit obtain, and change indicates and exports to and gets the finger unit with program flow if coupling then said program flow control module generator program stream change the address.
The program flow control method that the present invention is used for vector processor has following advantage: the real-time output vector data processing of vector data processing unit of the present invention state; The program flow control module obtains said vector data treatment state; Change sign according to said vector data treatment state generator program stream; Get and refer to that change indicates according to program flow in the unit, change the address from program flow and begin to obtain instruction in proper order, and the vector data processing unit is exported in the instruction that will get access to; Therefore the present invention can flow by reprogramming in processing procedure, the advantage that have the saving vector data processing time, reduce the deal with data amount, data-handling efficiency is high.
The present invention is used for the program flow control system of vector processor owing to have the corresponding structure of program flow control method that is used for vector processor with the present invention, therefore also should have the corresponding advantage of program flow control method that the present invention is used for vector processor.
Description of drawings
Fig. 1 is the program flow control method synoptic diagram of prior art.
Fig. 2 is the framed structure synoptic diagram of the embodiment of the invention.
Fig. 3 is a vector data treatment state synoptic diagram carrying out the BRVNZ instruction in the embodiment of the invention.
Fig. 4 is another vector data treatment state synoptic diagram of carrying out the BRVNZ instruction in the embodiment of the invention.
Fig. 5 is a vector data treatment state synoptic diagram carrying out the BRVZ instruction in the embodiment of the invention.
Fig. 6 is another vector data treatment state synoptic diagram of carrying out the BRVZ instruction in the embodiment of the invention.
Marginal data: 1, get the finger unit; 2, vector data processing unit; 21, state generation unit; 3, program flow control module; 31, program flow steering order processing unit; 32, Vector Processing state processing unit.
Embodiment
As shown in Figure 2, the implementation step of program flow control method that present embodiment is used for vector processor is following: the vector data processing unit of vector processor is output vector data processing state when executing any vector instruction sequence; The program flow control module of vector processor obtains the vector data treatment state, changes address and program flow change sign according to vector data treatment state generator program stream; Getting of vector processor refers to that the unit changes sign according to program flow and begins to obtain instruction in proper order from program flow change address, and the vector data processing unit is exported in the instruction that will get access to.
In the present embodiment; The program flow control module comprises according to the detailed step that vector data treatment state generator program stream changes address and program flow change sign: at first current program flow steering order is deciphered; Vector data treatment state and the triggering state of deciphering the present procedure flow control instructions that obtains are compared, if mate then program flow control module generator program stream change address and program flow change sign.
As shown in Figure 2; The program flow control system that present embodiment is used for vector processor comprises getting and refers to unit 1, vector data processing unit 2 and program flow control module 3; Vector data processing unit 2 comprises the state generation unit 21 that is used to generate the vector data treatment state; The output terminal of state generation unit 21 links to each other with program flow control module 3; Output vector data processing state was given program flow control module 3 when state generation unit 21 executed any vector instruction sequence at vector data processing unit 2, and program flow control module 3 changes the address according to vector data treatment state generator program stream and changes sign with program flow and export to and gets finger unit 1; Get finger unit 1 and begin to obtain instruction in proper order from program flow change address, and vector data processing unit 2 is exported in the instruction that will get access to according to program flow change sign.When the complete a certain vector instruction sequence of vector data processing unit 2; State generation unit 21 can produce the vector data treatment state; 3 of program flow control modules are deciphered the program flow steering order, and generating routine flow control instructions type information and program flow address produce sign according to program flow steering order type information and vector data state then and whether carry out the information that program flow changes; Get finger unit 1 and draw together program flow address and the program flow change information that receives program flow control module 3; If program flow changes sign and changes, then begin order and obtain instruction, and vector data processing unit 2 is exported in the instruction that will get access to from program flow change address.
In the present embodiment; Program flow control module 3 comprises the program flow steering order processing unit 31 that is used for the program flow steering order is deciphered, be used in real time changing the Vector Processing state processing unit 32 that address and program flow change sign according to decode results generating routine stream; Program flow steering order processing unit 31 refers to that unit 1 links to each other with getting; The input end of Vector Processing state processing unit 32 links to each other with program flow steering order processing unit 31, state generation unit 21 respectively; The output terminal of Vector Processing state processing unit 32 refers to that unit 1 links to each other with getting; Vector Processing state processing unit 32 compares the triggering state of the present procedure flow control instructions that the vector data treatment state of state generation unit 21 output and 31 decodings of program flow steering order processing unit obtain, if mate then program flow control module 3 generator programs stream changes address and program flow changes and indicate and export to and get finger unit 1.In the present embodiment; Program flow changes sign and realizes control program stream through generating effective status and disarmed state; If program flow changes sign effectively; Then get finger unit 1 and change address switchover to new program flow, thereby realize the real-time control of program flow, reduce the deal with data of microprocessor, the efficient of raising processor according to program flow.
Be that BRVNZ instructs the program flow controlling mechanism that present embodiment is described with the vector data operational order below.The semanteme of BRVNZ instruction is that the triggering state is 1 o'clock generation branch entirely, branch promptly takes place when the vector data treatment state is 1 entirely carry out redirect, otherwise redirect does not take place.As shown in Figure 3; Vector data processing unit 2 is in carrying out the BRVNZ instruction process; All zone bits in the vector data treatment state all are 1; Because the triggering state is 1 entirely, vector data treatment state and triggering state are complementary, and the program flow of Vector Processing state processing unit 32 outputs changes sign effectively; Obtained and still untapped vector data operational order before getting 1 calcellation of finger unit, and changed the new program flow of address execution according to the program flow of program flow steering order processing unit 31 outputs.As shown in Figure 4; All zone bits in the vector data treatment state are not all to be 1; Wherein the 5th is 0; Vector data treatment state and triggering state do not match, and it is invalid that the program flow that Vector Processing state processing unit 32 is exported changes sign, get to refer to that unit 1 continues execution and obtained and still untapped vector data operational order.
Be that BRVZ instructs the program flow controlling mechanism that present embodiment is described with the vector data operational order below.The semanteme of BRVZ instruction is that the triggering state is 0 o'clock generation branch entirely, branch promptly takes place when the vector data treatment state is 0 entirely carry out redirect, otherwise redirect does not take place.As shown in Figure 5; Vector data processing unit 2 is in carrying out the BRVZ instruction process; All zone bits in the vector data treatment state all are 0; Because the triggering state is 0 entirely, vector data treatment state and triggering state are complementary, and the program flow of Vector Processing state processing unit 32 outputs changes sign effectively; Obtained and still untapped vector data operational order before getting 1 calcellation of finger unit, and changed the new program flow of address execution according to the program flow of program flow steering order processing unit 31 outputs.As shown in Figure 6; All zone bits in the vector data treatment state are not all to be 0; Wherein the 4th is 1; Vector data treatment state and triggering state do not match, and it is invalid that the program flow that Vector Processing state processing unit 32 is exported changes sign, get to refer to that unit 1 continues execution and obtained and still untapped vector data operational order.
The above only is a preferred implementation of the present invention, and protection scope of the present invention also not only is confined to the foregoing description, and all technical schemes that belongs under the thinking of the present invention all belong to protection scope of the present invention.Should be pointed out that for those skilled in the art in the some improvement and the retouching that do not break away under the principle of the invention prerequisite, these improvement and retouching also should be regarded as protection scope of the present invention.
Claims (4)
1. program flow control method that is used for vector processor is characterized in that implementation step is following: the vector data processing unit of vector processor is output vector data processing state when executing any vector instruction sequence; The program flow control module of vector processor obtains said vector data treatment state, changes address and program flow change sign according to said vector data treatment state generator program stream; Getting of vector processor refers to that the unit changes sign according to program flow and begins to obtain instruction in proper order from program flow change address, and the vector data processing unit is exported in the instruction that will get access to.
2. the program flow control method that is used for vector processor according to claim 1; It is characterized in that; Said program flow control module comprises according to the detailed step that vector data treatment state generator program stream changes address and program flow change sign: at first current program flow steering order is deciphered; The triggering state of the present procedure flow control instructions that said vector data treatment state and said decoding are obtained compares, if mate then program flow control module generator program stream changes the address changes with program flow and indicate.
3. program flow control system that is used for vector processor; Comprise getting and refer to unit (1), vector data processing unit (2) and program flow control module (3); It is characterized in that: said vector data processing unit (2) comprises the state generation unit (21) that is used to generate the vector data treatment state; The output terminal of said state generation unit (21) links to each other with said program flow control module (3); Output vector data processing state was given program flow control module (3) when said state generation unit (21) executed any vector instruction sequence at vector data processing unit (2), and said program flow control module (3) changes the address according to said vector data treatment state generator program stream and changes sign with program flow and export to and gets finger unit (1); Said getting refers to that unit (1) changes sign according to said program flow and begins to obtain instruction in proper order from program flow change address, and vector data processing unit (2) is exported in the instruction that will get access to.
4. the program flow control system that is used for vector processor according to claim 3; It is characterized in that: said program flow control module (3) comprises the program flow steering order processing unit (31) that is used for the program flow steering order is deciphered, be used in real time changing the Vector Processing state processing unit (32) that address and program flow change sign according to decode results generating routine stream; Said program flow steering order processing unit (31) refers to that unit (1) links to each other with getting; The input end of said Vector Processing state processing unit (32) links to each other with program flow steering order processing unit (31), state generation unit (21) respectively; The output terminal of said Vector Processing state processing unit (32) refers to that unit (1) links to each other with getting; Said Vector Processing state processing unit (32) compares the triggering state of the present procedure flow control instructions that the vector data treatment state of state generation unit (21) output and said program flow steering order processing unit (31) decoding obtain, and changes and indicates and export to and get finger unit (1) if coupling then said program flow control module (3) generator program stream change address and program flow.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109313552A (en) * | 2016-07-27 | 2019-02-05 | 英特尔公司 | The system and method compared for multiplexing vectors |
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| US5418973A (en) * | 1992-06-22 | 1995-05-23 | Digital Equipment Corporation | Digital computer system with cache controller coordinating both vector and scalar operations |
| CN1973260A (en) * | 2004-03-31 | 2007-05-30 | 艾色拉公司 | Apparatus and method for asymmetric dual path processing |
| CN101986263A (en) * | 2010-11-25 | 2011-03-16 | 中国人民解放军国防科学技术大学 | Method and microprocessor for supporting single instruction stream and multi-instruction stream dynamic switching execution |
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Patent Citations (4)
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|---|---|---|---|---|
| EP0333365A2 (en) * | 1988-03-18 | 1989-09-20 | Digital Equipment Corporation | Method and apparatus for handling asynchronous memory management exceptions by a vector processor |
| US5418973A (en) * | 1992-06-22 | 1995-05-23 | Digital Equipment Corporation | Digital computer system with cache controller coordinating both vector and scalar operations |
| CN1973260A (en) * | 2004-03-31 | 2007-05-30 | 艾色拉公司 | Apparatus and method for asymmetric dual path processing |
| CN101986263A (en) * | 2010-11-25 | 2011-03-16 | 中国人民解放军国防科学技术大学 | Method and microprocessor for supporting single instruction stream and multi-instruction stream dynamic switching execution |
Cited By (1)
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| CN109313552A (en) * | 2016-07-27 | 2019-02-05 | 英特尔公司 | The system and method compared for multiplexing vectors |
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