CN102484078B - 封装结构 - Google Patents

封装结构 Download PDF

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Publication number
CN102484078B
CN102484078B CN200980161160.1A CN200980161160A CN102484078B CN 102484078 B CN102484078 B CN 102484078B CN 200980161160 A CN200980161160 A CN 200980161160A CN 102484078 B CN102484078 B CN 102484078B
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Prior art keywords
protective layer
opening
projection
encapsulating structure
semiconductor element
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CN200980161160.1A
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CN102484078A (zh
Inventor
周辉星
王志坚
罗基广
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Advanpack Solutions Pte Ltd
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Advanpack Solutions Pte Ltd
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Abstract

本发明公开一种封装结构。封装结构包括一半导体元件、一第一保护层、一第二保护层及至少一导电凸块。半导体元件具有至少一接垫。第一保护层设置于半导体元件上并暴露接垫。第二保护层设置于第一保护层上，且第二保护层具有至少一第一开口及至少一第二开口。第一开口暴露出接垫的部分表面。第二开口暴露出第一保护层的部分表面。导电凸块相对接垫设置于第二保护层上，且此些导电凸块通过此些第一开口耦接于接垫。

Description

封装结构
技术领域
本发明涉及一种封装结构，且特别是涉及具有第二保护层的封装结构。
背景技术
请参照图1，其绘示传统具有二次钝化层的封装结构的示意图。一般的封装结构10，包括一半导体元件(Semiconductor device)12、一钝化层14、一二次钝化层16、数个焊料凸块18、基板20及一封胶22。半导体元件12的表面具有数个接垫12a，用以作为电连接的端点。半导体元件12的表面更覆盖有具保护功能的一钝化层14(passivation layer)，且此钝化层14暴露部分的接垫12a。
由于一般钝化层14具有较薄的厚度，容易受到应力作用而发生破裂的现象。因此，近年来业界发展出一种于钝化层14上再形成二次钝化层(repassivation layer)16的封装结构10，以避免钝化层14破裂导致品质下降的问题。焊料凸块18则经由暴露出的部分接垫12a连接半导体元件12与基板20。封胶22则填充于基板20与二次钝化层16之间，且包覆数个焊料凸块18。
然而，由于接垫12a的面积随着封装体积缩小也已低于75微米(micron)，而此种由钝化层与二次钝化层16堆叠的结构更使得所暴露出的接垫12a的面积减少。因此，焊料凸块18与接垫12a接触的面积也因二次钝化层而缩小。然而，焊料凸块18与接垫12a间的应力会因接触的面积变小而变大，而无法通过后续可信赖测试(如热循环)时。也就是焊料凸块18与接垫12a之间会因应力变大而使彼此间的结合力降低，焊料凸块18便无法与接垫12a紧密接合。此外，由于二次钝化层16的材质较软与封胶22的结合力也较低，而使二次钝化层16无法稳固地与封胶22或焊料凸块18接合，以致于半导体元件12无法稳定地固定于基板20上。
发明内容
本发明的目的在于提供一种封装结构，通过增加封胶及导电凸块两者与第一保护层耦接的面积，以使封胶及电凸块两者与半导体元件间的结合力增加，而使半导体元件牢固的固定于基板上。
根据本发明的一观点，提出一种封装结构，且封装结构包括一半导体元件、一第一保护层、一第二保护层及至少一导电凸块。半导体元件具有至少一接垫。第一保护层设置于半导体元件上并暴露接垫。第二保护层设置于第一保护层上，且第二保护层具有至少一第一开口及至少一第二开口。第一开口暴露出接垫的部分表面。第二开口暴露出第一保护层的部分表面。导电凸块相对接垫设置于第二保护层上，且此些导电凸块通过此些第一开口耦接于接垫。
根据本发明的一观点，提出另一种封装结构，封装结构，包括一半导体元件、一保护层、数个凸块以及至少一导电凸块。半导体元件具有至少一个接垫。保护层设置于半导体元件上并暴露出该接垫的部分表面。数个凸块彼此分隔设置于保护层上，以暴露出部分的保护层及接垫。至少一导电凸块相对接垫设置于此些凸块及部分的保护层上，且此些导电凸块耦接于接垫。
为让本发明的上述内容能更明显易懂，下文特举较佳实施例，并配合所附附图，作详细说明如下：
附图说明
图1绘示传统具有二次钝化层的封装结构的示意图；
图2绘示依照本发明第一实施例的封装结构的侧视图；
图3绘示依照图2中封装结构的第二保护层的俯视图；
图4绘示本发明第二实施例的封装结构的侧视图；
图5绘示依照图4中封装结构的第二保护层的俯视图；
图6绘示本发明第三实施例的封装结构的侧视图；
图7绘示依照图6中封装结构的俯视图；
图8绘示本发明第四实施例的封装结构的侧视图；
图9绘示依照图8中封装结构的俯视图；
图10绘示依照本发明第五实施例的封装结构的侧视图；
图11绘示依照图10的封装结构的导电凸块的上视图；
图12绘示本发明第六实施例的封装结构的侧视图；以及
图13绘示依照图12中封装结构的保护层及凸块的上视图。
主要元件符号说明
10、100、200、300、400、500、600：封装结构
12、110、610：半导体元件
12a、110a、610a：接垫
14：钝化层
16：二次钝化层
18：焊料凸块
20、150、650：基板
22、160、460、560、660：封胶
120：第一保护层
120a、620a：开口
130、230、330、430、530：第二保护层
130a、230a、330a、430a、530a：第一开口
130b、230b、330b、430b、530b：第二开口
140、340、440、540、640：导电凸块
620：保护层
630：凸块
630a：开口
具体实施方式
第一实施例
请参照图2，其绘示依照本发明第一实施例的封装结构的侧视图。封装结构100包括一半导体元件110、一第一保护层120、一第二保护层130以及至少一导电凸块140。半导体元件(semiconductor device)110具有至少一接垫110a。第一保护层120设置于半导体元件110上，并暴露接垫110a。第二保护层130设置于第一保护层120上，且第二保护层130具有至少一第一开口130a及至少一第二开口130b。第一开口130a暴露出接垫110a的部分表面。第二开口130b暴露出第一保护层120的部分表面。导电凸块140相对接垫110a设置于第二保护层130上，且此些导电凸块140通过第一开口130a耦接于接垫110a。在此，为了方便后续实施例的说明，以具有二个接垫110a的半导体元件110及二个导电凸块140作说明。
在本实施例中，半导体元件110例如为一晶片，且此半导体元件110具有数个接垫110a。第一保护层120设置于此半导体元件110上，此第一保护层120具有一开口120a且此开口120a曝露出数个接垫110a的部分表面。第二保护层130设置于第一保护层120上，用以缓冲第一保护层120所受的应力。此外，第二保护层130对应接垫110a具有数个第一开口130a，并曝露出数个接垫110a的部分表面。此外，第二保护层130在本实施例中具有一第二开口130b，且位于导电凸块140外，并暴露出第一保护层120的部分表面。
在本实施例中，第一保护层120的厚度例如小于2微米(μm)，第二保护层130的厚度例如大于2微米(μm)，且第一保护层120的材料与第二保护层130的材料不同，而第一保护层120的材料硬度实质上大于第二保护层130的材料硬度。第一保护层120的材料例如选自于硅氮化物(SiyNx)及硅氧化物(SiOX)群组，较常见的有四氮化三硅(Si3N4)或二氧化硅(SiO2)。且第二保护层130的材料较佳地为一聚合物，常见的有苯并环丁烷(benzocyclobutane，BCB)或聚亚醯胺(poly-imide，PI)等。
本实施例的封装结构100较佳地更包括一基板150及一封胶160。基板150通过此些导电凸块140与半导体元件110接合。封胶160填充于基板150与第一保护层120之间，封胶160包覆导电凸块140且通过第二开口130b与第一保护层120耦接。由于第二保护层130的材料硬度较小，所以封胶160与第二保护层130的结合力较弱。故，封胶160通过第二开口130b与第一保护层120耦接时，便会增加封胶160固定半导体元件110的结合力。如此一来，便能使半导体元件110稳固地与基板150结合。在本实施例中，基板150也可为导线架，然而并不限定基板150为导线架，也可为玻璃基板、硅基板或其他材质的基板。
请参照图3，其绘示依照图2中封装结构的第二保护层的俯视图。此处，为清楚标示第一开口130a及第二开口130b的位置而省略绘制部分元件，以利后续说明。由于，第二保护层130为了缓冲第一保护层120所受的应力，且封胶160通过第二开口130b与第一保护层120耦接以增强封胶160固定半导体元件110的结合力。为能同时达成上述的功效，本实施例的第二保护层130的第一开口130a的面积与第二开口130b的面积的总合实质上大于第一保护层120的开口120a，较佳的第二开口130b的面积与半导体元件110的面积的比值实质上界于20％～99％之间。也就是说，在比值间适当的增加与第一保护层120耦接的面积，便能使基板150稳固地接合于半导体元件110上。此外，如图2所示，本实施例的第二开口130b设置于二个导电凸块140间，实际上本实施例的第二开口130b仅需位于导电凸块外，以使封胶160可通过第二开口130b与第一保护层130耦接以增加彼此的结合力。故在此不需限定其第二开口130b的配置位置及形状。然熟知此技术者均可明了本发明的导电凸块140与接垫110a的配置方法并不局限在此。
第二实施例
本实施例所揭示封装结构，其与第一实施例的封装结构不同之处，主要在于第二保护层230的第二开口230b的数量，其余相同之处并不再赘述。请参照图4，其绘示本发明第二实施例的封装结构的侧视图。在本实施例中，第二保护层230具有数个第一开口230a及数个位于导电凸块140外的第二开口230b。
其中，第二保护层230的数个第一开口230a暴露出接垫110a的部分表面。数个第二开口230b曝露出部分的第一保护层120表面，而封胶160通过数个第二开口230b与第一保护层120耦接，以增强封胶160固定半导体元件110的结合力。
接着，请参照图5，其绘示依照图4中封装结构的第二保护层的俯视图。相同地，为清楚标示第二保护层230而省略绘制部部分元件，以利后续说明。在本实施例中，第二保护层230具有数个第二开口230b，且此些第二开口230b以矩阵式排列。同于第一实施例，为使第二保护层230能有效缓冲第一保护层120所受的应力，且封胶160能同时通过第二开口230b与第一保护层120耦接以增加固定的结合力，本实施例的第二保护层230的第一开口230a的面积与第二开口230b的面积的总合实质上大于第一保护层120的开口120a，较佳的第二开口230b的面积与半导体元件110的面积的比值较佳地界于20％～99％之间。然而本实施例的第二开口230b除矩阵式排列的方法外也可以其他方式排列，如交错式排列。故熟知此技术者均可明了本实施例的第二开口230b的排列方法并不限定于矩阵式排列。
第三实施例
本实施例所揭示的封装结构300，其与第一实施例的封装结构100不同之处，主要在于第二保护层330的第二开口330b的位置，其余相同之处并不再赘述。
请参照图6，其绘示本发明第三实施例的封装结构的侧视图。在本实施例中，第二保护层330具有位于导电凸块340下的第二开口330b，且此第二开口330b暴露出第一保护层120的部分表面。导电凸块340相对接垫110a设置于第二保护层330上，且此些导电凸块340通过第一开口330a耦接于接垫110a，并通过第二开口330b与第一保护层120耦接。如此一来，便能有效增加导电凸块340与半导体元件110之间的结合力，以使半导体元件110能稳定的固定于基板150上。
接着，请参照图7，其绘示依照图6中封装结构的俯视图。相同地，为清楚标示第二保护层330而省略绘制封装结构300的部分元件，以利后续说明。在本实施例中，第二保护层330具有一第二开口330b位于导电凸块下340。此外，为使第二保护层330能有效缓冲第一保护层120所受的应力，且导电凸块340能同时通过第二开口330b与第一保护层120耦接以增加固定的结合力。故本实施例的第二保护层330的第一开口330a的面积与第二开口330b的面积的总合实质上大于第一保护层120的开口120a，较佳的第二开口330b的面积与半导体元件110的面积的比值较佳地界于20％～99％之间。此外，本实施例的第二保护层330覆盖于第一保护层120上，除此之外，第二保护层330也可以岛状设置于第一保护层120上。另外，第二开口330b除可为圆型开口外，也可为方型开口等型状。故熟知此技艺者均可明了本实施例的第二保护层330并不限定其设置的形状以及第二开口330b的形状及大小。
第四实施例
本实施例所揭示封装结构400，其与第三实施例的封装结构300不同之处，主要在于第二保护层430的第二开口430b的数量，其余相同之处并不再赘述。
请参照图8，其绘示本发明第四实施例的封装结构的侧视图。在本实施例中，第二保护层430具有位数个导电凸块440下的第二开口430b，且此第二开口430b暴露出第一保护层120的部分表面。导电凸块440相对接垫110a设置于第二保护层120上，且此些导电凸块440通过第一开口430a耦接于接垫110a，并通过数个第二开口430b与第一保护层120耦接。如此一来，便能有效增加导电凸块440与半导体元件110之间的结合力，以使半导体元件110能稳定的固定于基板150上。
接着，请参照图9，其绘示依照图8中封装结构的俯视图。相同地，为清楚标示第二保护层430而省略绘制封装结构400的部分元件，以利后续说明。本实施例的第二保护层430以岛状设置于第一保护层120上。故导电凸块440并非完全座落于第二保护层430上，而是局部座落于第二保护层430上且局部座落于第一保护层120上。如此一来，封胶460便能直接与第一保护层120耦接，也能加强基板150与半导体元件110间的结合力。
此外，第二保护层430具有数个第二开口430b位于导电凸块440下，且此些第二开口430b例如以矩阵式排列。如此一来，导电凸块440可通过数个第二开口430b与第一保护层120耦接，以增加导电凸块440与半导体元件110之间的结合力，以使半导体元件110稳固地固定于基板150上。此外，在本实施例中，一岛状的第二保护层430例如同时设置数个导电凸块440，然而一岛状的第二保护层430也可仅设置一导电凸块440。另外，本实施例的导电凸块440并非完全座落于第二保护层430上，然不限于此，导电凸块440也可完全座落于岛状的第二保护层430上。
相同地，为使第二保护层430能有效缓冲第一保护层120所受的应力，且导电凸块460能同时通过第二开口430b与第一保护层120耦接以增加固定的结合力，本实施例的第二保护层430的第一开口430a的面积与第二开口430b的面积的总合实质上大于第一保护层120的开口120a，较佳的第二开口430b的面积与半导体元件110的面积的比值较佳地界于20％～99％之间。
然而，对于熟知此项技术的人士而言，皆可明了本发明并不限于上述实施方式。在本实施例中，第二保护层430如图9以岛状设置于第一保护层120上，也可如图7的第二保护层330般平铺覆盖于第一保护层120上。此外，第二保护层430的第二开口430b于本实施例以矩阵型排列，也可以非矩阵型排列，如交错型或间隔型。也就是说，第二保护层430及其开口430b视实际应用设置，在此并不限定其第二保护层430的所设置的形状，也不限定其第二开口430b的设置位置、数量及开口形状。
第五实施例
在本实施例所揭示的封装结构500中，其与第四实施例的不同之处，主要在于第二保护层530的第二开口530b的位置，其余相同之处并不再赘述。
请参照图10，其绘示依照本发明第五实施例的封装结构的侧视图。在本实施例中，第二保护层530具有至少二第二开口530b，其中的一第二开口530b位于导电凸块540外，其中的一第二开口530b位于导电凸块540的下方。如此一来，封胶560及导电凸块540两者可经由第二开口530b与第一保护层120耦接，而使半导体元件110稳定的固定于基板上。
请同时参照图10及图11，图11是图10的封装结构的导电凸块的上视图。相同地，为清楚标示导电凸块540在图11中则省略绘制封装结构500的部分元件，以利后续说明。在本实施例中，第二保护层530具有数个第二开口530b，且以矩阵式排列，其中部分的第二开口530b位于导电凸块540下，部分的第二开口530b位于导电凸块540外。此外，导电凸块540于本实施例以交错式的方式排列，然而并不限于此种排列方法，也可以其他的方式排列。
相同地，为使第二保护层530能同时有效缓冲第一保护层120所受的应力，且导电凸块540及封胶560能通过第二开口530b与第一保护层120耦接以增加固定的结合力，本实施例的第二保护层530的第一开口530a的面积与第二开口530b的面积的总合实质上大于第一保护层120的开口120a，较佳的第二开口530b的面积与半导体元件110的面积的比值较佳地界于20％～99％之间。
此外，本实施例的第二保护层530覆盖于第一保护层120上，除此之外，第二保护层530也可以岛状设置于第一保护层120上。另外，第二开口530b除可为圆型开口外，也可为方型开口等型状。故熟知此技术者均可明了本实施例的第二保护层530并不限定其设置的形状以及第二开口530b的形状及大小。
第六实施例
在本实施例中所揭示的封装结构600，其与上述实施例的不同之处，主要在于以设置数个凸块630做为第二保护层，其余之处并不再赘述。
请参照图12，其绘示本发明第六实施例的封装结构的侧视图。封装结构600包括一半导体元件610、一保护层620、数个凸块630以及至少一导电凸块640。半导体元件610具有至少一个接垫610a。保护层620设置于半导体元件610上并暴露出接垫610a的部分表面。数个凸块630彼此分隔设置于保护层620上，以暴露出部分的保护层620及接垫610a。至少一导电凸块640相对接垫610a设置于此些凸块630及部分的保护层620上，且此些导电凸块640耦接于接垫610a。于本实施例中，设置凸块630于保护层620上用以缓冲保护层620所受的应力。此外，位于导电凸块640下的凸块630间更具有一开口630a，以使导电凸块通过此开口630a与接垫610a电连接。凸块630彼此分隔设置于保护层620上，故可裸露出保护层620的部分表面。
在本实施例中，保护层620的厚度例如小于2微米(μm)，且凸块630的厚度例如大于2微米(μm)，且保护层620的材料与凸块630的材料不同，且保护层620的材料硬度实质上大于凸块630的材料硬度。保护层620的材料为硅氮化物(SiNx)，且凸块630的材料较佳地为一聚合物，常见的有苯并环丁烷(benzocyclobutane，BCB)或聚亚醯胺(poly-imide，PI)等。
在本实施例中，封装基板600更包括一基板650及一封胶660。基板650通过此些导电凸块640与半导体元件610接合。封胶660填充于基板650与保护层620之间，封胶660包覆此些导电凸块640及此些凸块630。由于凸块630的材料硬度较小，所以封胶660及导电凸块640与凸块630的结合力较弱。故，当封胶660与导电凸块640同时与凸块630及保护层620耦接时，便会增强封胶660与导电凸块640固定半导体元件610的结合力。如此一来，便能使半导体元件610稳固地固定于基板650上。
此外，请参照图13，其绘示依照图12中封装结构的保护层及凸块的上视图。此处，为清楚标示凸块630的配置而省略绘制封装结构600的部分元件，以利后续说明。由于，此些凸块630为了缓中保护层620所受的应力而设置，在本实施例未设置凸块630的面积实质上略大于保护层620的开口620a，较佳地此些凸块630占半导体元件610的面积与半导体元件610的面积的比值实质上界于1％～80％之间。
此外，在本实施例中，凸块630以矩阵式排列在保护层上，实际上凸块630的排列设置方法并不限定于此，也可以交错式排列等排列方法。再者，本实施例的凸块630a例如为岛状结构及圆形凸点也可为方形凸块，故熟悉此技术者明了并不限定于此。
本发明上述实施例所揭露的封装结构，是增加导电凸块及/或者封胶与第一保护层耦接的面积，以增加导电凸块及/或者封胶与半导体元件间的结合力。如此一来，不但第二保护层或凸块能有效缓冲第一保护层的所受的应力，更能使半导体元件稳定的固定在基板上。
综上所述，虽然结合以上较佳实施例揭露了本发明，然而其并非用以限定本发明。本发明所属技术领域中熟悉此技术者，在不脱离本发明的精神和范围内，可作各种的更动与润饰。因此，本发明的保护范围应以附上的权利要求所界定的为准。

Claims (17)

1.一种封装结构，包括：
半导体元件，具有至少一接垫；
第一保护层，设置于该半导体元件上，并暴露该接垫；
第二保护层，设置于该第一保护层上，且该第二保护层具有：
至少一第一开口，暴露出该接垫；
至少一第二开口，暴露出该第一保护层；以及
至少一导电凸块，相对该接垫并设置于该第二保护层上，其中该第一开口与该第二开口位于该导电凸块的下方，该导电凸块通过该第一开口耦接于该接垫，该导电凸块通过该第二开口与该第一保护层耦接。
2.如权利要求1所述的封装结构，该封装结构还包括：
基板，通过该些导电凸块与该半导体元件接合；以及
封胶，填充于该基板与该第二保护层之间，该封胶包覆该导电凸块。
3.如权利要求1所述的封装结构，其中该至少一第二开口的数量为多个。
4.如权利要求1所述的封装结构，其中该至少一第二开口的数量为两个以上，其中之一该第二开口位于该导电凸块外，其中之另一该第二开口位于该导电凸块的下方，且该导电凸块透过该第二开口与该第一保护层耦接。
5.如权利要求4所述的封装结构，该封装结构还包括：
基板，通过该些导电凸块与该半导体元件接合；以及
封胶，填充于该基板与该第二保护层之间，该封胶包覆该导电凸块且透过该导电凸块外的该第二开口与该第一保护层耦接。
6.如权利要求5所述的封装结构，其中该第二保护层具有多个位于该导电凸块外的第二开口。
7.如权利要求1所述的封装结构，其中该第一保护层具有多个开口，该第二保护层具有多个第一开口及多个第二开口，且该些第一开口及该些第二开口的总面积实质上大于该第一保护层的开口的总面积。
8.如权利要求1所述的封装结构，其中该第一保护层的材料与该第二保护层的材料不同。
9.如权利要求1所述的封装结构，其中该第一保护层的材料硬度实质上大于该第二保护层的材料硬度。
10.如权利要求1所述的封装结构，其中该第一保护层的材料为硅氮化物(SiyNx)或硅氧化物(SiyOx)。
11.如权利要求1所述的封装结构，其中该第二保护层的材料为苯并环丁烷或聚亚醯胺。
12.一种封装结构，包括：
半导体元件，具有至少一个接垫；
保护层，设置于该半导体元件上并暴露出该接垫；
多个凸块，彼此分隔设置于该保护层上，以覆盖部分的该保护层；以及
至少一导电凸块，相对该接垫并设置于该接垫及该些凸块上，其中该导电凸块耦接于该接垫及该保护层并覆盖至少一该凸块的一部分，至少另一该凸块位于该导电凸块外。
13.如权利要求12所述的封装结构，还包括：
基板，通过该些导电凸块与该半导体元件接合；以及
封胶，填充于该基板与保护层之间，该封胶包覆该些导电凸块及该些凸块，该封胶耦接于该保护层。
14.如权利要求12所述的封装结构，其中该些凸块占该半导体元件的面积与该半导体元件的面积的比值界于1％～80％之间。
15.如权利要求12所述的封装结构，其中该些凸块的材料硬度实质上小于该保护层的材料硬度。
16.如权利要求12所述的封装结构，其中该保护层的材料为硅氮化物(SiyNx)或硅氧化物(SiyOx)。
17.如权利要求12所述的封装结构，其中该些凸块的材料为苯并环丁烷或聚亚醯胺。
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