CN102435936A - Single photon detection method and system for faults of integrated circuit - Google Patents
Single photon detection method and system for faults of integrated circuit Download PDFInfo
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- CN102435936A CN102435936A CN2011103760173A CN201110376017A CN102435936A CN 102435936 A CN102435936 A CN 102435936A CN 2011103760173 A CN2011103760173 A CN 2011103760173A CN 201110376017 A CN201110376017 A CN 201110376017A CN 102435936 A CN102435936 A CN 102435936A
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Abstract
The invention provides a single photon detection method and system for faults of an integrated circuit. According to the detection method, a set test vector is applied to a tested circuit, so that signal transition at the faults occurs, so that weak light is generated; and the weak light for the faults is detected by adopting a single photon detector. The detection system comprises a tested integrated circuit, an photon counting circuit module, a signal generator and a microcomputer, wherein the microcomputer is used for controlling the work of the whole system; and the microcomputer is also used for receiving detection data transmitted by the photon counting circuit module and comparing and analyzing the detection data with data in a database so as to realize detection and positioning of the faults in the circuit. According to the single photon detection method and system provided by the invention, various faults such as fixed faults, bridging faults, signal integrity faults and the like in the integrated circuit can be directly detected and positioned, and thereby the quality and the reliability of circuit chip products are improved.
Description
Technical field
The invention belongs to the integrated circuit testing field, relate to a kind of system and its implementation that the fault in the IC chip is detected of coming through single photon detection.
Background technology
In the production and maintenance process of integrated circuit; Test is a very important action always; In recent years along with the increase of integrated circuit scale; The problem of circuit test also is becoming increasingly acute, and the expense of test shared proportion in the product total cost is increasing, and therefore test has become the design of circuit and an important component part in the production run.
The fundamental purpose of carrying out circuit test be checking circuit whether adhere to specification or function whether normal, an important process that need carry out is the design test production method, is also referred to as test vector generating algorithm (abbreviate as test generate).Can be described as the test problem of circuit this: to a set (abbreviating the fault collection as) of fault in a given circuit-under-test and this circuit; Seek a set (abbreviating test set as) of circuit input vector sequence, make the vector in this test set can the concentrated whole faults of detection failure.
Because the purpose of test is to confirm that integrated circuit has non-fault, therefore before test, need set up the physical model of fault in the circuit.Fault typically refers to the physical imperfection of a circuit component or a circuit chip, and it can make the disabler of this element or chip, also possibly not lose efficacy.As far as circuit test, main what pay close attention to is the characteristics that fault is showed in circuit, and purpose is in order to find fault and to confirm its position, so that get rid of its influence.Characteristics in the face of the relevant stuck-at fault of the present invention, time lag fault, signal integrity fault etc. describe down.
(1) stuck-at fault (s-a-1 and s-a-0).This is that the logical value of one or more signal wire in the supposition circuit is changeless, and no matter what value the circuit input gets, and the value of this signal wire is constant.If this signal wire is fixed on the logic high, then be referred to as stuck at 1 fault, be designated as s-a-1; If this signal wire is fixed on the logic low, then be referred to as stuck at 0 fault, be designated as s-a-0.Stuck-fault model is used very generally in practical application, because the damage of element in the circuit, a part of faults such as the open circuit of line can be described with stuck-fault model more exactly.
(2) time lag fault.The time lag fault is the fault that the time delay owing to signal in the circuit changes or the edge parameter of pulse signal changes and causes.The time lag fault can cause that the sequential in the circuit makes a mistake.
(3), cause placement-and-routing's density of circuit chip to become big, and the frequency of synchronous signal is also improving constantly, thereby making the integrity issue of signal become a key factor in the circuit design process in recent years along with the development of IC design technology.After deep submicron process had been adopted in IC design, characteristic dimension was further dwindled especially, and the interconnect length in the chip but sharply increases, and this makes problems of Signal Integrity more outstanding.Signal integrity mainly is meant the quality that signal transmits on signal wire, when the signal in the circuit can arrive receiving end with sequential, duration and the voltage amplitude that requires, this circuit just had signal integrity preferably.Can not normal response or signal quality can not make the circuit long-term stable operation time when signal, problems of Signal Integrity has just appearred.Aspects such as problems of Signal Integrity mainly shows reflection, crosstalks, postpones, vibration, simultaneous switching noise and electromagnetic compatibility.By caused logic of signal integrity and sequence problem, can cause the circuit chip job insecurity; Capability error appears, even cisco unity malfunction.
To by the caused fault of the integrity issue of signal; For example; Crosstalk fault, time lag fault, echo trouble etc., the difference of they and traditional fault is: some traditional fault types are stuck-at fault, bridging fault etc. for example, and they are handled to be the permanent fault of circuit signal line or element; For example, stuck-at fault s-a-1 is directed against is that the value permanent set of a signal line is on logic high 1.And some signal integrity faults are caused by the phase mutual interference between many signal line, and depend critically upon the frequency of operation of circuit; The test vector that detects this fault is generally right by the vector that two circuit input vectors are formed.
The present invention has used some agreements and term in the elaboration of back, for the purpose of clear, explain earlier in the face of them down: (1) is also referred to as node to the signal wire in the circuit; (2) the original input (signal wire) of circuit is meant the sort signal line of in circuit, not accepting any signal of inside circuit; The original output (signal wire) of circuit is meant in the circuit and can signal be delivered to the sort signal line of measuring the circuit outside.(3) circuit input vector is a vector of forming in the input value that each original input end applied of circuit; Test vector be meant can testing circuit in the circuit input vector of certain fault; Test set is the set that several test vectors constitute.In the present invention, a main effect of test vector is that it can make the transition that signal is arranged at the fault place, and this implication with the circuit test vector of routine has difference.
Summary of the invention
The present invention is intended to overcome the deficiency that prior art exists, and a kind of single photon detection method and detection system of integrated circuit fault is provided.The present invention can to the various faults type in the circuit for example stuck-at fault, bridging fault, signal integrity fault etc. detect and locate, concrete technical scheme is following.
A kind of single photon detection method of integrated circuit fault comprises the steps:
(1) through circuit-under-test being applied the test vector of setting, making the transition of signal is arranged at the fault place, thereby cause producing faint luminous;
(2) adopt single-photon detector that the said Weak-luminescence of fault is surveyed;
(3) utilize microcomputer that the data in detection data and the test database are compared and analyze, realize detection and location abort situation;
(4) utilize the result of the display output circuit test of microcomputer, comprise the fault that which kind of type has taken place for which signal wire or circuit module in the circuit.
In the single photon detection method of above-mentioned integrated circuit fault, the generation method of the said test vector of step (1) comprises: at first use the circuit input vector of known determined value more than to go some faults in the testing circuit; Use mode at random to produce more than one circuit input vector subsequently, go other faults in the testing circuit; At last through the definition multi valued logic and use the architectural characteristic of circuit-under-test, produce all the other test vectors of fault to be detected not that are used for testing circuit.
In the single photon detection method of above-mentioned integrated circuit fault; Step (3) comprising: utilize more tested integrated circuit of microcomputer and the non-fault integrated circuit data in the photon counting of desired location or signal wire, confirm the physical location or the out of order signal line of the type and the fault of fault in the tested integrated circuit; Said fault type comprises stuck-at fault, bridging fault and signal integrity fault.
The single photon detection method of above-mentioned integrated circuit fault in the step (3), is carried out photon counting respectively to the signal wire in signal wire in the trouble-free normal circuit and the out of order faulty circuit and is handled, and obtains photon counting separately; Numerical value through to these two kinds of photon countings compares, if inequality, judges that then fault has taken place corresponding signal lines.
In the single photon detection method of above-mentioned integrated circuit fault, step (1) also comprises before: the generation method of the corresponding test vector of the characteristics of fault type in the circuit, every kind of fault etc. is confirmed.
In the single photon detection method of above-mentioned integrated circuit fault, comprise in the said test database of step (3): the logic level of circuit structure describes the fault collection, test pattern sets of signal wire in the performance diagram, circuit of high-level behavior description (like the VHDL file), the circuit of (like gate level description), circuit, to the numerical value of the photon counting of the coherent signal line of fault type (for example stuck-at fault, bridging fault and signal integrity fault) and the result of test analysis.
The present invention also provides a kind of single photon detection system of integrated circuit fault, comprises tested integrated circuit, photon counting circuit module, signal generator and microcomputer;
Said photon counting circuit module is connected with microcomputer, is used for the photon number that the fault of testing circuit is sent;
Said signal generator is connected with microcomputer, is used to receive test vector and the corresponding data of generation that microcomputer produces, and is applied to the original input end of tested integrated circuit then;
Said microcomputer is used to control whole system operation, comprising: provide control signal to the photon counting circuit module, to realize the detection luminous to fault in the circuit; The structural information of use circuit produces the test vector of tested integrated circuit; Data in the test database that the detection data that the photon counting circuit module is sent and microcomputer are loaded with compare and analyze, and realization is to the detection and the location of abort situation.
In the single photon detection system of above-mentioned integrated circuit fault, said photon counting circuit module comprises single-photon detector, amplifying circuit, shaping circuit, comparer, frequency divider, the counter that connects in order, and counter is connected with said microcomputer.The photon that fault in the circuit is sent at first detects through avalanche photodide; Deliver to amplifying circuit then signal is carried out processing and amplifying; Carry out shaping by shaping circuit afterwards and handle, suppress the interference that background noise and various radiation bring; Select the photonic data that satisfies condition through comparer and frequency divider; Realize the counting of photon is handled by counter at last.
In the single photon detection system of above-mentioned integrated circuit fault, said single-photon detector adopts avalanche photodide, it have dark counts low with repetition rate than characteristics such as height.
In the single photon detection system of above-mentioned integrated circuit fault, communicate through pci interface between said photon counter part and the microcomputer.
Among the present invention, be a kind of microcomputer to the control of whole detection system, it is mounted with the program that total system is operated and controlled and is mounted with program and the test data file that is used for the integrated circuit fault detect; And the demonstration of carrying out faults analysis and test result is handled with output.Tested IC chip is placed on the test board, and information such as its circuit structure data file and process date file are stored in the microcomputer, to be used for the detection to the circuit fault.
Compared with prior art, the present invention has following advantage and technique effect:
The present invention is directed to the fault detect of integrated circuit, the present invention provides a kind of single photon detection system and detection method.Through circuit-under-test being applied the test vector of setting; Make the transition of signal are arranged at the fault place; Thereby cause producing faint luminous; Adopt single-photon detector that this Weak-luminescence of fault is surveyed, can realize that for example stuck-at fault, bridging fault, signal integrity fault etc. detect and locate to the various faults type in the circuit.
Description of drawings
Fig. 1 is the testing process synoptic diagram of the single photon detection system of the integrated circuit fault in the embodiment.
Fig. 2 is a kind of multi valued logic truth table that has the AND door of two inputs in the embodiment.
Fig. 3 is the concrete realization flow figure of a kind of test vector generation method in the embodiment.
Fig. 4 is the structural representation of the photon counting circuit module in the embodiment.
Embodiment
Below in conjunction with accompanying drawing practical implementation of the present invention is described further, but to those skilled in the art, foregoing has been done open fully to the present invention, therefore following content is not used in restriction enforcement of the present invention and protection domain.
As shown in Figure 1; A kind of single photon detection system of integrated circuit fault; Its testing process comprises: the generation of test vector with apply; Tested integrated circuit acceptance test vector data, single-photon detector detects luminous signal, carries out photon counting, test analysis, test data output demonstration etc. by system again.Below being divided into four major parts describes.
(1) a kind of single photon detection system of integrated circuit fault; Its implementation procedure is: the test vector that tested integrated circuit is applied setting at original input end; Make transition (saltus step) in fault place generation signals; Thereby cause producing faint luminous, come this luminous the detection, realize detection and location fault through using single-photon detector.For the fault in the energizing circuit, and cause it to send the light that can be detected by single-photon detector to a certain degree, need apply some circuit input vectors the original input end of circuit.The task that test vector generates is exactly to produce the sort circuit input vector through the structural information (being kept in the computing machine) of using circuit.After having produced this test vector; When the fault to circuit detects; Be to be sent to this vector in the signal generator, generate the corresponding data of this test vector, and be applied to the original input end of circuit by signal generator through microcomputer.
" photon counting " part is handled the photon of being caught, and removes noise, and the photon after differentiating is counted.For example, to the processing of signal wire in the circuit-under-test, implementation procedure is following: signal wire in the normal circuit and the signal wire in the faulty circuit are carried out luminous detection respectively, and obtain photon counting separately.
" test analysis " is at first the production method of the corresponding test vector of the characteristics of fault type in the circuit, every kind of fault etc. to be confirmed; Secondly, through analysis, confirm location of fault to the numerical value of photon counting.For example, the signal wire in signal wire in the trouble-free normal circuit and the out of order faulty circuit is carried out photon counting respectively handle, and obtain photon counting separately; Numerical value through to these two kinds of photon countings compares, if inequality, judges that then fault has taken place corresponding signal lines.In addition, be a kind of microcomputer to the control of whole detection system, it is mounted with the program that total system is operated and controlled, and realizes control and management to total system.
" test database " accomplished tissue, storage and the management to test data; This database has comprised all data relevant with tested integrated circuit; For example, the logic level of circuit structure is described as the performance diagram of the high-level behavior description of gate level description, circuit structure such as VHDL file, circuit, circuit in fault collection, the test pattern sets of signal wire be the numerical value of the photon counting of test set, the coherent signal line that is directed against some fault types, the result of test analysis etc." data output show " are the results of output circuit test on the display of microcomputer, and which signal wire in the explanation circuit or circuit module fault that which kind of type has taken place.
(2) to the design of the single photon detection system of integrated circuit fault, one of them main task is that the generation of circuit input vector is that test vector generates.Apply this test vector through input end, to activate fault and to make it luminous at circuit; Detect this luminously with single-photon detector, realize detection and location fault.
The invention provides a kind of generation method to this test vector.Be generated as example with test vector below, describe the implementation procedure of this method in detail the fault of crosstalking.
(2.1) when discussion is crosstalked, at first to confirm interference source and by objects interfered.Call the invasion line to interference source, it is because the logic level of self changes the sort signal line that other signal wires is exerted an influence through coupling; Being called the line of being injured by objects interfered, it is to receive the influence of other signal wires and to cause the inherent logic level to take place unusual.
The negative effect that is brought of crosstalking mainly is: the spike that causes by crosstalking, the time lag fault that causes by crosstalking.When being detected, these two kinds of situations all need a kind of circuit input vector right.For example, the spike that detection is crosstalked and caused needs to seek the circuit input vector with following characteristics: the vector that this vector is made up of two circuit input vectors is to (being made as S here
1And S
2), when putting on the original input end of circuit to this vector, with making the signal generation saltus step of invasion on the line, and fault effect is propagated into the original output terminal of circuit.
For example, to crosstalking on the caused line of being injured of positive transition of the signal of invasion on the line, promptly on the line of being injured, produce a positive pulse, this moment is not if consider sequential and under situation about simplifying most, test vector is S
1And S
2Should satisfy following condition: S
1The value of the feasible line of being injured is 0, and the value of invasion line is 0, and can be the original output terminal of the value sensitization of the line of being injured to circuit; S
2The value of the feasible line of being injured is 0, and the value of invasion line is 1, and can be the original output terminal of the value sensitization of the line of being injured to circuit.
The time lag fault that detection is crosstalked and caused needs to seek the circuit input vector with following characteristics: the vector that this vector is made up of two circuit input vectors is to (being made as S here
3And S
4), S wherein
3Being initialization vector, is the state that is used for each signal wire of initializing circuit, S
4Be to be used on some signal wires producing needed signal saltus step, exciting corresponding state-transition, and motivate corresponding time lag fault.If in circuit, there is the corresponding fault of crosstalking of this test vector, then after the original input end to circuit has applied this test vector, then in given time restriction, can detect incorrect circuit output response at the original output terminal of circuit.
(2.2) to the characteristics of the fault of crosstalking, define a kind of multi-value logic system, represent with value and time parameter and time delay etc. to signal wire in the circuit under the situation of crosstalking, for example to five kinds of values of each signal wire definition: 0,1, X, U and D.The implication of U and D is: when the value of signal wire is U, then represent this signal wire generation positive transition (0 to 1); When the value of signal wire was D, then negative saltus step (1 to 0) took place in the expression signal line; The implication of X is that the value of signal wire is arbitrarily or is indifferent to.For example, to having the AND door of two inputs, do not considering sequential and under the simplest situation, a kind of multi valued logic truth table that defines it is as shown in Figure 2.Here x
1And x
2Two inputs of expression AND door, y representes the output of AND door.
Through such definition, can be illustrated in (2.1) middle vector that defines to S with a vector respectively
1And S
2, S
3And S
4, each component value of this vector is following five values 0,1, X, among U and the D one.
(2.3) test vector to the fault of crosstalking generates, the test vector generation method that this embodiment provided, and its flow process is as shown in Figure 3.If the number of the original input signal line of circuit-under-test is n; If the set that all faults in the circuit-under-test are formed is G, promptly G is the fault collection; If the test set of circuit-under-test is T, and be changed to empty set to the initial value of T.
This embodiment produces some test vectors with following method.Step is following:
(2.3.1) produce 2n+2 following circuit input vector, and each vector is carried out fault simulation.The value that produces each component all is a circuit input vector of 0, this vector called after t
1=(0,0, * * *, 0).Use concurrency fault simulation compute vectors t
1The fault that can detect, and these faults are removed from fault collection G; If vector t
1The number of defects that can detect is more than or equal to 1, then with vector t
1Add among the set T.Similarly, the value that generates each component all is a circuit input vector of 1, this vector called after t
2=(1,1, * * *, 1); The value that generates one-component is U, the value of all the other components all be 0 following n vector (U, 0, * * *, 0), (0, U, * * *, 0), * * *, (0,0, * * *, U), they called after t successively
3, t
4, * * *, t
N+2The value that generates one-component is D, the value of all the other components all be 1 following n vector (D, 1, * * *, 1), (1, D, * * *, 1), * * *, (1,1, * * *, D), they called after t successively
N+3, t
N+4, * * *, t
2n+2To this 2n+1 vector t
2, t
3, * * *, t
2n+2, carry out the concurrency fault simulation successively, and calculate the fault that each vector can detect, and these faults are removed from fault collection G; If vector t
j(j=2,3, * * *, the number of defects that 2n+2) can detect is more than or equal to 1, then with vector t
jAdd among the set T.
(2.3.2), then produce two circuit input vectors if also have fault not to be detected among the fault collection G, and they called after L
1And L
2Here, circuit input vector (L
1Or L
2) the generation method following: the value of each original input signal line can get 0,1, X, a value among U and the D; Get 0,1 to the value of each original input signal line, X, the probability of U and D etc. is set to identical, all is 0.2; Through mode at random, confirm the value (promptly getting 0,1, X, a value among U and the D) of each original input signal line of circuit; Afterwards, by the value of each original input signal line of circuit, just constituted an input vector of circuit.
Compute vectors L
1With the Hamming distance of each vector of set among the T, and the value addition of these all Hamming distances, the Hamming distance that obtains with called after H (L
1); Similarly, compute vectors L
2With the Hamming distance of each vector of set among the T, and the value addition of these all Hamming distances, the Hamming distance that obtains with called after H (L
2).Here the Hamming distance of two vectors is numbers of component inequality between them.If H (L
1) 3H (L
2), then choose vector L
1, otherwise choose vector L
2In this way from L
1And L
2In that vector called after L of being selected
3Use concurrency fault simulation compute vectors L
3The fault that can detect, and these faults are removed from fault collection G.If vector L
3The number of defects that can detect is more than or equal to 1, then with vector L
3Add among the set T.
(2.3.3) if also have fault not to be detected among the fault collection G, then step (2.3.2) is repeated M time, M is a given in advance positive integer here.
(2.3.4) after step is as above accomplished,, then use following step to continue to produce the input vector of circuit: the activation of the fault of crosstalking and the propagation of fault effect, compatibility inspection, static timing analysis if also have fault not to be detected among the fault collection G.
(2.3.4.1) the crosstalk activation of fault.To a fault g not to be detected among the G
1, give fault g
1Related invasion line is composed setting value with the line of being injured;
(2.3.4.2) propagation of fault effect.Line carries out path sensitization to being injured; Concrete implementation procedure is following: whole paths of the original output terminal of all from the abort situation to the circuit carry out sensitization simultaneously; Make other input node of the associated gate circuit (or circuit module) on the path is got some fixed values, and fault effect is propagated at least one original output terminal of circuit.For example, to the AND door, when the value of other input end is all got fixed value 1, can fault effect be propagated; To the OR door, when the value of other input end is all got fixed value 0, can fault effect be propagated.
(2.3.4.3) compatibility inspection and time series analysis.Turn back to the input end of circuit from the output terminal of sensitization path along each gate circuit (or circuit module), in this process, each gate circuit (or circuit module) is carried out front and back to IF-THEN operation and time series analysis; Whether the logical value of respectively importing node of checking input end associated gate circuit (or circuit module) afterwards is consistent, and promptly whether front and back are contradictory.If noncontradictory, then resulting circuit input vector just is the test vector of this fault of crosstalking, and remembers that this vector is L
4, and L
4Add among the set T, use concurrency fault simulation compute vectors L then
4Other faults that can detect, and with these faults and fault g
1From fault collection G, remove; If contradictory, then explain fault g
1Can not produce the test vector that detects it, with fault g
1From fault collection G, remove.
(2.3.4.4) if also have fault not to be detected among the fault collection G; Then to another fault not to be detected among the G; Repeat step (2.3.4.1) as above; (2.3.4.2) with (2.3.4.3), be empty set until fault collection G, promptly each fault among the G has all been accomplished associative operation.
(2.4) vector among the set T that is obtained has been formed the test set of circuit-under-test, and the vector of promptly gathering among the T is exactly the test vector of fault in the testing circuit.So far whole measuring trial vector generation method finishes.
More than be generated as example with the test vector of the fault of crosstalking; The implementation procedure of test vector generation method in the single photon detection system of integrated circuit fault has been described; This method also is suitable for other fault type is carried out the generation of test vector, for example stuck-at fault, bridging fault etc.
(3) the concrete realization of " the photon counting circuit module " of the single photon detection system of integrated circuit fault of the present invention is as shown in Figure 4." photon counting circuit module " is made up of institutes such as avalanche photodide, amplifying circuit, shaping circuit, comparer, frequency divider, counters.Input end to circuit-under-test applies test vector, makes that the fault in the circuit is sent some photon signals, detects these photon signals through avalanche photodide; And deliver to amplifying circuit these signals are carried out processing and amplifying; Carry out shaping by shaping circuit then and handle, suppress the interference that background noise and various radiation bring; Select the photon signal that satisfies condition through comparer and frequency divider; Accomplish by counter at last the counting of photon is handled.
The design of counter is made up of avalanche photodide, CPLD chip and peripheral circuit thereof.The wavelength response range of the avalanche photodide that uses is 300nm-1100nm; Be sent to the data of the relevant photon that is detected in a kind of microcomputer through pci interface.The CPLD chip selects for use the EPM7128S of altera corp as core devices, utilizes VHDL language that this CPLD is programmed, and accomplishes the counting of photon and handles; The data of CPLD chip are sent in the microcomputer through pci interface, are handled by " test analysis " part of whole detection system afterwards.Here " test analysis " of total system partly, " test database " partly, " data output show " part waits the design of these three parts to realize through software, in microcomputer, move.
(4) operation of the single photon detection system of integrated circuit fault of the present invention mainly comprises the steps.
Step 1: start the microcomputer that is used for total system control, it is mounted with the program that total system is operated and controlled.
Step 2: start single-photon detector;
Step 3: apply the test vector signal for the original input end of tested integrated circuit;
Step 4: single-photon detector is acted on tested integrated circuit, i.e. a position in the alignment circuit (for example signal wire etc.), and survey the luminous of this position, carry out photon counting.
Step 5: other positions (signal wire etc.) in the integrated circuit are repeated the operation of step 3 and step 4 successively, until corresponding photon counting has all been carried out in all positions that need detect in the circuit.
Step 6: the data of more tested integrated circuit and normal integrated circuit photon counting of (or signal wire) in some positions, thus confirm the physical location or the out of order signal line of fault in the tested integrated circuit.
Claims (10)
1. the single photon detection method of an integrated circuit fault is characterized in that comprising the steps:
(1) through circuit-under-test is applied test vector, making has the transition of signal at the fault place, thereby causes producing faint luminous;
(2) adopt single-photon detector that the said Weak-luminescence of fault is surveyed;
(3) utilize microcomputer that the data in detection data and the test database are compared and analyze, realize detection and location abort situation;
(4) result that detects of the display output circuit of microcomputer comprises the fault that which kind of type has taken place for which signal wire or circuit module in the circuit.
2. the single photon detection method of integrated circuit fault according to claim 1 is characterized in that the generation method of the said test vector of step (1) comprises: at first use the circuit input vector of known determined value more than to go some faults in the testing circuit; Use mode at random to produce more than one circuit input vector subsequently, go other faults in the testing circuit; At last through the definition multi valued logic and use the architectural characteristic of circuit-under-test, produce all the other test vectors of fault to be detected not that are used for testing circuit.
3. the single photon detection method of integrated circuit fault according to claim 1; It is characterized in that step (3) comprising: utilize more tested integrated circuit of microcomputer and non-fault integrated circuit data in the photon counting of desired location or signal wire; Confirm the type of fault in the tested integrated circuit and the physical location or the out of order signal line of fault at last, said fault type comprises stuck-at fault, bridging fault and signal integrity fault.
4. the single photon detection method of integrated circuit fault according to claim 3; It is characterized in that in the step (3); Signal wire in signal wire in the trouble-free normal circuit and the out of order faulty circuit is carried out photon counting respectively handle, and obtain photon counting separately; Numerical value through to these two kinds of photon countings compares, if inequality, judges that then fault has taken place corresponding signal lines.
5. the single photon detection method of integrated circuit fault according to claim 1 is characterized in that step (1) also comprises before: the generation method to the corresponding test vector of the characteristics of fault type in the circuit, every kind of fault is confirmed.
6. the single photon detection method of integrated circuit fault according to claim 5 is characterized in that comprising in the said test database of step (3): the fault collection of signal wire in the description of circuit structure, the performance diagram of circuit, the circuit, test pattern sets, to the numerical value of the photon counting of the coherent signal line of fault type and the result of test analysis.
7. the single photon detection system of an integrated circuit fault is characterized in that comprising tested integrated circuit, photon counting circuit module, signal generator and microcomputer;
Said photon counting circuit module is connected with microcomputer, is used for the photon number that the fault of testing circuit is sent;
Said signal generator is connected with microcomputer, is used to receive test vector and the corresponding data of generation that microcomputer produces, and is applied to the original input end of tested integrated circuit then;
Said microcomputer is used to control whole system operation, comprising: provide control signal to the photon counting circuit module, to realize the detection luminous to fault in the circuit; The structural information of use circuit produces the test vector of tested integrated circuit; Data in the test database that the detection data that the photon counting circuit module is sent and microcomputer are loaded with compare and analyze, and realization is to the detection and the location of abort situation.
8. the single photon detection system of integrated circuit fault according to claim 7; It is characterized in that said photon counting circuit module comprises single-photon detector, amplifying circuit, shaping circuit, comparer, frequency divider, the counter that connects in order, counter is connected with said microcomputer.
9. the single photon detection system of integrated circuit fault according to claim 8 is characterized in that said single-photon detector adopts avalanche photodide.
10. the single photon detection system of integrated circuit fault according to claim 8 is characterized in that communicating through pci interface between said photon counter part and the microcomputer.
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| CN 201110376017 CN102435936B (en) | 2011-11-23 | 2011-11-23 | Single photon detection method and system for faults of integrated circuit |
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| CN 201110376017 CN102435936B (en) | 2011-11-23 | 2011-11-23 | Single photon detection method and system for faults of integrated circuit |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102735351A (en) * | 2012-06-27 | 2012-10-17 | 华南师范大学 | Single-photon detector circuit and detection method thereof |
| CN104515950A (en) * | 2015-01-12 | 2015-04-15 | 华南师范大学 | Built-in self-testing method and application of integrated circuit |
| CN109782142A (en) * | 2019-03-29 | 2019-05-21 | 云南电网有限责任公司电力科学研究院 | A kind of GIS partial discharge detection device and system |
| US10977469B2 (en) | 2019-03-29 | 2021-04-13 | SINO IC Technology Co., Ltd. | Halo test method for an optical chip in an integrated circuit |
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| US20050085032A1 (en) * | 2003-08-25 | 2005-04-21 | Majid Aghababazadeh | Technique for evaluating a fabrication of a die and wafer |
| CN1932859A (en) * | 2005-07-21 | 2007-03-21 | 华南师范大学 | Photon counter based on programmable logic |
| US20070170353A1 (en) * | 2006-01-26 | 2007-07-26 | Chou Dennis Y | Photoncounting methods and devices |
| CN102072774A (en) * | 2011-01-25 | 2011-05-25 | 西安交通大学 | Single-photon counting system for measuring weak luminescence of dielectric medium |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US20050085032A1 (en) * | 2003-08-25 | 2005-04-21 | Majid Aghababazadeh | Technique for evaluating a fabrication of a die and wafer |
| CN1932859A (en) * | 2005-07-21 | 2007-03-21 | 华南师范大学 | Photon counter based on programmable logic |
| US20070170353A1 (en) * | 2006-01-26 | 2007-07-26 | Chou Dennis Y | Photoncounting methods and devices |
| CN102072774A (en) * | 2011-01-25 | 2011-05-25 | 西安交通大学 | Single-photon counting system for measuring weak luminescence of dielectric medium |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102735351A (en) * | 2012-06-27 | 2012-10-17 | 华南师范大学 | Single-photon detector circuit and detection method thereof |
| CN102735351B (en) * | 2012-06-27 | 2014-05-07 | 华南师范大学 | Single-photon detector circuit and detection method thereof |
| CN104515950A (en) * | 2015-01-12 | 2015-04-15 | 华南师范大学 | Built-in self-testing method and application of integrated circuit |
| CN109782142A (en) * | 2019-03-29 | 2019-05-21 | 云南电网有限责任公司电力科学研究院 | A kind of GIS partial discharge detection device and system |
| US10977469B2 (en) | 2019-03-29 | 2021-04-13 | SINO IC Technology Co., Ltd. | Halo test method for an optical chip in an integrated circuit |
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| CN102435936B (en) | 2013-09-04 |
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