CN102403211A - Preparation method for metal silicide - Google Patents
Preparation method for metal silicide Download PDFInfo
- Publication number
- CN102403211A CN102403211A CN2010102851787A CN201010285178A CN102403211A CN 102403211 A CN102403211 A CN 102403211A CN 2010102851787 A CN2010102851787 A CN 2010102851787A CN 201010285178 A CN201010285178 A CN 201010285178A CN 102403211 A CN102403211 A CN 102403211A
- Authority
- CN
- China
- Prior art keywords
- metal silicide
- semiconductor substrate
- photoresistance
- oxide
- preparing metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Electrodes Of Semiconductors (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
The invention discloses a preparation method for metal silicide, which includes steps of firstly, covering a device region with photoresist before preparation of metal silicide, and performing wet etching for oxide and polycrystalline silicon at the edge of a semiconductor substrate by means of mixed solution of hydrofluoric acid and metric acid to remove the oxide and polycrystalline silicon, secondly, performing wet cleaning by means of SPM (sulfuric peroxide mixture) solution, thirdly, preparing a metal film on a semiconductor device in the device region and treating the metal film by means of rapid thermal annealing to form metal silicide, and fourthly, removing the metal film which is not turned into metal silicide in the reaction. Since the shape of the photoresist is uniform to that of unexposed SAB (salicide block) photoresist, the oxide and polycrystalline silicon can be removed completely without damaging the device region, particles cannot be led in during removing of the metal film which is not turned into metal silicide in the reaction, and performance of the device is improved.
Description
Technical field
The present invention relates to technical field of semiconductor device, relate in particular to a kind of method for preparing metal silicide.
Background technology
Along with the integrated level of semiconductor integrated circuit improves constantly, the characteristic size of semiconductor device is constantly dwindled, and metal silicide is also in development constantly.Metal silicide is prepared on source-drain electrode and the grid usually, is used to improve contacting between source-drain electrode and grid and the metal.When the characteristic size of device narrows down to 45nm and when following, because the restriction of live width effect, nickel platinum alloy (NiPt) has replaced metallic nickel (Ni) or metallic cobalt (Co), is used to form metal silicide.
The method of existing preparation nickel platinum silicide comprises the steps:
Semiconductor substrate is provided, wherein, has formed the grid structure and the source/drain electrode of MOS device on the said Semiconductor substrate; Wherein, said grid structure comprises gate dielectric layer, polysilicon gate and grid curb wall;
Deposit nickel platinum alloy film on said Semiconductor substrate, said nickel platinum alloy film covers said grid structure and source/drain electrode;
With the annealing (RTA, RapidThermal Anneal) that is rapidly heated of the Semiconductor substrate of said deposit nickel platinum alloy film, make said nickel platinum alloy and pasc reaction, form nickel platinum silicide;
Remove the nickel platinum alloy film that unreacted becomes nickel platinum silicide.This is because the nickel platinum alloy only and pasc reaction, does not react with oxide.
Adopting at present usually temperature to be higher than 150 ℃ sulfuric acid carries out wet etching with the mixed solution of hydrogen peroxide solution (SPM solution) and removes the nickel platinum alloy film that said unreacted becomes nickel platinum silicide; Concrete; Semiconductor substrate after the said annealing in process that is rapidly heated is put into single-chip churning cleaning machine, spray with SPM solution and remove the nickel platinum alloy film that said unreacted becomes nickel platinum silicide.
Yet, can form particle (particle) on the surface of Semiconductor substrate usually, thereby have a strong impact on the performance of semiconductor device adopting SPM solution wet etching to remove in the process of nickel platinum alloy film that unreacted becomes nickel platinum silicide.This is because in the preparation process of semiconductor device; Usually can carry out multiple physical vapour deposition (PVD; Physical Vapor Deposition) or chemical vapour deposition (CVD) (CVD, Chemical VaporDeposition), be convenient to subsequent step and on rete, form required pattern.After the photoresistance exposure on the Semiconductor substrate is intact, need the photoresistance of semiconductor substrate edge is removed, i.e. wafer side washing technology (WEE, Wafer EdgeEngineering) is polluted etching machine or Ion Implantation Equipment platform to avoid the edge photoresistance.Because the edge of Semiconductor substrate does not have the protection of photoresistance; Therefore the film of the marginal deposit of Semiconductor substrate can directly come out; For example polysilicon and CVD oxide; And said polysilicon and CVD oxide are easy to be damaged in the process that etching or ion inject, and make the edge out-of-flatness of Semiconductor substrate, thereby remove in the process of nickel platinum alloy film that said unreacted becomes nickel platinum silicide carrying out wet etching with SPM solution; Said impaired polysilicon and CVD oxide very likely rupture, and further introduce particle on the surface of Semiconductor substrate.
In order to solve the problem of in removing the process of nickel platinum alloy film that unreacted becomes nickel platinum silicide, introducing particle; A kind of improved method for preparing nickel platinum silicide has been proposed at present; Please refer to Fig. 1 and Fig. 2 A to Fig. 2 E; Wherein Fig. 1 is the method step flow chart of existing improved preparation nickel platinum silicide; Fig. 2 A to Fig. 2 E is the existing improved corresponding device profile structural representation of each step of method for preparing nickel platinum silicide, and shown in Fig. 1 and Fig. 2 A to Fig. 2 E, the existing improved method for preparing nickel platinum silicide comprises the steps:
S101, Semiconductor substrate 110 is provided, wherein, has formed the device area 120 of patterning on the said Semiconductor substrate 110, and the edge of said Semiconductor substrate 110 is deposited with polysilicon 130 and oxide 140, shown in Fig. 2 A;
S102, said Semiconductor substrate 110 is placed etching machine bench, above said Semiconductor substrate 110, be provided with and stop cover 150, the said cover 150 that stops hides said device area 120, exposes the edge of said Semiconductor substrate 110, shown in Fig. 2 B; Wherein, the said parts that stop that cover 150 carries for etching machine bench;
S103, said Semiconductor substrate 110 is carried out the dry etching first time, remove the oxide 140 at said Semiconductor substrate 110 edges; Device profile structural representation behind the dry etching is shown in Fig. 2 C for the first time;
S104, said Semiconductor substrate 110 is carried out the dry etching second time, remove the polysilicon 130 at said Semiconductor substrate 110 edges; Device profile structural representation behind the dry etching is shown in Fig. 2 D for the second time;
S105, said Semiconductor substrate 110 is shifted out said etching machine bench, and said Semiconductor substrate 110 is carried out wet-cleaned, remove surface residue, shown in Fig. 2 E;
S106, on said Semiconductor substrate deposit nickel platinum alloy film, said nickel platinum alloy film covers the grid structure and the source/drain electrode of the device in the said device area;
S107, the annealing (RTA, RapidThermal Anneal) that is rapidly heated of the Semiconductor substrate of said deposit nickel platinum alloy film is handled, made said nickel platinum alloy and pasc reaction, form nickel platinum silicide;
S108, spray to remove the nickel platinum alloy film that said unreacted becomes nickel platinum silicide with SPM solution.
Though the above-mentioned improved method for preparing nickel platinum silicide can be avoided in removing the process of nickel platinum alloy film that unreacted becomes nickel platinum silicide, introducing particle effectively, thereby improves the performance of semiconductor device.The shortcoming and defect part below yet this method exists:
1) because the film of semiconductor substrate edge deposit has polysilicon and oxide; And dry etching need adopt different etching gas to different etching things; Thereby must could remove the polysilicon and the oxide of semiconductor substrate edge deposit through two etch step; Thereby increased process complexity, improved cost;
2) stop that the size of cover and position must control accurately, make it just cover the semiconductor device zone, and expose the semiconductor substrate edge that is deposited with polysilicon and oxide; If stop the size of the size of cover greater than the semiconductor device zone, then polysilicon and oxide can not be removed fully, if stop the size of the size of cover less than the semiconductor device zone, then the device in the semiconductor device zone are caused damage, influence device performance; Thereby brought difficulty to practical operation.
Therefore, be necessary the method for existing preparation nickel platinum silicide is improved.
Summary of the invention
The object of the present invention is to provide a kind of method for preparing metal silicide, to avoid after generating metal silicide, introduce particle in the process of removal unreacted metal, thereby improve the performance of semiconductor device.
For addressing the above problem, the present invention proposes a kind of method for preparing metal silicide, and this method comprises the steps:
Semiconductor substrate is provided, wherein, formed the device area of patterning on the said Semiconductor substrate, and the edge of said Semiconductor substrate is deposited with polysilicon and oxide;
On said Semiconductor substrate, coat photoresistance, said photoresistance covers said device area, does not cover the said semiconductor substrate edge that is deposited with polysilicon and oxide;
Mixed solution with hydrofluoric acid and nitric acid is rotated injection to said semiconductor substrate edge, and said semiconductor substrate edge is carried out wet etching, removes said polysilicon and oxide;
Remove said photoresistance;
Depositing metal film on said Semiconductor substrate, said metal film cover the grid structure and the source/drain electrode of the device in the said device area;
With the Semiconductor substrate of the said depositing metal film annealing in process that is rapidly heated, make said metal film and pasc reaction, form metal silicide;
Spray the metal film that the said unreacted of removal becomes metal silicide with sulfuric acid and hydrogen peroxide mixed solution.
Optional, the condition of said wet etching is:
The ratio of hydrofluoric acid and nitric acid, 1: 20～1: 100;
Etch period, 20～40 seconds;
Temperature, room temperature.
Optional, the condition of said wet etching is:
The ratio of hydrofluoric acid and nitric acid, 1: 50;
Etch period, 30 seconds;
Temperature, room temperature.
Optional, the etch rate that said wet etching is removed said oxide be 2000 dusts/minute.
Optional, the etch rate that said wet etching is removed said polysilicon is 1 micron/minute.
Optional, said rotary-jet is realized through single-chip churning cleaning machine.
Optional, the shape of said photoresistance and unexposed silicide stop that the shape of (SAB, Salicide Block) photoresistance is identical.
Optional, the step of said removal photoresistance is that the Semiconductor substrate behind the said wet etching is placed the acid tank that sulfuric acid and hydrogen peroxide mixed solution are housed, and carries out under first condition that wet-cleaned realizes.
Optional, said first condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 2: 1～5: 1;
Scavenging period, 20～40 seconds;
Temperature, 120 ℃～130 ℃.
Optional, said first condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 2: 1;
Scavenging period, 30 seconds;
Temperature, 120 ℃～130 ℃.
Optional, the step of said removal photoresistance is Semiconductor substrate rotary-jet sulfuric acid and the hydrogen peroxide mixed solution after utilizing single-chip churning cleaning machine to said wet etching, carries out under second condition that wet-cleaned realizes.
Optional, said second condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 4: 1～6: 1;
Scavenging period, 5～20 minutes;
Temperature, 120 ℃～130 ℃.
Optional, said second condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 5: 1;
Scavenging period, 10 minutes;
Temperature, 120 ℃～130 ℃.
Optional, said metal film is NiPt film or Co film or Ni film.
Optional, said metal silicide is NiPt metal silicide or Co metal silicide or Ni metal silicide.
The present invention makes it compared with prior art owing to adopt above technical scheme, has following advantage and good effect:
1) shape of said photoresistance is identical with the shape of unexposed SAB photoresistance; And the shape of the shape of said unexposed SAB photoresistance and device area is in full accord; Thereby can accurately cover said device area; And expose the said semiconductor substrate edge that is deposited with polysilicon and oxide, thus can guarantee that said polysilicon and oxide remove fully, and do not damage device area;
2) because wet etching adopts is the mixed solution of hydrofluoric acid and nitric acid, so can remove oxide and polysilicon simultaneously, thereby simplify technology.
Description of drawings
Fig. 1 is the method step flow chart of existing improved preparation nickel platinum silicide;
Fig. 2 A to Fig. 2 E is the existing improved corresponding device profile structural representation of each step of method for preparing nickel platinum silicide;
The method step flow chart of the preparation metal silicide that Fig. 3 provides for the embodiment of the invention;
Fig. 4 A to Fig. 4 D is the corresponding device profile structural representation of each step of the method for preparing metal silicide that the embodiment of the invention provides.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment the method for preparing metal silicide that the present invention proposes is done further explain.According to following explanation and claims, advantage of the present invention and characteristic will be clearer.What need explanation is, accompanying drawing all adopts the form of simplifying very much and all uses non-ratio accurately, only is used for conveniently, the purpose of the aid illustration embodiment of the invention lucidly.
Core concept of the present invention is; A kind of method for preparing metal silicide is provided; This method is before the preparation metal silicide; On said device area, cover photoresistance, and the mixed solution that utilizes hydrofluoric acid and nitric acid carries out wet etching to the oxide and the polysilicon of said semiconductor substrate edge, remove said oxide and polysilicon; Utilize SPM solution wet-cleaned afterwards again, remove said photoresistance; Then prepare metal film on the semiconductor device in said device area, and the annealing in process that is rapidly heated, metal silicide formed; Remove the metal film that said unreacted becomes metal silicide at last.Because the shape of said photoresistance is consistent with the shape of unexposed SAB photoresistance; Thereby can be when not damaging said device area; Remove said oxide and polysilicon fully; Thereby avoided in removing the process of metal film that said unreacted becomes metal silicide, introducing particle, improved the performance of device.
Please refer to Fig. 3 and Fig. 4 A to Fig. 4 D; The method step flow chart of the preparation metal silicide that provides for the embodiment of the invention of Fig. 3 wherein; Fig. 4 A to Fig. 4 D is the corresponding device profile structural representation of each step of the method for preparing metal silicide that the embodiment of the invention provides; Shown in Fig. 3 and Fig. 4 A to Fig. 4 D, the method for preparing metal silicide that the embodiment of the invention provides comprises the steps:
S201, Semiconductor substrate 210 is provided, wherein, has formed the device area 220 of patterning on the said Semiconductor substrate 210, and the edge of said Semiconductor substrate 210 is deposited with polysilicon 230 and oxide 240, shown in Fig. 4 A;
S202, on said Semiconductor substrate 210, coat photoresistance 250, said photoresistance 250 covers said device area 220, does not cover the said semiconductor substrate edge that is deposited with polysilicon 230 and oxide 240, shown in Fig. 4 B;
S203, said semiconductor substrate edge is rotated injection, said semiconductor substrate edge is carried out wet etching, remove said polysilicon 230 and oxide 240 with the mixed solution of hydrofluoric acid and nitric acid; Device profile structural representation after this step is accomplished is shown in Fig. 4 C;
S204, the said photoresistance 250 of removal; Device profile structural representation after this step is accomplished is shown in Fig. 4 D;
S205, on said Semiconductor substrate the depositing metal film, said metal film covers the grid structure and the source/drain electrode of the device in the said device area; Particularly, said grid structure comprises gate dielectric layer, polysilicon gate and grid curb wall;
S206, with the Semiconductor substrate of the said depositing metal film annealing in process that is rapidly heated, make said metal film and pasc reaction, form metal silicide;
S207, spray with sulfuric acid and hydrogen peroxide mixed solution and to remove the metal film that said unreacted becomes metal silicide.
Further, the condition of said wet etching is:
The ratio of hydrofluoric acid and nitric acid, 1: 20～1: 100;
Etch period, 20～40 seconds;
Temperature, room temperature.
Preferably, the condition of said wet etching is:
The ratio of hydrofluoric acid and nitric acid, 1: 50;
Etch period, 30 seconds;
Temperature, room temperature.
Further, said wet etching remove the etch rate of said oxide be 2000 dusts/minute.
Further, to remove the etch rate of said polysilicon be 1 micron/minute to said wet etching.
Further, said rotary-jet realizes through single-chip churning cleaning machine, thereby can prevent that photoresistance from coming off, and avoids damaging device area.
Further; The shape of said photoresistance is identical with the shape of unexposed SAB photoresistance, thereby can directly adopt unexposed SAB photoresistance, and because the shape of the shape of said unexposed SAB photoresistance and device area is in full accord; Thereby can accurately cover said device area; And expose the said semiconductor substrate edge that is deposited with polysilicon and oxide, thus can guarantee that said polysilicon and oxide remove fully, do not damage device area simultaneously;
Further, the step of said removal photoresistance is that the Semiconductor substrate behind the said wet etching is placed the acid tank that sulfuric acid and hydrogen peroxide mixed solution are housed, and carries out under first condition that wet-cleaned realizes.
Further, said first condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 2: 1～5: 1;
Scavenging period, 20～40 seconds;
Temperature, 120 ℃～130 ℃.
Preferably, said first condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 2: 1;
Scavenging period, 30 seconds;
Temperature, 120 ℃～130 ℃.
Further, the step of said removal photoresistance is Semiconductor substrate rotary-jet sulfuric acid and the hydrogen peroxide mixed solution after utilizing single-chip churning cleaning machine to said wet etching, carries out under second condition that wet-cleaned realizes.
Further, said second condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 4: 1～6: 1;
Scavenging period, 5～20 minutes;
Temperature, 120 ℃～130 ℃.
Preferably, said second condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 5: 1;
Scavenging period, 10 minutes;
Temperature, 120 ℃～130 ℃.
Further, said metal film is NiPt film or Co film or Ni film.
Further, said metal silicide is NiPt metal silicide or Co metal silicide or Ni metal silicide.
Wherein, the concentration of said each chemical solution is consistent with concentration of the prior art, and for example the concentration of said hydrofluoric acid is 49%, and the concentration of said nitric acid is 70%, and the concentration of said sulfuric acid is 98%, and the concentration of said hydrogen peroxide solution is 31%.
In sum; The invention provides a kind of method for preparing metal silicide; This method is before the preparation metal silicide; On said device area, cover photoresistance, and the mixed solution that utilizes hydrofluoric acid and nitric acid carries out wet etching to the oxide and the polysilicon of said semiconductor substrate edge, remove said oxide and polysilicon; Utilize SPM solution wet-cleaned afterwards again, remove said photoresistance; Then prepare metal film on the semiconductor device in said device area, and the annealing in process that is rapidly heated, metal silicide formed; Remove the metal film that said unreacted becomes metal silicide at last.Because the shape of said photoresistance is consistent with the shape of unexposed SAB photoresistance; Thereby can be when not damaging said device area; Remove said oxide and polysilicon fully; Thereby avoided in removing the process of metal film that said unreacted becomes metal silicide, introducing particle, improved the performance of device.
Obviously, those skilled in the art can carry out various changes and modification to invention and not break away from the spirit and scope of the present invention.Like this, belong within the scope of claim of the present invention and equivalent technologies thereof if of the present invention these are revised with modification, then the present invention also is intended to comprise these changes and modification interior.
Claims (15)
1. a method for preparing metal silicide is characterized in that, comprises the steps:
Semiconductor substrate is provided, wherein, formed the device area of patterning on the said Semiconductor substrate, and the edge of said Semiconductor substrate is deposited with polysilicon and oxide;
On said Semiconductor substrate, coat photoresistance, said photoresistance covers said device area, does not cover the said semiconductor substrate edge that is deposited with polysilicon and oxide;
Mixed solution with hydrofluoric acid and nitric acid is rotated injection to said semiconductor substrate edge, and said semiconductor substrate edge is carried out wet etching, removes said polysilicon and oxide;
Remove said photoresistance;
Depositing metal film on said Semiconductor substrate, said metal film cover the grid structure and the source/drain electrode of the device in the said device area;
With the Semiconductor substrate of the said depositing metal film annealing in process that is rapidly heated, make said metal film and pasc reaction, form metal silicide;
Spray the metal film that the said unreacted of removal becomes metal silicide with sulfuric acid and hydrogen peroxide mixed solution.
2. the method for preparing metal silicide as claimed in claim 1 is characterized in that, the condition of said wet etching is:
The ratio of hydrofluoric acid and nitric acid, 1: 20～1: 100;
Etch period, 20～40 seconds;
Temperature, room temperature.
3. the method for preparing metal silicide as claimed in claim 2 is characterized in that, the condition of said wet etching is:
The ratio of hydrofluoric acid and nitric acid, 1: 50;
Etch period, 30 seconds;
Temperature, room temperature.
4. the method for preparing metal silicide as claimed in claim 3 is characterized in that, the etch rate that said wet etching is removed said oxide be 2000 dusts/minute.
5. the method for preparing metal silicide as claimed in claim 3 is characterized in that, the etch rate that said wet etching is removed said polysilicon is 1 micron/minute.
6. the method for preparing metal silicide as claimed in claim 1 is characterized in that, said rotary-jet is realized through single-chip churning cleaning machine.
7. the method for preparing metal silicide as claimed in claim 1 is characterized in that, the shape of said photoresistance stops that with unexposed silicide the shape of photoresistance is identical.
8. the method for preparing metal silicide as claimed in claim 1; It is characterized in that; The step of said removal photoresistance is that the Semiconductor substrate behind the said wet etching is placed the acid tank that sulfuric acid and hydrogen peroxide mixed solution are housed, and carries out under first condition that wet-cleaned realizes.
9. the method for preparing metal silicide as claimed in claim 8 is characterized in that, said first condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 2: 1～5: 1;
Scavenging period, 20～40 seconds;
Temperature, 120 ℃～130 ℃.
10. the method for preparing metal silicide as claimed in claim 9 is characterized in that, said first condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 2: 1;
Scavenging period, 30 seconds;
Temperature, 120 ℃～130 ℃.
11. the method for preparing metal silicide as claimed in claim 1; It is characterized in that; The step of said removal photoresistance is Semiconductor substrate rotary-jet sulfuric acid and the hydrogen peroxide mixed solution after utilizing single-chip churning cleaning machine to said wet etching, carries out under second condition that wet-cleaned realizes.
12. the method for preparing metal silicide as claimed in claim 11 is characterized in that, said second condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 4: 1～6: 1;
Scavenging period, 5～20 minutes;
Temperature, 120 ℃～130 ℃.
13. the method for preparing metal silicide as claimed in claim 12 is characterized in that, said second condition is:
The ratio of sulfuric acid and hydrogen peroxide solution, 5: 1;
Scavenging period, 10 minutes;
Temperature, 120 ℃～130 ℃.
14. the method for preparing metal silicide as claimed in claim 1 is characterized in that, said metal film is NiPt film or Co film or Ni film.
15. the method for preparing metal silicide as claimed in claim 14 is characterized in that, said metal silicide is NiPt metal silicide or Co metal silicide or Ni metal silicide.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010285178.7A CN102403211B (en) | 2010-09-17 | 2010-09-17 | Preparation method for metal silicide |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010285178.7A CN102403211B (en) | 2010-09-17 | 2010-09-17 | Preparation method for metal silicide |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102403211A true CN102403211A (en) | 2012-04-04 |
| CN102403211B CN102403211B (en) | 2015-05-20 |
Family
ID=45885293
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201010285178.7A Active CN102403211B (en) | 2010-09-17 | 2010-09-17 | Preparation method for metal silicide |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102403211B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1164763A (en) * | 1997-04-08 | 1997-11-12 | 世界先进积体电路股份有限公司 | Method for making inter-connecting polycrystalline silicon to polycrystalline silicon low resistance contact on integrated circuit |
| CN1390676A (en) * | 2002-07-19 | 2003-01-15 | 上海华虹（集团）有限公司 | Method for removing excessive metal in preapring silicide |
| CN1754860A (en) * | 2004-09-29 | 2006-04-05 | 中国科学院微电子研究所 | Silicide process suitable for manufacturing nanometer device |
| CN101197281A (en) * | 2006-12-05 | 2008-06-11 | 中芯国际集成电路制造(上海)有限公司 | Production method for silicide contact in semiconductor element |
| WO2009130050A1 (en) * | 2008-04-25 | 2009-10-29 | S.O.I. Tec Silicon On Insulator Technolgies | Etching composition, in particular for strained or stressed silicon materials, method for characterizing defects on surfaces of such materials and process of treating such surfaces with the etching composition |
| KR20100041224A (en) * | 2008-10-13 | 2010-04-22 | 주식회사 동부하이텍 | Method of manufacturing semiconductor device |
-
2010
- 2010-09-17 CN CN201010285178.7A patent/CN102403211B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1164763A (en) * | 1997-04-08 | 1997-11-12 | 世界先进积体电路股份有限公司 | Method for making inter-connecting polycrystalline silicon to polycrystalline silicon low resistance contact on integrated circuit |
| CN1390676A (en) * | 2002-07-19 | 2003-01-15 | 上海华虹（集团）有限公司 | Method for removing excessive metal in preapring silicide |
| CN1754860A (en) * | 2004-09-29 | 2006-04-05 | 中国科学院微电子研究所 | Silicide process suitable for manufacturing nanometer device |
| CN101197281A (en) * | 2006-12-05 | 2008-06-11 | 中芯国际集成电路制造(上海)有限公司 | Production method for silicide contact in semiconductor element |
| WO2009130050A1 (en) * | 2008-04-25 | 2009-10-29 | S.O.I. Tec Silicon On Insulator Technolgies | Etching composition, in particular for strained or stressed silicon materials, method for characterizing defects on surfaces of such materials and process of treating such surfaces with the etching composition |
| KR20100041224A (en) * | 2008-10-13 | 2010-04-22 | 주식회사 동부하이텍 | Method of manufacturing semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102403211B (en) | 2015-05-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102938378B (en) | Manufacturing method for semiconductor device | |
| CN100508163C (en) | Semiconductor device manufacturing method | |
| CN104616980B (en) | The forming method of metal gates | |
| US7947605B2 (en) | Post ion implant photoresist strip using a pattern fill and method | |
| CN104916779B (en) | Semiconductor devices, its manufacturing method and its manufacturing device | |
| TW201732892A (en) | Conformal doping using dopant gas on hydrogen plasma treated surface | |
| US9905434B2 (en) | Method for fabricating array substrate, array substrate and display device | |
| CN105870050A (en) | Forming method of semiconductor device | |
| CN104409635B (en) | Organic thin film transistor and manufacturing method thereof, array substrate, and display unit | |
| CN107452595B (en) | Semiconductor device and its manufacturing method | |
| CN109637933B (en) | Thin film transistor and manufacturing method thereof | |
| CN102403211B (en) | Preparation method for metal silicide | |
| CN102569089B (en) | Semiconductor device forming method | |
| CN102969234B (en) | Method for manufacturing metal gate electrode | |
| Penn | Forecast of VLSI processing—A historical review of the first dry-processed IC | |
| CN105742177A (en) | Method for removing virtual gate electrode dielectric layer | |
| US20070082494A1 (en) | Method for forming silicide layer | |
| TWI591718B (en) | Silicon nitride dry trim without top pulldown | |
| CN102176414A (en) | Preparation method of metal silicide | |
| CN110473775A (en) | Improve the method for film removing | |
| US20150228537A1 (en) | Contact Critical Dimension Control | |
| CN102122640B (en) | Method for forming flash memory | |
| JP2006286775A (en) | Etching method | |
| US8569171B2 (en) | Mask-based silicidation for FEOL defectivity reduction and yield boost | |
| CN107393815A (en) | The preparation method and field-effect transistor of diamond base field-effect transistor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Free format text: FORMER OWNER: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION Effective date: 20130614 Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHA Effective date: 20130614 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 201203 PUDONG NEW AREA, SHANGHAI TO: 100176 DAXING, BEIJING |
|
| TA01 | Transfer of patent application right |
Effective date of registration: 20130614 Address after: 100176 No. 18 Wenchang Avenue, Beijing economic and Technological Development Zone Applicant after: Semiconductor Manufacturing International (Beijing) Corporation Applicant after: Semiconductor Manufacturing International (Shanghai) Corporation Address before: 201203 No. 18 Zhangjiang Road, Shanghai Applicant before: Semiconductor Manufacturing International (Shanghai) Corporation |
|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |