CN102402676B - Card reading circuit and card reader - Google Patents

Card reading circuit and card reader Download PDF

Info

Publication number
CN102402676B
CN102402676B CN201110328134.2A CN201110328134A CN102402676B CN 102402676 B CN102402676 B CN 102402676B CN 201110328134 A CN201110328134 A CN 201110328134A CN 102402676 B CN102402676 B CN 102402676B
Authority
CN
China
Prior art keywords
card
semiconductor
oxide
metal
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201110328134.2A
Other languages
Chinese (zh)
Other versions
CN102402676A (en
Inventor
蒋锦扬
陈新
曾德炎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujian Landi Commercial Equipment Co Ltd
Original Assignee
Fujian Landi Commercial Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujian Landi Commercial Equipment Co Ltd filed Critical Fujian Landi Commercial Equipment Co Ltd
Priority to CN201110328134.2A priority Critical patent/CN102402676B/en
Publication of CN102402676A publication Critical patent/CN102402676A/en
Application granted granted Critical
Publication of CN102402676B publication Critical patent/CN102402676B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The invention provides a card reading circuit and a card reader, wherein the circuit comprises a data card interface chip and a switch module; the switch module comprises a card seat connector, first to third resistors, a first MOS tube and a second MOS tube; the card seat connector and the data card chip both comprise I/O ends; the first to third resistors all comprise first ends and second ends; the first and second MOS tubes both comprise grid electrodes, drain electrodes and source electrodes; and the data card interface chip can normally send data to external processor end through connection of the card seat connector, the resistor and the MOS tube so as to realize reading and writing of I2C card.

Description

Card reading circuit and card reader
Technical field
The present invention relates to a kind of card reading circuit field, relate in particular to a kind of card reading circuit and card reader.
Background technology
Along with scientific and technical development, in existing market, there are various data cards, be widely used in as hotel, hotel, the occasions such as public transport, such as CPU card or I2C card etc., the problem existing is at present, the general IC-card interface chip with data line communication, master-slave swap transmission can not effectively read I2C card, although existing mode can read I2C card as the IC-card interface chip of SPI/I2C/ port transmission, unit price is higher, and practicality is low; Existing IC-card interface chip, what its I/O end adopted is the mode that rising edge switches master-slave flip-flop, and existence can not be read the phenomenon of I2C card, therefore needs the one can be based on existing IC-card interface chip, read the circuit of I2C card, can compatible reading out data card.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of circuit, and this circuit can solve the problem that existing data card can not compatible read.
For solving the problems of the technologies described above, the technical solution used in the present invention is to provide a kind of card reading circuit, comprise data card interface chip and switch module, described switch module comprises card holder connector and the first resistance to the three resistance, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, and described card holder connector and described data card interface chip include I/O end; One end of described the first resistance is connected with the I/O of described card holder connector end, and the other end of described the first resistance is electrically connected with the drain electrode of described the first metal-oxide-semiconductor; The source electrode of described the first metal-oxide-semiconductor is connected with the source electrode of described the second metal-oxide-semiconductor, and the common ground of its connection is the first end points; One end of described the second resistance is connected with the I/O of described card holder connector end, and the other end of described the second resistance is connected with external data card power supply; One end of described the 3rd resistance is connected with the source electrode of described the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, and the other end of described the 3rd resistance is connected with the grid of described the second metal-oxide-semiconductor with the grid of described the first metal-oxide-semiconductor, and is connected with external data card control end; The drain electrode of described the second metal-oxide-semiconductor is connected with the I/O end of described data card interface chip.
Wherein, described the first metal-oxide-semiconductor and described the second metal-oxide-semiconductor are N-mos.
Wherein, described data card interface chip is DS8113 family chip.
Wherein, described external data card control end provides high level signal or low level signal.
For solving the problems of the technologies described above, the present invention also provides a kind of card reader, comprise card reading circuit, described card reading circuit comprises data card interface chip and switch module, described switch module comprises card holder connector and the first resistance to the three resistance, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, and described card holder connector and described data card interface chip include I/O end; One end of described the first resistance is connected with the I/O of described card holder connector end, and the other end of described the first resistance is connected with the drain electrode of described the first metal-oxide-semiconductor; The source electrode of described the first metal-oxide-semiconductor is connected with the source electrode of described the second metal-oxide-semiconductor, and the common ground of its connection is the first end points; One end of described the second resistance is connected with the I/O of described card holder connector end, and the other end of described the second resistance is connected with external data card power supply; One end of described the 3rd resistance is connected with the source electrode of described the first metal-oxide-semiconductor, the second metal-oxide-semiconductor,, the other end of described the 3rd resistance is connected with the grid of described the second metal-oxide-semiconductor with the grid of described the first metal-oxide-semiconductor, and is connected with external data card control end; The drain electrode of described the second metal-oxide-semiconductor is connected with the I/O end of described data card interface chip.
Wherein, described the first metal-oxide-semiconductor and described the second metal-oxide-semiconductor are N-mos.
Wherein, described data card interface chip is DS8113 family chip.
Wherein, described external data card control end provides high level signal or low level signal.
Adopt this scheme, the technical matters that difference and existing data card can not compatible read, the obtained beneficial effect of the present invention is: owing to being provided with switch module before data card interface chip, this switch module has comprised card holder connector, it can support data card to identify, further, the first metal-oxide-semiconductor of this on-off circuit is all connected with external control end with the grid of the second metal-oxide-semiconductor, like this, based on the characteristic of metal-oxide-semiconductor, when the voltage of gate-to-source is in high level time, just can conducting, therefore as long as when external control end is set to high level always, this circuit just can be connected card holder connector (while transmitting data as CPU card with the I/O end of data card interface chip, require external control end to be set to high level) always.And when operation I2C card, when ack msg low level is arrived, this circuit can lose host side, causes the data of card by receiving after the response message of external data card, just control end moment to be dragged down, now, metal-oxide-semiconductor with regard to instantaneous trip the path of two chip chambers, thereby produce a high impulse, make data card interface chip confirm as host side near the port of deck, the port IO being connected with CPU is slave end, makes the data can normal transmission.Data card interface chip can identification data transmission direction, thus by data toward external processor end transmission, realize the read-write of I2C card.
Accompanying drawing explanation
Fig. 1 is the structural drawing of a kind of card reading circuit provided by the present invention;
Fig. 2 is the physical circuit figure of a kind of card reading circuit provided by the present invention.
Embodiment
By describing technology contents of the present invention, structural attitude in detail, being realized object and effect, below in conjunction with embodiment and coordinate accompanying drawing to be explained in detail.
Refer to Fig. 1 and Fig. 2, the invention provides a kind of card reading circuit, comprise data card interface chip and switch module, described switch module comprises card holder connector and the first resistance to the three resistance, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, and described card holder connector and described data card interface chip include I/O end; One end of described the first resistance is connected with the I/O of described card holder connector end, and the other end of described the first resistance is connected with the drain electrode of described the first metal-oxide-semiconductor; The source electrode of described the first metal-oxide-semiconductor is connected with the source electrode of described the second metal-oxide-semiconductor, the 3rd resistance the first end points of the common ground of its connection; One end of described the second resistance is connected with the I/O of described card holder connector end, and the other end of described the second resistance is connected with external data card power supply; One end of described the 3rd resistance is connected with described the first end points, and the other end of described the 3rd resistance is connected with the source electrode of described the second metal-oxide-semiconductor with the source electrode of described the first metal-oxide-semiconductor, and is connected with external data card control end; The drain electrode of described the second metal-oxide-semiconductor is connected with the I/O end of described data card interface chip.
Further, the data card that described card holder connector mates is CPU card or I2C card.
As preferably, the first metal-oxide-semiconductor and the second metal-oxide-semiconductor in the present embodiment are nmos.
In the present embodiment, described card holder connector is MUPC816N, and described data card interface chip is DS8113 family chip.
Refer to Fig. 2, in the present embodiment, the signal of so-called external data card control end represents with CARD_EN, and wherein, the effect of described the 3rd resistance is such, and when CARD_EN draws high, metal-oxide-semiconductor is conducting.But because the turn-on condition of nmos pipe is that VGS is greater than 1V, therefore add the 3rd resistance after VGS just can have reference point, can draw pressure reduction, whether detect can conducting.
In the present embodiment, described data card is CPU card or I2C card, refers in particular to I2C card, and so-called I2C is a kind of bus structure.I2C implements very succinct, only needs two lines to get final product (clock, data-signal).Device in I2C bus is divided into primary controller and the large class of controlled device two, between them, need only normal work, always have an I2C in bus, to send information data (to be generally after start, first cpu sends self-test signal to each function module circuit, obtain the data-signal of the normal feedback of each function module circuit after machine just enter normal operating conditions).
The hardware configuration of introducing in detail lower I2C below, I2C universal serial bus generally has two signal wires, and one is two-way data line SDA, and another root is clock line SCL.Serial data SDA on all I2C of receiving bus apparatus receives on the SDA of bus, and the clock line SCL of each equipment receives on the SCL of bus.For fear of the confusion of bus signals, while requiring each equipment connection to the output terminal of bus, must be open-drain (OD) output output.Refer to Fig. 2, in the present embodiment, the drain electrode of the first metal-oxide-semiconductor is by the first resistance and card holder connector, and the drain electrode of the second metal-oxide-semiconductor is connected with data card interface chip.
Data transmission in I2C bus is all two-way, serial time clock line should be also two-way, the main frame transmitting as control bus data, to pass through SCL output circuit tranmitting data register signal on the one hand, also want on the other hand the SCL level in testbus, to determine when send next time clock level; As the slave of accepting Host Command, send or receive the signal on SDA by the SCL signal in bus, also can send low level signal to extend the bus clock signal cycle to scl line.When bus is idle, because each equipment is all out to leak output, pull-up resistor makes SDA and scl line all keep high level.The low level of arbitrary equipment output all will make corresponding bus signal line step-down, that is to say: the SDA of each equipment is "AND" relation, and SCL is also "AND" relation.
Refer to Fig. 2, described external data card control end comprises high level signal or low level signal.This is due in I2C bus transfer process, and two kinds of specific situations are defined as and are started and stop condition: when SCL keeps " height ", SDA becomes " low " for beginning condition from " height "; When SCL keeps " height " and SDA, when " low " becomes " height ", be stop condition.Described data card control end, is just to provide the port of this " height " " low " signal.
In addition, the data on sda line must be stable during clock " height ", only have when the clock signal on scl line is while being low, and " height " or " low " state on data line just can change.In the present embodiment, data card control end is the CARD_CN in Fig. 2, and in normal data transfer, CARD_CN is maintained height always, i.e. the connection of an I/O for direct-open MUPC816N deck connecting card and the I/O of DS8113 family chip chip.
Further, because the each byte outputing on sda line must be 8, the byte of each transmission is unrestricted, but each byte must have one to reply ACK.In the present embodiment, when receiving the ACK answer signal of external card, CARD_CN just drags down 20ms, thereby the connection of the I/O of connecting card and the I/O of DS8113 family chip chip in cut-out MUPC816N deck, moment produces a high impulse, now can guarantee that DS8113 family chip internal pull-up resistor fully acts on, can meet chip rear end and switch to master, make data card interface chip confirm host side, data card interface chip can identification data transmission direction, and data are the transmission of frequentation processor end just.
The present invention also provides a kind of card reader, comprise above-mentioned circuit, described card reading circuit comprises data card interface chip and switch module, described switch module comprises card holder connector and the first resistance to the three resistance, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, and described card holder connector and described data card interface chip include I/O end; One end of described the first resistance is connected with the I/O of described card holder connector end, and the other end of described the first resistance is connected with the drain electrode of described the first metal-oxide-semiconductor; The source electrode of described the first metal-oxide-semiconductor is connected with the source electrode of described the second metal-oxide-semiconductor, and the common ground of its connection is the first end points; One end of described the second resistance is connected with the I/O of described card holder connector end, and the other end of described the second resistance is connected with external data card power supply; One end of described the 3rd resistance is connected with described the first end points, and the other end of described the 3rd resistance is connected with the grid of described the second metal-oxide-semiconductor with the grid of described the first metal-oxide-semiconductor, and is connected with external data card control end; The drain electrode of described the second metal-oxide-semiconductor is connected with the I/O end of described data card interface chip.
Wherein, described the first metal-oxide-semiconductor and described the second metal-oxide-semiconductor are N-mos.
Wherein, described data card interface chip is DS8113 family chip.
Wherein, described external data card control end provides high level signal or low level signal.
Its principle of work is identical with above-mentioned card reading circuit, does not repeat here.
The foregoing is only embodiments of the invention; not thereby limit the scope of the claims of the present invention; every equivalent structure or conversion of equivalent flow process that utilizes instructions of the present invention and accompanying drawing content to do; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present invention.

Claims (8)

1. a card reading circuit, is characterized in that: comprise data card interface chip and switch module, described switch module comprises card holder connector and the first resistance to the three resistance, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor,
Described card holder connector and described data card interface chip include I/O end;
One end of described the first resistance is connected with the I/O of described card holder connector end, and the other end of described the first resistance is connected with the drain electrode of described the first metal-oxide-semiconductor;
The source electrode of described the first metal-oxide-semiconductor is connected with the source electrode of described the second metal-oxide-semiconductor, and the common ground of its connection is the first end points;
One end of described the second resistance is connected with the I/O of described card holder connector end, and the other end of described the second resistance is connected with external data card power supply;
One end of described the 3rd resistance is connected with described the first end points, and the other end of described the 3rd resistance is connected with the grid of described the second metal-oxide-semiconductor with the grid of described the first metal-oxide-semiconductor, and is connected with external data card control end;
The drain electrode of described the second metal-oxide-semiconductor is connected with the I/O end of described data card interface chip.
2. card reading circuit according to claim 1, is characterized in that: described the first metal-oxide-semiconductor and described the second metal-oxide-semiconductor are N-mos.
3. card reading circuit according to claim 1, is characterized in that: described data card interface chip is DS8113 family chip.
4. card reading circuit according to claim 1, is characterized in that: described external data card control end comprises high level signal or low level signal.
5. a card reader, is characterized in that: comprise card reading circuit, described card reading circuit comprises data card interface chip and switch module, and described switch module comprises card holder connector and the first resistance to the three resistance, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor,
Described card holder connector and described data card interface chip include I/O end;
One end of described the first resistance is connected with the I/O of described card holder connector end, and the other end of described the first resistance is connected with the drain electrode of described the first metal-oxide-semiconductor;
The source electrode of described the first metal-oxide-semiconductor is connected with the source electrode of described the second metal-oxide-semiconductor, and the common ground of its connection is the first end points;
One end of described the second resistance is connected with the I/O of described card holder connector end, and the other end of described the second resistance is connected with external data card power supply;
One end of described the 3rd resistance is connected with described the first end points, and the other end of described the 3rd resistance is connected with the grid of described the second metal-oxide-semiconductor with the grid of described the first metal-oxide-semiconductor, and is connected with external data card control end;
The drain electrode of described the second metal-oxide-semiconductor is connected with the I/O end of described data card interface chip.
6. card reader according to claim 5, is characterized in that: described the first metal-oxide-semiconductor and described the second metal-oxide-semiconductor are N-mos.
7. card reader according to claim 5, is characterized in that: described data card interface chip is DS8113 family chip.
8. card reader according to claim 5, is characterized in that: described external data card control end provides high level signal or low level signal.
CN201110328134.2A 2011-10-26 2011-10-26 Card reading circuit and card reader Active CN102402676B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110328134.2A CN102402676B (en) 2011-10-26 2011-10-26 Card reading circuit and card reader

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110328134.2A CN102402676B (en) 2011-10-26 2011-10-26 Card reading circuit and card reader

Publications (2)

Publication Number Publication Date
CN102402676A CN102402676A (en) 2012-04-04
CN102402676B true CN102402676B (en) 2014-04-16

Family

ID=45884870

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110328134.2A Active CN102402676B (en) 2011-10-26 2011-10-26 Card reading circuit and card reader

Country Status (1)

Country Link
CN (1) CN102402676B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1302415A (en) * 1998-05-01 2001-07-04 张玮 Internet IC card system
CN201331812Y (en) * 2008-12-31 2009-10-21 东莞市建邦计算机软件有限公司 Urban and rural micro-payment system
CN101789263A (en) * 2003-07-03 2010-07-28 株式会社瑞萨科技 Multifunctional card device
CN101950349A (en) * 2010-09-09 2011-01-19 扬州恒信仪表有限公司 Non-contact card reader

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1302415A (en) * 1998-05-01 2001-07-04 张玮 Internet IC card system
CN101789263A (en) * 2003-07-03 2010-07-28 株式会社瑞萨科技 Multifunctional card device
CN201331812Y (en) * 2008-12-31 2009-10-21 东莞市建邦计算机软件有限公司 Urban and rural micro-payment system
CN101950349A (en) * 2010-09-09 2011-01-19 扬州恒信仪表有限公司 Non-contact card reader

Also Published As

Publication number Publication date
CN102402676A (en) 2012-04-04

Similar Documents

Publication Publication Date Title
CN102750252B (en) USB/UART interface multiplexing circuit and use the electronic equipment of this circuit
WO2016048677A1 (en) Serial bus electrical termination control
CN104657313A (en) System for detecting universal serial bus (USB) device and method thereof
CN100504831C (en) Method and apparatus for recovering I2C bus locked by slave device
CN104484301A (en) FPGA-based (Field Programmable Gate Array-based) IO (Input/Output) bus device with automatic recognition function
CN102096620A (en) Method and device for detecting connection state of serial port, and communication system
CN105068955A (en) Local bus structure and data interaction method
CN103914427A (en) On-chip communication method and on-chip communication device on basis of three physical interconnection lines for integrated circuits
CN212649180U (en) Double-interface switching circuit and Type-C concentrator
CN102402676B (en) Card reading circuit and card reader
CN101561663B (en) Motion control system and control method thereof
CN101753722A (en) Interface circuit meeting single wire protocol (SWP) on subscriber identity module (SIM) card chip
CN105095137A (en) Control chip and connection module
CN204440388U (en) A kind of easy data transmission circuit
CN201820218U (en) Host system and data transmission circuit
CN101853232A (en) Extensible adapter
CN201378316Y (en) Universal input/output interface extension circuit and mobile terminal with same
CN101164052B (en) Device having signal level different from signal level of external device and communication method thereof
CN110444156A (en) Display device and its driver
CN102545953B (en) UART (Universal Asynchronous Receiver/Transmitter) function extension circuit and control method thereof
CN204206154U (en) The gate circuit conversion equipment of a kind of universal serial port and ISO7816 agreement
CN201965639U (en) Device with two intelligent card interfaces
CN102664037B (en) Control circuit for TF or SD card
CN210222744U (en) Master-slave equipment switching device and terminal equipment based on USB _ OTG mode
CN209543335U (en) A kind of circuit of the address HRP-configured slave device I2C

Legal Events

Date Code Title Description
PB01 Publication
C06 Publication
SE01 Entry into force of request for substantive examination
C10 Entry into substantive examination
GR01 Patent grant
C14 Grant of patent or utility model