CN102315114A - Structure and method for preventing selective extension hard mask layer undercut feature - Google Patents

Structure and method for preventing selective extension hard mask layer undercut feature Download PDF

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CN102315114A
CN102315114A CN 201010221607 CN201010221607A CN102315114A CN 102315114 A CN102315114 A CN 102315114A CN 201010221607 CN201010221607 CN 201010221607 CN 201010221607 A CN201010221607 A CN 201010221607A CN 102315114 A CN102315114 A CN 102315114A
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mask layer
layer
structure
mask
selective epitaxial
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CN 201010221607
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Chinese (zh)
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刘鹏
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上海华虹Nec电子有限公司
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Abstract

The invention discloses a structure for preventing the formation of the undercut feature under a dielectric film hard mask layer in the filling process of a selective extension process. After grooves are formed and before the selective extension growth, hard mask layers with different thickness gradients are formed, and in addition, the thicknesses of the hard mask layers in regions near the side wall of the grooves are thinner than the thickness in regions far away from the side walls of the grooves. In addition, the invention also discloses a method for realizing the structure. Through the special process method, the step or gradually changed structure with different dielectric film thicknesses is formed in the dielectric film hard mask layer regions near the grooves, the thinner layers can be completely consumed in the selective extension process, and the formation of the undercut feature is finally prevented. Under the condition of not changing the extension filling conditions, the generation of the undercut feature of the mask layer is prevented by the effective and simple method, and simultaneously, the realization of the subsequent technical steps is not influenced.

Description

防止选择性外延掩模层底部切口形貌的结构和方法 Structure and method for selectively preventing the bottom slit mask layer an epitaxial morphology

技术领域 FIELD

[0001] 本发明属于半导体集成电路制造领域,具体涉及选择性外延工艺,尤其涉及一种防止选择性外延掩模层底部切口形貌的结构和方法。 [0001] The present invention belongs to the field of manufacturing a semiconductor integrated circuit, particularly relates to a selective epitaxy process and particularly to a structure and method for selective epitaxial morphology undercuts the mask layer prevents.

背景技术 Background technique

[0002] 选择性外延技术被广泛应用在超级结器件的外延填充工艺中,其特点是沉积和刻蚀步骤交替进行,利用沟槽底部和顶部的生长和刻蚀速率的差异,防止顶部外延硅提前封口,形成空洞。 [0002] Selective epitaxial technology is widely used in the epitaxial process of filling the super-junction device, characterized by alternating deposition and etching step, using a difference in growth rate and etching the trench bottom and top, to prevent the top of the epitaxial silicon ahead of sealing, the formation of voids. 但是选择性外延技术在沉积过程中会产生氯化氢的副产物,从微观结构来看,副产物的浓度在外延层表面相对较高,同时副产物气体在沟槽中的扩散和流动会导致介质膜掩模层沟槽边缘下方的浓度最大,导致掩模层下方形成底部切口状形貌(undercut),并填充外延硅单晶(见图1)。 However, selective epitaxy byproduct hydrogen chloride generated during the deposition process, the micro structure, a relatively high concentration of by-products on the surface of the epitaxial layer, while the flow of gaseous byproducts and diffusion will result in the trench dielectric film maximum concentration below the edges of the trench mask layer, resulting in formation of the morphology undercut (undercut) under the mask layer, and filled with epitaxial silicon single crystal (see FIG. 1). 在超级结的后续工艺中会把介质膜去除(通过CMP工艺),切口下面的外延硅会形成一个鼓包(见图2),会引起器件的栅极和源极的漏电。 In a subsequent process will dielectric film removal super junction (by a CMP process), the notch below the epitaxial silicon will form a bulge (see FIG. 2), it will cause the gate and source electrodes of the device leakage. 虽然降低掩模层厚度可以解决底部切口问题,但是由于掩模层是暴露在外的,在后续的回刻或者化学机械抛光工艺(CMP)中充当阻挡层,不能减薄很多。 Although reducing the thickness of the mask undercut problem can be solved, but since the mask layer is exposed, serve as a barrier layer in a subsequent etch-back or chemical mechanical polishing process (CMP) can not be thinned lot. 要防止这种形貌的产生又能够不影响后续工艺步骤,就需要有特殊的结构和工艺。 To prevent this in turn is possible without affecting the morphology of the subsequent process steps, it requires special structures and processes.

发明内容 SUMMARY

[0003] 本发明要解决的技术问题是提供一种防止选择性外延掩模层底部切口形貌的结构和方法,其在不改变外延填充条件的情况下,用有效简单的方法避免掩模层下切口形貌的产生,同时不影响后续工艺步骤的实现。 [0003] The present invention is to solve the technical problem of providing a structure and method for selective epitaxial morphology undercut masking layer prevents that without changing the epitaxial fill conditions, to avoid masking layer with an effective simple method morphology generating incision, while not affecting the subsequent process steps implemented.

[0004] 为解决上述技术问题,本发明提供一种防止选择性外延掩模层底部切口形貌的结构,在沟槽形成后、选择性外延生长前形成具有不同厚度梯度的掩模层,并且该掩模层在靠近沟槽侧壁区域的厚度比远离沟槽侧壁区域的厚度更薄。 [0004] To solve the above problems, the present invention provides a structural undercuts morphology selective epitaxial mask layer prevents, after the trench is formed, a selective epitaxial layer forming a mask having a different thickness gradient of the growth front, and the thickness of the mask layer in the trench sidewalls near the trench sidewalls away region than thinner regions.

[0005] 所述掩模层是多层膜。 The [0005] the mask layer is a multilayer film. 所述多层膜是相同材质薄膜,或不同材质薄膜。 The multilayer film is a film of the same material, or of different film materials.

[0006] 所述具有不同厚度梯度是阶梯式变化,或连续的厚度变化。 [0006] The different thickness changes stepwise gradient, or continuous changes in thickness.

[0007] 此外,本发明还提供一种防止选择性外延掩模层底部切口形貌的方法,包括步骤如下: [0007] Further, the present invention also provides a method for selective epitaxial mask layer cutout bottom topography prevented, comprising the steps of:

[0008] 1)在硅基板上沉积三层不同介质膜的掩模层,由下至上依次为第一层掩模层、第二层掩模层和第三层掩模层; [0008] 1) on the silicon substrate a mask layer is deposited a three-layer film different media, sequentially from the bottom layer of the first masking layer, a second layer and a third layer mask layer a mask layer;

[0009] 2)光刻和刻蚀形成带有掩模层的深沟槽结构; [0009] 2) forming a deep trench lithography and etching mask layer with a structure;

[0010] 3)采用湿法工艺刻蚀第一层掩模层和第二层掩模层,采用不同刻蚀速率形成不同厚度梯度的台阶; [0010] 3) wet process etching the first mask layer, the mask layer and second layers, using a different etch rate to form a step gradient of different thicknesses;

[0011] 4)采用湿法工艺刻蚀第三层掩模层,将第三层掩模层全部去除,形成具有不同厚度梯度的掩模层结构。 [0011] 4) a third layer of wet process etching mask layer, the third layer is completely removed the mask layer, forming a mask layer having a structure different thickness gradients.

[0012] 在步骤1)中,所述第一层掩模层的厚度以低于选择性外延生长过程中能完全消耗掉氧化膜厚度为标准。 [0012] In step 1), the layer thickness of the first mask layer is lower than a selective epitaxial growth process can be completely consumed the oxide film thickness of the standard. [0013] 在步骤1)中,所述的第一层掩模层采用热氧炉管生长50-1000埃氧化膜;所述的第二层掩模层采用常压化学气相沉积方法生长700-3000埃氧化膜;所述的第三层掩模层采用化学气相沉积法生长200-10000埃氮化膜。 [0013] In step 1), said first mask layer using a thermal oxide layer is 50-1000 angstroms furnace tube growth oxide film; a second layer of the mask layer using atmospheric pressure chemical vapor deposition process for growing 700- oxide film of 3000 Å; the third layer using the mask layer 200-10000 angstroms nitride film is grown by chemical vapor deposition.

[0014] 在步骤2)中,所述刻蚀可以使用光刻胶作为掩模层,也可以使用第三层掩模层的氮化膜作为掩模层。 [0014] In step 2), the etching mask layer can be used as a photoresist, the nitride film may be used as the third layer of the mask layer a mask layer.

[0015] 此外,本发明还提供另一种防止选择性外延掩模层底部切口形貌的方法,包括步骤如下: [0015] Further, the present invention further provides another method of selective epitaxial mask layer cutout bottom topography prevented, comprising the steps of:

[0016] 1)在硅基板上沉积二层相同介质膜的掩模层,由下至上依次为第一层掩模层、第二层掩模层;该第一层掩模层和第二层掩模层分别采用不同的方法沉积; [0016] 1) the same mask layer dielectric film is deposited on a silicon substrate floor, sequentially from the bottom layer of the first masking layer, a second layer mask layer; mask the first layer and second layers the mask layer is deposited using different methods;

[0017] 2)光刻和刻蚀形成带有掩模层的深沟槽结构; [0017] 2) forming a deep trench lithography and etching mask layer with a structure;

[0018] 3)采用湿法工艺刻蚀第一层掩模层和第二层掩模层,采用不同刻蚀速率形成不同厚度梯度的掩模层结构。 [0018] 3) wet process etching the first mask layer, the mask layer and second layers, using a different etch rate of the mask layer structure is formed of different thickness gradients.

[0019] 在步骤1)中,所述第一层掩模层采用热氧化法生长50-1000埃氧化膜;所述的第二层掩模层采用常压化学气相沉积方法生长700-3000埃氧化膜。 [0019] In step 1), the first mask layer is 50-1000 angstroms oxide layer grown by thermal oxidation film; a second layer of the mask layer using atmospheric pressure chemical vapor deposition process for growing a 700-3000 Å Oxide film.

[0020] 和现有技术相比,本发明具有以下有益效果:本发明提供的一种防止选择性外延工艺在深沟槽填充过程中在介质膜掩模层(Hard Mask)下面形成底部切口形貌(undercut)的结构。 [0020] and compared with the prior art, the present invention has the following advantages: the present invention provides a method for preventing selective epitaxial process of forming a dielectric film on the bottom of the slot-shaped mask layer (Hard Mask) following the trench fill process structure appearance (undercut) of. 其通过特殊工艺方法在靠近沟槽的介质膜掩模层区域形成不同介质膜厚度的阶梯或者渐变结构,较薄层会在选择性外延过程中全部消耗,最终防止底部切口形貌形成。 Which is formed through a special process for the dielectric film of the mask layer region near the trench or step graded dielectric film structure of different thickness, relatively thin layer will be completely consumed during the selective epitaxy, the final morphology is formed to prevent undercut. 本发明由多种介质膜形成介质膜掩模层,利用湿法刻蚀对不同介质膜的速率差异形成不同厚度梯度的介质膜掩模层,防止了选择性外延工艺在填充沟槽过程中在掩模层下面形成切口形貌,同时保证了后续工艺的实现,完成器件形成,降低器件栅极和源极之间的漏电流,提高器件的可靠性。 The present invention is a mask layer dielectric film is formed of a plurality of dielectric film, a dielectric film is formed by wet etching the mask layer thickness gradient different rate differences for the dielectric film, a selective epitaxy process prevents the filled trenches in the process topography slit formed below the mask layer, while ensuring the realization of the subsequent process, is formed to complete the device, the device to reduce the leakage current between the gate and the source, improve the reliability of the device.

附图说明 BRIEF DESCRIPTION

[0021] 图1是传统的选择性外延工艺形成介质膜底部切口的示意图; [0021] FIG. 1 is a schematic cut bottom dielectric film formed in a conventional selective epitaxy process;

[0022] 图2是传统的选择性外延的后续工艺中形成鼓包缺陷的示意图; [0022] FIG. 2 is a schematic diagram of a conventional defect formed bulge subsequent selective epitaxial process;

[0023] 图3是采用本发明方法形成的掩模层的结构示意图; [0023] FIG. 3 is a schematic view of the mask layer is formed using a method of the present invention;

[0024] 图4是采用本发明方法形成的掩模层结构的不同厚度梯度变化的示意图;图4A表示厚度梯度是台阶式变化的结构;图4B表示厚度梯度是连续变化的结构; [0024] FIG. 4 is a schematic diagram of different thickness of the layer structure of a mask forming method of the present invention using a gradient change; FIG. 4A is a block gradient represents the thickness changes stepwise; FIG. 4B shows changes in thickness gradient is a continuous structure;

[0025] 图5是本发明方法步骤1完成后的示意图; [0025] FIG. 5 is a schematic view of the steps of the method of the present invention a completion;

[0026] 图6是本发明方法步骤2完成后的示意图; [0026] FIG. 6 is a schematic view of the method of the present invention, the step 2 is completed;

[0027] 图7是本发明方法步骤3完成后的示意图; [0027] FIG. 7 is a schematic view of the method of the present invention, the step 3 is completed;

[0028] 图8是本发明方法步骤4完成后的示意图。 [0028] FIG. 8 is a schematic view of the method of the present invention, the step 4 is completed.

[0029] 其中,1是硅基板,2是第一层掩模层,3是第二层掩模层,4是第三层掩模层,5是深沟槽。 [0029] wherein, 1 is a silicon substrate, the mask layer 2 is the first layer, the second layer 3 is a mask layer, the third layer is a mask layer 4, 5 is the deep trench.

具体实施方式 Detailed ways

[0030] 下面结合附图和实施例对本发明作进一步详细的说明。 Drawings and embodiments of the present invention will be further described in detail [0030] below in conjunction.

[0031] 在选择性外延前形成具有不同厚度梯度的掩模层结构,掩模层厚度需要在靠近沟槽侧壁区域厚度较薄,在远离沟槽侧壁的区域比较厚(见图3)。 [0031] forming a mask layer having a different thickness gradient structure prior to the selective epitaxy, the thickness of the mask layer adjacent to the trench sidewalls need to thin area, in the region away from the trench sidewalls relatively thick (see FIG. 3) . 在靠近沟槽侧壁的掩模层厚度较薄的目的是使外延副产物在外延工艺过程中可以完全刻蚀掉掩模层,防止形成切口形貌。 The purpose of the mask layer is thinner near the trench sidewalls is epitaxially byproducts epitaxial process mask layer can be etched away, to prevent formation of topography slit. 在远离沟槽侧壁区域掩模层厚度较厚的目的是保证掩模层在后续回刻或者化学机械抛光工艺中的阻挡层功能。 The purpose of the mask layer region remote from the trench sidewall is to ensure that a thick layer of the mask in a subsequent etch back or chemical mechanical polishing a barrier layer function processes. 这种结构的掩模膜层结构可以是多种膜质(采用不同材质薄膜)的结构,也可以是一种膜质(采用相同材质薄膜)的结构。 Masking film structure this structure may be a variety of membranous (film using different materials) configuration, it can also be a film quality (film using the same material) structure. 厚度梯度可以是台阶式变化(即阶梯式变化)的结构(见图4A),也可以是连续变化的(见图4B)。 The thickness gradient may be stepwise structural changes (i.e., changes stepwise) (see FIG. 4A), or may be continuously changed (see FIG. 4B).

[0032] 图5到图8是实现本发明结构的一个实施例,具体步骤如下: [0032] FIGS 5 to 8 are implemented in the structure of an embodiment of the present invention, the following steps:

[0033] 1.如图5所示,在硅基板1上沉积三层不同膜质的掩模层,依次是第一层掩模层2、第二层掩模层3、第三层掩模层4,一个实例是第一层掩模层2用热氧炉管(热氧化法)生长50-1000埃氧化膜,第二层掩模层3用常压化学气相沉积(常压CVD)方法生长700-3000 埃氧化膜,第三层掩模层4用化学气相沉积法生长200-10000埃氮化膜。 [0033] 1. 5, three different mask layer is deposited on the film quality of the silicon substrate 1, followed by a first layer of masking layer 2, a second layer mask layer 3, a third mask layer layer 4, a first example is a layer of mask layer 2 by the thermal oxidation furnace tube (thermal oxidation) oxide film growth 50-1000 angstroms, a second layer mask layer 3 by atmospheric pressure chemical vapor deposition (atmospheric pressure CVD) method 700-3000 angstroms grown oxide film, a third layer 4200-10000 angstrom mask layer nitride film is grown by chemical vapor deposition. 其中第一层掩模层2的膜厚是最为关键的,它的厚度以低于选择性外延生长过程中能完全消耗掉氧化膜厚度为标准。 Wherein the layer thickness of the first mask layer 2 is the most critical, its thickness less than the selective epitaxial growth process can be completely consumed the oxide film thickness of the standard.

[0034] 2.如图6所示,利用光刻和刻蚀工艺,形成深沟槽5形貌。 As shown in [0034] 2 in FIG. 6, by photolithography and etching processes, forming a deep trench 5 morphology. 刻蚀可以使用光刻胶作为掩模层,也可以使用第三层掩模层4的氮化膜作为掩模层。 Etching using photoresist as a mask layer can, using the nitride film may be a third mask layer 4 layer as a mask layer. 如果使用氮化膜作为掩模层,掩模层厚度会有变化(氮化膜会在刻蚀过程中消耗掉,变薄,消耗掉的量和刻蚀深度与刻蚀条件、选择比有关系)。 If using the nitride film as a mask layer, the mask layer thickness will vary with the amount of etching conditions and the etching depth (nitride film is consumed during etching off thin, consumed, selectivity relationship ).

[0035] 3.如图7所示,利用刻蚀氧化膜的湿法工艺把第一层掩模层2和第二层掩模层3 的氧化膜向中间推,因为热氧的刻蚀速率和常压CVD生长的氧化膜刻蚀速率相差很大,最后会形成不同厚度梯度的台阶(即利用湿法刻蚀对不同介质膜的速率差异形成不同厚度梯度的介质膜掩模层)。 [0035] 3. 7, using a wet etching process of the oxide film layer oxide film of the first mask layer 2 and the second mask layer to the intermediate layer 3 is pushed, since the etching rate of the hot oxygen the oxide film etching rate and pressure CVD growth vary widely, eventually forming a step gradient of different thickness (i.e., a mask layer forming a dielectric film of a different thickness gradient differences on the rate of the dielectric film by wet etching).

[0036] 4.如图8所示,使用刻蚀氮化膜的湿法工艺把第三层掩模层4的氮化膜全部去除, 形成具有不同厚度梯度的掩模层形貌。 [0036] 4. As shown in FIG. 8, the nitride film is etched using a wet process of the third layer of the mask layer 4 is to remove all the nitride film, forming a mask layer having a different thickness gradient morphology.

[0037] 下面以采用二层相同材质的掩模层为另一实施例,其具体步骤如下: [0037] Next, the mask layer is made of the same material Layer to another embodiment, the specific steps are as follows:

[0038] 1.在硅基板1上沉积二层相同膜质的掩模层,依次是第一层掩模层、第二层掩模层,例如,第一层掩模层用热氧炉管生长50-1000埃氧化膜,第二层掩模层用常压化学气相沉积(常压CVD)方法生长700-3000埃氧化膜。 [0038] Layer 1. The same mask layer is deposited on the film quality of the silicon substrate 1, followed by the first mask layer second layer, mask layer, e.g., the first mask layer by the thermal oxidation layer tubes 50-1000 angstroms grown oxide film, a second layer mask layer by atmospheric pressure chemical vapor deposition (atmospheric pressure CVD) oxide film growth method 700-3000 angstroms. 其中第一层掩模层的膜厚是最为关键的, 它的厚度以低于选择性外延生长过程中能完全消耗掉氧化膜厚度为标准。 Wherein the layer thickness of the first mask layer is the most critical, its thickness less than the selective epitaxial growth process can be completely consumed the oxide film thickness of the standard.

[0039] 2.利用光刻和刻蚀工艺,形成深沟槽形貌。 [0039] 2. by photolithography and etching processes, forming a deep trench morphology. 刻蚀使用光刻胶作为掩模层。 Etching using the photoresist layer as a mask.

[0040] 3.利用刻蚀氧化膜的湿法工艺把第一层掩模层和第二层掩模层的氧化膜向中间推,因为热氧的刻蚀速率和常压CVD生长的氧化膜刻蚀速率相差很大,最后会形成不同厚度梯度的台阶,即形成具有不同厚度梯度的掩模层形貌。 [0040] 3. The oxide film is etched using a wet process the oxide mask layer and the first layer a second layer of film to push the intermediate mask layer, because the etch rate of thermal oxide film and the oxygen pressure CVD Growth etch rates vary greatly, eventually forming a step gradient of different thickness, i.e., forming a mask layer having a different thickness gradient morphology.

Claims (10)

  1. 1. 一种防止选择性外延掩模层底部切口形貌的结构,其特征在于,在沟槽形成后、选择性外延生长前形成具有不同厚度梯度的掩模层,并且该掩模层在靠近沟槽侧壁区域的厚度比远离沟槽侧壁区域的厚度更薄。 An undercut structure morphology prevent selective epitaxial mask layer, wherein after the trench is formed, a selective epitaxial growth forming a mask layer having a different thickness gradient of the front and near the mask layer the thickness of the sidewall regions of trench is thinner than the side wall region away from the trench.
  2. 2.如权利要求1所述的防止选择性外延掩模层底部切口形貌的结构,其特征在于,所述掩模层是多层膜。 2. The structure of the notch bottom topography of the selective epitaxial mask layer prevents claim 1, wherein the mask layer is a multilayer film.
  3. 3.如权利要求2所述的防止选择性外延掩模层底部切口形貌的结构,其特征在于,所述多层膜是相同材质薄膜,或不同材质薄膜。 Structure Morphology undercut selective epitaxial layer prevents said mask as claimed in claim 2, wherein the multilayer film is a film of the same material, or of different film materials.
  4. 4.如权利要求1所述的防止选择性外延掩模层底部切口形貌的结构,其特征在于,所述具有不同厚度梯度是阶梯式变化,或连续的厚度变化。 4. The structure of the notch bottom topography of the selective epitaxial mask layer prevents claim 1, wherein said gradient having a different thickness changes stepwise, or continuously change in thickness.
  5. 5. 一种防止选择性外延掩模层底部切口形貌的方法,其特征在于,包括步骤如下:1)在硅基板上沉积三层不同介质膜的掩模层,由下至上依次为第一层掩模层、第二层掩模层和第三层掩模层;2)光刻和刻蚀形成带有掩模层的深沟槽结构;3)采用湿法工艺刻蚀第一层掩模层和第二层掩模层,采用不同刻蚀速率形成不同厚度梯度的台阶;4)采用湿法工艺刻蚀第三层掩模层,将第三层掩模层全部去除,形成具有不同厚度梯度的掩模层结构。 A method for selective epitaxial morphology undercut masking layer prevents, characterized by comprising the steps of: 1) a silicon substrate a mask layer is deposited a three-layer film different media, sequentially from the bottom of the first layer a mask layer, a second layer and a third layer mask layer mask layer; 2) forming a deep trench lithography and etching with a mask layer structure; 3) wet process etching the first mask layer mold mask layer and second layers, with different etch rate different thickness forming a step gradient; 4) wet etch process mask layer a third layer, the third layer of the mask layer is completely removed, forming a different structure mask layer thickness gradient.
  6. 6.如权利要求5所述的防止选择性外延掩模层底部切口形貌的方法,其特征在于,在步骤1)中,所述第一层掩模层的厚度以低于选择性外延生长过程中能完全消耗掉氧化膜厚度为标准。 6. The method of undercuts morphology selective epitaxial mask layer prevents claim 5, wherein, in step 1), the thickness of the first layer mask layer is lower than the selective epitaxial growth It can be completely consumed during oxide film thickness as the standard.
  7. 7.如权利要求5或6所述的防止选择性外延掩模层底部切口形貌的方法,其特征在于, 在步骤1)中,所述的第一层掩模层采用热氧炉管生长50-1000埃氧化膜;所述的第二层掩模层采用常压化学气相沉积方法生长700-3000埃氧化膜;所述的第三层掩模层采用化学气相沉积法生长200-10000埃氮化膜。 7. The method of selective epitaxial bottom topography slit mask layer 5 preventing or claim 6, wherein, in step 1), said first layer of thermal oxide mask layer tube growth 50-1000 Å oxide film; a second layer of the mask layer using atmospheric pressure chemical vapor deposition method 700-3000 Å oxide film growth; third layer of the mask layer grown by chemical vapor deposition 200-10000 Å nitride film.
  8. 8.如权利要求5所述的防止选择性外延掩模层底部切口形貌的方法,其特征在于,在步骤2)中,所述刻蚀可以使用光刻胶作为掩模层,也可以使用第三层掩模层的氮化膜作为掩模层。 8. The method undercuts morphology selective epitaxial mask layer prevents claim 5, wherein, in step 2), the etching mask layer can be used as a photoresist, may be used nitride film as the third layer of the mask layer, the mask layer.
  9. 9. 一种防止选择性外延掩模层底部切口形貌的方法,其特征在于,包括步骤如下:1)在硅基板上沉积二层相同介质膜的掩模层,由下至上依次为第一层掩模层、第二层掩模层;该第一层掩模层和第二层掩模层分别采用不同的方法沉积;2)光刻和刻蚀形成带有掩模层的深沟槽结构;3)采用湿法工艺刻蚀第一层掩模层和第二层掩模层,采用不同刻蚀速率形成不同厚度梯度的掩模层结构。 A method of selective epitaxial morphology undercut masking layer prevents, characterized by comprising the following steps: 1) the same mask layer dielectric film is deposited on a silicon substrate floor, a first order from the bottom layer a mask layer, a second layer mask layer; mask the first layer and second layers mask layer is deposited using different methods; 2) forming a deep trench lithography and etching with the mask layer structure; 3) wet process etching the first mask layer, the mask layer and second layers, using a different etch rate of the mask layer structure is formed of different thickness gradients.
  10. 10.如权利要求9所述的防止选择性外延掩模层底部切口形貌的方法,其特征在于,在步骤1)中,所述第一层掩模层采用热氧化法生长50-1000埃氧化膜;所述的第二层掩模层采用常压化学气相沉积方法生长700-3000埃氧化膜。 The method of selective epitaxial mask layer bottom topography preventing said cutout as claimed in claim 9, wherein, in step 1), the first mask layer is grown by thermal oxidation layer is 50-1000 angstroms oxide film; a second layer of the mask layer using atmospheric pressure chemical vapor deposition process for growing an oxide film 700-3000 angstroms.
CN 201010221607 2010-07-08 2010-07-08 Structure and method for preventing selective extension hard mask layer undercut feature CN102315114A (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010049182A1 (en) * 2000-06-05 2001-12-06 Yasushi Urakami Manufacturing method of semiconductor substrate
CN1941319A (en) * 2005-09-29 2007-04-04 中芯国际集成电路制造(上海)有限公司 Method and structure of double lining for isolating shallow slot
CN101593717A (en) * 2008-05-28 2009-12-02 上海华虹Nec电子有限公司 Preparation method of shallow trench isolation structure

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010049182A1 (en) * 2000-06-05 2001-12-06 Yasushi Urakami Manufacturing method of semiconductor substrate
CN1941319A (en) * 2005-09-29 2007-04-04 中芯国际集成电路制造(上海)有限公司 Method and structure of double lining for isolating shallow slot
CN101593717A (en) * 2008-05-28 2009-12-02 上海华虹Nec电子有限公司 Preparation method of shallow trench isolation structure

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