CN102291129A - Phase-locked loop circuit used for inhibiting VCO (voltage-controlled oscillator) voltage ripple - Google Patents
Phase-locked loop circuit used for inhibiting VCO (voltage-controlled oscillator) voltage ripple Download PDFInfo
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Abstract
The invention discloses a phase-locked loop circuit used for inhibiting a VCO (voltage-controlled oscillator) voltage ripple, which comprises a frequency-phase detector, a charge pump, an automatic frequency band selector, a loop filter, a voltage-controlled oscillator, a frequency divider and a first transmission gate. In the invention, as the transmission gate is used as a mode-converting switch, the VCO control voltage ripple caused by traditional MOS (metal-oxide semiconductor) transistor in different working models converting in the phase-locked loop, the electric charge injection and the clock feed-through are reduced, thus, the purpose of inhibiting the VCO voltage ripple is achieved. Meanwhile, the transmission gate is embedded in the third order loop filter, thus, the converting of different working models of the phase-locked loop is realized, and an onstate resistor of the transmission gate is utilized as the resistor of the third order loop filter, the noise is effectively filtered, and the VCO voltage ripple caused by the noise is greatly reduced.
Description
Technical field
The invention belongs to radio Phase Lock Technique field, be specifically related to a kind of phase-locked loop circuit that is used to suppress the VCO voltage ripple.
Background technology
Characteristics such as charge pump phase lock loop (CP-PLL) has fast, low noise, high accuracy are widely used in various telecommunication circuits, frequency synthesizer and the clock recovery circuitry.Traditional charge pump phase lock loop as shown in Figure 1, it comprises following module: phase frequency detector (Phase Frequency Detector, PFD), charge pump (Charge-Pump, CP), loop filter (Loop Filter), voltage controlled oscillator (Voltage Controlled Oscillator, VCO) and frequency divider (Frequency Divider).The phase difference of feedback signal of phase frequency detector reference signal detection and frequency divider output wherein, the voltage pulse signal that output is discrete, charge pump is converted into the continuous current signal with this signal, and loop filter discharged and recharged, the high-frequency noise of loop filter filtering loop, the voltage-controlled input of the voltage control voltage controlled oscillator of output, thus carry out tuning to the output frequency of voltage controlled oscillator.Voltage controlled oscillator adopts the LC oscillating structure, in order to guarantee its tuning range when reducing phase noise, can adopt the VCO of multiband, and it can solve this difficult problem by discrete method tuning and that continuous tuning combines.
With the phase-locked loop of automatic frequency band selection function as shown in Figure 2, it is compared with traditional charge pump phase lock loop structure, has increased automatic band selector and two switches that are used for switching the phase-locked loop operation pattern.Automatically band selector is by the frequency of comparison reference signal and feedback signal, and control switch capacitor array and phase-locked loop operation pattern make VCO be operated in needed frequency band.This kind phase-locked loop has two kinds of mode of operations, is respectively frequency lock pattern and phase locking pattern, is realized by frequency locked loop and phased lock loop respectively.The course of work is as follows: when loop is started working, and switch S 1 closure, switch S 2 disconnects, and the advanced line frequency of phase-locked loop locks, and selects the control word of suitable switched capacitor array.Switch S 1 disconnects then, switch S 2 closures, and phase-locked loop carries out phase locking, makes pll lock on accurate frequency.
What loop filter in this phase-locked loop adopted is the third order PLL path filter, and the third order PLL path filter is compared with second-order loop filter can better filter away high frequency noise; Phase-locked loop adopts metal-oxide-semiconductor as switch simultaneously, in actual applications, the source electrode of metal-oxide-semiconductor and drain electrode is concatenated in the loop, brings in disconnection or the closure that realizes loop by the grid of control metal-oxide-semiconductor.
But the phase-locked loop of the automatic frequency band selection function of above-mentioned band is when switch disconnects and be closed, can produce electric charge and inject and the clock feedthrough phenomenon, and this will directly cause the fluctuation of VCO control voltage.In addition, because the existence of metal-oxide-semiconductor dead resistance, the thermal noise of its generation also causes the fluctuation of VCO control voltage.Therefore the control voltage with VCO in the phase-locked loop of automatic frequency band selection function exists very big voltage ripple, and this has worsened the phase noise of phase-locked loop widely.
Summary of the invention
The invention provides a kind of phase-locked loop circuit that is used to suppress the VCO voltage ripple, inject and clock feedthrough, suppressed the voltage ripple of VCO effectively by adopting transmission gate and conducting resistance thereof to reduce electric charge, filtering phase noise.
A kind of phase-locked loop circuit that is used to suppress the VCO voltage ripple comprises:
Phase frequency detector is used to receive feedback signal and reference signal that frequency divider and outside reference source provide respectively, and produces the discrete voltage pulses signal;
Charge pump is used for described discrete voltage pulses signal is converted into the continuous current signal;
Loop filter is used for described continuous current signal is converted into voltage signal;
Automatically band selector is used to receive feedback signal and reference signal that frequency divider and outside reference source provide respectively, and produces mode control word and positive rp mode control signal;
Voltage controlled oscillator is used to receive described voltage signal and mode control word, and produces the VCO output signal;
Frequency divider is used to receive described VCO output signal, and produces described feedback signal;
First transmission gate, wherein, the input of first transmission gate receives the power supply voltage signal of half range value, the output of first transmission gate links to each other with the voltage-controlled input of described voltage controlled oscillator, and first control end of first transmission gate and second control end receive described positive mode control signal and rp mode control signal respectively.
Described loop filter is made of three electric capacity, a resistance and a transmission gate; Wherein, one end of first electric capacity links to each other with the input of an end of resistance and second transmission gate and constitutes the input of described loop filter, first electric capacity hold ground connection in addition, the end in addition of resistance links to each other with an end of second electric capacity, second electric capacity hold ground connection in addition, the output of second transmission gate links to each other with an end of the 3rd electric capacity and constitutes the output of described loop filter, the 3rd electric capacity hold ground connection in addition, first control end of second transmission gate and second control end receive described rp mode control signal and positive mode control signal respectively.
The operating voltage of described charge pump is the power supply voltage signal of full amplitude.
In the optimized technical scheme, described first transmission gate and second transmission gate all are to be 3: 1 PMOS pipe and NMOS pipe formation by breadth length ratio, the linearity of the equivalent resistance during the transmission gate conducting is best, and the stability that can improve loop filter also can effectively suppress the voltage ripple of voltage-controlled input.
In the optimized technical scheme, described voltage controlled oscillator is the multiband voltage controlled oscillator, can guarantee the tuning range of VCO when reducing phase noise.
Operation principle of the present invention is:
When phase-locked loop is started working, automatically band selector is started working, its state output end produces the preset state control word, the positive mode control signal of its pattern output output is a low level, the rp mode control signal is a high level, second transmission gate is disconnected, the first transmission gate closure, the voltage-controlled input of voltage controlled oscillator is received on the reference voltage, the grid of the metal-oxide-semiconductor of switched capacitor array receives the preset state control word of automatic band selector output in the voltage controlled oscillator, and this moment, loop was the frequency lock pattern; Automatically band selector is determined mode control word by the frequency of comparison reference signal and feedback signal.If detect the frequency of the frequency of feedback signal less than reference signal, then by reducing the frequency that control word improves feedback signal, if detect the frequency of the frequency of feedback signal greater than reference signal, then by increasing the frequency that control word reduces feedback signal, if the frequency that detects feedback signal equals the frequency of reference signal, then the retentive control word is constant.
When frequency loop locks, then the positive mode control signal of pattern output output is a high level, the rp mode control signal is a low level, make the second transmission gate closure, first transmission gate disconnects, the voltage-controlled input of voltage controlled oscillator is received the output of loop filter, and this moment, loop entered the phase locking pattern; The phase difference of phase frequency detector reference signal detection and feedback signal, output and the input of the proportional discrete voltage pulses signal of phase difference to charge pump, the unlatching and the shutoff of control charge pump, and then loop filter discharged and recharged, thereby change the voltage of the voltage-controlled input of voltage controlled oscillator, up to loop-locking.
Useful technique effect of the present invention is:
(1) the present invention is by adopting transmission gate as mode selector switch, reduced because conventional MOS pipe caused VCO control voltage ripple when the phase-locked loop different working modes switches, reduce electric charge and injected and clock feedthrough, thereby reached the purpose that suppresses the VCO voltage ripple.
(2) the present invention is embedded into transmission gate in the third order PLL path filter, both played the effect that the phase-locked loop different working modes switches, utilized the resistance of the conducting resistance of transmission gate again as the third order PLL path filter, effectively filtering noise, thereby reduced the VCO voltage ripple that causes owing to noise greatly.
Description of drawings
Fig. 1 is the structural representation of conventional phase-lock loop circuit.
Fig. 2 is the structural representation of tradition with the phase-locked loop circuit of automatic frequency band selection function.
Fig. 3 is the structural representation of phase-locked loop circuit of the present invention.
Fig. 4 is the voltage ripple analogous diagram of tradition with voltage controlled oscillator in the phase-locked loop circuit of automatic frequency band selection function.
Fig. 5 is the voltage ripple analogous diagram of voltage controlled oscillator in the phase-locked loop circuit of the present invention.
Embodiment
In order more specifically to describe the present invention, technical scheme of the present invention and relative theory thereof are elaborated below in conjunction with the drawings and the specific embodiments.
As shown in Figure 3, a kind of phase-locked loop circuit that is used to suppress the VCO voltage ripple comprises: phase frequency detector, charge pump, automatic band selector, loop filter, voltage controlled oscillator, frequency divider and first transmission gate.
The reference input of phase frequency detector links to each other with the outside reference source, and the feedback input end of phase frequency detector links to each other with the output of frequency divider, receiving reference signal and feedback signal respectively, thereby produces the discrete voltage pulses signal.
Charge pump UP input links to each other with the UP output of phase frequency detector, and charge pump DN input links to each other with the DN output of phase frequency detector, to receive the discrete voltage pulses signal and to be translated into the continuous current signal.
Automatically the reference input of band selector links to each other with the outside reference source, and the feedback input end of band selector links to each other with the output of frequency divider automatically, receiving reference signal and feedback signal respectively, thereby produces mode control word and rp mode control signal just.
The input of loop filter links to each other with the electric charge delivery side of pump, to receive the continuous current signal and to be translated into voltage signal;
Loop filter is made of three electric capacity, a resistance and a transmission gate; Wherein, one end of first capacitor C 1 links to each other with the input of an end of resistance R and the second transmission gate S2 and constitutes the input of loop filter, first capacitor C 1 hold ground connection in addition, the end in addition of resistance R links to each other with an end of second capacitor C 2, second capacitor C 2 hold ground connection in addition, the output of the second transmission gate S2 links to each other with an end of the 3rd capacitor C 3 and constitutes the output of loop filter, the 3rd capacitor C 3 hold ground connection in addition, first control end of the second transmission gate S2 links to each other with the pattern output of automatic band selector with second control end, and receives rp mode control signal/SW and positive mode control signal SW respectively.
The voltage-controlled input of voltage controlled oscillator links to each other with the output of loop filter, to receive voltage signal; The grid of the metal-oxide-semiconductor of switched capacitor array links to each other with the state output end of automatic band selector in the voltage controlled oscillator, with the accepting state control word, thereby produces the VCO output signal.
The input of frequency divider links to each other with the output of voltage controlled oscillator, to receive the VCO output signal and to produce feedback signal.
The input of first transmission gate receives the power supply voltage signal VDD/2 of half range value, the output of first transmission gate links to each other with the voltage-controlled input of voltage controlled oscillator, first control end of first transmission gate links to each other with the pattern output of automatic band selector with second control end, and receives positive mode control signal SW and rp mode control signal/SW respectively.
First transmission gate and second transmission gate all are to be that 3: 1 PMOS pipe and NMOS pipe constitutes by breadth length ratio, and it all is four common port organizations of employing that PMOS pipe and NMOS manage, and is respectively source electrode, drain electrode, grid and body end.The body end of PMOS pipe all receives power supply voltage signal VDD and leaks to reduce electric current, and the body end of NMOS pipe all ground connection leaks to reduce electric current.
When the present embodiment phase-locked loop is started working, automatically band selector is started working, its state output end produces the preset state control word, the positive mode control signal SW of its pattern output output is a low level, rp mode control signal/SW is a high level, the second transmission gate S2 is disconnected, the first transmission gate S1 closure, the voltage-controlled input of voltage controlled oscillator is received on the reference voltage V DD/2, the grid of the metal-oxide-semiconductor of switched capacitor array receives the preset state control word of automatic band selector output in the voltage controlled oscillator, and this moment, loop was the frequency lock pattern; Automatically band selector is determined mode control word by the frequency of comparison reference signal and feedback signal.If detect the frequency of the frequency of feedback signal less than reference signal, then by reducing the frequency that control word improves feedback signal, if detect the frequency of the frequency of feedback signal greater than reference signal, then by increasing the frequency that control word reduces feedback signal, if the frequency that detects feedback signal equals the frequency of reference signal, then the retentive control word is constant.
When frequency loop locks, then the positive mode control signal SW of pattern output output is a high level, rp mode control signal/SW is a low level, make the second transmission gate S2 closure, the first transmission gate S1 disconnects, the voltage-controlled input of voltage controlled oscillator is received the output of loop filter, and this moment, loop entered the phase locking pattern; The phase difference of phase frequency detector reference signal detection and feedback signal, output and the proportional discrete voltage pulses signal of phase difference UP, DN input to charge pump, the unlatching and the shutoff of control charge pump, and then loop filter discharged and recharged, thereby change the voltage of the voltage-controlled input of voltage controlled oscillator, up to loop-locking.
Figure 4 shows that the Spectre analog result schematic diagram of tradition with the phase-locked loop circuit of automatic frequency band selection function, wherein abscissa is represented simulation time, and ordinate is represented the voltage of voltage-controlled input.As we know from the figure, when pll lock, the voltage-controlled input terminal voltage ripple of voltage controlled oscillator is 173mv.
Figure 5 shows that the Spectre analog result schematic diagram of the phase-locked loop circuit of the automatic frequency band selection function of present embodiment band.As can be known, when pll lock, the voltage-controlled input terminal voltage ripple of voltage controlled oscillator is 1.85mv from enlarged drawing.Contrast as can be known, present embodiment can be reduced to 1.85mv to the voltage-controlled input terminal voltage ripple of voltage controlled oscillator from original 173mv, has suppressed 98.93% ripple.
Claims (4)
1. phase-locked loop circuit that is used to suppress the VCO voltage ripple is characterized in that: comprising:
Phase frequency detector is used to receive feedback signal and reference signal that frequency divider and outside reference source provide respectively, and produces the discrete voltage pulses signal;
Charge pump is used for described discrete voltage pulses signal is converted into the continuous current signal;
Loop filter is used for described continuous current signal is converted into voltage signal;
Automatically band selector is used to receive feedback signal and reference signal that frequency divider and outside reference source provide respectively, and produces mode control word and positive rp mode control signal;
Voltage controlled oscillator is used to receive described voltage signal and mode control word, and produces the VCO output signal;
Frequency divider is used to receive described VCO output signal, and produces described feedback signal;
First transmission gate, wherein, the input of first transmission gate receives the power supply voltage signal of half range value, the output of first transmission gate links to each other with the voltage-controlled input of described voltage controlled oscillator, and first control end of first transmission gate and second control end receive described positive mode control signal and rp mode control signal respectively.
2. the phase-locked loop circuit that is used to suppress the VCO voltage ripple according to claim 1 is characterized in that: described loop filter is made of three electric capacity, a resistance and a transmission gate; Wherein, one end of first electric capacity links to each other with the input of an end of resistance and second transmission gate and constitutes the input of described loop filter, first electric capacity hold ground connection in addition, the end in addition of resistance links to each other with an end of second electric capacity, second electric capacity hold ground connection in addition, the output of second transmission gate links to each other with an end of the 3rd electric capacity and constitutes the output of described loop filter, the 3rd electric capacity hold ground connection in addition, first control end of second transmission gate and second control end receive described rp mode control signal and positive mode control signal respectively.
3. the phase-locked loop circuit that is used to suppress the VCO voltage ripple according to claim 1 and 2 is characterized in that: described first transmission gate and second transmission gate all are to be 3: 1 PMOS pipe and NMOS pipe formation by breadth length ratio.
4. the phase-locked loop circuit that is used to suppress the VCO voltage ripple according to claim 1 is characterized in that: described voltage controlled oscillator is the multiband voltage controlled oscillator.
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| CN 201110146596 CN102291129B (en) | 2011-06-01 | 2011-06-01 | Phase-locked loop circuit used for inhibiting VCO (voltage-controlled oscillator) voltage ripple |
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| CN102412811A (en) * | 2012-01-06 | 2012-04-11 | 桂林电子科技大学 | Adjustable non-overlapping clock signal generating method and generator |
| CN102970031A (en) * | 2012-11-05 | 2013-03-13 | 广州润芯信息技术有限公司 | Phase-locked loop frequency synthesizer and method for keeping bandwidth of frequency synthesizer loop to be stable |
| CN103036411A (en) * | 2012-11-30 | 2013-04-10 | 上海宏力半导体制造有限公司 | Charge pump circuit |
| CN103684436A (en) * | 2012-09-10 | 2014-03-26 | 国际商业机器公司 | Phase locked loop circuit and method of generating clock signals using the phase locked loop |
| CN104767523A (en) * | 2015-04-09 | 2015-07-08 | 哈尔滨工业大学 | Second-order switch low-pass filter in charge pump phase-locked loop and locking method adopting second-order switch low-phase filter to achieve loop circuit |
| CN105024693A (en) * | 2015-07-14 | 2015-11-04 | 中国科学技术大学先进技术研究院 | Low-stray phase-locked loop frequency synthesizer circuit |
| CN108631774A (en) * | 2017-03-22 | 2018-10-09 | 中芯国际集成电路制造(上海)有限公司 | Phaselocked loop and its start-up circuit start method |
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| CN109565282A (en) * | 2016-07-27 | 2019-04-02 | 株式会社索思未来 | Injection Locked Type PLL circuit |
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| CN101662282A (en) * | 2008-08-27 | 2010-03-03 | 中国科学院微电子研究所 | Frequency synthesizer used in OFDM UWB |
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| CN102412811A (en) * | 2012-01-06 | 2012-04-11 | 桂林电子科技大学 | Adjustable non-overlapping clock signal generating method and generator |
| CN102412811B (en) * | 2012-01-06 | 2013-11-20 | 桂林电子科技大学 | Adjustable non-overlapping clock signal generating method and generator |
| CN103684436A (en) * | 2012-09-10 | 2014-03-26 | 国际商业机器公司 | Phase locked loop circuit and method of generating clock signals using the phase locked loop |
| CN102970031B (en) * | 2012-11-05 | 2015-04-08 | 广州润芯信息技术有限公司 | Phase-locked loop frequency synthesizer |
| CN102970031A (en) * | 2012-11-05 | 2013-03-13 | 广州润芯信息技术有限公司 | Phase-locked loop frequency synthesizer and method for keeping bandwidth of frequency synthesizer loop to be stable |
| CN103036411B (en) * | 2012-11-30 | 2017-03-08 | 上海华虹宏力半导体制造有限公司 | Charge pump circuit |
| CN103036411A (en) * | 2012-11-30 | 2013-04-10 | 上海宏力半导体制造有限公司 | Charge pump circuit |
| CN104767523B (en) * | 2015-04-09 | 2018-04-24 | 哈尔滨工业大学 | Second order in charge pump phase lock loop is switched low-pass filter and the locking means of loop is realized using second order switch low-pass filter |
| CN104767523A (en) * | 2015-04-09 | 2015-07-08 | 哈尔滨工业大学 | Second-order switch low-pass filter in charge pump phase-locked loop and locking method adopting second-order switch low-phase filter to achieve loop circuit |
| CN105024693A (en) * | 2015-07-14 | 2015-11-04 | 中国科学技术大学先进技术研究院 | Low-stray phase-locked loop frequency synthesizer circuit |
| CN105024693B (en) * | 2015-07-14 | 2017-10-27 | 中国科学技术大学先进技术研究院 | A kind of low spurious phase-locked loop frequency integrator circuit |
| CN109565282A (en) * | 2016-07-27 | 2019-04-02 | 株式会社索思未来 | Injection Locked Type PLL circuit |
| CN109565282B (en) * | 2016-07-27 | 2023-01-13 | 株式会社索思未来 | Injection locking type PLL circuit |
| CN108631774B (en) * | 2017-03-22 | 2021-07-13 | 中芯国际集成电路制造(上海)有限公司 | Phase-locked loop and starting circuit and starting method thereof |
| CN108631774A (en) * | 2017-03-22 | 2018-10-09 | 中芯国际集成电路制造(上海)有限公司 | Phaselocked loop and its start-up circuit start method |
| TWI800601B (en) * | 2018-07-13 | 2023-05-01 | 南韓商三星電子股份有限公司 | Integrated circuit |
| CN109245761A (en) * | 2018-09-21 | 2019-01-18 | 电子科技大学 | A kind of pause and restoration methods of phaselocked loop |
| CN109245761B (en) * | 2018-09-21 | 2021-07-02 | 电子科技大学 | Method for suspending and recovering phase-locked loop |
| CN112087228A (en) * | 2019-06-13 | 2020-12-15 | 无锡有容微电子有限公司 | Phase-locked loop circuit |
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