CN102263429B - Micro-power uninterruptible power supply - Google Patents
Micro-power uninterruptible power supply Download PDFInfo
- Publication number
- CN102263429B CN102263429B CN2011101737524A CN201110173752A CN102263429B CN 102263429 B CN102263429 B CN 102263429B CN 2011101737524 A CN2011101737524 A CN 2011101737524A CN 201110173752 A CN201110173752 A CN 201110173752A CN 102263429 B CN102263429 B CN 102263429B
- Authority
- CN
- China
- Prior art keywords
- field effect
- effect transistor
- connects
- capacitor
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Inverter Devices (AREA)
- Rectifiers (AREA)
Abstract
The invention relates to a micro-power uninterruptible power supply, which adopts a rectifier-booster and a differential inverter and realizes total power of an uninterruptible power supply. The micro-power uninterruptible power supply has the major characteristics that the total output power can be obtained by only converting the power of a minimal part of input power, that is, actual power conversion of the most part of the input power is not required to be carried out or is not required to be transferred through a magnetic-core transformer or an inductor, and directly reaches an output end to be the output power. According to the micro-power uninterruptible power supply provided by the invention, main power devices work in the power frequency, and EMI (Electromagnetic Interference) is not generated; the circuit is simple, therefore the power consumption is extremely low, the service life is extremely long, and the cost, the volume, the weight and the power consumption are one tenth of the traditional uninterruptible power supply.
Description
Technical field
The present invention relates to a kind of little power consumption uninterrupted power supply.
Background technology
The tradition uninterrupted power supply becomes high-frequency square-wave voltage to the direct voltage of input sine wave voltage or storage battery earlier, use electric capacity, inductor filter then, become alternating voltage output again, this method of getting half the result with twice the effort, working hard but get little result, obviously efficient is low and waste energy, and following defect is arranged:
1) method of employing PWM pulse-width modulation, the production process of high-frequency, high-power square wave, just strong EMI disturbs the process that produces, and the high power DC inverter is equivalent to a high frequency power transmitting station, can infer, and the interference that produces is what serious.
2) in the power conversion process, the whole of input power must carry out actual power conversion, and the power of all conversion must could arrive output by core transformers or inductance transmission, and loss is big, and efficient is low.
Summary of the invention
Fig. 1 is the theory diagram of little power consumption uninterrupted power supply, when civil power just often, the rectification stepup transformer to the civil power of input carry out rectification, boost, power factor correction, simultaneously storage battery be can't harm charging, by the differential inverter, direct voltage is reverse into the sine voltage output of frequency-and voltage-stabilizing then.
When mains failure, battery tension is reverse into the sine voltage output of frequency-and voltage-stabilizing by the differential inverter.
Little power consumption uninterrupted power supply is made up of rectification stepup transformer and differential inverter, and input civil power and storage battery all are connected on the rectification stepup transformer, and the differential inverter is connected on after the rectification stepup transformer.
Put in order and fill stepup transformer by field effect transistor Q1, Q2, inductance L 1, capacitor C 1 is formed, and the drain electrode of field effect transistor Q1 connects the positive pole of capacitor C 1, and its source electrode connects the drain electrode of field effect transistor Q2, the source ground of field effect transistor Q2, the source electrode of inductance L 1 one termination field effect transistor Q1, the negative pole of a termination capacitor C1, the negative pole of capacitor C 1 constitutes end points Vi, input voltage is connected between Vi and the ground, and output voltage V o is by the positive pole output of capacitor C 1.
The differential inverter is made up of a voltage cutting circuit and a N rank capacitance network, the input of the output termination voltage cutting circuit of N rank capacitance network.
The voltage cutting circuit is made up of field effect transistor Q9, Q12, their source electrode is connected together, by resistance R 1 ground connection, capacitor C 8 and resistance R 1 parallel connection, the drain electrode of field effect transistor Q9 connects the positive pole of capacitance network, the drain electrode of field effect transistor Q12 connects the negative pole of capacitance network, and the driving signal V12 of field effect transistor Q9, Q12 is the sine wave signal of amplitude 310V.
N rank capacitance network is made up of positive and negative both arms,
The positive arm of capacitance network is by capacitor C 1, C3, C5, C7 and field effect transistor Q3, Q6, Q8, Q11 forms, the positive pole of capacitor C 1 connects the source electrode of field effect transistor Q3, the drain electrode of field effect transistor Q3 connects the negative electrode of diode D1, the positive pole of capacitor C 3 connects the source electrode of field effect transistor Q6, the drain electrode of field effect transistor Q6 connects the anode of diode D1 and the negative pole of capacitor C 1, the positive pole of capacitor C 5 connects the source electrode of field effect transistor Q8, the drain electrode of field effect transistor Q8 connects the anode of diode D3 and the negative pole of capacitor C 3, the positive pole of capacitor C 7 connects the source electrode of field effect transistor Q11, the drain electrode of field effect transistor Q11 connects the anode of diode D5 and the negative pole of capacitor C 5, the minus earth of capacitor C 7, diode D1, D3, the negative electrode of D5 connects the positive pole of capacitance network simultaneously, i.e. the drain electrode of field effect pipe Q9;
The negative arm of capacitance network is by capacitor C 2, C4, C6, C9 and field effect transistor Q1, Q5, Q7, Q10 forms, the negative pole of capacitor C 2 connects the source electrode of field effect transistor Q1, the drain electrode of field effect transistor Q1 connects the anode of diode D2, the negative pole of capacitor C 4 connects the source electrode of field effect transistor Q6, the drain electrode of field effect transistor Q5 connects the negative electrode of diode D2 and the positive pole of capacitor C 2, the negative pole of capacitor C 6 connects the source electrode of field effect transistor Q7, the drain electrode of field effect transistor Q7 connects the negative electrode of diode D4 and the positive pole of capacitor C 4, the negative pole of capacitor C 9 connects the source electrode of field effect transistor Q10, the drain electrode of field effect transistor Q10 connects the negative electrode of diode D3 and the positive pole of capacitor C 6, the plus earth of capacitor C 9, diode D2, D4, the anode of D6 connects the negative pole of capacitance network simultaneously, i.e. the drain electrode of field effect pipe Q12;
Its positive pole of minus earth of input positive direct-current voltages V4 connects the drain electrode of field effect transistor Q4, the source electrode of field effect transistor Q4 connects the drain electrode of field effect transistor Q9, the plus earth of input negative dc voltage V6, its negative pole connects the drain electrode of field effect transistor Q2, and the source electrode of field effect transistor Q2 connects the drain electrode of field effect transistor Q12;
Gate drive signal V1, V2 are the civil power synchronous square-wave signals, positive arm driving signal V13, V10, V8, V5 and negative arm driving signal V11, V9, V7, V3 also are the civil power synchronous square-wave signals, but pulsewidth is successively decreased with every 2ms, time-delay increases progressively with every 1ms, and the driving signal V12 of field effect transistor Q9, Q12 is the sine wave signal of amplitude 310V.
Description of drawings
Fig. 1 is little power consumption uninterrupted power supply theory diagram;
Fig. 2 is the rectification booster circuit;
Fig. 3 is each point voltage simulation waveform of rectification booster circuit;
Fig. 4 single-phase power factor correcting device;
Each point voltage simulation waveform of Fig. 5 single-phase power factor correcting device;
Fig. 6 is the positive and negative symmetrical voltage power factor corrector of output;
Fig. 7 is each point voltage simulation waveform of the positive and negative symmetrical voltage power factor corrector of output;
Fig. 8 is the direct-flow inverter schematic circuit;
Fig. 8 is each point voltage simulation waveform of direct-flow inverter schematic circuit;
Figure 10 is 4 rank differential inverter schematic circuits;
Figure 11 is 4 rank pagoda wave generation circuits;
Figure 12 is sinusoidal wave cutting 4 rank pagoda wave process emulation;
Figure 13 is 4 rank pagoda wave voltage simulation waveforms;
Figure 14 is the output voltage waveforms behind the sinusoidal wave cutting 4 rank pagoda ripples;
Figure 15 is little power consumption uninterrupted power supply side circuit;
Figure 16 is 8 rank pagoda wave voltage simulation waveforms;
Figure 17 is sinusoidal wave cutting 8 rank pagoda wave process emulation;
Figure 18 is 16 rank pagoda wave voltage simulation waveforms.
Fig. 2 is the schematic circuit of rectification stepup transformer, and V1, V3 are the gate drive signals of power MOS pipe Q1, Q2, all is the square-wave signal of 100KHz, the leading V3 half period of V1.Behind the circuit start, the Q2 saturation conduction, to inductance L 1 charging, inductive current is linear to be increased battery V2 by Q2, and the energy that stores in the inductance is on the increase, and meanwhile, the voltage on the capacitor C 2 discharges to load R2.After the half period, Q2 ends, the Q1 saturation conduction, and the electric energy that is stored in the inductance L 1 charges to capacitor C 1 by Q1.Voltage on the C1 is superimposed upon on the cell voltage V2, in load resistance R2 power supply, also to capacitor C 2 chargings.Fig. 3 is the simulation waveform of each point voltage, is successively from top to bottom: output voltage V o, input voltage Vi, bucking voltage Vc.Can see that from figure output voltage V o (12V) is input voltage Vi (10.5V) and bucking voltage Vc (1.5V) sum.
The circuit of Fig. 2 also can compensate the steamed bun ripple, namely use on the steamed bun ripple (Y=Sinx) after a bucking voltage (Y=1-Sinx) is superimposed upon rectification, make the steamed bun ripple become straight line (Y=1), be that the steamed bun wave voltage has become direct voltage because of voltage compensation, and the big capacitor filtering of unprovoked become direct voltage.This moment civil power all amplitude correspondences all constantly, can charge to electric capacity, have electric current to go out from the net effluent, so input AC current waveform and input ac voltage waveform fit like a glove, power factor be 1 and THD this zero.
Fig. 4 is the circuit that the steamed bun ripple is compensated, battery V2 in Fig. 2 circuit replaces the steamed bun wave voltage after the rectification, compensating circuit will make output voltage become direct voltage, the shape that must superpose on the steamed bun wave voltage compensates as the voltage of (1-Sinx), and its result is our target of pursuing for it just.Fig. 5 is the simulation waveform of each point voltage of steamed bun wave voltage compensating circuit, is successively from top to bottom: input voltage Vi, bucking voltage Vc, input voltage Ii, can see that from analogous diagram input current and input voltage are with frequency, homophase, synchronous, and waveform is similar fully.
Fig. 6 is the boost rectifier circuit of positive and negative symmetrical voltage output, between the civil power positive half period, positive steamed bun ripple is received the input of the positive rectification stepup transformer of being made up of Q1 through diode D3, carry out power factor correction, between the civil power negative half-cycle, negative steamed bun ripple is received the input of the negative rectifier stepup transformer of being made up of Q2 through diode D4, carry out power factor correction, Fig. 7 is the simulation waveform of input voltage and output voltage, can see, input voltage and input current are synchronous fully, same frequently, homophase.
Fig. 8 is the schematic circuit of little power consumption direct-flow inverter, and V1, V3 are positive and negative symmetrical direct voltages, are added in the drain electrode of Q1, Q2 respectively, and connecing amplitude between grid and the ground simultaneously is the sine voltage V2 of 318V, and R1, C1 are connected on common source.
The positive half cycle of V2, the Q1 conducting, direct voltage V1 is added on the load resistance R1, because source voltage is followed the tracks of grid potential, so produce the positive half cycle steamed bun wave voltage that amplitude is about 308V (the V2 amplitude deducts a gate source voltage Vgs) in resistance R 1, the negative half period of V2, the Q2 conducting, direct voltage V3 is added on the load resistance R1, because source voltage is followed the tracks of grid potential, so produce the negative half period steamed bun wave voltage that amplitude is about 308V (the V2 amplitude deducts a gate source voltage Vgs) in resistance R 1, one-period finishes, and obtains the sinewave output voltage Vsin of one-period at load resistance R1.Fig. 9 is the simulation waveform of output voltage V sin, can see, the frequency of output voltage, phase place, amplitude are only relevant with grid institute increase control signal, the circuit that Q1, Q2 form, voltage cutting circuit just, Q1, Q2 grid control signal scale off one as a cutter from drain voltage, and the shape of this part and grid institute plus signal waveform are identical.
Fig. 8 circuit has two defectives:
1) applied voltage left area after cutting is too big, if applied voltage is 1, then the sine wave that is scaled off by signal voltage is Y=Sinx, and left area is exactly S=(1-Sinx), accounts for 36% of input voltage;
2) downcutting the sinusoidal wave last part in back (1-Sinx) all slatterns in the drain-source utmost point heating of Q1, Q2.
Figure 10 is differential inverter operation principle schematic diagram, and the course of work is as follows:
1) sinusoidal wave preceding 10ms area is along Y-axis N five equilibrium, and this sentences 4 and is divided into example;
2) every five equilibrium serves as to make 4 rectangles on one side to go to the bottom, and heap tires out into turriform;
3) utilize capacitance network to produce the turriform ripple by input direct voltage, this is the first step of implementing dc inversion;
4) cut this turriform internally with sine wave, sinusoidal wave amplitude selection principle is to make sine wave just cut with the turriform phase of wave in inside;
5) the turriform ripple is cut the entity after the unnecessary part, is the sine voltage Va of output just;
6) the unnecessary part that scales off of turriform ripple is broken up, is integrated, and is transformed into sine voltage Vb, exports simultaneously with aforementioned Va, produces the preceding 10ms waveform of output voltage V o;
7) sine wave back 10ms area processing method is the same, produces the back 10ms waveform of output voltage V o.
Figure 11 is 4 rank differential inverter side circuits, about two circuit symmetries fully partly.For left part part circuit in fact, from 0ms, power MOS pipe Q4 opens (V2 high level), and power supply positive voltage V4 is charged to 1/4th supply voltages by diode pair capacitor C 1, C3, C5, C7 charging in the body of Q3, Q6, Q8, Q11; Behind the 10ms, Q4 turn-offs, and metal-oxide-semiconductor Q9 is open-minded, capacitor C 7, C5, C3, C1 discharge to load R1 successively by Q11 and D6, Q8 and D3, Q6 and D1, Q3 respectively, successively decrease discharge time successively, and decimal reduction time changes by sinusoidal rule, produces positive pagoda wave voltage at load resistance R1.
For right part part circuit in fact, from 10ms, metal-oxide-semiconductor Q2 open (V1 low level), power-voltage V6 is charged to 1/4th supply voltages by diode pair capacitor C 2, C4, C6, C9 charging in the body of Q1, Q5, Q7, Q10; Behind the 10ms, Q1 turn-offs, and metal-oxide-semiconductor Q12 is open-minded, capacitor C 9, C6, C4, C2 discharge to load R1 successively by Q10 and D6, Q7 and D4, Q5 and D2, Q1 respectively, successively decrease discharge time successively, and decimal reduction time changes by sinusoidal rule, produces negative pagoda wave voltage at load resistance R1.Whole hysteresis left part part circuit 10ms operate time of right part part contactor, then being added in Q9, Q12 drain electrode is the pagoda wave voltage of symmetry, Figure 13 is the simulation waveform of pagoda ripple.
Metal-oxide-semiconductor Q8, Q12 have formed voltage cutting circuit shown in Figure 8, be added in the positive and negative symmetrical pagoda wave voltage of Q9, Q12 drain electrode, by the sinusoidal wave V12 cutting that is added in grid, cut after the next sinusoidal steamed bun ripple, left is 8 little right-angled triangles, and its total area ratio S=(1-Sinx) is much smaller.
Above-mentioned differential inversion process in two steps, the capacitance network that the first step is made up of C1-C7, C9 produces pagoda wave voltage as shown in figure 13, second step was cutter with Q9, Q12 grid sine voltage V12, from the inner cutting of pagoda wave voltage pagoda ripple, just make that right angle and the sine wave of pagoda ripple inside are tangent, so, pagoda ripple right angle is externally all scaled off, remaining part has formed complete sine voltage.
Pagoda wave voltage by the capacitance network generation, be actually the stack of four differential voltages, if sinusoidal wave amplitude is 1, be divided into the N five equilibrium sinusoidal wave in Y-axis, make rectangle with going to the bottom of each five equilibrium, formed the pagoda wave voltage after these rectangle stacks, because sine voltage is formed by stacking by differential voltage fully, so claim the differential inverter, by several differential superimposed, just claim the differential inversion of several rank, the inverter here is by four differential superimposed forming, so claim quadravalence differential inverter, the exponent number of differential inversion also is the number of capacitor in the capacitance network.The simulation waveform of Figure 12 is the overall process that the sinusoidal voltage ripple cuts the pagoda voltage wave from its inside, and Figure 14 is through the output voltage V sin after the sine wave cutting.
Embodiment
Figure 15 is little power consumption uninterrupted power supply practical circuit, the positive and negative biphase rectification stepup transformer of being made up of Q3, Q8 is identical with Fig. 6 circuit, wherein charge constant current, constant voltage source finished by the positive negative rectifier stepup transformer that Q3, Q8 etc. forms, charge in batteries is partly formed lossless charger by Q1, Q2 and Q19, Q20 etc. and is finished, and the inversion part is finished by the three-phase differential inverter that Q12, Q13, Q14, Q16, Q17, Q18 etc. form.
Single phase alternating current (A.C.) voltage V4 enters A, B 2 points in the voltage multiplying rectifier mode, and positive and negative symmetrical rectification stepup transformer is finished the boosting of positive negative dc voltage, stablized, constant current, constant voltage, input direct voltage stable and boosting.The constant current function is that the direct voltage that detects on the resistance R 11 is finished, height according to the positive and negative symmetrical direct voltage of input, select the number N of optimal charge battery, the principle of selecting is to make the terminal voltage of N storage battery be equal to or higher than input direct voltage, the rectification stepup transformer can reach steady state value according to the charging of the direct voltage adjustment on the resistance R 11 stream like this, if the terminal voltage of N storage battery is lower than input direct voltage, then charging current will be out of hand.The constant voltage function is that the direct voltage that detects 2 of C, D is finished, the terminal voltage different according to various storage batterys, determine the breakover point of constant current commentaries on classics constant voltage, constant voltage charge, height according to the positive and negative symmetrical direct voltage of input, select the number N of optimal charge battery, the principle of selection is identical with the situation of above-mentioned constant current.
Input voltage shown in Figure 15 is single-phase voltage doubling rectifier circuit, and positive and negative symmetrical 310V is if positive and negative symmetrical direct voltage directly inserts A, B 2 points, if three-phase alternating voltage inserts A, B 2 points in three-phase double half-wave rectification mode.
Constant current, the constant voltage source that rectification boosting circuit produces directly enters the harmless charging part of being made up of Q1, Q2 and Q19, Q20, the three-phase differential inverter of being made up of Q12, Q13, Q14, Q16, Q17, Q18 etc. obtains battery positive and negative symmetrical direct voltage from E, F at 2, here the pagoda wave voltage produces circuit and the omission of voltage cutting circuit, in aforementioned, lossless charger belongs to prior art to the inversion principle.
Figure 16 is little power consumption uninterrupted power supply pagoda wave voltage simulation waveform (8 rank), Figure 17 be the pagoda ripple by the simulation waveform of sinusoidal wave cutting process, when pagoda ripple exponent number N=8, the little triangle gross area that scales off is very little.
Figure 11 is the simulation waveform of pagoda wave voltage when N=16, can see from figure, and when cutting this 16 rank pagoda ripple with sine wave, the little triangle gross area that cuts down is littler.
Some explanation:
1) rectification stepup transformer generation bucking voltage is Vc=1-Sinx, account for the very little part of output gross power, all the other exhausted most power are not participated in actual power conversion, the power that accounts for the very little part of gross power carries out the power conversion, the power loss that produces is very little, so the efficient of rectification stepup transformer is near 100%.
2) the differential inverter adopts capacitance network to produce the pagoda wave voltage, then with sinusoidal wave cutting pagoda ripple, the process that the pagoda ripple produces, the saturation voltage drop that has only power MOS pipe and power diode, the little triangle gross area that the voltage cutting process scales off is very little, the power loss that these small sizes carry out the power conversion is very little, so the efficient of differential inverter is near 100%.
3) lossless charger is partly adopted in the charging of little power consumption uninterrupted power supply, and just the life of storage battery improves greatly, can take full advantage of battery capacity, and can not influence overall efficiency.
Claims (1)
1. little power consumption uninterrupted power supply, it is characterized in that: little power consumption uninterrupted power supply is made up of rectification stepup transformer and differential inverter, and input civil power and storage battery all are connected on the rectification stepup transformer, and the differential inverter is connected on after the rectification stepup transformer;
1) the rectification stepup transformer is by field effect transistor Q21, Q22, inductance L 21, capacitor C 21 is formed, and the drain electrode of field effect transistor Q21 connects the positive pole of capacitor C 21, and its source electrode connects the drain electrode of field effect transistor Q22, the source ground of field effect transistor Q22, the source electrode of inductance L 21 1 termination field effect transistor Q21, the negative pole of a termination capacitor C21, the negative pole of capacitor C 21 constitutes end points Vi, input voltage is connected between Vi and the ground, and output voltage V o is by the positive pole output of capacitor C 21;
2) the differential inverter is made up of a voltage cutting circuit and a N rank capacitance network, the input of the output termination voltage cutting circuit of N rank capacitance network;
3) the voltage cutting circuit is made up of field effect transistor Q9, Q12, their source electrode is connected together, by resistance R 1 ground connection, capacitor C 8 and resistance R 1 parallel connection, the drain electrode of field effect transistor Q9 connects the positive pole of N rank capacitance network, the drain electrode of field effect transistor Q12 connects the negative pole of N rank capacitance network, and the driving signal V12 of field effect transistor Q9, Q12 is the sine wave signal of amplitude 310V;
4) N rank capacitance network is made up of positive and negative both arms;
A) the positive arm of N rank capacitance network is by capacitor C 1, C3, C5, C7 and field effect transistor Q3, Q6, Q8, Q11 forms, the positive pole of capacitor C 1 connects the source electrode of field effect transistor Q3, the drain electrode of field effect transistor Q3 connects the negative electrode of diode D1, the positive pole of capacitor C 3 connects the source electrode of field effect transistor Q6, the drain electrode of field effect transistor Q6 connects the anode of diode D1 and the negative pole of capacitor C 1, the positive pole of capacitor C 5 connects the source electrode of field effect transistor Q8, the drain electrode of field effect transistor Q8 connects the anode of diode D3 and the negative pole of capacitor C 3, the positive pole of capacitor C 7 connects the source electrode of field effect transistor Q11, the drain electrode of field effect transistor Q11 connects the anode of diode D5 and the negative pole of capacitor C 5, the minus earth of capacitor C 7, diode D1, D3, the negative electrode of D5 connects the positive pole of N rank capacitance network simultaneously, i.e. the drain electrode of field effect pipe Q9;
B) the negative arm of N rank capacitance network is by capacitor C 2, C4, C6, C9 and field effect transistor Q1, Q5, Q7, Q10 forms, the negative pole of capacitor C 2 connects the source electrode of field effect transistor Q1, the drain electrode of field effect transistor Q1 connects the anode of diode D2, the negative pole of capacitor C 4 connects the source electrode of field effect transistor Q5, the drain electrode of field effect transistor Q5 connects the negative electrode of diode D2 and the positive pole of capacitor C 2, the negative pole of capacitor C 6 connects the source electrode of field effect transistor Q7, the drain electrode of field effect transistor Q7 connects the negative electrode of diode D4 and the positive pole of capacitor C 4, the negative pole of capacitor C 9 connects the source electrode of field effect transistor Q10, the drain electrode of field effect transistor Q10 connects the negative electrode of diode D6 and the positive pole of capacitor C 6, the plus earth of capacitor C 9, diode D2, D4, the anode of D6 connects the negative pole of N rank capacitance network simultaneously, i.e. the drain electrode of field effect pipe Q12;
C) its positive pole of minus earth of input positive direct-current voltages V4 connects the drain electrode of field effect transistor Q4, the source electrode of field effect transistor Q4 connects the drain electrode of field effect transistor Q9, the plus earth of input negative dc voltage V6, its negative pole connects the drain electrode of field effect transistor Q2, and the source electrode of field effect transistor Q2 connects the drain electrode of field effect transistor Q12;
D) gate drive signal V1, the V2 of field effect transistor Q2, Q4 are the civil power synchronous square-wave signals, positive arm driving signal V13, V10, V8, V5 and negative arm driving signal V11, V9, V7, V3 also are the civil power synchronous square-wave signals, but pulsewidth is successively decreased with every 2ms, time-delay increases progressively with every 1ms, and the driving signal V12 of field effect transistor Q9, Q12 is the sine wave signal of amplitude 310V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101737524A CN102263429B (en) | 2011-06-24 | 2011-06-24 | Micro-power uninterruptible power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101737524A CN102263429B (en) | 2011-06-24 | 2011-06-24 | Micro-power uninterruptible power supply |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102263429A CN102263429A (en) | 2011-11-30 |
| CN102263429B true CN102263429B (en) | 2013-09-18 |
Family
ID=45009943
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011101737524A Expired - Fee Related CN102263429B (en) | 2011-06-24 | 2011-06-24 | Micro-power uninterruptible power supply |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102263429B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106230105A (en) * | 2016-08-26 | 2016-12-14 | 郁百超 | Resultant uninterrupted power source |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5736842A (en) * | 1996-07-11 | 1998-04-07 | Delta Electronics, Inc. | Technique for reducing rectifier reverse-recovery-related losses in high-voltage high power converters |
| CN101944853A (en) * | 2010-03-19 | 2011-01-12 | 郁百超 | Green power inverter |
| CN202121352U (en) * | 2011-06-24 | 2012-01-18 | 郁百超 | Micro power consumption uninterrupted power source |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7606053B2 (en) * | 2006-04-06 | 2009-10-20 | Ford Global Technologies, Llc | DC-to-DC converter and electric motor drive system using the same |
-
2011
- 2011-06-24 CN CN2011101737524A patent/CN102263429B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5736842A (en) * | 1996-07-11 | 1998-04-07 | Delta Electronics, Inc. | Technique for reducing rectifier reverse-recovery-related losses in high-voltage high power converters |
| CN101944853A (en) * | 2010-03-19 | 2011-01-12 | 郁百超 | Green power inverter |
| CN202121352U (en) * | 2011-06-24 | 2012-01-18 | 郁百超 | Micro power consumption uninterrupted power source |
Non-Patent Citations (2)
| Title |
|---|
| "论不间断电源的发展方向";郁百超;《2006中国电工技术学会电力电子学会第十届学术年会》;20061231;全文 * |
| 郁百超."论不间断电源的发展方向".《2006中国电工技术学会电力电子学会第十届学术年会》.2006, |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102263429A (en) | 2011-11-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10651669B2 (en) | Phase shift control method for charging circuit | |
| AU2015100179A4 (en) | A battery charger with power factor correction | |
| CN103023352B (en) | Alternative current-direct current power converter | |
| CN105792438B (en) | A kind of buck single-stage LED drive circuit of unity power factor | |
| CN105939107A (en) | Hybrid type quasi-switch voltage-boosting DC-DC converter | |
| CN204652713U (en) | A kind of LED drive power of no electrolytic capacitor | |
| CN103580501A (en) | Switched switch capacitor type AC-AC converter with fixed transformation ratio of 1/4 or 4 | |
| CN205490225U (en) | Two -way ACDC circuit of high -frequency chopper isolated form | |
| CN106655862B (en) | A kind of non-isolation type inverter and its control method inhibiting ripple | |
| CN104852560B (en) | The optimization method of stress equilibrium and the Switching Power Supply of this method is applicable in Switching Power Supply | |
| CN105958855A (en) | New-type high-gain quasi-Z-source inverter | |
| CN203339952U (en) | Switched-capacitor AC-AC converter | |
| CN205847086U (en) | A kind of switching capacity type high-gain quasi-Z source DC DC changer | |
| CN205847090U (en) | A kind of mixed type quasi-boost switching DC DC changer | |
| CN202997953U (en) | Capacitor energy-storage type silicon-controlled switch power source | |
| CN103762839A (en) | Magnetic coupling type single-phase high-gain bridge-free power factor correction circuit | |
| CN102263429B (en) | Micro-power uninterruptible power supply | |
| CN103501107B (en) | Circuit for power conversion, AC-DC power supply converter and control method thereof | |
| CN105978322A (en) | Switch capacitor type high-gain quasi Z source DC-DC converter | |
| CN202121352U (en) | Micro power consumption uninterrupted power source | |
| CN203339962U (en) | Switched-capacitor type AC voltage regulator | |
| CN104539180A (en) | Single-phase transformer-free inverter capable of reducing system leak current | |
| CN104868574A (en) | Vehicle-mounted charging device | |
| CN204906192U (en) | Boost module is recommended to wide region full cut -off ring high efficiency | |
| CN202334299U (en) | Micro power consumption power factor corrector |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130918 Termination date: 20150624 |
|
| EXPY | Termination of patent right or utility model |