CN102255484B - Burst mode controller and method - Google Patents

Burst mode controller and method Download PDF

Info

Publication number
CN102255484B
CN102255484B CN2011101152120A CN201110115212A CN102255484B CN 102255484 B CN102255484 B CN 102255484B CN 2011101152120 A CN2011101152120 A CN 2011101152120A CN 201110115212 A CN201110115212 A CN 201110115212A CN 102255484 B CN102255484 B CN 102255484B
Authority
CN
China
Prior art keywords
burst
time period
smps
value
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN2011101152120A
Other languages
Chinese (zh)
Other versions
CN102255484A (en
Inventor
汉斯·哈贝尔施塔特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of CN102255484A publication Critical patent/CN102255484A/en
Application granted granted Critical
Publication of CN102255484B publication Critical patent/CN102255484B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0032—Control circuits allowing low power mode operation, e.g. in standby mode
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A method for controlling burst mode operation of a switched mode power supply (SMPS) is disclosed. The method comprises: a) receiving a control input signal indicating the start of a current burst period; b) responding to the indication of the start of the current burst period by generating a signal representing the elapsed time during the current burst period and by starting a burst of operation of the SMPS; c) calculating a value for a signal representing a desired duration of the burst of operation of the SMPS in the current burst period from a signal representing the duration of a burst of operation of the SMPS in a preceding burst period, a signal representing the duration of the preceding burst period and a signal representing the desired duration of the current burst period; and d) comparing the signal representing the elapsed time during the current burst period with the signal representing the desired duration of the burst of operation of the SMPS in the current burst period and ceasing the burst of operation of the SMPS if the elapsed time since the start of the current burst period is greater than or equal to the desired duration of the burst of operation of the SMPS in the current burst period.

Description

Burst mode controller and method
Technical field
The present invention relates to method and controller that the burst mode operation of switched-mode power supply (SMPS) is controlled.The invention still further relates to the switched-mode power supply that comprises sort controller.
Background technology
The efficiency of switched-mode power supply and just becoming more and more important with the variation of load.Switched-mode power supply is commonly used in following power supply adaptor: small-sized low load facility, and the extraction of wherein load is intermittent application, and for example, the charger of mobile phone.Therefore, under low load or no-load condition, the input power demand of switched-mode power supply also becomes more and more important.
Under low-down power grade, non-loaded input power depends on the efficiency of switched-mode power supply, wherein, under this low-down power grade, only needs the circuit supply for power supply self inside, typically, the about 50mW of circuitry consumes of power supply self inside is to 200mW.Obviously, need to have very high efficiency under these low power level.
A kind of mode that increases switched-mode power supply efficiency is to operate in short time this switched-mode power supply at the power grade place that approaches best efficiency point, wherein, Switching power not in a period of time after this short time, Switching power not during this period of time in do not waste energy.Such operation is called " burst mode ", and has produced high efficiency under low power level.It from the L6599 of ST Microelectronics, is the example of the switched-mode power supply that can work under burst mode.
The frequency component of working below listened to the upper limit that can be created in 20kHz under burst mode.Therefore, have following risk: the vibration for example be operated in, in the (PCC) power (, transformer and capacitor) of the power supply under burst mode can produce audio-frequency noise.Because people's ear is the most responsive in 1kHz arrives the scope of 10kHz, so wish very much not use the burst frequency in this scope.
In the great majority application, within the ripple voltage of output place of transducer must remain on specified limit.This needs specific burst to connect number of times (burst on time) according to required power output.
In addition, if positive load current step (positiveload step) occurs during the time period of Switching power not, switched-mode power supply must relatively quickly react to prevent due to the unexpected decline that lacks available electric power and cause output voltage.This need to can start next burst as quickly as possible from the error signal of output voltage regulating loop.
Fig. 1 shows the relation between power output and ripple voltage, Fig. 2 shows under 3 different working modes, for typical application, relation between power output and burst frequency (inverse of burst time period, burst time period (burst period) is defined in the time period between the starting point of continuous switching burst (burst of switching)).
Under first mode, the length of switching burst is (curve for 50 μ s, 100 μ s, 200 μ s and 600 μ s is illustrated as respectively A, B, C and D) of fixing.Carry out adaptive burst frequency according to power output, thereby produce variable ripple voltage.
Under this pattern, can be used to easily start next switching burst from the error signal of output voltage regulating loop, thereby simple solution is provided.Yet, from Fig. 1 and 2, can find out, this pattern produces large ripple voltage under low load, produces the burst frequency in the 1kHz scope under high capacity.Therefore, do not have a kind of acceptable half-way house can shown in power bracket on provide lower than the ripple voltage of 240mV with lower than the burst frequency of 1kHz.Particularly, for the great majority application, situation is all like this.
Under the second pattern, burst frequency stuck-at-１ kHz (referring to curve E).The length of switching burst changes according to power output, thereby produces variable ripple voltage.
This pattern provides acceptable burst frequency values and ripple voltage value on the power bracket shown in Fig. 1 and 2.In addition, can easily realize this point with fixed oscillator, thereby trigger the beginning of each switching burst.Can utilize error loop to regulate the length of switching burst, wherein error loop is elevated to required regulated value at the voltage of output place and finishes each pulse when above.
Yet, due to the needs of main line isolation, error loop generally includes error amplifier and the optical coupler with frequency compensation network.During burst mode operation, error amplifier often can be located at one of power rail voltage saturated, and can only detect and the output voltage of expecting that regulated value (but not absolute value of this expectation regulated value) is crossing.This is because error amplifier has high voltage gain usually, to reduce the static receiver error of output place.Therefore, even for little error signal, the amplitude of the output voltage of error amplifier is also very high.Therefore, due to the structure in error amplifier-optical coupler loop, the output voltage of error amplifier approaches place through being everlasting with positive supply rail or ground connection and reaches capacity, and can only detect the little variation at output voltage place.This also means between the larger ripple low frequency burst period that can detect by error loop, error loop can only detect output be lower than or higher than desired value.During the burst mode that has fixing burst frequency and constant power between burst period, burst is started by the frequency timer, and stops when output voltage and desired value are crossing.When the burst duty ratio reaches 100%, reach the maximum power of burst mode.Yet, when the larger power of needs, owing to not reaching output voltage values, so burst during the whole pulse spacing, keep connecting, and owing to there is no enough power, so output voltage descends.Therefore, need another kind of mechanism to judge that transducer should leave burst mode and enter more high-power mode.Can be too low by detecting at end's output voltage of 100% burst turn-on time, carry out this judgement, but being system, the shortcoming of this mode can not within the time shorter than the burst repetition time, change to more high-power mode.
If positive load current step has occurred, this positive load current step need to be than the more power of power available under burst mode, and this can have problems.In this case, because error amplifier output is saturated, so output voltage can descend and error signal can not detect this point.All the time provided power can not be detected too low before the current burst time period finishes, and, when the current burst time period finishes, larger voltage drop may occur, especially during the burst frequency below use 1kHz.In order to prevent this situation, can use more greatly and more expensive electrolytic capacitor in output place, but this has increased cost and size.
Under three-mode, ripple voltage is fixed on 250mV (referring to curve F).Burst frequency and the length of switching burst all change to keep this ripple voltage.
This pattern also provides acceptable ripple voltage and burst frequency values, and often is used.In principle, each switching burst can originate in the minimum place (just appearing at burst start before) of output voltage during Burst Period, and stops at the maximum (appearing at the end of burst) of output voltage.Yet this is to be difficult to realize in practice, especially in the situation that need the main line isolation.As mentioned above, with comprising that the error loop of error amplifier and optical coupler realizes this point, wherein error amplifier has frequency compensation network usually.Alternatively, can carry out the sensing output voltage via the auxiliary winding on transformer.
Yet it is problematic carrying out sensing via auxiliary winding.The reason that this problem occurs is that the value of the amplitude of the ripple voltage of output place and output voltage self is compared less.In addition, have at the output voltage place and on auxiliary winding the high-frequency noise caused due to switching.This makes output voltage minimum value and maximum and the noise separation be difficult to expectation.In the situation that use error amplifier and optical coupler carry out the main line isolation, frequency compensation network in the saturated and error loop of the output voltage of optical coupler or error amplifier, make the AC shape partly of output voltage different from the shape of the AC part of the signal of error loop primary side.Therefore, the minimum value of output voltage is not corresponding with minimum value and the maximum of the output of primary side optical coupler with maximum.
The compromise solution of using in practical application is to start and stop the switching burst with the voltage of optical coupler output place.This is possible, because the gain of output is set by output sensing network, compensating network and circuit for light coupler from the lead-out terminal to the optical coupler.Relation between the variation that this gain defines output voltage and the variation of controlling parameter (in most of the cases, being the voltage of optical coupler output place).Be elevated to predetermined value at the voltage of optical coupler output place and start each burst when above and drop to predetermined lower value at optical coupler to stop this burst when following, almost constant ripple voltage characteristic is provided.The shortcoming of this method is that some when power grade and each burst start and stop interrelates.Power grade is controlled by controlling parameter, usually by the voltage at control inputs place, is controlled.Control inputs is also for making burst start and stop, and the initial sum that wherein happens suddenly stops at the predetermined voltage level place at control inputs place.For specific transducer type, resonance converter for example, obtaining the desired virtual voltage at the control inputs place of specific power output can change significantly according to the value of resonant component and tolerance limit.This means that fixed voltage with the control inputs place starts and stops burst and makes and be difficult to limit the power demand grade between burst period.Because power grade is directly relevant with efficiency, so shortcoming is that the efficiency of transducer can not be controlled fully during burst mode.
In addition, the burst frequency depends on the some parameters such as output capacitance, compensating network and gain setting.Therefore, the width of the bandwidth of application and control inputs place window (there is no the variation between load and full load) is now relevant with the burst frequency.The specific ripple voltage that this means the control inputs place occurs according to the bandwidth of selecting for regulating loop, to obtain correct responsive bandwidth during normal mode of operation (that is, without burst mode).This bandwidth is relevant for output is become to flat-out voltage window from inactivity with gain and the control inputs place of (being determined by the electrolytic capacitor of output place) output capacitance, converter level self.All these parameters also all interrelate with the burst frequency, therefore can not set independently the burst frequency.In time, this is causing constraint and restriction aspect burst frequency, power output grade and the efficiency selected between each burst period.Adopt the complicated design of the switched-mode power supply of this technology.
Summary of the invention
According to a first aspect of the invention, a kind of method that the burst mode operation of switched-mode power supply (SMPS) is controlled is provided, wherein, the burst time period comprises the operational burst (burst of operation) of SMPS, during the operational burst of described SMPS, SMPS produces power with the first high level, remainder SMPS in the burst time period produces power with the second low level, and described method comprises:
A) receive the control inputs signal that the beginning of current burst time period is indicated;
B) start the operational burst of SMPS and measure the elapsed time during the current burst time period;
C) calculate the expected duration of the operational burst of SMPS in the current burst time period according to following content:
I) in the last burst time period, the duration of the operational burst of SMPS;
Ii) duration of last burst time period; And
Iii) expected duration of current burst time period; And
D) elapsed time during the current burst time period is compared with the expected duration calculated in step (c), if the elapsed time during the current burst time period is more than or equal to the expected duration calculated in step (c), stop the operational burst of SMPS.
The method according to this invention can be used together with the traditional switch mode power, and so that burst mode operation to be provided, this has solved the problems referred to above.The method that use is controlled burst mode operation, can utilize acceptable ripple voltage to operate under the burst frequency clearly limited now.These parameters can independently be set, and the burst frequency depends on the repetition rate of control inputs signal (being obtained from total regulating loop), and ripple voltage depends on length and the length of burst time period of operational burst.In addition, use the controller of the method to react to load current step immediately, as described below.
In the last burst time period, the expected duration of the duration of the duration of the operational burst of SMPS, last burst time period and current burst time period is meaned by signal usually, therefore, can the value of these signals be performed step the calculating in (c), the value of the signal meaned with the expected duration produced the operational burst of SMPS in the current burst time period.Correspondingly, hereinafter no matter mention duration, the duration of last burst time period or the expected duration of current burst time period of the operational burst of SMPS in the last burst time period somewhere, all should understand and can use the signal that means these parameters with replacing.
The second low power level can be zero, and in this case, the operation of SMPS will stop fully during the remainder of burst time period.
Typically, when the value of the parameter after adjusting and threshold value intersect, receive the control inputs signal.Parameter after adjusting can be voltage or electric current, or can make by the value of the parameter after increasing with respect to threshold value or reducing to regulate value and the threshold value of the parameter after this adjusting intersect.In actual embodiment, can compare with fiducial value and the signal of parameter after meaning to regulate while reaching fiducial value (increase by value or reduce) maintains the control inputs signal by the signal of the parameter to after mean regulating, detect the crossing of adjusting parameter and threshold value.
Preferably, by producing the proportional signal of elapsed time started with starting point from the current burst time period, measure the elapsed time during the current time period that happens suddenly.
Typically, this signal is the output signal produced by timer, and described timer is in response to that indication that the current burst time period starts starts.
In one embodiment, the product that the expected duration calculated in step (c) equals following two: the duration of the operational burst of SMPS in the last burst time period, and the expected duration of current burst time period and the ratio between the duration of last burst time period.
In another embodiment, the expected duration calculated in step (c) equals following two sums: the duration of the operational burst of SMPS in the last burst time period, and weight coefficient is with the product of difference between the duration of the expected duration of burst time period and the last time period that happens suddenly.
Usually, step (b) also comprises: the signal to duration of meaning the last burst time period is sampled, and the signal that retains sampling is to be used in step (c).
Typically, the method also comprises: the expected duration calculated in step (c) is sampled, and the value that retains sampling be used in step (d) relatively in.
Preferably, the method also comprises: by applying predefined filter function, carry out the value of the expected duration that calculates in modify steps (c).
In a preferred embodiment, described predefined filter function is multiplied by filter coefficient by the expected duration calculated in step (c), and by the product that obtains and the product addition of following two: 1 deducts filter coefficient, and duration of the operational burst of SMPS in the last burst time period.
Filter coefficient can have identical value with above-mentioned weight coefficient expediently.
Typically, the expected duration calculated in step (c) is limited between maximum and minimum value.
According to a second aspect of the invention, a kind of controller of being controlled for the burst mode operation to switched-mode power supply (SMPS) is provided, wherein, the burst time period comprises the operational burst of SMPS, during the operational burst of described SMPS, SMPS produces power with the first high level, remainder SMPS in the burst time period produces power with the second low level, and described method comprises:
A) the first comparator, for receiving the control inputs signal that the beginning of current burst time period is indicated, and described control inputs signal is compared with reference voltage, the output of described the first comparator is suitable for switching to the second logic level from the first logic level when control inputs signal and reference voltage intersect;
B) timer, be suitable for by measuring the elapsed time during the current burst time period, and the switching to output place at the first comparator from the first logic level to the second logic level responds;
C) computing unit is suitable for monitoring following value:
I) in the last burst time period, the duration of the operational burst of SMPS;
Ii) duration of last burst time period; And
Iii) expected duration of current burst time period;
And the expected duration that calculates the operational burst of SMPS in the current burst time period according to monitored value:
D) the first circuit, being suitable for operational burst by starting SMPS responds to the switching of output place from the first logic level to the second logic level of the first comparator, and be suitable for the elapsed time during the current burst time period is compared with the expected duration calculated in step (c), elapsed time during the current burst time period is more than or equal in the situation that the expected duration calculated in step (c), stops the operational burst of SMPS.
The first circuit can comprise: latch (or other memory elements, as, the clock control trigger, be suitable for by maintaining the signal of the operational burst for starting SMPS, and the switching of output place from the first logic level to the second logic level of the first comparator responded; And second comparator, be used for the elapsed time during the current burst time period is compared with the desired value that step (c) calculates, the output of the second comparator is suitable in the situation that the expected duration that calculates in being more than or equal to step (c) of the elapsed time during the current burst time period switches to the second logic level from the first logic level, the signal that latch is suitable for starting by the operational burst to for making SMPS is negated, and the switching of output place from the first logic level to the second logic level of the second comparator responded.
Alternatively, the first circuit can comprise: the second comparator, be used for the elapsed time during the current burst time period is compared with the expected duration that step (c) calculates, and be suitable in the situation that the signal that starts than the short operational burst maintained for making SMPS of the expected duration calculated in step (c) of the elapsed time during the current burst time period, and in the situation that the elapsed time during the current burst time period than the long signal that the operational burst for making SMPS is started of the expected duration calculated in step (c), negate.
Typically, controller also comprises: filter cell is suitable for coming by applying predefined filter function the value of the expected duration that calculates in modify steps (c).
According to a third aspect of the invention we, provide a kind of controller of being controlled for the burst mode operation to switched-mode power supply (SMPS), comprised and be suitable for carrying out the circuit according to the described method of first aspect present invention.
According to a forth aspect of the invention, provide a kind of switched-mode power supply, comprised according to second aspect present invention or the described controller of the third aspect.
This switched-mode power supply also comprises the circuit of being controlled for the power output of the generation of the converter level to switched-mode power supply, wherein, described circuit is suitable for during the operational burst of SMPS output power to higher one in the first value and the second value, wherein the first value is that parameter from regulating obtains, the second value be scheduled to the expression minimum output power.
Parameter after adjusting can be output voltage, output current or the power output of for example SMPS.
The accompanying drawing explanation
Describe example of the present invention in detail referring now to accompanying drawing, in accompanying drawing:
Fig. 1 shows the ripple voltage relevant with power output in existing burst mode technology;
Fig. 2 shows burst frequency relevant with power output in prior art;
Fig. 3 shows the circuit of the exercisable burst mode controller according to the present invention;
Fig. 4 shows the waveform at difference place in the circuit of Fig. 3;
Fig. 5 to 8 shows the simulation result of burst mode controller under the different operating condition;
Fig. 9 shows another embodiment of the exercisable burst mode controller according to the present invention; And
The adjunct circuit that the minimum power that Figure 10 shows to be provided SMPS is controlled.
Embodiment
The invention provides a kind of method that the burst mode operation of switched-mode power supply (SMPS) is controlled, wherein, the control inputs signal triggers beginning, the operational burst of SMPS the timer of resetting of current burst time period, the described elapsed time of timer indication during the current burst time period.According to duration value, the duration value of last burst time period and the expected duration value of current burst time period of the operational burst of SMPS in the last burst time period, calculate the value of the expected duration of the operational burst of SMPS in the current burst time period.When the indicated elapsed time during the current burst time period of timer is more than or equal to the calculated value of the expected duration of the burst operation of SMPS in the current burst time period, stop the operational burst of SMPS.
Fig. 3 shows the block diagram of the exercisable burst mode controller according to the present invention.In this case, comparator 1 receives the control inputs signal in its noninverting input.The anti-phase input of comparator 1 remains on reference voltage V ref.The voltage value of rising to V when the control inputs signal refwhen above, the output of comparator 1 is urged to positive voltage (that is, presentation logic is high).The output of comparator 1 is connected to setting (S) input of SR latch 2, and the high output pin (Q) of SR latch 2 that makes of the logic of S pin is driven paramount.
The control inputs signal is that the circuit of being controlled from the overall adjustment to switched-mode power supply provides.Parameter (for example, output voltage, output current or power output) after regulating drops to predetermined threshold value when following, maintains the control inputs signal and (that is, is rising to V refwhen above, the driving logic is high).Maintaining of control inputs signal makes burst time period or Burst Period start.
The driven paramount meeting of the output pin of SR latch 2 causes multiple event.At first, maintain " (Burst On) connected in burst " signal, this makes the switching burst start.Simultaneously, trigger sampling and holding circuit 3, make the voltage of output place of sampling and 3 pairs of timers 4 of holding circuit be sampled.Sampled voltage (V 1) be while finishing the last burst time period from the output voltage of timer 4, and this sampled voltage (V 1) mean duration of last burst time period.Timer 4 also the sampling and holding circuit 3 be triggered after slightly the replacement, thereby the output voltage (V of timer 4 ramp) drop to predetermined starting voltage (typically, 0V).
As shown in Figure 3, typical timer circuit 4 comprises the current source that the capacitor in parallel with Resetting Switching powered.This makes the output voltage (V from timer 4 ramp) the linear rising until saturated, saturated output voltage is slightly lower than positive voltage.With the duration of burst time period, compare, the capacitor in timer is electric discharge relatively rapidly when resetting.
The voltage V of comparator 5 devices of self clock in the future 4 rampwith voltage V regcompare.Work as V ramprise to V regvalue when above, the output of comparator 5 is urged to logic high.The output of comparator 5 is coupled to replacement (R) pin of SR latch 2.Thereby the output pin of SR latch 2 is driven to logic low, makes " burst is connected " signal is negated.This makes current switching burst stop.
Computer circuits 6 is based on V regcurrency, sampled value V 1with voltage V ref_Tper, calculate V regnew value, voltage V wherein ref_t perthe expected duration that means the burst time period.
V ref_Tperthat bandgap voltage reference maker in control circuit carrys out definite fixed value.This value is selected as making upwards has enough surpluses to allow the V below supply voltage 1particular maximum value.Capacitor in timer is selected as setting V according to the burst frequency of expectation rampslope.The burst frequency of expectation equals wherein I is the electric current that current source offers the timer capacitor, C burstit is the value of timer capacitor.
If V regnew value for directly determining the end of current switching burst, this will cause to the convergence of the desired duration of switching burst, to realize time burst time period of expecting.Yet, if there is load current step, the method will cause the unexpected increase of burst frequency or reduce (according to the direction of load current step).Therefore, provide filter 7, filter 7 is coupled with the output of calculator 6, and to increase the time constant of regulating loop, making this time constant is the several times of burst time period.
In a variant, calculator 6 and filter 7 calculate V according to following equation regnew value:
V X = V reg N × V ref _ T per V 1
V reg N + 1 = K 1 · V X + ( 1 - K 1 ) V reg N
Wherein: V xthe output from calculator 6,
Figure BSA00000489194700113
v regcurrent value,
v regthe new value of (from the output of filter 7),
K 1it is the filter coefficient applied by filter 7.
K 1value define filter time constant.By K 1the value of being set as 1 can provide the fastest response, and by K 1be set as zero and make V regvalue before remaining fixed in.K 1representative value be 0.75.
In the second variant, calculator 6 and filter 7 calculate V according to following equation regnew value:
V X = V reg N + K 2 ( V ref _ T per - V 1 )
V reg N + 1 = K 2 · V X + ( 1 - K 2 ) V reg N
Wherein, K 2it is the filter coefficient applied by calculator 6 and filter 7.
Delay circuit 9 is coupled to the output of SR latch 2, and the output of delay circuit 9 is coupled to the sampling input of sampling hold circuit 8.Therefore, just after switching burst starts (that is, when the Q of SR latch 2 pin driven when paramount), the output of delay circuit 9 is driven paramount, makes the new value V to output place of filter 7 reg
Figure BSA00000489194700117
sampled.Limiter circuitry 10 is guaranteed V regnew value do not exceed greatest limit and least limit, if exceed, by V regvalue suitably clamper to maximum or minimum value.
V regnew value available at the anti-phase input place of comparator 5.V regnew value calculating and to the propagation of the anti-phase input of comparator 5, occur enough soon, to such an extent as to can determine that current burst switches the end of burst in the time period by this new value.
Limiter circuitry 10 prevents two possible problems.First problem can occur under low-down power grade, and under this low-down power grade, the single power transfer cycle under expectation burst frequency provides too high power.By by V regthe value clamper to minimum level, burst will increase (thereby the burst frequency reduces) time period automatically, to guarantee this problem, can not occur.
Below will explain the reason that the burst frequency descends.Work as V regwhen minimum level, limit minimal burstiness length, yet this minimal burstiness length is excessive for the burst time period of expectation.Between this burst period, the energy value clearly limited is sent to output capacitor.Therefore, the voltage at output capacitor place will rise to the above particular level of desired value.The little load be connected with described power supply will be discharged to output capacitor lentamente, and need only voltage drop below desired value, and error amplifier and optical coupler will make the voltage at control inputs place raise, thereby trigger next burst via comparator 1.Automatically reducing of burst frequency occurs, and reason is for example V regimprove the 10% (V that should adopt with respect to the burst frequency in order to realize expectation regvalue) will cause that burst length increases 10%.Therefore, the energy more than 10% is passed to output capacitor, thereby makes the step of output voltage increase 10%.Therefore, the output voltage values time used that load discharges into expectation by output capacitor has increased 10%, therefore can find out, during identical Burst Period, has increased 10% V regvalue will cause immediately and reduce by 10% burst frequency.When there is no effective minimum value restriction, calculator will reduce V reg, until suitable burst frequency occurs.Yet, if need a complete switching cycle to transmit required power, can regulate V towards null value under the burst frequency of expectation reg, make the validity limit V that is greater than desired value except utilization regin addition, be difficult to by multiplying each other to calculate V regnew value, thereby larger burst time period and lower burst frequency are provided.
Control burst by main regulating loop and the time period can cause the other problems that may occur.Therefore, the burst time period can become longer than the manageable time period of timer 4.If V regvalue become larger than the saturation level of timer output voltage, the circuit of Fig. 3 can not cut off described switching burst.By by V regthe value clamper be less than the level of the saturation level of timer output voltage, limiter circuitry 10 has been guaranteed not can this thing happens.
Fig. 4 shows the waveform at difference place in the circuit of Fig. 3 during Burst Period, and contributes to understand the operation of circuit.Each Burst Period is driven to logic when high at the control inputs signal, thereby timer 4 is reset and maintain " burst is connected " signal, as previously described.The curve 11 of control inputs signal in Fig. 4 illustrates, and each " burst is connected " and timer output signal are illustrated by curve 12 and 13 respectively.
As directed linear increase of timer output signal.When the timer output signal surpasses V regvalue the time (in Fig. 4 shown in 14), comparator 5 will make SR latch 2 reset, the replacement of SR latch 2 and then can to make " burst is connected " signal be driven to low happens suddenly thereby finish switching in the current burst time period.
The timer output signal continues linear the increase, final and V ref_t perthe crossing V that also then reaches of level 1.Voltage V 1be timer output signal driven voltage reached when paramount once on the control inputs signal, make next burst time period start.Now, voltage V 1by sampling and holding circuit 3, sampled, by calculator 6, to be used for calculating V regnew value.
Above with reference to figure 3 and 4 and the explanation burst mode controller depend on the following fact: under the given power drawn in the output of switched-mode power supply, whole Burst Period or the average power (P on the time period average) equal to switch the power (P between burst period burston) with the duration (T that switches burst burston) and burst time period (T burstper) the product of ratio.Therefore:
P average = P burston × T burston T burstper
This means, for given power output and the power between the switching burst period, ratio T burston: T burstperfix, thereby provide:
T burston _ desired T burstper _ desired = T burston _ actual T burstper _ actual
Wherein, T burston_desiredthe switching burst duration of expectation,
T burston_actualthe actual switching burst duration in the upper cycle,
T burstper_desiredthe burst time period of expectation,
T burstper_actualit was the actual burst time period in the upper cycle.
Therefore, under constant power output, can use following equation, the burst time period based on actual burst time period and expectation, easily determine the duration for the switching burst of next Burst Period:
T burston _ desired = T burston _ actual T burstper _ actual × T burstper _ desired
Can find out from above equation, draw the equation that the first variant by calculator 5 is used, that is,
Figure BSA00000489194700134
That directly load current step is reacted need to only allow the beginning (in the burst on-interval, whether this also makes can direct-detection should further improve power) that triggers the switching burst from the control variables in main regulation loop by changing.This means, can not directly set the burst frequency when the beginning of next burst, the frequency that therefore happens suddenly is also determined by the main regulation loop fully.Yet, in the situation that the given degree of freedom that the duration of switching burst is selected, can lead to the control circuit relatively slowly shown in Fig. 3 and carry out adaptive burst frequency, this control circuit utilizes adaptive turn-on time in several cycles, to obtain the burst frequency of expectation.
Fig. 5 shows the simulation result of the circuit of Fig. 3, wherein during burst mode operation, has reduced power.In this emulation, with the simplified model of switched-mode power supply, reduce to carry out required total time of emulation.Power supply is modeled as power dump to the power supply in the output capacitor of power supply.Power is directly proportional to the voltage existed on the power control inputs.The power control inputs is configured to produce the fixedly minimum output power of 21.2W below the control voltage of 1.17V.According to I oUT=P oUT/ V oUT, the output current be dumped in output capacitor depends on power output.In this model, there do not is the high frequency switch-mode action.Therefore, only, between the switching burst period, the DC output current flows in output capacitor, and, in the actual switch mode power, current impulse will flow into output capacitor.For burst mode operation, this is unimportant, because the average current in the switching burst will be determined the final output voltage when switching burst finishes.
Figure 5 illustrates multiple curve.Output voltage, V from timer 4 regand V ref_t pervalue be illustrated as respectively 20,21 and 22. Curve 23,24,25,26 and 27 shows respectively signal and " burst is connected " signal on (flowing in output capacitor) output current, load current, output voltage, control inputs.It is apparent being controlled to regulate the burst frequency by the duration to the switching burst.From t=0, the expectation crest voltage (V of timer output voltage ref_t per) be 2.5V.Yet, at t=0 place, V regto such an extent as to value too highly can't realize this point, and the V produced 1value (crest voltage at timer output voltage place) surpassed V ref_t per.Yet, due to the power grade burst frequency that is adjusted to expectation, so the output voltage of timer converges to the 2.5V level of expectation within several cycles.As mentioned above, cautiously make convergence process than the burst time period slowly (in emulation, above-mentioned K 1value be 0.75).
In Fig. 6, show the effect of load current step.The of short duration change of burst frequency is apparent, and the rate of change of load current step is depended in this of short duration change.
Fig. 7 shows the effect of the positive load current step more than maximum power level available during burst mode operation.At the load current step place, output voltage starts to descend with large negative slope.After this moment, the rate of change of control inputs allows immediately output to be reacted and starts next one switching burst, and this next one switches the beginning that will happen suddenly early than the next one in the fixed frequency burst mode that starts of burst far away.During burst mode, preferably the power grade of transducer is restricted to minimum value, and occurs the switching burst simultaneously.Below with reference to Figure 10, described for carrying out the circuit of this function.In Fig. 7, this minimum value is 21.2W, corresponding with the control voltage of 1.17V.As long as the power provided during the turn-on time that happens suddenly is provided loading demand, output voltage will raise between the switching burst period, makes and controls almost decline immediately of voltage.This has explained that the power why switched between burst period is in minimum power level (being 21.2W in the example at Fig. 7).Yet, when the power provided between the switching burst period is provided loading demand, along with output voltage keeps further descending, control inputs will further increase.Be limited to minimum value but not in peaked situation at given power, this means and increase to the level (being 1.17V in the example at Fig. 7) that minimum power is limited when above when control inputs, can be towards the further increasing power of expectation level equated with loading demand.Due to the control inputs with comparator 1 coupling now continuously in V refabove level, so set continuously latch 2 (the setting input of latch 2 has covered the input of resetting).Therefore, " burst is connected " signal is effective continuously.In fact, this is a kind of common mode that controller is changed under normal non-burst mode of operation, wherein, can be at the burst mode duration of work level adjustment power output more than these may level.During the time interval of " burst is connected " signal continuous effective, the replacement timer, " burst is connected ", a upper rate of rise place of signal determines the next signal V of the input of comparator 5 reg.Therefore, when new burst occurring, system is ready to determine the length of next switching burst.As long as load is reduced to below burst power, control inputs will be regulated downwards, until reach minimum power.This means the setting input of latch 2 is negated, thereby allow by reaching V regthe timer latch 2 of resetting, and the switching burst stops.According to this mode of operation, normal running is the special circumstances with burst mode of limited burst turn-on time, and the possibility that increases the power during burst is connected is provided.
In Fig. 8, show the effect of low-down load.Under such low power level, by V regclamper, at the minimum value place, is set as possible minimum value thereby will switch burst duration.Therefore, burst time period of being limited by load is than the burst time segment length of expectation, but at the ripple voltage of output place when low, because the switching burst duration is short, so this is acceptable.
Fig. 9 shows the second embodiment according to burst mode controller of the present invention.The embodiment of this embodiment and Fig. 3 is very similar, and unique difference structurally is to have omitted latch 2.The ground that replaces, couple directly to the replacement input of timer 4 from the output of comparator 1, and " burst is connected " signal is directly provided by the output of comparator 5.
In this circuit, and when being output as from comparator 1 when high (, when the control inputs signal has surpassed the reference signal at the noninverting input of comparator 1 and anti-phase input place), replacement timer 4.Therefore, the anti-phase input of comparator 5 is lower than the V on anti-phase input regvalue, and maintain " burst connection signal ".Then, from the output signal rising of timer 4, and surpass V when it regvalue the time, from the output step-down of comparator 5, and " burst connect " signal is negated.The remainder of circuit and the embodiment of Fig. 3 operate in the same manner.
Figure 10 shows the adjunct circuit on the side of Fig. 3 circuit.This adjunct circuit comprises power grade initialization circuit 100, selects circuit 101 and converter level 102.Converter level 102 produces the power output of expectation under the control of burst mode controller and power grade initialization circuit 100 and selection circuit 101.
By the control inputs signal is compared with fiducial value, come from the controlled input signal of the output of transducer.The error signal obtained by this comparison has been determined the control inputs signal, thus closed control loop.Power grade initialization circuit 100 is set suitable grade according to the value of control inputs signal (also controlling the operation of burst mode controller before this control inputs signal) for the power output of converter level 102.According to the type of this control method and the transducer that uses, there is the possible mode of multiple setpoint power output, for example, by setting switching frequency, main peak value electric current, main turn-on time or it combines setpoint power output.
At normal (that is, non-burst mode) duration of work, select circuit 101 to select the output of power grade initialization circuit 100, the basis of being controlled as the power output grade to from converter level 102.Therefore, the power output grade depends on the control inputs signal.
Yet, when the switching burst occurring, maintain and enable (Enable) input (being coupled to " burst is connected " signal), this makes selects circuit 101 higher one in selecting following two: set 100 output from power grade, and select the preset minimum power level in another input of circuit 101.Therefore, the power output grade from converter level 102 is restricted to minimum value.
When stopping the switching burst, " burst is connected " signal (thereby to enabling input) is negated.This means that it is the low value of value than between the switching burst period that control inputs (via power grade initialization circuit 100) can be controlled power grade, comprises null value.
In the variant of selecting circuit 101, enabling input is effectively all the time, but, when stopping the switching burst, converter level keeps closing.
In another variant, enable as mentioned above input, but, when to enabling to input while negating, select lower power grade.Therefore, when the switching burst stops, using lower power grade.Utilize this variant, can under low-down power grade, keep the transducer switching.This can be used in main sensing and replaces optical coupler and the auxiliary sensing of exporting is come in the situation of sensing and regulation output.For the main sensing of output, the voltage on the main transformer winding can be used as the expression of output voltage.Yet, due to only can be when the switching converter just can the sensing output voltage, so the step of output voltage only can between transfer period, be detected.Therefore, by using this variant, can keep transducer switching, this makes at any time step that can the sensing output voltage.Utilize this variant, can be in the situation that do not have optical coupler to start switching burst, this is because the control inputs signal upgrades regularly along with the actual value of output voltage.
By using this adjunct circuit, automatically carry out the conversion from burst mode to non-burst mode, this is because control inputs can improve power at any time instantaneously.
Can also together with the embodiment of this adjunct circuit and Fig. 9, use.
Above-described embodiment, based on analog circuit, still also can be used digital technology and circuit with replacing, for example with digital quantizer, as timer and in the microcontroller of programming suitably, with digital form, realizes calculator and filter function.Sampling and holding circuit can be in microcontroller register or to V reg, V ref_t perand V 1the part of the memory that kept of desirable value mean.Can replace SR latch 2 by latch or the bistable state of other types, for example the JK latch.Another option is with digital form storage V reg, with the large-spacing of the normal running (non-burst mode) between two intervals that allow burst mode, and use the V of last time storage at the last interval of burst mode simultaneously regvalue starts the second interval of burst mode.
Above-mentioned burst mode controller can be used together with multiple switched-mode power supply topology, and described multiple switched-mode power supply topology comprises resonance, body, boosts, voltage boosting-reducing, flyback, forward direction and push away-La type.
Above-mentioned burst mode controller can also be used in following application: in these application, the audio-frequency noise of output place and ripple voltage are concentrated, and/or need high efficiency in fractional load place, and/or need low input power at non-loaded place.Such application comprises TAD Trunk Adapter, personal computer and laptop computer power supply and TV and monitor power supply.
By research accompanying drawing, specification and appended claim, those skilled in the art, when putting into practice claimed invention, are appreciated that and realize other variants of the disclosed embodiments.In the claims, word " comprises " does not get rid of other elements or step, and indefinite article " a kind of " or " one " do not get rid of a plurality of.The function of listed some projects in claim can be realized in single processor or other unit.Set forth the combination that specific measure does not show advantageously to use these measures in mutually different dependent claims.Any Reference numeral in claim should not form the restriction to scope.

Claims (15)

1. the method that the burst mode operation of switched-mode power supply SMPS is controlled, wherein, the burst time period comprises the operational burst of SMPS, during the operational burst of described SMPS, SMPS produces power with the first high level, remainder SMPS in the burst time period produces power with the second low level, and described method comprises:
A) receive the control inputs signal that the beginning of current burst time period is indicated;
B) start the operational burst of SMPS and measure the elapsed time during the current burst time period;
C) calculate the expected duration of the operational burst of SMPS in the current burst time period according to following content:
I) in the last burst time period, the duration of the operational burst of SMPS;
Ii) duration of last burst time period; And
The iii) expected duration of current burst time period; And
D) elapsed time during the current burst time period is compared with the expected duration calculated in step c), if the elapsed time during the current burst time period is more than or equal to the expected duration calculated in step c), stop the operational burst of SMPS.
2. method according to claim 1, wherein, when the value of the parameter after adjusting and threshold value intersect, receive the control inputs signal, and the parameter after described adjusting is output voltage, output current or the power output of SMPS.
3. method according to claim 1 and 2, wherein, by producing the proportional signal of elapsed time started with starting point from the current burst time period, measure the elapsed time during the current time period that happens suddenly.
4. method according to claim 1 and 2, wherein, the product that the expected duration calculated in step c) equals following two: the duration of the operational burst of SMPS in the last burst time period, and the expected duration of current burst time period and the ratio between the duration of last burst time period.
5. method according to claim 1 and 2, wherein, the expected duration calculated in step c) equals following two sums: the duration of the operational burst of SMPS in the last burst time period, and weight coefficient is with the product of difference between the duration of the expected duration of burst time period and the last time period that happens suddenly.
6. method according to claim 1 and 2, wherein, step b) also comprises: the signal that duration of last burst time period is meaned is sampled, and the signal that retains sampling is to be used in step c).
7. method according to claim 1 and 2 also comprises: the value to the expected duration that calculates in step c) is sampled, and the value that retains sampling be used in step (d) relatively in.
8. method according to claim 1 and 2, also comprise: by applying predefined filter function, carry out modify steps c) in the value of the expected duration that calculates.
9. method according to claim 8, wherein, described predefined filter function is multiplied by filter coefficient by the expected duration calculated in step c), and by the product that obtains and the product addition of following two: deduct filter coefficient, and duration of the operational burst of SMPS in the last burst time period.
10. method according to claim 1 and 2, wherein, be limited in the expected duration calculated in step c) between maximum and minimum value.
A 11. controller of being controlled for the burst mode operation to switched-mode power supply SMPS, wherein, the burst time period comprises the operational burst of SMPS, during the operational burst of described SMPS, SMPS produces power with the first high level, remainder SMPS in the burst time period produces power with the second low level, and described controller comprises:
A) the first comparator (1), for receiving the control inputs signal that the beginning of current burst time period is indicated, and described control inputs signal is compared with reference voltage, the output of described the first comparator (1) is suitable for switching to the second logic level from the first logic level when control inputs signal and reference voltage intersect;
B) timer (4), be suitable for by measuring the elapsed time during the current burst time period, and the switching to output place at the first comparator (1) from the first logic level to the second logic level responds;
C) computing unit (6) is suitable for monitoring following value:
I) in the last burst time period, the duration of the operational burst of SMPS;
Ii) duration of last burst time period; And
The iii) expected duration of current burst time period;
And the expected duration that calculates the operational burst of SMPS in the current burst time period according to monitored value:
D) the first circuit (2,5), being suitable for operational burst by starting SMPS responds to the switching of output place from the first logic level to the second logic level of the first comparator (1), and be suitable for the elapsed time during the current burst time period is compared with the expected duration calculated in step c), if the elapsed time during the current burst time period is more than or equal to the expected duration calculated in step c), stop the operational burst of SMPS.
12. controller according to claim 11 also comprises: filter cell (7) is suitable for carrying out modify steps c by applying predefined filter function) in the value of the expected duration that calculates.
13. a controller of being controlled for the burst mode operation to switched-mode power supply SMPS, comprise and be suitable for carrying out the circuit according to the described method of any one claim in claim 1 to 10.
14. a switched-mode power supply, comprise according to claim 11 to the described controller of any one in 13.
15. switched-mode power supply according to claim 14, also comprise the circuit (100 of being controlled for the power output of the converter level to switched-mode power supply (102) generation, 101), wherein, described circuit (100,101) be suitable for during the operational burst of SMPS output power to higher one in the first value and the second value, wherein the first value is that parameter from regulating obtains, the second value be scheduled to to mean minimum output power, the parameter after described adjusting is output voltage, output current or the power output of SMPS.
CN2011101152120A 2010-04-28 2011-04-27 Burst mode controller and method Active CN102255484B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP10161366.9A EP2383873B1 (en) 2010-04-28 2010-04-28 Burst mode controller and method
EP10161366.9 2010-04-28

Publications (2)

Publication Number Publication Date
CN102255484A CN102255484A (en) 2011-11-23
CN102255484B true CN102255484B (en) 2013-12-18

Family

ID=42734603

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011101152120A Active CN102255484B (en) 2010-04-28 2011-04-27 Burst mode controller and method

Country Status (3)

Country Link
US (1) US8519688B2 (en)
EP (1) EP2383873B1 (en)
CN (1) CN102255484B (en)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090033478A1 (en) 2007-07-03 2009-02-05 Continental Automotive Systems Us, Inc. Universal tire pressure monitoring sensor
BRPI1010762A2 (en) * 2009-06-10 2016-03-22 Honda Motor Co Ltd "transformer control device"
EP2469696B1 (en) 2010-12-23 2018-10-24 Nxp B.V. A controller for a resonant converter
US8751092B2 (en) 2011-01-13 2014-06-10 Continental Automotive Systems, Inc. Protocol protection
US9735673B2 (en) * 2011-03-30 2017-08-15 Infineon Technologies Ag Burst-mode operation of a switching converter
US9676238B2 (en) 2011-08-09 2017-06-13 Continental Automotive Systems, Inc. Tire pressure monitor system apparatus and method
WO2013022435A1 (en) 2011-08-09 2013-02-14 Continental Automotive Systems, Inc. Tire pressure monitoring apparatus and method
KR101599780B1 (en) 2011-08-09 2016-03-04 컨티넨탈 오토모티브 시스템즈 인코포레이티드 Protocol misinterpretation avoidance apparatus and method for a tire pressure monitoring system
CN103874592B (en) * 2011-08-09 2018-01-30 大陆汽车系统公司 For the apparatus and method for the position fixing process for activating tire pressure monitor
WO2013022436A1 (en) * 2011-08-09 2013-02-14 Continental Automotive Systems Us, Inc. Protocol arrangement in a tire pressure monitoring system
US8570772B2 (en) * 2012-01-26 2013-10-29 Linear Technology Corporation Isolated flyback converter with efficient light load operation
CN104160603B (en) * 2012-03-07 2016-08-03 意法-爱立信有限公司 Control circuit, control method, dc-dc and electronic equipment
US9152193B2 (en) * 2012-06-06 2015-10-06 Apple Inc. Power supply acoustic noise mitigation
KR101913557B1 (en) * 2012-08-23 2018-10-31 삼성전자 주식회사 Electronic apparatus and power controlling method thereof
WO2014194081A1 (en) 2013-05-29 2014-12-04 Lutron Electronics Co., Inc. Load control device for a light-emitting diode light source
US20150318787A1 (en) 2013-11-08 2015-11-05 Lutron Electronics Co., Inc. Load control device for a light-emitting diode light source
US9446636B2 (en) 2014-02-26 2016-09-20 Continental Automotive Systems, Inc. Pressure check tool and method of operating the same
US9595867B2 (en) * 2014-10-02 2017-03-14 Texas Instruments Incorporated System and method to improve standby efficiency of LLC converter
US9517664B2 (en) 2015-02-20 2016-12-13 Continental Automotive Systems, Inc. RF transmission method and apparatus in a tire pressure monitoring system
EP3068026B1 (en) 2015-03-13 2021-12-22 Nxp B.V. A control arrangement for a switched mode power supply
US9565731B2 (en) 2015-05-01 2017-02-07 Lutron Electronics Co., Inc. Load control device for a light-emitting diode light source
US9502965B1 (en) * 2015-06-16 2016-11-22 Chicony Power Technology Co., Ltd. Burst mode power supply method and burst mode power supply apparatus
EP3311633A1 (en) 2015-06-19 2018-04-25 Lutron Electrics Co., Inc. Load control device for a light-emitting diode light source
DE102016213290A1 (en) 2015-08-03 2017-02-09 Continental Automotive Systems, Inc. Apparatus, system and method for configuring a tire information sensor with a transmission protocol based on vehicle trigger characteristics
US10050536B2 (en) 2016-03-29 2018-08-14 Semiconductor Components Industries, Llc Power converter and method of entering skip at a fixed output power in a light load condition independent of magnetizing inductance
US10277131B2 (en) * 2016-08-19 2019-04-30 Semiconductor Components Industries, Llc Control circuits and control methods for power converters
WO2018043227A1 (en) 2016-08-30 2018-03-08 パナソニックＩｐマネジメント株式会社 Switching power supply device and semiconductor device
CN110383947B (en) 2016-09-16 2022-04-01 路创技术有限责任公司 Load control device for light emitting diode light sources with different operating modes
US11031873B2 (en) * 2016-12-30 2021-06-08 Texas Instruments Incorporated Primary side burst mode controller for LLC converter
CN109391126B (en) 2017-08-09 2023-11-03 恩智浦美国有限公司 Switching controller circuit for power converter
US10243469B1 (en) * 2017-10-17 2019-03-26 Texas Instruments Incorporated Adaptive burst generation for use with a DC-output converter
IT202000000877A1 (en) * 2020-01-17 2021-07-17 St Microelectronics Srl PFC CONTROL CIRCUIT FOR A BOOST CONVERTER, ITS INTEGRATED CIRCUIT, BOOST CONVERTER, POWER SUPPLY AND PROCEDURE
TWI728704B (en) * 2020-02-17 2021-05-21 亞源科技股份有限公司 Power factor correction circuit with burst setting and method for operation the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1309461A (en) * 2000-01-11 2001-08-22 汤姆森许可公司 Zero-voltage switching power supply with bursting mode
WO2004030194A1 (en) * 2002-09-30 2004-04-08 Infineon Technologies Ag Switching mode power supplies
CN101218737A (en) * 2005-05-10 2008-07-09 Nxp股份有限公司 Feedback communication technique for switched mode power supply

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10057439A1 (en) * 2000-11-20 2002-05-23 Nokia Mobile Phones Ltd Voltage regulator has control element, comparator element and demand value circuit that derives demand signal from input voltage so it is essentially constant during load pulse
US7279869B2 (en) * 2005-05-06 2007-10-09 Aimtron Technology Corp. PFM control circuit for DC regulator
KR101357006B1 (en) * 2007-01-18 2014-01-29 페어차일드코리아반도체 주식회사 Converter and the driving method thereof
US7592791B2 (en) * 2007-08-07 2009-09-22 Newport Media, Inc. High efficiency DC-DC converter using pulse skipping modulation with programmable burst duration
TWI393335B (en) * 2009-04-17 2013-04-11 Leadtrend Tech Corp Control method for voltage converter and related voltage converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1309461A (en) * 2000-01-11 2001-08-22 汤姆森许可公司 Zero-voltage switching power supply with bursting mode
WO2004030194A1 (en) * 2002-09-30 2004-04-08 Infineon Technologies Ag Switching mode power supplies
CN101218737A (en) * 2005-05-10 2008-07-09 Nxp股份有限公司 Feedback communication technique for switched mode power supply

Also Published As

Publication number Publication date
US8519688B2 (en) 2013-08-27
EP2383873A1 (en) 2011-11-02
US20110267024A1 (en) 2011-11-03
CN102255484A (en) 2011-11-23
EP2383873B1 (en) 2013-06-19

Similar Documents

Publication Publication Date Title
CN102255484B (en) Burst mode controller and method
JP5522760B2 (en) Isolated flyback converter with sleep mode for light load operation
TWI451681B (en) Buck switching voltage regulator circuit and method for regulating the output voltage of a buck switching voltage regulator circuit
EP2678927B1 (en) A power supply comprising a stand by feature
CN100547894C (en) The controller of power supply changeover device and stand-by circuit
CN101156304B (en) Switched mode power converter and method of operation thereof
TWI437803B (en) Power supply unit and control method thereof
WO2018068452A1 (en) Method for reducing power consumption of power supply, power supply automatically reducing power consumption, and television
EP2804302B1 (en) Adaptive low-power zero-cross comparator for discontinuous current mode operated switching mode power supply
TWI504120B (en) Flyback converter, controller and method for controlling flyback converter thereof
US20190245450A1 (en) Power Converter Responsive to Device Connection Status
CN102594115A (en) Adaptively controlled soft start-up scheme for switching power converters
US9991798B2 (en) Constant on-time control for power converter
CN103051220B (en) Switching Power Supply and controller thereof
US9991715B1 (en) Maximum power point tracking method and apparatus
CN110729897B (en) Fast mode conversion for power converters
TW201535947A (en) Switching-mode power supplies
TWI413350B (en) Switching mode power supply with burst mode operation
WO2016029149A1 (en) Switching power supplies and methods of operating switching power supplies
CN103138593A (en) Power supply
CN105449995A (en) Drive control circuit, drive control method and switching power supply
JP2009303347A (en) Control circuit of dc-dc converter
CN104716839A (en) Switching power supply
TW201539956A (en) Low-light solar boost converter and control method therefor

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant