CN102209042B - Method and device for preventing first input first output (FIFO) queue from overflowing - Google Patents

Method and device for preventing first input first output (FIFO) queue from overflowing Download PDF

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CN102209042B
CN102209042B CN 201110205098 CN201110205098A CN102209042B CN 102209042 B CN102209042 B CN 102209042B CN 201110205098 CN201110205098 CN 201110205098 CN 201110205098 A CN201110205098 A CN 201110205098A CN 102209042 B CN102209042 B CN 102209042B
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method
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preventing
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CN102209042A (en )
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黄伟
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迈普通信技术股份有限公司
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Abstract

本发明提供了一种避免先入先出队列(FIFO)溢出的方法,包括如下步骤:A、在设备内存中创建第一缓冲区描述符BD环和第二BD环;B、硬件收发器将FIFO中的数据通过第一写指针写入第一BD环的空闲BD中,完成后硬件收发器产生接收中断;C、驱动软件检测到接收中断后,利用第一读指针从第一BD环中读取数据;驱动软件利用第二写指针将所读取的数据写入第二BD环中;驱动软件利用第二读指针从第二BD环中读取数据并进行处理。 The present invention provides a first in first out queue avoiding (FIFO) method overflow, comprising the steps of: A, creating a first buffer descriptor BD BD ring and a second ring in the device memory; B, transceiver hardware FIFO writing a first data by a first write pointer idle BD BD ring, after the completion of the transceiver receive interrupt hardware; C, drivers receive interrupt is detected by the first read pointer to read from the first ring BD data fetch; drivers using the second write pointer to write the read second data BD ring; drivers using the second read pointer to read data from the second loop and processed BD. 本发明方案在不修改硬件收发器的前提下避免出现接收FIFO溢出,相应提高驱动接收的稳定性和可靠性。 Embodiment of the present invention is to avoid the receive FIFO overflow transceiver without modifying the hardware of the premise, to improve stability and reliability of the respective drive received.

Description

一种避免先入先出队列溢出的方法及设备 One way to avoid FIFO queue overflow method and apparatus

技术领域 FIELD

[0001] 本发明涉及数据通信技术领域,尤其涉及设备驱动软件的接收机制,特别涉及一种避免先入先出队列溢出的方法及设备。 [0001] Technical Field The present invention relates to data communications, and particularly relates to a mechanism for receiving device driver software, and particularly to a method of avoiding the FIFO queue and the overflow apparatus.

背景技术 Background technique

[0002]目前网络设备中,设备驱动软件接收数据普遍采用缓冲区描述符(BD)环机制,BD环是驱动软件与硬件收发器之间的一个数据缓冲。 [0002] It network device, the device driver software is widely used to receive data buffer descriptor (BD) ring mechanism, the BD ring is a buffer between the data driver software and hardware transceiver. 如图1所示,在设备内存103中分配BD104,每个BD 104由状态标志和缓冲指针组成,状态标志指示这个BD是空闲的还是有数据待处理的,缓冲指针指向一块内存区域,用于存放待处理的数据。 1, the dispensing device BD104 memory 103, 104 of each of the BD and buffer pointers to status flags, the status flag indicating that this BD is idle or data to be processed, a pointer to a buffer memory area, for storing data to be processed. 多个BD 104首尾相接组成BD环。 A plurality of BD 104 BD ring composed of head to tail. BD环是驱动软件101与硬件收发器102之间的一个数据缓冲。 BD ring is a buffer between the data drivers 101 and the hardware 102 transceiver.

[0003] 设备初始化的时候,由驱动软件101将BD环构造好,然后把BD环的信息通告给硬件收发器102。 [0003] When the device is initialized, the driver software 101 is configured to BD ring good, then the information advertisement BD ring to the transceiver 102 hardware. 硬件收发器102收到数据后,先在先入先出队列(FIFO) 105中暂存接收到的数据,当FIFO 105中暂存的数据达到一定水位后,再将暂存的数据从FIFO 105转移到接收BD环中的空闲BD上,最后以中断的方式通知驱动软件101处理收到的数据。 The transceiver 102 receives the hardware data, prior to first-out queue (FIFO) 105 temporarily stores the data received, when the data temporarily stored in the FIFO 105 reaches a certain level, then the buffered data is transferred from the FIFO 105 to the receiving BD ring idle BD, finally interrupted as to notify the driver software 101 processes the data received.

[0004] 虽然BD环与硬件收发器102的FIFO 105 一样都是起缓冲作用,但BD环能存放更多的数据,能容忍更大的网络突发流量。 [0004] FIFO although BD ring 102 and the transceiver 105 of the hardware is the same dampening effect, but BD ring can store more data, can tolerate greater network traffic bursts. 由于驱动软件101处理数据的时间较长且不固定,所以通常会在中断服务进程中唤醒一个接收任务来延后处理。 Due to the long drive time data processing software 101 and not fixed, it will usually wake up in the interrupt service process receives a task to snooze. 当接收任务处理数据的速度持续低于硬件收发器102写入数据的速度,则BD环会被数据占满,硬件收发器102无法将FIFO 105中的数据转移走,只要此时还有数据进入,FIFO 105就会溢出。 When the task processing speed of the receiver is lower than the rate of sustained hardware data transceiver 102 to write data, the BD ring is filled data, hardware data transceiver 102 can not move away in the FIFO 105, as long as there is more data at this time into the , FIFO 105 will overflow.

[0005] 可见,采用上述机制接收数据,FIFO溢出是容易出现的情况。 [0005] visible, the above-described mechanism for receiving the data, the FIFO overflow situation is prone. 特别是对于集中式系统,控制驱动软件和转发驱动软件都在一个中央处理单元(CPU)中运行,驱动接收任务被调度的时间得不到保证,FIFO溢出情况更为普遍。 Especially for a centralized system, control of driver software and driver software forwarded in a central processing unit operates (CPU), a driving task is scheduled reception time can not be guaranteed, the FIFO overflow condition is more common.

[0006] 如图1所示,在FIFO 105溢出的时候,硬件收发器102往往会停止接收数据,并产生一个中断通知驱动软件101。 [0006] As shown in FIG. 1, when the FIFO 105 overflows, the hardware tends to transceiver 102 stops receiving data, and generates an interrupt to inform driver software 101. 驱动软件101的做法是清空接收BD环上的数据,然后统计一次接收溢出错误,最后重新启动硬件收发器102继续接收数据。 Practice driver software 101 is clear to receive data on the BD ring, and a reception overrun error statistics, and finally restart the hardware transceiver 102 continues to receive data.

[0007] 通常情况下,FIFO溢出的后果也就是丢失几个报文,不会有太大问题。 [0007] Typically, the consequences of FIFO overflow is lost a few packets, will not be much problem. 但是,如果FIFO反复溢出,就会产生大量额外的中断,进一步增加驱动软件系统的开销,降低驱动软件的处理性能,形成恶性循环。 However, if the FIFO overflow again, it will generate significant additional interrupt driven software system to further increase the cost and reduce the processing performance driver software, creating a vicious cycle. 另外,某些硬件收发器在FIFO多次溢出后,会引起内部状态机紊乱,轻者再也不收数据,重者将数据写到错误的内存地址上,导致系统崩溃。 In addition, some hardware in the transceiver multiple FIFO overflow can cause disordered internal state machine, the light no longer receive data, the data is written on severe bad memory address, cause the system to crash. 而如何避免硬件收发器FIFO溢出,是解决上述问题的关键。 And how to avoid hardware transceiver FIFO overflow, it is the key to solve the above problems.

发明内容 SUMMARY

[0008] 本发明提供了一种避免先入先出队列溢出的方法及设备,在不修改硬件收发器的前提下避免出现接收FIFO溢出,相应提高驱动接收的稳定性和可靠性。 [0008] The present invention provides a method of avoiding the FIFO queue and the overflow device, to avoid overflow of the receive FIFO, to improve stability and reliability of the respective drive receiving without modifying the hardware in the transceiver premise.

[0009] 本发明实施例提出的一种避免FIFO溢出的方法,包括如下步骤: [0009] A method, comprising the steps provided by the embodiment of the present invention is a way to avoid FIFO overflow:

[0010] A、在设备内存中创建第一缓冲区描述符BD环和第二BD环;[0011 ] B、硬件收发器将FIFO中的数据通过第一写指针写入第一BD环的空闲BD中,完成后硬件收发器产生接收中断; [0010] A, creating a first buffer descriptor BD BD ring and a second ring memory device; BD ring into the first [0011] B, the transceiver hardware FIFO data write pointer by a first idle BD, the transceiver after the completion of the receive interrupt hardware;

[0012] C、驱动软件检测到接收中断后,利用第一读指针从第一BD环中读取数据;驱动软件利用第二写指针将所读取的数据写入第二BD环中;驱动软件利用第二读指针从第二BD环中读取数据并进行处理。 [0012] C, after detecting reception of driver software interrupt, using a first read pointer to read data from the first BD ring; drivers using the second write pointer to write the read second data BD ring; drive BD software reads data from the second loop and processed by the second read pointer.

[0013] 较佳地,所述第一BD环和第二BD环中的BD数目均为m,m≥η,η为硬件收发器产生一个接收中断对应的最大报文数。 [0013] Preferably, the first number BD BD BD ring and the second ring are m, m≥η, η produce the maximum number of transceiver hardware packet corresponding to a received interrupt.

[0014] 较佳地,对于第一BD环和第二BD环,同一个BD环中的各个BD在内存中连续相邻,BD的状态字段中包含一个环回标志比特。 [0014] Preferably, the first and second ring BD BD ring, with each ring one BD BD continuously adjacent in the memory, the status field contains a BD loopback flag bits. [0015] 较佳地,对于第一BD环和第二BD环,同一个BD环中的各个BD在内存中不连续相邻,BD中有一个特殊字段用于存放下一个BD的内存起始地址,最后一个BD的该字段存放第一个BD的内存起始地址。 [0015] Preferably, the first and second ring BD BD ring, with a BD BD ring is discontinuous adjacent the respective memory, a BD has a special field is used to store the starting memory BD address, the last of the BD field starting address of the first memory to store BD.

[0016] 较佳地,步骤B包括: [0016] Preferably, the step B comprises:

[0017] B1、硬件收发器FIFO达到高水位后,判断FIFO中是否有数据需要转移,若是执行步骤B2 ;否则转至步骤B6 ; After [0017] B1, transceiver hardware FIFO reaches a high level, it is determined whether the FIFO has data to transfer, if the step B2; otherwise, go to step B6;

[0018] B2、判断第一写指针指向的第一BD环中的BD是否为空闲,若是,执行步骤B3,否则返回步骤B2 ; [0018] B2, determines a first write pointer to a first ring BD in BD if idle, if so, step B3, otherwise returning to step B2;

[0019] B3、从Wl指向的BD中取出缓冲区地址,将数据通过直接内存访问DMA的方式写入到缓冲区中; [0019] B3, Wl taken out from the buffer address pointed to by the BD, the data is written to the buffer by direct memory access DMA of the embodiment;

[0020] B4、判断第一BD环是否完成一个报文的接收,若是,继续执行步骤B5,否则返回步骤B3 ; [0020] B4, determining whether the first complete BD ring receives a packet, if yes, proceed to Step B5, otherwise returning to step B3;

[0021] B5、设置第一写指针指向的BD的空闲标志为有数据,然后将第一写指针指向第一BD环的下一个BD ; [0021] B5, a first write pointer BD idle flag data, then the first write pointer to the next BD BD of the first ring;

[0022] B6、硬件收发器判断是否满足产生接收中断的条件,若是则产生接收中断,完成步骤B ;否则返回步骤BI。 [0022] B6, transceiver hardware judges whether the receive interrupt condition is generated, if a receive interrupt is generated, completion of step B; otherwise, returns to step BI.

[0023] 较佳地,步骤C包括: [0023] Preferably, Step C comprises:

[0024] Cl、驱动软件在中断处理程序中检查第一读指针指向的第一BD环中的BD是否有数据,若是执行步骤C2,否则转至步骤C6 ; [0024] Cl, driver software interrupt handler checks whether a first read pointer points to a first ring BD in BD data, if the step C2, otherwise go to step C6;

[0025] C2、检查第二写指针指向的第二BD环的BD是否空闲,若是,执行步骤C3,否则转至步骤C5 ; [0025] C2, BD BD ring of the second write pointer points to the second check is idle, if so, step C3, otherwise go to step C5;

[0026] C3、将第二写指针指向BD的缓冲指针与第一读指针指向的BD的缓冲指针交换; [0026] C3, the second write pointer to the buffer and the first read pointer BD pointer BD buffer pointer exchange;

[0027] C4、设置第二写指针指向的BD的空闲标志为有数据,使第二写指针指向第二BD环的下一个BD ; [0027] C4, a second write pointer BD idle data flag has the second write pointer to the next BD BD second ring;

[0028] C5、设置第一读指针指向的BD的空闲标志为空闲,使第一读指针指向第一BD环的下一个BD,然后转至步骤Cl ; [0028] C5, a first read pointer BD idle flag to idle the first read pointer to the next BD BD of the first ring, then go to step Cl;

[0029] C6、在接收任务中检查第二读指针指向的第二BD环的BD是否有数据,如果没有数据,完成数据接收处理;如果有数据,转到步骤C7 ; [0029] C6, checking in the second read pointer pointing to a second receiving task BD BD ring whether there are data, if there is no data to complete the data receiving process; if there is data, go to step C7;

[0030] C7、从第二读指针指向的第二BD环的BD的缓冲地址中取出数据进行处理,完成后执行步骤C8 ;[0031 ] C8、设置第二读指针指向的第二BD环的BD的空闲标志为空闲,使第二读指针指向第二BD环的下一个BD,然后转至步骤C6。 [0030] C7, the second ring BD BD is read from the second buffer address pointer taken out data processing, performed after step C8 is completed; [0031] C8, a second BD ring of the second read pointer BD idle flag to idle the second read pointer to the next BD BD of the second ring, and then go to step C6.

[0032] 本发明实施例还提出一种设备,包括硬件收发器模块,缓冲区描述符BD环模块和驱动软件模块,所述BD环模块中创建有第一缓冲区描述符BD环和第二BD环,其中: [0032] Embodiments of the invention also provides an apparatus comprising a transceiver module hardware, buffer descriptor BD ring module and a driver software module, the BD ring module to create a first buffer descriptor ring and a second BD BD ring, in which:

[0033] 所述硬件收发器模块,用于将先进先出FIFO单元中的数据通过第一写指针写入弟一BD环的空闲BD中,完成后广生接收中断; [0033] The transceiver module hardware, for the data in the FIFO unit FIFO by writing a first write pointer Di BD BD idle ring, Kwong Sang receive interrupt after completion;

[0034] 所述驱动软件模块,用于在检测到所述硬件收发器模块产生的接收中断后,利用第一读指针从第一BD环中读取数据;利用第二写指针将所读取的数据写入第二BD环中;并利用第二读指针从第二BD环中读取数据并进行处理。 [0034] The driver software module configured to, after receiving the detected hardware interrupts generated by the transceiver module using a first read pointer to read data from the first BD ring; using a second write pointer to the read BD data written in the second ring; BD and reads data from the second loop and processed by the second read pointer. [0035] 较佳地,所述第一BD环和第二BD环中的BD数目均为m,m≥η,η为硬件收发器产生一个接收中断对应的最大报文数。 [0035] Preferably, the first number BD BD BD ring and the second ring are m, m≥η, η produce the maximum number of transceiver hardware packet corresponding to a received interrupt.

[0036] 较佳地,对于第一BD环和第二BD环,同一个BD环中的各个BD在内存中连续相邻,BD的状态字段中包含一个环回标志比特。 [0036] Preferably, the first and second ring BD BD ring, with each ring one BD BD continuously adjacent in the memory, the status field contains a BD loopback flag bits.

[0037] 较佳地,对于第一BD环和第二BD环,同一个BD环中的各个BD在内存中不连续相邻,BD中有一个特殊字段用于存放下一个BD的内存起始地址,最后一个BD的该字段存放第一个BD的内存起始地址。 [0037] Preferably, the first and second ring BD BD ring, with a BD BD ring is discontinuous adjacent the respective memory, a BD has a special field is used to store the starting memory BD address, the last of the BD field starting address of the first memory to store BD.

[0038] 从以上技术方案可以看出,在设备内从中设置两个BD环,通过在两个BD环之间传递数据,达到第一BD环被驱动软件快速处理的效果,确保硬件收发器总能从第一BD环中找到空闲的BD写入数据,从而避免了硬件收发器FIFO的溢出。 [0038] As can be seen from the above technical solution, which is provided in the apparatus two BD ring, by passing data between the two rings BD, BD achieve the effect of the first ring is driven fast processing software, the hardware to ensure that the transceiver Total BD ring from a first idle found BD write data, thereby avoiding the hardware FIFO overflow transceiver.

附图说明 BRIEF DESCRIPTION

[0039] 图1为现有技术中采用BD环接收数据的原理示意图; [0039] FIG. 1 is a principle schematic diagram of a data receiving BD ring employed in the prior art;

[0040] 图2为本发明实施例中采用BD环接收数据的原理示意图; [0040] FIG 2 a schematic embodiment of the principles of the reception data using the BD ring embodiment of the present invention;

[0041] 图3为本发明实施例方案硬件收发器部分的处理流程图; [0041] FIG. 3 process flow diagram of a hardware embodiment transceiver portion embodiment of the invention;

[0042] 图4为本发明实施例方案驱动软件部分的处理流程图。 [0042] Figure 4 a process flow diagram of the part program driver software embodiment of the present invention.

具体实施方式 detailed description

[0043] 本发明提出的避免先入先出队列溢出的方法的基本思想如下:在原有一个BD环的基础上,增加了一个BD环。 [0043] proposed to avoid basic FIFO queue overflow idea of ​​the method of the present invention is as follows: In the original loop on a BD, a BD ring increases. 硬件收发器可以访问的BD环称之为第一BD环,或快速BD环。 The transceiver hardware accessible BD BD ring called a first loop, or quick BD ring. 另一个BD环称之为第二BD环,或慢速BD环。 Another BD BD ring called the second ring, or slow BD ring. 通过在两个BD环之间传递数据,达到第一BD环被驱动软件快速处理的效果,确保硬件收发器总能从第一BD环中找到空闲的BD写入数据,从而避免了硬件收发器FIFO的溢出。 By passing between the two rings data BD, BD achieve the effect of the first ring is driven fast processing software, the hardware to ensure that total from the first transceiver BD BD ring found idle write data, thereby avoiding the hardware transceiver FIFO overflow.

[0044] 本发明实现容易,效果明显,不依赖于特殊的硬件收发器特性,是完全通用的驱动软件设计。 [0044] completely generic driver software design of the present invention is easy to implement, effective to not depend on the specific hardware characteristics of the transceiver, Yes. 设计上利用了空间换取时间的方法,成功的将驱动软件缓冲与硬件收发器FIFO之间的矛盾转移到了两个驱动软件缓冲之间,虽然增加一点内存开销,但彻底解决硬件收发器FIFO溢出带来的问题。 Use the design method of space for time, the success of the transfer of the contradiction between the driver software and hardware transceiver FIFO buffer to buffer between the two drivers, although a little more memory overhead, but solve hardware transceiver FIFO overflow with to the problem.

[0045] 为使本发明技术方案的特点以及技术效果更加清楚,以下通过具体实施例对本发明方案进行进一步详细阐述。 [0045] To make the characteristics and technical effects of the technical solution of the present invention clearer, the following further embodiment of the present invention is described in detail by way of specific examples.

[0046] 假设硬件收发器最多收到η个报文产生一个接收中断,那么设备驱动软件需要从内存中分配2Xm个BD,m>n,每m个BD组成一个BD环。 [0046] assumes that the hardware up to η transceiver receives a message a receive interrupt is generated, then the device driver software needs to allocate memory from 2Xm a BD, m> n, each composed of a m-th BD BD ring. 组成BD环的方式与硬件收发器对BD环的约定有关,分为如下两种: BD ring composed manner agreed with the hardware of the transceiver relating to BD ring, divided into the following two types:

[0047] 方式一:同一个BD环的各个BD在内存中必须是连续相邻的,BD的状态字段中有一个环回标志比特,环回标志比特为I表示该BD是最后一个BD,环回标志比特为O则表示该BD不是最后一个BD。 [0047] Mode 1: the same respective BD BD ring in memory must be continuously adjacent to, the status field in a BD flag bit loopback, loopback flag I showing that the bit is the last BD BD, ring O return symbol indicates that the bit is not the last BD BD. 驱动软件初始化时将BD环中的第一个BD的内存起始地址写到硬件收发器寄存器中,硬件收发器通过偏移BD大小的内存找到下一个BD,当发现BD是BD环的最后一个BD时,自动跳回到第一个BD,完成BD环的遍历。 Driver software during initialization of the memory starting address of the first ring BD BD transceiver hardware register is written, the transceiver via the hardware memory size offset to find the next BD BD, BD is found when the last BD ring when BD, automatically jump back to the first BD, BD complete traversal of the ring.

[0048] 方式二:同一个BD环的各个BD在内存中可以不是连续相邻的,BD有一个特殊字段用于存放下一个BD的内存起始地址,最后一个BD的该字段存放第一个BD的内存起始地址,形成一个首尾相接的环。 [0048] Second way: each BD BD same ring may not be continuous in neighboring memory, BD has a special memory field for storing the starting address of the next BD, the last field of the BD holding the first BD memory start address, end to end to form a ring. 驱动软件初始化时将第一个BD的内存起始地址写到硬件收发器寄存器中,硬件收发器通过该字段找到下一个BD,完成BD环的遍历。 When the driver software to initialize the memory start address of the first transceiver BD hardware register is written, the transceiver hardware through this field to find the next BD, BD ring traversal completion.

[0049] 两个BD环创建完成后,为每个BD分配一个数据缓冲区,将数据缓冲区的内存起始地址写入BD的缓冲指针字段,设置BD的状态字段中的空闲标志为空闲。 After the [0049] two BD ring created, assigned to each data buffer a BD, the BD buffer write data buffer pointer field memory starting address, the status field set BD idle flag to idle. 选择其中一个BD环作为快速BD环,把它的第一个BD的内存起始地址写到硬件收发器寄存器中。 Wherein selecting a ring as quickly BD BD ring, the starting address of its memory a first transceiver BD writes hardware registers. 初始化完成后的双BD环如图2所示,粗箭头表示数据的流向,细箭头指向当前操作的BD。 After completion of the initialization BD double ring shown in Figure 2, thick arrow indicates the flow of data, thin arrow pointing to the current operation of the BD.

[0050] 图2中,第一写指针(Wl)由硬件收发器维护,指向硬件收发器当前可以访问的第一BD环的BD。 In [0050] FIG 2, a first write pointer (Wl of the) maintained by the hardware transceiver, a first point BD BD ring transceiver hardware currently accessible. 第一读指针(Rl)、第二写指针(W2)和第二读指针(R2)由驱动软件维护,分别指向第一BD环中可以执行读操作的BD、第二BD环中可以执行写操作的BD和第二BD环中可以执行读操作的BD。 A first read pointer (Rl), a second write pointer (W2) and a second read pointer (R2) maintained by the driver software, respectively, toward the first ring may be performed BD BD read operation, the second ring may write BD and a second ring BD BD BD operation may be performed in a read operation. 初始化完成的时候,Wl和Rl指向第一BD环的第一个BD,W2和R2指向第二BD环的第一个BD。 When initialization is complete, Wl and the first Rl BD BD toward the first ring, W2 and R2 of the second point to the first BD BD ring. 当然在本发明中,Wl和Rl不限于指向第一BD环的第一个BD,两个指针可以指向第一BD环的任意同一个BD,此时驱动软件初始化时将Wl和Rl同时指向的BD环中的那一个BD的内存起始地址写到硬件收发器寄存器中即可。 Of course, in the present invention, Rl and Wl is not limited to the first point of the first BD BD ring, two pointers can point to any of the first ring with a BD BD, At this time the driver software initialization Rl and simultaneously directed Wl memory start address of a BD BD ring that is written to the hardware register to the transceiver. 同理,W2和R2指向第二BD环的同一个BD即可。 Similarly, W2 and R2 are the same BD BD directed to a second ring.

[0051] 本发明实施例提出一种设备,包括硬件收发器模块,缓冲区描述符BD环模块和驱动软件模块,可以避免出现先入先出队列溢出的情况。 [0051] The embodiment provides an apparatus comprising a transceiver module according to the present invention, the hardware, the buffer descriptor BD ring module, and driver software modules, you can avoid FIFO overflow of the queue. 所述BD环模块中创建有第一缓冲区描述符BD环和第二BD环,其中: The BD ring module to create a first buffer descriptor BD BD ring and a second ring, wherein:

[0052] 所述硬件收发器模块,用于将先进先出FIFO单元中的数据通过第一写指针写入弟一BD环的空闲BD中,完成后广生接收中断; [0052] The transceiver module hardware, for the data in the FIFO unit FIFO by writing a first write pointer Di BD BD idle ring, Kwong Sang receive interrupt after completion;

[0053] 所述驱动软件模块,用于在检测到所述硬件收发器模块产生的接收中断后,利用第一读指针从第一BD环中读取数据;利用第二写指针将所读取的数据写入第二BD环中;并利用第二读指针从第二BD环中读取数据并进行处理。 [0053] The driver software module configured to, after receiving the detected hardware interrupts generated by the transceiver module using a first read pointer to read data from the first BD ring; using a second write pointer to the read BD data written in the second ring; BD and reads data from the second loop and processed by the second read pointer.

[0054] 较佳地,所述第一BD环和第二BD环中的BD数目均为m,m≥η,η为硬件收发器产生一个接收中断对应的最大报文数。 [0054] Preferably, the first number BD BD BD ring and the second ring are m, m≥η, η produce the maximum number of transceiver hardware packet corresponding to a received interrupt.

[0055] 较佳地,对于第一BD环和第二BD环,同一个BD环中的各个BD在内存中连续相邻,BD的状态字段中包含一个环回标志比特。 [0055] Preferably, the first and second ring BD BD ring, with each ring one BD BD continuously adjacent in the memory, the status field contains a BD loopback flag bits.

[0056] 较佳地,对于第一BD环和第二BD环,同一个BD环中的各个BD在内存中不连续相邻,BD中有一个特殊字段用于存放下一个BD的内存起始地址,最后一个BD的该字段存放第一个BD的内存起始地址。 [0056] Preferably, the first and second ring BD BD ring, with a BD BD ring is discontinuous adjacent the respective memory, a BD has a special field is used to store the starting memory BD address, the last of the BD field starting address of the first memory to store BD.

[0057] 本发明实施例提出的基于上述设备的双BD环的数据接收流程如图3和图4所示,其中图3示出了硬件收发器部分的处理流程,图4示出了驱动软件部分的处理流程。 FIG driver software based on the data receiving process of the above-described BD ring double apparatus shown in FIG. 3 and 4, wherein FIG. 3 shows a process flow of the hardware portion of a transceiver, Figure 4 illustrates a forth embodiment of embodiment [0057] of the present invention portion of the processing flow.

[0058] 硬件收发器部分的处理过程是硬件收发器将FIFO中的数据通过第一写指针写入第一BD环的空闲BD中,完成后硬件收发器产生接收中断,具体包括如下步骤: [0058] The transceiver hardware processing section is a hardware transceiver FIFO data is written first idle BD BD ring by a first write pointer, after the completion of the receive interrupt hardware transceiver, includes the following steps:

[0059] 步骤301:硬件收发器FIFO达到高水位后,判断FIFO中是否有数据需要转移,若是,转至步骤306,否则执行步骤302。 [0059] Step 301: After a hardware transceiver FIFO reaches the high water level, it is determined whether the FIFO has data to transfer, and if yes, go to step 306, otherwise step 302 is performed.

[0060] 步骤302:判断Wl指针指向的BD是否空闲,若是,执行步骤303,否则,返回步骤 [0060] Step 302: determining whether the BD Wl pointer idle, if so, step 303 is performed, otherwise, returns to step

302。 302.

[0061] 所述判断具体为:检查Wl指向的BD的状态字段中的空闲标志比特,如果为I表示该BD空闲,如果为O表示该BD已被占用。 [0061] The specifically determined as follows: Idle flag bit status field inspection point Wl in a BD, the BD indicates if is idle I, represented as O if the BD has been occupied.

[0062] 步骤303:从Wl指向的BD中取出缓冲区地址,将数据通过直接内存访问(DMA)的方式写入到缓冲区中。 [0062] Step 303: Remove the buffer address pointed to Wl from the BD, the data is written into the buffer by direct memory access (DMA) is.

[0063] 步骤304:判断是否完成一个报文的接收,若是,继续执行步骤305,否则返回步骤 [0063] Step 304: determining whether a complete packet is received, if yes, proceed to step 305, otherwise the process returns to step

303。 303.

[0064] 步骤305:将Wl当前指向的BD的空闲标志比特置0,然后将Wl指向第一BD环的下一个BD。 [0064] Step 305: the Wl currently pointed BD idle flag bit is set to 0, then Wl of the first point to the next BD BD ring.

[0065] 步骤306:硬件收发器判断是否满足产生接收中断的条件(时间超过门限或报文个数超过门限),若是执行步骤307。 [0065] Step 306: determining whether a hardware transceiver satisfies receive interrupt condition is generated (time exceeds the threshold or exceeds the threshold number of packets), if step 307 is performed. 否则返回步骤301。 Otherwise it returns to step 301.

[0066] 步骤307:硬件收发器产生接收中断。 [0066] Step 307: receive interrupt transceiver hardware.

[0067] 至此,硬件收发器部分的处理过程完成,接下来进行驱动软件部分的处理,如图4所示,驱动软件部分的处理过程是驱动软件检测到接收中断后,利用第一读指针从第一BD环中读取数据,然后利用第二写指针将所读取的数据写入第二BD环中,最后利用第二读指针将第二BD环的数据读取出来。 [0067] Thus, the transceiver hardware processing section is completed, the next portion of the driver software processing, as shown in FIG. 4, the processing portion after the driver software driver software receives the interrupt detected by the first read pointer from BD ring first read data using a second write pointer and the read data is written into the second BD ring, and finally by the second data of the second read pointer to read out the BD ring. 具体包括如下步骤: It includes the following steps:

[0068] 步骤401:驱动软件在中断处理程序中检查Rl指向的第一BD环中的BD是否有数据,若是,执行步骤402,否则转至步骤406。 [0068] Step 401: the driver software checks whether the first interrupt handler pointed to by BD ring in Rl BD data, if yes, perform step 402, otherwise, go to step 406.

[0069] 所述中检查Rl指向的BD是否有数据就是检查中检查Rl指向的BD的空闲标志比特,如果为I表示没有数据,如果为O表示有数据待处理。 [0069] The Rl check whether there are data directed BD Idle flag bit is checked Rl BD check point, if no data is represented as I, represented as O if there is data to be processed.

[0070] 步骤402:检查W2指向的第二BD环的BD是否空闲,若是,执行步骤403,否则转至步骤405。 [0070] Step 402: Check the second point W2 BD BD ring is idle, if so, step 403 is performed, otherwise, go to step 405.

[0071] 所述检查W2指向的BD是否空闲同样是检查W2指向的BD的空闲标志比特,如果为O表示有数据尚未处理,如果为I表示该BD空闲。 [0071] W2 of the inspection points are idle BD W2 is also directed to check the BD Idle flag bit, indicates if the data has not been processed is O, it indicates if the BD is idle I.

[0072] 步骤403:将W2指向BD的缓冲指针与Rl指向的BD的缓冲指针交换。 [0072] Step 403: The buffer pointer W2 points to the points Rl BD BD buffer pointer exchange.

[0073] 步骤404:将W2指向的BD的空闲标志比特置O (表示该BD中有数据尚未处理),W2指向第二BD环的下一个BD。 [0073] Step 404: the point W2 of the BD Idle flag bit is set to O (BD indicates that the data has not been processed), W2 of the second points to the next BD BD ring.

[0074] 步骤405:将Rl指向的BD的空闲标志比特置I (表示该BD空闲),Rl指向下一个BD,然后转至步骤401。 [0074] Step 405: the point Rl of the BD Idle flag bit is set to I (BD indicates the idle), a BD Rl point to the next, then go to step 401.

[0075] 步骤406:驱动软件在接收任务中检查R2指向的BD的空闲标志比特,判断R2指向的BD是否有数据,如果空闲标志比特为I表示没有数据,退出任务,完成数据接收处理。 [0075] Step 406: Check the driver software in the receiving task idle flag bits pointed to the BD R2, R2 is determined whether the BD data points, if the idle flag indicates that no data bit is I, the task exits, the data reception process is completed. 如果为O表示有数据待处理,转到步骤407。 If there is data to be processed represents O, goes to step 407.

[0076] 步骤407:驱动软件从R2指向的BD的缓冲地址中取出数据进行处理,完成后执行步骤408。 [0076] Step 407: R2 driver software from the BD buffer address pointed to by the extracted data is processed, after the completion of step 408 is performed.

[0077] 步骤408:将R2指向的BD的空闲标志比特置I (表示该BD空闲),R2指向下一个BD,然后转至步骤406。 [0077] Step 408: The point R2 of the BD Idle flag bit is set to I (BD indicates the idle), points to the next BD R2, then go to step 406.

[0078] 通过以上的实施方式的描述,本领域的技术人员可以清楚地了解到本发明可借助驱动软件加必需的硬件收发器平台的方式来实现,当然也可以全部通过硬件收发器来实施,但很多情况下前者是更佳的实施方式。 [0078] By the above described embodiments, those skilled in the art may clearly understand that the present invention can be implemented by driver software plus a necessary universal hardware platform way transceiver, of course, may all be implemented by hardware transceiver, but in many cases the former is a preferred implementation manner. 基于这样的理解,本发明的技术方案对背景技术做出贡献的全部或者部分可以以驱动软件产品的形式体现出来,该计算机驱动软件产品可以存储在存储介质中,如R0M/RAM、磁碟、光盘等,包括若干指令用以使得一台计算机设备(可以是个人计算机,服务器,或者网络设备等)执行本发明各个实施例或者实施例的某些部分所述的方法。 Based on such understanding, the technical solutions of the present invention contributes to the prior art may be embodied in whole or in part in a form of driver software product, which computer software product may be stored in the driver storage medium, such as a R0M / RAM, magnetic disk, optical disc, and includes several instructions that enable a computer device (may be a personal computer, a server, or network device) to execute the methods of the various embodiments of the present invention or the embodiment.

[0079] 以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明保护的范围之内。 [0079] The foregoing is only preferred embodiments of the present invention but are not intended to limit the present invention, all within the spirit and principle of the present invention, any changes made, equivalent substitutions and improvements should be included within the scope of protection of the present invention.

Claims (10)

  1. 1.一种避免先入先出队列FIFO溢出的方法,其特征在于,包括如下步骤: A、在设备内存中创建第一缓冲区描述符BD环和第二 BD环; B、硬件收发器将FIFO中的数据通过第一写指针写入第一 BD环的空闲BD中,完成后硬件收发器产生接收中断; C、驱动软件检测到接收中断后,利用第一读指针从第一 BD环中读取数据;驱动软件利用第二写指针将所读取的数据写入第二BD环中;驱动软件利用第二读指针从第二BD环中读取数据并进行处理。 A method of avoiding first-in first out FIFO queue overflow, characterized in that it comprises the steps of: A, creating a first buffer descriptor BD BD ring and a second ring in the device memory; B, transceiver hardware FIFO writing a first data by a first write pointer idle BD BD ring, after the completion of the transceiver receive interrupt hardware; C, drivers receive interrupt is detected by the first read pointer to read from the first ring BD data fetch; drivers using the second write pointer to write the read second data BD ring; drivers using the second read pointer to read data from the second loop and processed BD.
  2. 2.根据权利要求1所述的方法,其特征在于,所述第一 BD环和第二BD环中的BD数目均为m,m > η,η为硬件收发器产生一个接收中断对应的最大报文数。 Maximum 2. The method according to claim 1, wherein said first number of BD BD BD ring and the second ring are m, m> η, η transceiver generates a hardware interrupt for the receiving number of packets.
  3. 3.根据权利要求1所述的方法,其特征在于,对于第一 BD环和第二BD环,同一个BD环中的各个BD在内存中连续相邻,BD的状态字段中包含一个环回标志比特。 3. The method according to claim 1, wherein the first and second ring BD BD ring, with each ring one BD BD continuously adjacent in the memory, the status field contains a BD loopback flag bits.
  4. 4.根据权利要求1所述的方法,其特征在于,对于第一 BD环和第二BD环,同一个BD环中的各个BD在内存中不连续相邻,BD中有一个特殊字段用于存放下一个BD的内存起始地址,最后一个BD的该字段存放第一个BD的内存起始地址。 4. The method according to claim 1, wherein the first and second ring BD BD ring, with a BD BD ring is discontinuous adjacent the respective memory, BD has a special field is used to a memory storing the starting address of a BD, a BD last field stores the start address of the first memory of the BD.
  5. 5.根据权利要求1-4任一项所述的方法,其特征在于,步骤B包括: B1、硬件收发器FIFO达到高水位后,判断FIFO中是否有数据需要转移,若是执行步骤B2 ;否则转至步骤B6 ; B2、判断第一写指针指向的第一BD环中的BD是否为空闲,若是,执行步骤B3,否则返回步骤B2 ; B3、从第一写指针指向的BD中取出缓冲区地址,将数据通过直接内存访问DMA的方式写入到缓冲区中; B4、判断第一BD环是否完成一个报文的接收,若是,继续执行步骤B5,否则返回步骤B3 ; B5、设置第一写指针指向的BD的空闲标志为有数据,然后将第一写指针指向第一BD环的下一个BD ; B6、硬件收发器判断是否满足产生接收中断的条件,若是则产生接收中断,完成步骤B;否则返回步骤BI。 The method according to any one of claims 1 to 4, wherein step B comprises: B1, the transceiver hardware FIFO reaches the high water level, it is determined whether the FIFO has data to transfer, if the step B2; otherwise, go to step B6; B2, a first ring BD write pointer points to a first determination of whether a BD is idle, if so, step B3, otherwise returning to step B2; B3, taken out from the first buffer write pointer points to the BD address, the data is written by way of direct memory access DMA into the buffer; B4, determining whether the first complete BD ring receives a packet, if yes, proceed to step B5, otherwise returning to step B3; B5, a first the write pointer BD idle flag data, then the first write pointer to the next BD BD first ring; B6, transceiver hardware judges whether the receive interrupt condition is generated, if a receive interrupt is generated, through the steps B; otherwise, returns to step BI.
  6. 6.根据权利要求1-4任一项所述的方法,其特征在于,步骤C包括: Cl、驱动软件在中断处理程序中检查第一读指针指向的第一BD环中的BD是否有数据,若是执行步骤C2,否则转至步骤C6 ; C2、检查第二写指针指向的第二BD环的BD是否空闲,若是,执行步骤C3,否则转至步骤C5 ; C3、将第二写指针指向BD的缓冲指针与第一读指针指向的BD的缓冲指针交换; C4、设置第二写指针指向的BD的空闲标志为有数据,使第二写指针指向第二BD环的下一个BD ; C5、设置第一读指针指向的BD的空闲标志为空闲,使第一读指针指向第一BD环的下一个BD,然后转至步骤Cl ; C6、在接收任务中检查第二读指针指向的第二BD环的BD是否有数据,如果没有数据,完成数据接收处理;如果有数据,转到步骤C7 ;C7、从第二读指针指向的第二BD环的BD的缓冲地址中取出数据进行处理,完成后执行步 6. The method according to any one of claims 1 to 4, wherein the step C comprises: Cl, driver software interrupt handler checks whether a first read pointer points to a first ring BD in BD data , if the step C2, otherwise go to step C6; C2, a second check of the second write pointer BD BD ring is idle, if so, step C3, otherwise go to step C5; C3, the write pointer points to the second BD buffer pointer and the read pointer points to the first buffer pointer exchange BD; C4, a second write pointer BD idle data flag has the second write pointer to the next BD BD second ring; C5 , a first read pointer BD idle flag to idle the first read pointer to the next BD BD of the first ring, then go to step Cl; C6, the receiving task checks the read pointer of the second BD BD if two ring data, if there is no data to complete the data receiving process; if there is data, go to step C7; C7, BD BD second ring from the second read buffer address pointer taken out process data after the completion of the implementation of step 骤C8 ; CS、设置第二读指针指向的第二BD环的BD的空闲标志为空闲,使第二读指针指向第二BD环的下一个BD,然后转至步骤C6。 Step C8; BD of the CS, a second read pointer points to a second idle flag BD ring is idle, that the second read pointer to the next BD BD of the second ring, and then go to step C6.
  7. 7.一种设备,包括硬件收发器模块,缓冲区描述符BD环模块和驱动软件模块,其特征在于,所述BD环模块中创建有第一缓冲区描述符BD环和第二BD环,其中: 所述硬件收发器模块,用于将先进先出FIFO单元中的数据通过第一写指针写入第一BD环的空闲BD中,完成后广生接收中断; 所述驱动软件模块,用于在检测到所述硬件收发器模块产生的接收中断后,利用第一读指针从第一BD环中读取数据;利用第二写指针将所读取的数据写入第二BD环中;并利用第二读指针从第二BD环中读取数据并进行处理。 7. An apparatus comprising a transceiver module hardware, buffer descriptor BD ring module and a driver software module, wherein said BD ring module to create a first buffer descriptor BD BD ring and a second ring, wherein: said hardware transceiver module, the data FIFO for writing in the FIFO unit of the first idle BD BD ring by a first write pointer, Kwong Sang after completion of the receive interrupt; the drive software module, with after receiving detected at the transceiver module hardware interrupts generated by the first read pointer to read data from the first loop BD; the data written in the second read BD ring by a second write pointer; BD and reads data from the second loop and processed by the second read pointer.
  8. 8.根据权利要求7所述的设备,其特征在于,所述第一 BD环和第二BD环中的BD数目均为m,m > η,η为硬件收发器产生一个接收中断对应的最大报文数。 Maximum 8. The apparatus according to claim 7, wherein said first number of BD BD BD ring and the second ring are m, m> η, η transceiver generates a hardware interrupt for the receiving number of packets.
  9. 9.根据权利要求7所述的设备,其特征在于,对于第一 BD环和第二BD环,同一个BD环中的各个BD在内存中连续相邻,BD的状态字段中包含一个环回标志比特。 9. The apparatus of claim 7, wherein the first and second ring BD BD ring, with each ring one BD BD continuously adjacent in the memory, the status field contains a BD loopback flag bits.
  10. 10.根据权利要求7所述的设备,其特征在于,对于第一 BD环和第二BD环,同一个BD环中的各个BD在内存中不连续相邻,BD中有一个特殊字段用于存放下一个BD的内存起始地址,最后一个BD的该字段存放第一个BD的内存起始地址。 10. The apparatus according to claim 7, wherein the first and second ring BD BD ring, with a BD BD ring is discontinuous adjacent the respective memory, BD has a special field is used to a memory storing the starting address of a BD, a BD last field stores the start address of the first memory of the BD.
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