CN102136832B - Clock signal detection method and system - Google Patents
Clock signal detection method and system Download PDFInfo
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- CN102136832B CN102136832B CN 201110038243 CN201110038243A CN102136832B CN 102136832 B CN102136832 B CN 102136832B CN 201110038243 CN201110038243 CN 201110038243 CN 201110038243 A CN201110038243 A CN 201110038243A CN 102136832 B CN102136832 B CN 102136832B
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Abstract
The invention discloses clock signal detection method and system, belonging to the technical field of signal detection. The method comprises the following steps of: inputting a clock signal to a band-pass filter, wherein the bandwidth of the band-pass filter corresponds to the detection accuracy required by the clock signal; reshaping the output of the band-pass filter; and detecting whether a signal is output after reshaping, and if no signal is detected to be output, determining the clock signal to be faulty. By using the clock signal detection method and system, the coupling relationship between the clock signal detection accuracy and consumed resources as well as detection time can be eliminated, the detection of the clock signal can be simply and conveniently realized, the detection time is shortened, and the requirements for different detection accuracies are satisfied.
Description
Technical field
The present invention relates to the signal detection technique field, be specifically related to a kind of clock signal detection method and system.
Background technology
The reference signal of digital circuitry work is clock signal, and the accuracy of clock signal and stability determine the reliability of digital circuitry function.
At present, the clock source that industry is general mostly is to be provided by crystal oscillator, and is very high because the quality factor of crystal circuit characteristic are the Q value, and the clock of high accuracy and high stable can be provided for digital circuitry.But because physical structure characteristics and technological level restriction, two kinds of failure modes can appear in crystal oscillator:
1, fundamental frequency crystal oscillator, fundamental frequency refers to the vibration frequency at the minimum order of vibration mode, because there is the aging phenomenon of frequency skew in the wafer physically aged.
Take the 8.192MHz constant-temperature crystal oscillator as example, the situation that the resonance frequency is displaced to 8.200MHz can appear.
2, overtone crystal oscillator, the failure mode of the frequency saltus step that can occur vibrating, described overtone refers to the mechanical harmonic wave of crystal vibration.
Take the 100MHz crystal oscillator as example, 100MHz is 3 overtone resonance points (3 subharmonic) of 33.33MHz fundamental frequency, and main failure mode is that the resonance frequency jumps to 166MHz (5 overtones) or 66MHz (2 overtones).
Therefore, in digital circuitry, cause service exception for avoiding the clock frequency skew, must do respectively detection to each clock signal.Timely report and alarm when the clock frequency deviation exceeds professional tolerance, and initiatively carry out board switchover or carry out the self-healing measure, do not interrupt to avoid business.
As shown in Figure 1, in the prior art, to the detection method of clock signal counters design in logical device normally, tested clock signal 11 is carried out frequency division, obtain the signal 12 behind the frequency division, then detect with the cycle of the tested clock signal of high frequency clock signal 13 actuation counter after to frequency division.
Effect according to consumption of natural resource and inefficacy can be divided into the detection of two classes:
1, clock has or not detection: the resource of consumption is few, and sense cycle is short, but whether test result can only lose by read clock.
2, clock frequency deviation detects: the resource of consumption is many, and sense cycle is long, and test result can be carried out the qualitative analysis of clock frequency accuracy.
In the manner described above clock signal is detected, if accuracy of detection is doubled, as shown in Figure 2, then the d type flip flop of frequency counter and testing result counter use need to respectively increase by one, detect and consuming timely also will double, the resource that namely consumes is directly proportional with accuracy of detection, detects consuming time and the accuracy of detection exponent function relation.Required precision is higher, and resource consumption is more, and detection time is also longer.And, in some equipment, only some important clock signals are carried out frequency deviation and detect, and only have or not detection for other clock signals.
Summary of the invention
The embodiment of the invention provides a kind of clock signal detection method and system.
The embodiment of the invention provides following technical scheme:
Clock signal is input to band pass filter, and the bandwidth of described band pass filter is corresponding with the required accuracy of detection of clock signal;
The fundamental frequency sinusoidal signal of described band pass filter output is converted to the frequency square-wave signal;
Whether have square-wave signal output, if do not detect square-wave signal output, determine that then described clock signal breaks down if detecting.
A kind of clock signal detection system comprises:
Band pass filter is used for input clock signal, and the bandwidth of described band pass filter is corresponding with the required accuracy of detection of clock signal;
Shaping circuit is used for the fundamental frequency sinusoidal signal of described band pass filter output is converted to the frequency square-wave signal;
Whether signal deteching circuit has square-wave signal output for detection of described shaping circuit, and when detecting described shaping circuit and do not have square-wave signal output, determines that described clock signal breaks down.
The clock signal detection method that the embodiment of the invention provides and system, the advantage of analogue technique without time-delay is applied in the detection to clock signal, greatly reduced clock signal has been carried out the time that the high accuracy detection consumes, even can when exceeding standard appears in tested clock frequency deviation, cut off immediately clock, avoid exporting to rear level system and cause unpredictable fault; In addition, the clock signal detection method and the system that utilize the embodiment of the invention to provide can the simplified design difficulty, guaranteeing can to save circuit resource in the accuracy of detection situation.
Description of drawings
In order to be illustrated more clearly in the embodiment of the present application or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use among the embodiment, apparently, the accompanying drawing that the following describes only is some embodiment that put down in writing among the present invention, for those of ordinary skills, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the principle schematic that clock signal detects in the prior art;
Fig. 2 is the principle schematic of clock signal accuracy of detection shown in Figure 1 when doubling;
Fig. 3 is square-wave signal spectrum analysis schematic diagram;
Fig. 4 is a kind of schematic flow sheet of embodiment of the invention clock signal detection method;
Fig. 5 is the another kind of schematic flow sheet of embodiment of the invention clock signal detection method;
Fig. 6 is a kind of structural representation of embodiment of the invention clock signal detection system;
Fig. 7 utilizes embodiment of the invention clock signal detection system to detect the schematic diagram of clock signal;
Fig. 8 utilizes embodiment of the invention clock signal detection system to detect the schematic diagram that does not have clock signal;
Fig. 9 is the another kind of structural representation of embodiment of the invention clock signal detection system;
Figure 10 is a kind of concrete application schematic diagram of embodiment of the invention clock signal detection system.
Embodiment
In order to make those skilled in the art person understand better the scheme of the embodiment of the invention, below in conjunction with drawings and embodiments the embodiment of the invention is described in further detail.
Dagital clock signal is the square wave with fixed cycle, and the representative value of duty ratio is 50%.By Fourier transform as can be known the frequency spectrum of dagital clock signal such as following formula describe:
Wherein,
The DC component of square-wave signal,
The first-harmonic that is called this square wave signal, its cycle
Identical with the cycle of square wave itself.In the formula all the other every all be higher harmonic components, their angular frequency is the integral multiple of first-harmonic angular frequency.
As seen, the frequency of square wave is consistent with the frequency of its fundamental component, and the high order harmonic component of close fundamental component is 3 subharmonic, with the spectrum intervals distance of fundamental frequency be 2 frequencys multiplication.
Because therefore the pure of SIN function when doing signal analysis, can only consider the functional relation of its amplitude voltage and angular frequency.
And band pass filter can be by the frequency component in a certain frequency range but is decayed to the frequency component of other scopes extremely low-level.
As shown in Figure 3, be square-wave signal spectrum analysis schematic diagram, shown the distribution situation of each harmonic component of square wave.
Therefore, These characteristics according to clock signal and band pass filter, embodiment of the invention clock signal detection method and system, after by a band pass filter fundamental frequency of dagital clock signal being filtered, again the fundamental frequency of band pass filter output detected, if there is not signal output, determine that then described clock signal breaks down, lose or the frequency deviation of clock signal exceeds certain limit such as clock signal.
Further, in order to satisfy the demand of different accuracy of detection, can select according to required accuracy of detection the bandwidth of described band pass filter, specifically will describe in detail in the back.
As shown in Figure 4, be the flow chart of embodiment of the invention clock signal detection method, may further comprise the steps:
Particularly, can determine according to the forward deviation sensitivity of required accuracy of detection the upper cut-off frequency of described band pass filter; Determine the lower-cut-off frequency of described band pass filter according to the negative sense deviation sensitivity of required accuracy of detection.For example, when the frequency deviation of 100Mhz digital dock require+/-100ppm in the time, cut-off frequency that can band pass filter be set to lower limit 99.99Mhz (corresponding to-100ppm), upper limit 100.01Mhz (corresponding to+100ppm).
Like this, if the frequency of clock signal in the scope of described forward deviation sensitivity and described negative sense deviation sensitivity, then fundamental frequency signal can pass through described band pass filter, otherwise, can not pass through described band pass filter.
In actual applications, different according to desired accuracy of detection, described band pass filter can be selected following any one filter: crystal filter, active analog filter, passive analog filter, digital filter.Such as, in the less demanding situation of accuracy of detection, can select the active analog filter; Under to the larger environment of clock signal frequency deviation permissible range, can select cheaply passive analog filter etc.
Described clocking fault can be that the frequency deviation of described clock signal exceeds requirement, and perhaps described clock signal is lost.
As seen, the clock signal detection method that adopts the embodiment of the invention to provide, on the one hand analogue technique is applied in the detection to clock signal without the advantage of time-delay, greatly reduced clock signal has been carried out the time that the high accuracy detection consumes, even can when exceeding standard appears in tested clock frequency deviation, cut off immediately clock, avoid exporting to rear level system and cause unpredictable fault; On the other hand, eliminated clock detection precision and the coupled relation of consumption of natural resource and detection time, thus can the simplified design difficulty, avoid system designer to face the balance of accuracy of detection and consumption of natural resource and time, in the very high situation of accuracy of detection, can greatly save the digital circuit resource.
As shown in Figure 5, be the another kind of flow chart of embodiment of the invention clock signal detection method, may further comprise the steps:
Step 501 is carried out multiple-frequency modulation to clock signal.
Such as, by multiple-frequency modulation with a digital dock as the reference source, and by other devices this reference source is synthesized the target number clock, the frequency accuracy of target number clock is consistent with the source clock.
Described multiple-frequency modulation can adopt more existing corresponding modulation circuits.
Step 502 is input to the band pass filter corresponding with required accuracy of detection with the clock signal behind the multiple-frequency modulation.
In actual applications, different according to desired accuracy of detection, described band pass filter can be selected following any one filter: crystal filter, active analog filter, passive analog filter, digital filter.Such as, in the less demanding situation of accuracy of detection, can select the active analog filter; Under to the larger environment of clock signal frequency deviation permissible range, can select cheaply passive analog filter etc.
Step 503, the fundamental frequency sinusoidal signal that described band pass filter is exported is converted to the frequency square-wave signal.
Step 504, whether have square-wave signal output, if do not detect square-wave signal output, determine that then described clock signal breaks down if detecting.
Correspondingly, the embodiment of the invention also provides a kind of clock signal detection system, as shown in Figure 6, is a kind of structural representation of this system, comprising:
In embodiments of the present invention, the upper cut-off frequency of described band pass filter is to determine according to the forward deviation sensitivity of required accuracy of detection, and the lower-cut-off frequency of described band pass filter is to determine according to the negative sense deviation sensitivity of required accuracy of detection.
Shaping circuit 602 is used for the fundamental frequency sinusoidal signal of band pass filter 601 outputs is converted to the frequency square-wave signal;
Fig. 7 and Fig. 8 show respectively and utilize embodiment of the invention clock signal detection system to detect clock signal and without the situation of clock signal.
Wherein, band pass filter 601 output sinusoidal signals show that square wave exists, and band pass filter 601 output direct current signals show that square wave does not exist or clock frequency deviation exceeds professional tolerance.
Need to prove that in actual applications, different according to desired accuracy of detection, described band pass filter can be selected crystal filter or active analog filter or passive analog filter or digital filter etc.Such as:
Analog filter is a kind of converting means commonly used in test macro or instrumentation instrument.Therefore, in the less demanding situation of accuracy of detection, can select the active analog filter, the advantage of this class filter is: the signal in the passband does not only have energy loss, but also can amplify, load effect is not obvious, and it is very little to influence each other during multistage linking, utilize the straightforward procedure of cascade to be easy to consist of higher order filter, and the volume of filter little, lightweight, do not need magnetic screen (owing to do not use inductance element); Shortcoming is: free transmission range is subjected to the limit bandwidth of active device (such as integrated operational amplifier), needs DC power supply, and reliability is high not as passive filter, and is inapplicable at high pressure, high frequency, powerful occasion.Under to the larger environment of clock signal frequency deviation permissible range, can select cheaply passive analog filter etc.The advantage of this class filter is: circuit is fairly simple, does not need DC power supply, and reliability is high; Shortcoming is: the signal in the passband has energy loss, and load effect is apparent in view, causes easily electromagnetic induction when using inductance element, and the volume and weight of filter is all larger when inductance L is larger, and is inapplicable at lower frequency region.
Corresponding with analog filter, extensive use digital filter in discrete system.Its effect is to utilize the characteristic of discrete-time system that waveform input signal or frequency are processed processing.In other words, input signal is become certain output signal, thereby reach the purpose that changes signal spectrum.Digital filter generally can be realized with two kinds of methods: a kind of method is to be assembled into a special equipment with digital hardware, and this equipment is called digital signal processor; Another kind method is exactly directly to utilize all-purpose computer, allows all-purpose computer finish needed computing compiled program, namely utilizes computer software to realize.Therefore, in the situation that enough DSP (Digital Signal Processing, Digital Signal Processing) resource is arranged, also can use the combination of A/D converter, digital filter, D/A converter to replace passive filter to carry out the detection of clock signal.
As seen, the clock signal detection system that adopts the embodiment of the invention to provide, on the one hand analogue technique is applied in the detection to clock signal without the advantage of time-delay, greatly reduced clock signal has been carried out the time that the high accuracy detection consumes, even can when exceeding standard appears in tested clock frequency deviation, cut off immediately clock, avoid exporting to rear level system and cause unpredictable fault; On the other hand, eliminated clock detection precision and the coupled relation of consumption of natural resource and detection time, thus can the simplified design difficulty, avoid system designer to face the balance of accuracy of detection and consumption of natural resource and time, in the very high situation of accuracy of detection, can greatly save the digital circuit resource.
As shown in Figure 9, be the another kind of structural representation of embodiment of the invention clock signal detection system.
Be that with difference embodiment illustrated in fig. 6 in this embodiment, described system also comprises:
As shown in figure 10, be a kind of concrete application example of embodiment of the invention clock signal detection system.
In this example, use the 8.192MHz constant-temperature crystal oscillator by DDS (Direct Digital Synthesizer, Direct Digital Synthesizer) 101 is modulated to the 19.44MHz signal, it is 19.44MHz that DDS801 outputs to a centre frequency, bandwidth is the high-precision crystal filter 102 of 0.01MHz, crystal filter 102 output signals are exported to digital circuit 104 through after shaping circuit 103 carries out shaping, are detected and are used by 14 pairs of signals of digital circuit.
More than the embodiment of the invention is described in detail, used embodiment herein the present invention set forth, the explanation of above embodiment just is used for helping to understand method and apparatus of the present invention; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.
Claims (8)
1. a clock signal detection method is characterized in that, comprising:
Clock signal is input to band pass filter, the upper cut-off frequency of described band pass filter is to determine according to the forward deviation sensitivity of required accuracy of detection, and the lower-cut-off frequency of described band pass filter is to determine according to the negative sense deviation sensitivity of required accuracy of detection;
The fundamental frequency sinusoidal signal of described band pass filter output is converted to the frequency square-wave signal;
Whether have square-wave signal output, if do not detect square-wave signal output, determine that then described clock signal breaks down if detecting.
2. method according to claim 1 is characterized in that, described band pass filter is following any one filter:
Crystal filter, active analog filter, passive analog filter and digital filter.
3. method according to claim 1 is characterized in that, described clock signal breaks down and comprises:
The frequency deviation of described clock signal exceeds requirement, and perhaps described clock signal is lost.
4. according to claim 1 to 3 each described methods, it is characterized in that described method also comprises:
Before described clock signal is input to band pass filter, described clock signal is carried out multiple-frequency modulation.
5. a clock signal detection system is characterized in that, comprising:
Band pass filter, be used for input clock signal, the upper cut-off frequency of described band pass filter is to determine according to the forward deviation sensitivity of required accuracy of detection, and the lower-cut-off frequency of described band pass filter is to determine according to the negative sense deviation sensitivity of required accuracy of detection;
Shaping circuit is used for the fundamental frequency sinusoidal signal of described band pass filter output is converted to the frequency square-wave signal;
Whether signal deteching circuit has square-wave signal output for detection of described shaping circuit, and when detecting described shaping circuit and do not have square-wave signal output, determines that described clock signal breaks down.
6. system according to claim 5 is characterized in that, described band pass filter is following any one filter:
Crystal filter, active analog filter, passive analog filter and digital filter.
7. according to claim 5 or 6 described systems, it is characterized in that described clock signal breaks down and comprises:
The frequency deviation of described clock signal exceeds requirement, and perhaps described clock signal is lost.
8. according to claim 5 to 6 each described systems, it is characterized in that described system also comprises:
Modulation circuit is used for input clock signal and clock signal is carried out multiple-frequency modulation, and the clock signal behind the multiple-frequency modulation is exported to band pass filter;
Described band pass filter is used for the clock signal behind the input multiple-frequency modulation, and the bandwidth of described band pass filter is corresponding with the required accuracy of detection of clock signal.
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| US9479270B2 (en) * | 2013-03-13 | 2016-10-25 | Analog Devices, Inc. | Apparatus and methods for loss of signal detection |
| CN103312307B (en) * | 2013-05-13 | 2015-12-02 | 华为技术有限公司 | Clock frequency deviation detection method and device |
| CN109857192B (en) * | 2019-02-27 | 2021-08-31 | 苏州浪潮智能科技有限公司 | Signal processing method, device, system, equipment and readable storage medium |
| CN112698172B (en) * | 2020-11-27 | 2023-03-21 | 北京无线电计量测试研究所 | Device and method for realizing electric aging |
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| CN101447859A (en) * | 2008-12-26 | 2009-06-03 | 华为技术有限公司 | Method and device for detecting frequency deviation of clock |
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