CN102130084B - Semiconductor chip assembly with a post/base heat spreader and a signal post - Google Patents

Semiconductor chip assembly with a post/base heat spreader and a signal post Download PDF

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CN102130084B
CN102130084B CN201010593471XA CN201010593471A CN102130084B CN 102130084 B CN102130084 B CN 102130084B CN 201010593471X A CN201010593471X A CN 201010593471XA CN 201010593471 A CN201010593471 A CN 201010593471A CN 102130084 B CN102130084 B CN 102130084B
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boss
base
signal
thermally conductive
adhesive layer
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CN201010593471XA
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Chinese (zh)
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CN102130084A (en
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林文强
王家忠
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钰桥半导体股份有限公司
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Priority to US12/642795 priority
Priority to US12/642,795 priority patent/US8269336B2/en
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

一半导体芯片组体至少包含一半导体器件、一散热座、一导线及一黏着层。 A semiconductor chip set comprises at least one semiconductor device, a heat sink, a wire and an adhesive layer. 该半导体器件是电性连接于该导线且热连接于该散热座。 The semiconductor device is electrically connected to the conductor and thermally connected to the cooling block. 该散热座至少包含一导热凸柱及一基座。 The heat sink comprises at least one boss and a heat conducting base. 该导热凸柱从该基座向上延伸进入该黏着层的一第一开口,而该基座则从该导热凸柱侧向延伸。 The thermally conductive stud extending upwardly into the first opening of the adhesive layer from the base, and the base from the heat conducting laterally extending bosses. 该导线至少包含一焊垫、一端子及一讯号凸柱。 The wire comprises at least one pad, a signal terminal and a boss. 该讯号凸柱从该端子向上延伸进入该黏着层的一第二开口。 The signal from the terminal studs extending upwardly into a second opening of the adhesive layer.

Description

具有凸柱/基座的散热座及讯号凸柱的半导体芯片组体 Having a stud / group of semiconductor chips of the base body and the heat sink signal stud

技术领域 FIELD

[0001] 本发明涉及一种半导体芯片组体,特别是涉及一种由半导体器件、导线、黏着层及散热座组成的半导体芯片组体及其制造方法。 [0001] The present invention relates to a semiconductor chip group thereof, particularly to a wire, the semiconductor chip and the adhesive layer member group consisting of heat sink and a manufacturing method of a semiconductor device. 相关申请案的相互参照: CROSS REFERENCE TO RELATED APPLICATIONS:

[0002] 本申请案为2009年11月11日提出申请的第12/616,773号美国专利申请案的部分延续案,该案的内容以引用的方式并入本文。 [0002] The present application is filed November 11, 2009 No. 12 / 616,773 part a continuation of US patent application Ser case, the contents of which are incorporated herein by reference. 本申请案也为2009年11月11日提出申请的第12/616,775号美国专利申请案的部分延续案,该案的内容同样以引用的方式并入本文。 This application is also a continuation in part Serial No. 12 / 616,775 US patent application filed November 11, 2009, the contents of which are likewise incorporated herein by reference. 本申请案另主张2009年11月3日提出申请的第61/257,830号美国临时专利申请案的优先权,该案的内容也以引用的方式并入本文。 This application claims priority to US Provisional another patent application No. 61 / 257,830 filed November 3, 2009, contents of which are also incorporated herein by reference.

[0003] 前述2009年11月11日提出申请的第12/616,773号美国专利申请案及前述2009年11月11日提出申请的第12/616,775号美国专利申请案均为2009年9月11日提出申请的第12/557,540号美国专利申请案的部分延续案,且也均为2009年9月11日提出申请的第12/557,541号美国专利申请案的部分延续案。 [0003] No. 12 / 616,773 filed US patent application of the preceding November 11, 2009 and filed preceding November 11, 2009 No. 12 / 616,775 US patent application are September 2009 filed on the 11th No. 12 / 557,540 part a continuation of US patent application cases, and are also part of the continuation of Serial No. 12 / 557,541 US patent application filed September 11, 2009.

[0004] 前述2009年9月11日提出申请的第12/557,540号美国专利申请案及前述2009年9月11日提出申请的第12/557,541号美国专利申请案均为2009年3月18日提出申请的第12/406,510号美国专利申请案的部分延续案。 [0004] No. 12 / 557,540 filed US patent application of the preceding September 11, 2009 and filed preceding September 11, 2009 No. 12 / 557,541 US patent application were 2009 part of US patent application Ser. No. 12 / 406,510, filed March 18 continuation of the case. 该第12/406,510号美国专利申请案主张2008年5月7日提出申请的第61/071,589号美国临时专利申请案、2008年5月7日提出申请的第61/071,588号美国临时专利申请案、2008年4月11日提出申请的第61/071,072号美国临时专利申请案及2008年3月25日提出申请的第61/064,748号美国临时专利申请案的优先权,上述各案的内容均以引用的方式并入本文。 The No. 12 / 406,510 patent application claims priority to US Serial No. 61 / 071,589 US Provisional Patent Application filed May 7, 2008, May 7, 2008, filed 61 / 071,588 No. 61 / 071,072 US provisional Patent application No. US provisional patent application, filed April 11, 2008 and filed March 25, 2008 No. 61 / 064,748 US provisional Patent application filed, the contents of each of the above cases are incorporated by reference herein. 前述2009年9月11日提出申请的第12/557,540号美国专利申请案及前述2009年9月11日提出申请的第12/557,541号美国专利申请案也主张2009年2月9日提出申请的第61/150,980号美国临时专利申请案的优先权,其内容以引用的方式并入本文。 The aforementioned filed September 11, 2009 No. 12 / 557,540 and the aforementioned US patent application Ser. No. 12 / 557,541 US patent application filed September 11, 2009 is also the Claim 9 February priority of US provisional Patent application No. 61 / 150,980 filed on, the contents of which are incorporated herein by reference.

背景技术 Background technique

[0005] 诸如经封装与未经封装的半导体芯片等半导体器件可提供高电压、高频率及高效能的应用;这些应用为执行特定功能,所需消耗的功率甚高,然而功率愈高则半导体器件生热愈多。 [0005] such as packaged and unpackaged semiconductor devices such as semiconductor chips can provide a high voltage, high frequency and high performance applications; these applications to perform specific functions, the power consumption required is very high, but the higher the power semiconductor the more the heat generating device. 此外,在封装密度提高及尺寸缩减后,可供散热的表面积缩小,更导致生热加剧。 Further, after the size reduction and to improve the packing density, reduce the surface area available for heat dissipation, but also lead to increased heat generation.

[0006] 半导体器件在高温操作下易产生效能衰退及使用寿命缩短等问题,甚至可能立即故障。 [0006] Semiconductor device performance decay prone to problems and shortened life at high temperature operation, even immediate failure. 高热不只影响芯片效能,也可能因热膨胀不匹配而对芯片及其周遭器件产生热应力作用。 Heat not only affects the performance chip may also be due to thermal expansion mismatch of the thermal stress on the chip and its surrounding components. 因此,必须使芯片迅速有效散热方能确保其操作的效率与可靠度。 Thus, the chip must be in order to ensure rapid and effective heat dissipation efficiency and reliability of its operation. 一条高导热性路径通常是将热能传导并发散至一表面积较芯片或芯片所在的晶粒座更大的区域。 A high thermal conductivity thermal energy conducting path and is generally divergent to a surface area larger than the die pad region or chip is located.

[0007] 发光二极管(LED)近来已普遍成为白炽光源、荧光光源与卤素光源的替代光源。 [0007] The light emitting diode (LED) has recently become common alternative to incandescent light sources, fluorescent light sources and halogen light sources. LED可为医疗、军事、招牌、讯号、航空、航海、车辆、可携式设备、商用与住家照明等应用领域提供高能源效率及低成本的长时间照明。 LED provides high energy efficiency and low-cost long lighting applications for the medical, military, signs, signals, aviation, marine, vehicles, portable equipment, commercial and home lighting. 例如,LED可为灯具、手电筒、车头灯、探照灯、交通号志灯及显示器等设备提供光源。 For example, LED lamps may be provided for the light, flashlights, headlights, searchlights, and monitors traffic lights and other equipment.

[0008] LED中的高功率芯片在提供高亮度输出的同时也产生大量热能。 [0008] The high-power LED chip also generates a lot of heat at the same time provide a high brightness output. 然而,在高温操作下,LED会发生色偏、亮度降低、使用寿命缩短及立即故障等问题。 However, at high temperature operation, LED color shift will occur, reduction in luminance and life shortening immediately fault and the like. 此外,LED在散热方面有其限制,进而影响其光输出与可靠度。 In addition, LED has its limitations in terms of heat dissipation, thereby affecting the light output and reliability. 因此,LED格外突显市场对于具有良好散热效果的高功率芯片的需求。 Thus, LED highlighting market demand for exceptionally high-power chip having a good heat dissipation effect.

[0009] LED封装体通常包含一LED芯片、一基座、电接点及一热接点。 [0009] LED package typically comprises a LED chip, a base, electrical contacts, and a hot junction. 所述基座是热连接至LED芯片并用以支撑该LED芯片。 The base is thermally connected to the LED chips and for supporting the LED chip. 电接点则电性连接至LED芯片的阳极与阴极。 Electrical contacts is electrically connected to the anode and the cathode of the LED chip. 热接点经由该基座热连接至LED芯片,其下方载具可充分散热以预防LED芯片过热。 The hot junction via the base thermally connected to the LED chip, which is sufficiently below the heat carrier to prevent overheating of the LED chip.

[0010] 业界积极以各种设计及制造技术投入高功率芯片封装体与导热板的研发,以期在此极度成本竞争的环境中满足效能需求。 [0010] active in various industry design and manufacturing technologies into research and development of high-power chip package and heat conducting plate, in order to meet the performance requirements in this extremely cost-competitive environment. [0011] 塑料球栅阵列(PBGA)封装是将一芯片与一层压基板包裹于一塑料外壳中,然后再以锡球黏附于一印刷电路板(PCB)的上。 [0011] plastic ball grid array (PBGA) package is wrapped in a plastic housing with a chip a laminate substrate, and then to a solder ball adhered to the printed circuit board (PCB) of. 所述层压基板包含一通常由玻璃纤维构成的介电层。 The laminated substrate typically comprises a dielectric layer made of glass fibers. 芯片产生的热能可经由塑料及介电层传至锡球,进而传至印刷电路板。 The heat generated by the chip may be transmitted via the solder balls plastic and dielectric layers, and further transmitted to the printed circuit board. 然而,由于塑料与介电层的导热性低,PBGA的散热效果不佳。 However, since the thermal conductivity of the plastic and the dielectric layer is low, poor heat dissipation effect of PBGA.

[0012] 方形扁平无引脚(QFN)封装是将芯片设置在一焊接于印刷电路板的铜质晶粒座上。 [0012] QFN (QFN) chip package is disposed in a copper die pad is soldered to the printed circuit board. 芯片产生的热能可经由晶粒座传至印刷电路板。 The heat generated by the chip can be transmitted to the printed circuit board via the die pad. 然而,由于其导线架中介层的路由能力有限,使得QFN封装无法适用于高输入/输出(I/O)芯片或被动器件。 However, due to the limited routing capability which leadframe interposer so QFN package not suitable for high input / output (I / O) chip or a passive device.

[0013] 导热板为半导体器件提供电性路由、热管理与机械性支撑等功能。 [0013] The thermally conductive plate to provide electrical routing, thermal management and mechanical support functions such as a semiconductor device. 导热板通常包含一用于讯号路由的基板、一提供热去除功能的散热座或散热装置、一可供电性连接至半导体器件的焊垫,以及一可供电性连接至下一层组体的端子。 A thermally conductive plate generally comprises a substrate for signal routing, a heat sink or heat sinks to provide heat removal function, a power supply may be connected to pads of the semiconductor device, and a power supply can be connected to the lower layer of the group member terminal . 该基板可为一具有单层或多层路由电路系统及一或多层介电层的层压结构。 The substrate may have a monolayer or multilayer routing circuitry, and a laminated structure or multilayer dielectric layers. 该散热座可为一金属基座、金属块或埋设金属层。 The heat sink may be a metal base, or a metal block embedded metal layers.

[0014] 导热板接合下一层组体。 The next layer group thereof [0014] joining the heat conducting plate. 例如,下一层组体可为一具有印刷电路板及散热装置的灯座。 For example, one group member may be a printed circuit board and a heat dissipation device socket. 在此范例中,一LED封装体是安设于导热板上,该导热板则安设于散热装置上,导热板/散热装置次组体与印刷电路板又安设于灯座中。 In this example, an LED package is to install a thermally conductive plate, the heat conducting plate is set up on a heat sink, a thermally conductive plate / secondary heat sink body and the printed circuit board set, placed in the socket. 此外,导热板经由导线电性连接至该印刷电路板。 Further, the thermally conductive plate is connected to the printed circuit board via electrical wires. 该基板将电讯号自该印刷电路板导向LED封装体,而该散热座则将LED封装体的热能发散并传递至该散热装置。 The electrical signal from the substrate of the printed circuit board guide of the LED package, which package heat sink will heat divergence and transmitted to the LED heat sink. 因此,该导热板可为LED芯片提供一重要的热路径。 Thus, the heat conducting plate can provide a significant thermal path for the LED chip.

[0015] 授予Juskey等人的第6,507,102号美国专利揭示一种组体,其中一由玻璃纤维与固化的热固性树脂所构成的复合基板包含一中央开口。 [0015] Grant Juskey et al U.S. Patent No. 6,507,102 discloses a group, wherein a composite substrate made of glass fiber and a cured thermosetting resin formed comprises a central opening. 一具有类似前述中央开口正方或长方形状的散热块是黏附于该中央开口侧壁因而与该基板结合。 Similarly the central opening having a square or rectangular heat sink block is adhered to the side wall thus bound a central opening and the substrate. 上、下导电层分别黏附于该基板的顶部及底部,并通过贯穿该基板的电镀导孔互为电性连接。 The upper and lower conductive layers respectively adhered to the top and bottom of the substrate, and electrically connected through the plated vias through the substrate mutually. 一芯片是设置于散热块上并打线接合至上导电层,一封装材料是模设成形于芯片上,而下导电层则设有锡球。 A chip is disposed on the heat sink block and the wire bonding comes first conductive layer, a sealing material is disposed formed on the chip die, the lower conductive layer is provided with a solder ball.

[0016] 制造时,该基板原为一置于下导电层上的乙阶(B-stage)树脂胶片。 [0016] When producing the original substrate is a B-stage is placed on the lower conductive layer (B-stage) resin film. 散热块是插设于中央开口,因而位于下导电层上,并与该基板以一间隙相隔。 The heat slug is inserted in the central opening, so positioned on the lower conductive layer, and with a gap spaced apart from the substrate. 上导电层则设于该基板上。 It is disposed on the conductive layer on the substrate. 上、下导电层经加热及彼此压合后,使树脂熔化并流入前述间隙中固化。 On the lower conductive layer by heating and pressing each other, the molten resin flows into the gap and cured. 上、下导电层形成图案,因而在该基板上形成电路布线,并使树脂溢料显露于散热块上。 On the lower conductive layer pattern is formed, thereby forming a circuit pattern on the substrate, and the resin was exposed to the burr on the heat sink block. 然后去除树脂溢料,使散热块露出。 Then removing the resin flash, so that the heat sink block are exposed. 最后再将芯片安置于散热块上并进行打线接合与封装。 Then the final chip is disposed on the heat sink block and wire bonding and encapsulation.

[0017] 因此,芯片产生的热能可经由散热块传至印刷电路板。 [0017] Accordingly, the heat generated by the chip can be transmitted to the printed circuit board via the heat sink block. 然而在量产时,以手工方式将散热块放置于中央开口内的作业极为费工,且成本高昂。 However, in mass production, the heat sink block manually placed within the central opening of the work is extremely labor intensive, and costly. 再者,由于侧向的安装容差小,散热块不易精确定位于中央开口中,导致基板与散热块间易出现间隙以及打线不均的情形。 Further, since the small lateral mounting tolerances, precise positioning of the heat sink block easy central opening, resulting in prone and heat dissipation block the gap between the substrate and the unevenness in the case of wire bonding. 如此一来,该基板只部分黏附于散热块,无法自散热块获得足够支撑力,且容易脱层。 Thus, only the portion of the substrate to adhere to the heat sink block, a sufficient supporting force can not be obtained since the heat dissipation block, and easily delaminated. 此外,用于去除部分导电层以显露树脂溢料的化学蚀刻液也将去除部分未被树脂溢料覆盖的散热块,使散热块不平且不易结合,最终导致组体的良率降低、可靠度不足且成本过高。 Further, for removing portions of the conductive layer to reveal a chemical etching solution of resin burr will remove heat slug portion is not covered with a resin burr, so that the heat dissipation block binding uneven and difficult, resulting in decreased yield of the group member, the reliability inadequate and high cost.

[0018] 授予Ding等人的第6,528,882号美国专利揭露一种高散热球栅阵列封装体,其基板包含一金属芯层,而芯片则安置于金属芯层顶面的晶粒座区域。 [0018] Grant No. Ding et al U.S. Patent No. 6,528,882 discloses a high heat dissipation ball grid array package, which comprises a metal core substrate, the chip is disposed on a top surface of the metal core die pad region. 一绝缘层是形成于金属芯层的底面。 An insulating layer is formed on the bottom surface of the metal core layer. 盲孔贯穿绝缘层直通金属芯层,且孔内填有散热锡球,另在该基板上设有与散热锡球相对应的锡球。 Blind hole penetrating the insulating layer through metal core layer, and the hole filled with cooling the solder ball, the solder ball and the radiator is provided another corresponding to the solder balls on the substrate. 芯片产生的热能可经由金属芯层流向散热锡球,再流向印刷电路板。 The heat generated by the chip may flow through the metal core layer cooling the solder balls, and then flows to the printed circuit board. 然而,夹设于金属芯层与印刷电路板之间的绝缘层却对流向印刷电路板的热流造成限制。 However, the metal core layer sandwiched between the printed circuit board and the insulating layer but then the heat flow to the printed circuit board pose a limitation.

[0019] 授予Lee等人的第6,670, 219号美国专利公开一种凹槽向下球栅阵列(⑶BGA)封装体,其中一具有中央开口的接地板是设置于一散热座上以构成一散热基板。 [0019] The first issued to Lee et al 6,670, 219 U.S. Patent No. discloses a groove down ball grid array (⑶BGA) package in which a ground plate having a central opening is provided in the base to form a heat a heat-dissipating substrate. 一具有中央开口的基板通过一具有中央开口的黏着层设置于该接地板上。 A base plate having a central opening of the adhesive layer of the ground plate is disposed in the central opening having a via. 一芯片是安装于该散热座上由接地板中央开口所形成的一凹槽内,且该基板上设有锡球。 A chip is mounted on the heat dissipating seat within a recess formed by the central opening of the ground plate, and solder balls provided on the substrate. 然而,由于锡球是位于基板上,散热座并无法接触印刷电路板,导致该散热座的散热作用只限热对流而非热传导,因而大幅限缩其散热效果。 However, since the solder ball is located on the substrate, the heat sink and not in contact with the printed circuit board, resulting in a cooling effect of the cooling block not only convection heat conduction, and thus greatly reduce its cooling effect is limited. [0020] 授予Woodall等人的第7,038,311号美国专利提供一种高散热BGA封装体,其散热装置为倒T形且包含一柱部与一宽基底。 [0020] Grant Woodall et al U.S. Patent No. 7,038,311 to provide a highly heat BGA package, the cooling means comprises an inverted T-shape and a post portion and a wide base. 一设有窗型开口的基板是安置于宽基底上,一黏着层则将柱部与宽基底黏附于该基板。 A substrate provided with a window-shaped opening is disposed on a substrate width, a pillar portion and the adhesive layer will adhere to the wide base substrate. 一芯片是安置于柱部上并打线接合至该基板,一封装材料是模制成形于芯片上,该基板上则设有锡球。 A chip is disposed on the column portion and the wire bonding to the substrate, a sealing material is molded on the chip, the solder ball is provided on the substrate. 柱部延伸穿过该窗型开口,并由宽基底支撑该基板,至于锡球则位于宽基底与基板周缘间。 Post portion extends through the window-type opening, by the width of the base support substrate, as the solder ball is located between the substrate and the width of the peripheral edge of the substrate. 芯片产生的热能可经由柱部传至宽基底,再传至印刷电路板。 The heat generated by the chip is transmitted via the column wide base portion, and then transferred to the printed circuit board. 然而,由于宽基底上必须留有容纳锡球的空间,宽基底只在对应于中央窗口与最内部锡球间的位置突伸于该基板下方。 However, since it is necessary to leave space for accommodating the wide base of the solder balls, wide base only at a position corresponding to the center between the innermost window and the solder ball projecting to the underlying substrate. 如此一来,该基板在制造过程中便不平衡,且容易晃动及弯曲,进而导致芯片的安装、打线接合以及封装材料的模制成形均十分困难。 Thus, the substrate in the manufacturing process will be unbalanced, and shaking and easily bent, leading to the chip mounting, wire bonding and encapsulation material molded are very difficult. 此外,该宽基底可能因封装材料的模制成形而弯折,且一旦锡球崩塌,便可能使该封装体无法焊接至下一层组体。 In addition, due to the wide base may be molded of molding the encapsulating material is bent, and once the solder ball collapse, which can make one group member can not be welded to the lower package. 因此,此封装体的良率偏低、可靠度不足且成本过高。 Therefore, this package is low yield, high cost and lack of reliability.

[0021] Erchak等人的美国专利申请公开案第2007/0267642号提出一种发光装置组体,其中一倒T形的基座包含一基板、一突出部及一具有通孔的绝缘层,绝缘层上并设有电接点。 [0021] Erchak et al., U.S. Patent Application Publication No. 2007/0267642 provides a light emitting device group, wherein an inverted T-shaped base comprises a substrate, a projecting portion and the insulating layer having a through hole, the insulating and a layer of electrical contacts. 一具有通孔与透明上盖的封装体是设置于电接点上。 A package body having a through hole and the transparent cover is disposed on the electrical contact. 一LED芯片是设置于突出部并以打线连接该基板。 LED chips are disposed on a protruding portion and is connected to the wire substrate. 该突出部是邻接该基板并延伸穿过绝缘层与封装体上的通孔,进入封装体内。 The protruding portion is adjacent to the substrate and extending through the through holes in the insulating layer and the package body, entering within the package. 绝缘层是设置于该基板上,且绝缘层上设有电接点。 Insulating layer is disposed on the substrate and provided with electrical contacts on the insulating layer. 封装体是设置于所述电接点上并与绝缘层保持间距。 The package is provided to the electrical contacts on the insulating layer and maintain the spacing. 该芯片产生的热能可经由突出部传至该基板,进而到达一散热装置。 The heat generated by the chip may be transmitted to the substrate via a projection, and further reaches a heat sink. 然而,所述电接点不易设置于绝缘层上,难以与下一层组体电性连接,且无法提供多层路由。 However, the electrical contacts disposed on the insulating layer easily, is difficult to connect the lower layer of electrically group, and can not provide a multilayer routing.

[0022] 现有封装体与导热板具有重大缺点。 [0022] The conventional package and the heat conducting plate has a significant disadvantage. 举例而言,诸如环氧树脂等低导热性的电绝缘材料对散热效果造成限制,然而,以陶瓷或碳化硅填充的环氧树脂等具有较高导热性的电绝缘材料则具有黏着性低且量产成本过高的缺点。 For example, an epoxy resin such as a low thermal conductivity, electrically insulating material pose a limitation on the cooling effect, however, ceramic-filled epoxy or silicon carbide and the like having an electrically insulating material having high thermal conductivity is low and adhesion high production cost disadvantage. 该电绝缘材料可能在制作过程中或在操作初期即因受热而脱层。 The electrically insulating material may or delamination due to the heat that is in the initial operation in the production process. 该基板若为单层电路系统则路由能力有限,但若该基板为多层电路系统,则其过厚的介电层将降低散热效果。 If the substrate is a single layer circuitry limited routing capabilities, but if the substrate is a multilayer circuit system, it is too thick dielectric layer to reduce the cooling effect. 此外,前案技术尚有散热座效能不足、体积过大或不易热连接至下一层组体等问题。 Further, there are prior art case insufficient performance heat sink, too large or difficult problem thermally connected to one group and the like. 前案技术的制造工序也不适于低成本的量产作业。 Prior art manufacturing process of the case is not suitable for low cost mass production operations.

[0023] 有鉴于现有高功率半导体器件封装体及导热板的种种发展情形及相关限制,业界实需一种具成本效益、效能可靠、适于量产、多功能、可灵活调整讯号路由且具有优异散热性的半导体芯片组体。 [0023] In view of the circumstances the development of a variety of conventional high-power semiconductor device package and a heat conducting plate and restrictions, real industry need a cost-effective, reliable performance, suitable for mass production, versatile, and can be flexibly adjusted signal routing having excellent heat radiation property of the semiconductor body chipset.

发明内容 SUMMARY

[0024] 本发明的目的在于提供一种半导体芯片组体。 [0024] The object of the present invention is to provide a semiconductor chip group thereof.

[0025] 本发明的另一目的在于提供一种制作一半导体芯片组体的方法。 [0025] Another object of the present invention is to provide a method of making a semiconductor chip set body.

[0026] 本发明半导体芯片组体,其至少包含一半导体器件、一散热座、一导线与一黏着层。 [0026] The group of semiconductor chips of the present invention, which comprises at least one semiconductor device, a heat sink, a wire and an adhesive layer. 该半导体器件是电性连接至该导线并热连接至该散热座。 The semiconductor device is electrically connected to the conductor and thermally coupled to the cooling block. 该散热座至少包含一导热凸柱与一基座。 The heat sink comprises at least one boss with a thermally conductive base. 该导热凸柱自该基座向上延伸并进入该黏着层的一第一开口,该基座则自该导热凸柱侧向延伸。 The thermally conductive stud extending upwardly from the base and into a first opening of the adhesive layer, the base is from the heat conducting laterally extending bosses. 该导线至少包含一焊垫、一端子与一讯号凸柱。 The wire comprises at least one pad, a signal terminal and a boss. 该讯号凸柱自该端子向上延伸并进入该黏着层的一第二开口。 The signal is a boss extending into the opening of the second adhesive layer up from the terminal. [0027] 根据本发明的一样式,一半导体芯片组体至少包含一半导体器件、一黏着层、一散热座与一导线。 [0027] According to the same formula of the invention, a semiconductor chip set comprises at least a semiconductor device, an adhesive layer, a conductor with a heat sink. 该黏着层至少具有第一开口及第二开口。 The adhesive layer has at least a first opening and the second opening. 该散热座至少包含一导热凸柱及一基座,其中该导热凸柱是邻接该基座并沿一向上方向延伸于该基座上方,该基座则沿一与该向上方向相反的向下方向延伸于该导热凸柱下方,并沿垂直于该向上及向下方向的侧面方向从该导热凸柱侧向延伸而出。 The heat sink comprises at least one boss and a thermally conductive base, wherein the thermally conductive stud is adjacent to the base and extending in an upward direction to the upper base, which is a direction opposite to the upward direction downward extending below the thermally conductive boss, and in the direction perpendicular to the side face upward and downward direction from the boss laterally extending from the thermally conductive. 该导线至少包含一焊垫、一端子与一讯号凸柱,其中该讯号凸柱是延伸于该焊垫下方及该端子上方,且该焊垫与该端子间的一导电路径包含该讯号凸柱。 The wire comprises at least a pad, a terminal and a signal studs, wherein the signal boss is extending and the above and below the pad terminal, and the pad with a conductive path between the terminals including the signal boss .

[0028] 该半导体器件是位于该导热凸柱上方并重叠于该导热凸柱。 [0028] The semiconductor device is located in the thermally conductive protrusion in the column direction and overlapping heat conducting stud. 该半导体器件是电性连接至该焊垫,从而电性连接至该端子;并且热连接至该导热凸柱,从而热连接至该基座。 The semiconductor device is electrically connected to the pad, thereby electrically connected to the terminal; and thermally connected to the thermally conductive boss, thereby thermally connected to the base. 该黏着层是设置于该基座上,延伸于该基座上方,并从该导热凸柱侧向延伸至该端子或越过该端子。 The adhesive layer is disposed on the base, extends to the upper base, and extending laterally from the thermally conductive studs or over the terminal to the terminal. 该焊垫是延伸于该黏着层上方,而该端子则延伸于该黏着层下方。 The pads extending above the adhesive layer, and the terminals are extending beneath the adhesive layer. 该导热凸柱延伸进入该第一开口,该讯号凸柱则延伸进入该第二开口。 The thermally conductive stud extending into the first opening, then the signal boss extends into the second opening. 此外,所述导热凸柱与所述讯号凸柱具有相同厚度且彼此共平面,该基座与该端子也具有相同厚度且彼此共平面。 Further, the heat conducting the signal boss stud having the same thickness to each other and co-planar, the base and the terminal also has the same thickness and coplanar with each other.

[0029] 该导线可包含该焊垫、该端子、该讯号凸柱及一路由线。 [0029] The conductor may comprise the pads, the terminals, the boss and a routing signal lines. 该路由线可邻接该焊垫。 The routing line can be adjacent to the pad. 该讯号凸柱可邻接该路由线与该端子,延伸于该焊垫与该路由线下方,且延伸于该端子上方。 The lug may abut the signal line and the route terminal, the pad extends beneath the routing line, and extending to the upper terminal. 该焊垫与该路由线可重叠于该黏着层。 The pad may overlap with the routing line in the adhesive layer. 该端子可被该黏着层重叠。 The terminals of the adhesive layer can be overlapped. 该讯号凸柱可延伸贯穿该黏着层。 The signal boss may extend through the adhesive layer. 该焊垫、该端子、该讯号凸柱与该路由线可接触该黏着层。 The pads, the terminals, the signal may be in contact with the stud and the adhesive layer routing line. 一位于该焊垫与该端子间的导电路径可包含该讯号凸柱与该路由线。 A conductive pad located on the path between the terminals may comprise the signal routing lines to the boss.

[0030] 根据本发明的另一样式,一半导体芯片组体至少包含一半导体器件、一黏着层、一散热座、一基板与一导线。 [0030] According to another version of the invention, a semiconductor chip set comprises at least a semiconductor device, an adhesive layer, a heat sink, a substrate and a conductor. 该黏着层至少具有第一开口及第二开口。 The adhesive layer has at least a first opening and the second opening. 该散热座至少包含一导热凸柱及一基座,其中该导热凸柱是邻接该基座并沿一向上方向延伸于该基座上方,该基座则沿一与该向上方向相反的向下方向延伸于该导热凸柱下方,并沿垂直于该向上及向下方向的侧面方向从该导热凸柱侧向延伸而出。 The heat sink comprises at least one boss and a thermally conductive base, wherein the thermally conductive stud is adjacent to the base and extending in an upward direction to the upper base, which is a direction opposite to the upward direction downward extending below the thermally conductive boss, and in the direction perpendicular to the side face upward and downward direction from the boss laterally extending from the thermally conductive. 该基板至少包含一焊垫与一介电层,且第一及第二通孔延伸穿过该基板。 The substrate comprises at least a pad and a dielectric layer, and the first and second through-hole extending through the substrate. 该导线至少包含该焊垫、一端子与一讯号凸柱,其中该讯号凸柱是延伸于该焊垫下方及该端子上方,且该焊垫与该端子间的一导电路径包含该讯号凸柱。 The wire comprises at least the bonding pads, a terminal of a signal studs, wherein the signal boss is extending and the above and below the pad terminal, and the pad with a conductive path between the terminals including the signal boss .

[0031] 该半导体器件是位于该导热凸柱上方并重叠于该导热凸柱。 [0031] The semiconductor device is located in the thermally conductive protrusion in the column direction and overlapping heat conducting stud. 该半导体器件是电性连接至该焊垫,从而电性连接至该端子;并且热连接至该导热凸柱,从而热连接至该基座。 The semiconductor device is electrically connected to the pad, thereby electrically connected to the terminal; and thermally connected to the thermally conductive boss, thereby thermally connected to the base. 该黏着层是设置于该基座上,延伸于该基座上方,且延伸进入该第一通孔中一介于该导热凸柱与该基板之间的第一缺口,同时延伸进入该第二通孔中一介于该讯号凸柱与该基板之间的第二缺口,并于所述缺口中延伸跨越该介电层。 The adhesive layer is disposed on the base, which extends above the base and extending into the first gap between the boss and the thermal conductivity of the substrate in a through hole of the first range, and extends into the second through a second notch hole interposed between the boss and the signal substrate, and in said notch extends across the dielectric layer. 该黏着层从该导热凸柱侧向延伸至该端子或越过该端子,且是介于该导热凸柱与该介电层之间、该讯号凸柱与该介电层之间以及该基座与该介电层之间。 The thermally conductive adhesive layer extends from the boss laterally or over the terminal to the terminal, and the thermal conductivity is interposed between the boss and the dielectric layer, the signal between the boss and the dielectric layer and the base and between the dielectric layer. 该基板是设置于该黏着层上,并延伸于该基座上方。 The substrate is disposed on the adhesive layer, and extends to the upper base.

[0032] 该焊垫是延伸于该介电层上方,而该端子则延伸于该黏着层下方。 [0032] The pads extending above the dielectric layer, and the terminals are extending beneath the adhesive layer.

[0033] 该导热凸柱延伸进入该第一开口及该第一通孔,该讯号凸柱则延伸进入该第二开口及该第二通孔。 [0033] The thermally conductive stud extending into the first opening and the first through hole, then the signal boss extending into the second opening and the second through hole. 此外,所述导热凸柱与所述讯号凸柱具有相同厚度且彼此共平面,该基座与该端子也具有相同厚度且彼此共平面。 Further, the heat conducting the signal boss stud having the same thickness to each other and co-planar, the base and the terminal also has the same thickness and coplanar with each other.

[0034] 该散热座可包含一盖体,该盖体是位于该导热凸柱的顶部上方,邻接该导热凸柱的顶部,同时从上方覆盖该导热凸柱的顶部,并沿所述侧面方向从该导热凸柱的顶部侧向延伸而出。 [0034] The heat sink may comprise a cover, the cover is positioned above the top of the thermally conductive stud, adjacent to the top of the thermally conductive boss while covering a top of the heat conducting boss from above, and in the lateral direction from the top side of the stud extending from the thermally conductive. 例如,该盖体可为矩形,更进一步地,可为正方形,而该导热凸柱的顶部可为圆形。 For example, the cover may be rectangular, further, may be square while the top of the thermally conductive stud may be circular. 在此例中,该盖体的尺寸及形状可经过设计,以配合该半导体器件的热接触表面,至于该导热凸柱顶部的尺寸及形状则未依该半导体器件的热接触表面而设计。 In this embodiment, the cover size and shape can be designed to match the thermal contact surface of the semiconductor device, the size and shape of the top of the thermally conductive boss As thermal contact surface of the semiconductor device is designed Failing. 该盖体也可接触并覆盖该黏着层一邻接该导热凸柱并与该导热凸柱共平面的部分。 The cover may also contact and cover the adhesive layer adjacent to a protrusion of the thermally conductive boss and co-planar with the portion of the heat conducting column. 该盖体也可在该介电层上方与该焊垫共平面。 The cover may also be coplanar with the bonding pad over the dielectric layer. 此外,该导热凸柱可热连接该基座与该盖体。 In addition, the thermally conductive stud heat the base and the lid are connected. 该散热座可由该导热凸柱与该基座组成,或由该导热凸柱、该基座与该盖体组成。 The heat sink may be formed of the thermally conductive studs and the base, or of the thermally conductive studs, the base and the lid body composition. 该散热座也可由铜、铝或铜/镍/铝合金组成。 The cooling block can be made of copper, aluminum or copper / nickel / aluminum alloy. 无论采用哪一组成方式,该散热座皆可提供散热作用,将该半导体器件的热能扩散至下一层组体。 Regardless of what the composition embodiment, the heat sink cooling effect provided Jieke, the thermal diffusion to the semiconductor device layer of the group thereof.

[0035] 该半导体器件可设置于该散热座上。 [0035] The semiconductor device may be disposed on the heat dissipating seat. 例如,该半导体器件可设置于该散热座及该基板上,重叠于该导热凸柱与该焊垫,通过一第一焊锡电性连接至该焊垫,并通过一第二焊锡热连接至该散热座。 For example, the semiconductor device may be disposed on the heat sink base and the substrate, the thermally conductive boss in overlapping with the pad, the pad is connected to a first soldering by electrically and is connected to the second solder by a heat heat sink. 或者,该半导体器件可设置于该散热座而非该基板上,重叠于该导热凸柱而非该基板,通过一打线电性连接至该焊垫,并通过一固晶材料热连接至该散热座。 Alternatively, the semiconductor device may be disposed on the seat instead of the heat sink substrate, the thermally conductive boss in overlapping rather than the substrate, is connected to the pads through a wire electrically, and is connected to the hot material through a die attach heat sink.

[0036] 该半导体器件可为一经封装或未经封装的半导体芯片。 [0036] The semiconductor device may be a packaged or non-packaged semiconductor chip. 例如,该半导体器件可为一包含LED芯片的LED封装体,其是设置于该散热座与该基板上,重叠于该导热凸柱与该焊垫,经由一第一焊锡电性连接至该焊垫,且经由一第二焊锡热连接至该散热座。 For example, the semiconductor device may comprise a LED chip LED package, which is disposed on the heat sink and the substrate, the thermally conductive boss in overlapping with the pad, via a solder connection to the first electrical solder pads, and connected to said cooling block via a second solder heat. 或者,该半导体器件可为一半导体芯片,其是设置于该散热座而非该基板上,重叠于该导热凸柱而非该基板,经由一打线电性连接至该焊垫,且经由一固晶材料热连接至该散热座。 Alternatively, the semiconductor device may be a semiconductor chip, which is disposed in the heat sink rather than on the substrate, the thermally conductive boss in overlapping rather than the substrate, is connected to the pad via a wire electrically, and via a solid polycrystalline material is thermally connected to the cooling block.

[0037] 该黏着层可在该第一缺口中接触该导热凸柱及该介电层,并在该第二缺口中接触该讯号凸柱及该介电层,且于所述缺口之外接触该基座、该端子及该介电层。 [0037] The adhesive layer may be in contact with the thermally conductive boss in the dielectric layer and the first notch in the signal and the contact stud and the dielectric layer in the second notch, and in contact with the outside cutout the base, the terminals and the dielectric layer. 该黏着层也可于所述侧面方向覆盖及环绕所述导热凸柱、所述讯号凸柱,且同形被覆于所述导热凸柱、所述讯号凸柱的侧壁。 The adhesive layer may also be in the direction of the side cover and surround the heat conductive studs, the studs signal, and the same shape to cover the heat conducting studs, the side walls of the stud signal. 该黏着层可与所述导热凸柱和所述讯号凸柱的顶部及底部共平面。 The adhesion layer may be co-planar with the top and bottom of the thermally conductive studs and the stud signal.

[0038] 该黏着层可自该导热凸柱侧向延伸至该端子或越过该端子。 [0038] The adhesive layer may be thermally from the boss extends laterally across the terminals or to the terminals. 例如,该黏着层与该端子可延伸至该组体的外围边缘;在此例中,该黏着层是从该导热凸柱侧向延伸至该端子。 For example, the adhesive layer may extend to the peripheral edge of the terminal group thereof; in this case, the adhesive layer is a thermally conductive stud extending from the lateral to the terminals. 或者,该黏着层可延伸至该组体的外围边缘,而该端子则与该组体的外围边缘保持距离;在此情况下,该黏着层是从该导热凸柱侧向延伸且越过该端子。 Alternatively, the adhesive layer may extend to the peripheral edge of the group member, and the terminal is set to distance the body with a peripheral edge; in this case, the adhesive layer extending laterally from the thermally conductive stud and over the terminal .

[0039] 该导热凸柱可与该基座一体成形。 [0039] The thermally conductive boss may be integrally formed with the base. 例如,该导热凸柱与该基座可为单一金属体或于其接口包含单一金属体,其中该单一金属体可为铜。 For example, the thermally conductive stud and the base may be a single metal or a single metal body comprising an interface thereon, wherein the single metal body may be copper. 该导热凸柱也可延伸贯穿该第一通口。 The thermally conductive boss may extend through the first port. 该导热凸柱也可在该介电层上方与该黏着层共平面。 The thermally conductive stud also coplanar in the top of the dielectric layer and the adhesive layer. 该导热凸柱也可为平顶锥柱形,其直径是从该基座处朝其邻接盖体的平坦顶部向上递减。 The thermally conductive stud flat-top cone may be cylindrical with a diameter at the base from the cover down toward its adjacent flat top body upward.

[0040] 该讯号凸柱可与该端子一体成形。 [0040] The signal may be integrally formed with the stud of the terminal. 例如,该讯号凸柱与该端子可为单一金属体或于其接口包含单一金属体,其中该单一金属体可为铜。 For example, the boss with the signal terminal may be a single metal or a single metal body comprising an interface thereon, wherein the single metal body may be copper. 该讯号凸柱也可延伸贯穿该第二通口。 The signal may also extend through the lug of the second port. 该讯号凸柱也可在该介电层上方与该黏着层共平面。 The signal may also be co-planar lug on the dielectric layer over the adhesive layer. 该讯号凸柱也可为平顶锥柱形,其直径是从该端子处朝其邻接路由线的平坦顶部向上递减。 The signal may also be a flat top boss cylindrical cone having a diameter decreasing from the terminal which abuts upwardly toward the top planar routing lines.

[0041] 该基座可从下方覆盖该导热凸柱,同时支撑该基板,并与该组体的外围边缘保持距离。 [0041] The base may cover from below the heat conductive studs, while supporting the substrate, and keep a distance from the peripheral edge of the set body.

[0042] 该基板可与该导热凸柱及该基座保持距离。 [0042] The substrate may keep a distance from the thermally conductive studs and the base. 该基板也可为一层压结构。 The substrate may also be a laminated structure.

[0043] 该导线可与该散热座保持距离。 [0043] The wires may keep a distance from the heat sink. 该焊垫可接触该介电层,该端子可接触该黏着层,而该讯号凸柱则可接触该黏着层与该介电层。 The pad may contact the dielectric layer, the terminal may contact the adhesive layer, and the signal may be in contact with the stud adhesive layer and the dielectric layer. 此外,该端子可邻接该讯号凸柱,延伸于该讯号凸柱下方,并从该讯号凸柱侧向延伸。 Furthermore, the signal terminals may be adjacent to the boss, the boss extending downward signal, and the signal extending from the boss laterally.

[0044] 该焊垫可作为该半导体器件的一电接点,该端子可作为下一层组体的一电接点,且该焊垫与该端子可在该半导体器件与该下一层组体间提供垂直讯号路由。 [0044] The pad may be used as an electrical contact of the semiconductor device, the terminal can be used as an electrical contact layer of the group member, and the pad may be between the terminals of the semiconductor device and the body of the lower layer of the group provide vertical signal routing.

[0045] 该组体可为一第一级或第二级单晶或多晶装置。 [0045] The group member may be a first or second grade single crystal or polycrystalline device. 例如,该组体可为一包含单一芯片或多枚芯片的第一级封装体。 For example, the group member may comprise a single chip or multiple pieces of a first stage of the chip package. 或者,该组体可为一包含单一LED封装体或多个LED封装体的第二级模块,其中各该LED封装体可包含单一LED芯片或多枚LED芯片。 Alternatively, the group member may comprise a single LED package module of the second stage or more LED packages, wherein each of the LED package may comprise a single LED chip or a plurality of LED chips.

[0046] 本发明制作一半导体芯片组体的方法,其包含:提供一导热凸柱、一讯号凸柱及一基座;设置一黏着层于该基座上,此步骤包含将该导热凸柱插入该黏着层的一第一开口,并将该讯号凸柱插入该黏着层的一第二开口;设置一导电层于该黏着层上,此步骤包含将该导热凸柱对准该导电层的一第一通孔,并将该讯号凸柱对准该导电层的一第二通孔;使该黏着层向上流入该第一通孔内一介于该导热凸柱与该导电层之间的第一缺口以及该第二通孔内一介于该讯号凸柱与该导电层之间的第二缺口;固化该黏着层;提供一导线,该导线至少包含一焊垫、一端子、该讯号凸柱与该导电层的一选定部分;设置一半导体器件于一散热座上,其中该散热座至少包含该导热凸柱及该基座;电性连接该半导体器件至该导线;以及热连接该半导体器件至该散热座。 [0046] The method of making a group of semiconductor chips of the present invention, comprising: providing a thermally conductive boss, a boss and a base signal; an adhesive layer provided on the base, this step comprising the thermally conductive stud the adhesive layer is inserted into a first opening, a second opening and inserting the adhesive layer of the signal boss; a conductive layer disposed on the adhesive layer, this step comprising aligning the thermally conductive stud of the conductive layer a first through hole and a second through hole, and the conductive layer is aligned with the stud signal; flows upward so that the first adhesive layer is a through-hole is interposed between the first thermally conductive layer and the conductive stud a second notch and a through hole is interposed between said second notch signal stud to the conductive layer; curing the adhesive layer; providing a conductive wire that comprises at least a pad, a terminal, the signal boss and a selected portion of the conductive layer; a semiconductor device is provided in a heat dissipating base, wherein the heat sink comprises at least the thermally conductive studs and the base; electrically connecting the semiconductor device to the lead; and thermally connected to the semiconductor device to the cooling block.

[0047] 根据本发明的一样式,一种制作一半导体芯片组体的方法包含:(1)提供一导热凸柱、一讯号凸柱、一基座、一黏着层及一导电层,其中(a)该导热凸柱是邻接该基座,沿一向上方向延伸于该基座上方,延伸进入该黏着层的一第一开口,并对准该导电层的一第一通孔,(b)该讯号凸柱是邻接该基座,沿该向上方向延伸于该基座上方,延伸进入该黏着层的一第二开口,并对准该导电层的一第二通孔,(C)该基座是沿一与该向上方向相反的向下方向延伸于所述导热凸柱和所述讯号凸柱下方,并沿垂直于该向上及向下方向的侧面方向自所述导热凸柱和所述讯号凸柱侧向延伸而出,(d)该黏着层是设置于该基座上,延伸于该基座上方,并位于该基座与该导电层之间,且未固化,此外,(e)该导电层是设置于该黏着层上,并延伸于该黏着层上方;(2)使该黏着层 [0047] The method comprises a group of semiconductor chips in accordance with the same body type, method of making the present invention: (1) providing a thermally conductive boss, a boss signal, a base, an adhesive layer and a conductive layer, wherein ( a) the heat conducting boss is adjacent to the base, along a direction extending upward to the upper base, the adhesive layer extends into a first opening, a first through-hole and aligned with the conductive layer, (b) the signal boss is adjacent to the base, extending upwardly in the direction of the upper base, a second opening extending into the adhesive layer, and a second through-hole aligned with the conductive layer, (C) the group extending along a seat post and the signal below the thermally conductive boss projecting downward direction opposite to the upward direction and in the lateral direction up and down in the vertical direction from the boss and the thermally conductive stud extending from a lateral signal, (d) the adhesive layer is disposed on the base, which extends above the base and between the base and the conductive layer, the uncured, furthermore, (e ) of the conductive layer is disposed on the adhesive layer, and extends above the adhesive layer; (2) contacting the adhesive layer 上流入该第一通孔内一介于该导热凸柱与该导电层之间的第一缺口以及该第二通孔内一介于该讯号凸柱与该导电层之间的第二缺口;(3)固化该黏着层;(4)提供一导线,该导线至少包含一焊垫、一端子、该讯号凸柱与该导电层的一选定部分;(5)设置一半导体器件于一至少包含该导热凸柱与该基座的散热座上,其中该半导体器件重叠于该导热凸柱;(6)电性连接该半导体器件至该焊垫,借此电性连接该半导体器件至该端子,其中该焊垫与该端子间的一导电路径包含该讯号凸柱;以及(7)热连接该半导体器件至该导热凸柱,借此热连接该半导体器件至该基座。 The first inflow hole through a gap between the first and the second through-hole between said boss and the thermally conductive layer interposed between a gap between the second signal layer and the conductive studs; (3 ) curing the adhesive layer; (4) providing a wire, the wire comprising at least one pad, a terminal, a signal selected portions of the stud to the conductive layer; (5) is provided a semiconductor device comprising at least one of the thermally conductive heat radiating base boss of the base, wherein the semiconductor device is superposed on the thermal conductive stud; (6) electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal, wherein the pads and a conductive path between the signal terminals including the boss; and (7) thermally connected to the heat conducting semiconductor device to the boss, whereby the semiconductor device is thermally connected to the base.

[0048] 根据本发明的另一样式,一种制作一半导体芯片组体的方法包含:(I)提供一导热凸柱、一讯号凸柱与一基座,其中该导热凸柱是邻接且一体成形于该基座,并沿一向上方向延伸于该基座上方,该讯号凸柱是邻接且一体成形于该基座,并沿该向上方向延伸于该基座上方,且该基座是沿一与该向上方向相反的向下方向延伸于所述导热凸柱和所述讯号凸柱下方,并自所述导热凸柱和所述讯号凸柱沿垂直于该向上及向下方向的侧面方向侧向延伸而出;(2)提供一黏着层,其中第一开口及第二开口延伸贯穿该黏着层;(3)提供一导电层,其中第一及第二通孔延伸贯穿该导电层;(4)设置该黏着层于该基座上,此步骤包含将该导热凸柱插入该第一开口,并将该讯号凸柱插入该第二开口,其中该黏着层是延伸于该基座上方,该导热凸柱延伸进入该第一开口,而 [0048] According to another version of the invention, a method of making a body comprising a semiconductor chip set: (I) providing a thermally conductive boss, a boss and a base signal, wherein the thermally conductive stud integrally contiguous and formed in the base, along a direction extending upward to the upper base, which is adjacent to and signal boss integrally formed on the base, and extends to the upper base in the upward direction, and along the base an opposite downward direction to the upward direction and the columns extending below the boss signal thermally conductive protrusion, and a direction from the side surface of the thermally conductive studs and the stud in a direction perpendicular to the signal of the upward and downward directions extending from laterally; (2) providing an adhesive layer, wherein the first opening and the second opening extending through the adhesive layer; (3) providing a conductive layer, wherein the first and second through hole extending through the conductive layer; (4) the adhesive layer is disposed on the base, this step comprising the thermally conductive stud is inserted into the first opening, the second opening and inserting the studs signal, wherein the adhesive layer extends over the base , the thermally conductive stud extending into the first opening, and 该讯号凸柱则延伸进入该第二开口;(5)设置该导电层于该黏着层上,此步骤包含将该导热凸柱对准该第一通孔,并将该讯号凸柱对准该第二通孔,其中该导电层是延伸于该黏着层上方,该黏着层是介于该基座与该导电层之间且未固化;(6)加热熔化该黏着层;(7)使该基座与该导电层彼此靠合,借此使该导热凸柱在该第一通孔内向上移动,并使该讯号凸柱在该第二通孔内向上移动,同时对该基座与该导电层之间的熔化黏着层施加压力,该压力迫使该熔化黏着层向上流入该第一通孔内一介于该导热凸柱与该导电层之间的第一缺口以及该第二通孔内一介于该讯号凸柱与该导电层之间的第二缺口;(8)加热固化该熔化黏着层,借此将所述导热凸柱、所述讯号凸柱及该基座机械性黏附至该导电层;(9)提供一导线,该导线至少包含一焊垫、一端子、一路由线与该 The signal is then boss extends into the second opening; (5) the conductive layer is disposed on the adhesive layer, this step comprising the thermally conductive stud through hole aligned with the first and align the boss of the signal a second through hole, wherein the conductive layer extends above the adhesive layer, the adhesive layer is interposed between the uncured base and the conductive layer; (6) heating and melting the adhesive layer; (7) the against the base and the conductive layer to each other, whereby the thermally conductive stud is moved in the first through hole and the stud is moved upward signal in the second through-hole, while the base and the melt adhesive layer between the conductive layers applied pressure, which forces the adhesive layer melt flows upwardly through the first hole of a first gap is interposed between the boss and the thermally conductive layer and the second through hole ordinary a second gap between the boss and the signal of the conductive layer; (8) the heat-curing melt adhesive layer, whereby the thermally conductive stud, the stud and the base signal mechanically adhered to the conductive layer; (9) providing a wire, the wire comprising at least one pad, a terminal, a routing lines and the 讯号凸柱,其中该导线包含该导电层的一选定部分,且一位于该焊垫与该端子间的导电路径包含该路由线与该讯号凸柱;(10)设置一半导体器件于一散热座上,该散热座至少包含该导热凸柱与该基座,其中该半导体器件重叠于该导热凸柱;(11)电性连接该半导体器件至该焊垫,借此电性连接该半导体器件至该端子;以及(12)热连接该半导体器件至该导热凸柱,借此热连接该半导体器件至该基座。 Signal studs, wherein the lead comprises a conductive layer of the selected portion, and a path between the conductive pads and the terminals of the route including the signal line and the studs; (10) provided with a semiconductor device to a heat sink seat, which comprises at least the thermally conductive heat sink studs with the base, wherein the semiconductor device is superposed on the thermal conductive stud; (11) electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and (12) of the semiconductor device thermally connected to the thermally conductive boss, whereby the semiconductor device is thermally connected to the base.

[0049] 设置该导电层可包含:将该导电层单独设置于该黏着层上,或者,先将该导电层黏附于一载体,再将该导电层与该载体一同设置于该黏着层上,以使该载体重叠于该导电层,而该导电层则接触该黏着层且介于该黏着层与该载体间,接着在该黏着层固化后,先去除该载体,再提供该导线。 [0049] The conductive layer may be provided comprising: the conductive layer is disposed on the adhesive layer separately, or the first conductive layer is adhered to a carrier, and then the conductive layer is disposed on the adhesive layer together with the support, so that the conductive layer superposed on the support, the conductive layer and the adhesive layer is in contact with and interposed between the adhesive layer and the support, followed by the curing of the adhesive layer, removing the first carrier, and then provides the lead.

[0050] 根据本发明的另一样式,一种制作一半导体芯片组体的方法包含:(I)提供一导热凸柱、一讯号凸柱、一基座、一黏着层及一基板,其中(a)该基板至少包含一导电层与一介电层,(b)该导热凸柱是邻接该基座,沿一向上方向延伸于该基座上方,延伸穿过该黏着层的一第一开口,并延伸进入该基板的一第一通孔,(C)该讯号凸柱是邻接该基座,沿该向上方向延伸于该基座上方,延伸穿过该黏着层的一第二开口,并延伸进入该基板的一第二通孔,(d)该基座是沿一与该向上方向相反的向下方向延伸于所述导热凸柱和所述讯号凸柱下方,并沿垂直于该向上及向下方向的侧面方向自所述导热凸柱和所述讯号凸柱侧向延伸而出,(e)该黏着层是设置于该基座上,延伸于该基座上方,并位于该基座与该基板之间,且未固化,(f)该基板是设置于该黏着层上,延 [0050] According to another version of the invention, a method of making a body comprising a semiconductor chip set: (I) providing a thermally conductive boss, a boss signal, a base, an adhesive layer and a substrate, wherein ( a) the substrate comprises at least one conductive layer and a dielectric layer, (b) the thermally conductive boss is adjacent to the base, along a direction extending upward to the upper base, a first opening extending through the adhesive layer and a first through hole extending into the substrate, (C) the signal is a boss adjacent to the base, extending upwardly in the direction of the upper base, a second opening extending through the adhesive layer, and a second through hole extending into the substrate, (d) extending below the base of the column and the thermally conductive boss signal ledge opposite a downward direction to the upward direction, and the direction perpendicular to the direction lateral direction and downward direction from the thermally conductive studs and the studs extending laterally out signal, (e) the adhesive layer is disposed on the base, extends to the upper base, and the base is located between the substrate and the seat, uncured, (f) the substrate is disposed on the adhesive layer, casting 伸于该黏着层上方,且该导电层是延伸于该介电层上方,(g) 一第一缺口是位于该第一通孔内,且介于该导热凸柱与该基板之间,此外,(h) —第二缺口是位于该第二通孔内,且介于该讯号凸柱与该基板之间;(2)使该黏着层向上流入所述缺口;(3)固化该黏着层;(4)设置一半导体器件于一至少包含该导热凸柱与该基座的散热座上,其中该半导体器件重叠于该导热凸柱,一导线至少包含一焊垫、一端子、该讯号凸柱及该导电层的一选定部分,且该焊垫与该端子间的一导电路径包含该讯号凸柱;(5)电性连接该半导体器件至该焊垫,借此电性连接该半导体器件至该端子;以及(6)热连接该半导体器件至该导热凸柱,借此热连接该半导体器件至该基座。 Extending above the adhesive layer, and the conductive layer extends above the dielectric layer, (g) a first notch of the first through hole is located, and between the boss and the thermally conductive substrate, in addition , (h) - the second notch is located in the second through-hole, and between the boss and the signal substrate; (2) contacting the adhesive layer flow upward into said gap; and (3) curing the adhesive layer ; (4) is provided a semiconductor device comprising at least one of the thermally conductive heat radiating base studs of the base, wherein the semiconductor device is superposed on the thermally conductive stud, comprising at least one of a wire bonding pad, a terminal, and the signal projection a selected portion of the post and the conductive layer, and the pad with a conductive path between the signal terminals including the boss; (5) electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor to the terminal device; and (6) thermally connected to the semiconductor device to the heat conducting boss, whereby the semiconductor device is thermally connected to the base.

[0051] 根据本发明的又一样式,一种制作一半导体芯片组体的方法包含:(I)提供一导热凸柱、一讯号凸柱与一基座,其中该导热凸柱是邻接且一体成形于该基座,并沿一向上方向延伸于该基座上方,该讯号凸柱是邻接且一体成形于该基座,并沿该向上方向延伸于该基座上方,该基座是沿一与该向上方向相反的向下方向延伸于所述导热凸柱和所述讯号凸柱下方,并自所述导热凸柱和所述讯号凸柱沿垂直于该向上及向下方向的侧面方向侧向延伸而出;(2)提供一黏着层,其中第一开口及第二开口延伸贯穿该黏着层;(3)提供一至少包含一导电层与一介电层的基板,其中第一及第二通孔延伸贯穿该基板;(4)设置该黏着层于该基座上,此步骤包含将该导热凸柱穿过该第一开口,并将该讯号凸柱穿过该第二开口,其中该黏着层是延伸于该基座上方,该导热凸柱 [0051] According to still another embodiment of the present invention, a method of making a body comprising a semiconductor chip set: (I) providing a thermally conductive boss, a boss and a base signal, wherein the thermally conductive stud integrally contiguous and formed in the base, along a direction extending upward to the upper base, which is adjacent to and signal boss integrally formed on the base, and extends to the upper base in the upward direction along the base is a opposite to the downward direction, upward direction and the columns extending below the boss signal thermally conductive protrusion, and a direction from the side surface of the thermally conductive studs and the stud in a direction perpendicular to the signal of the upward and downward direction side (2) providing an adhesive layer, wherein the first opening and the second opening extending through the adhesive layer;; extends out (3) providing a substrate comprising at least a conductive layer and a dielectric layer, wherein the first and second two through holes extending through the substrate; (4) the adhesive layer is disposed on the base, this step comprising the thermally conductive stud through the first opening and the second opening through the boss of the signal, wherein the adhesive layer extends over the base, the thermally conductive boss 伸贯穿该第一开口,该讯号凸柱则延伸贯穿该第二开口;(5)设置该基板于该黏着层上,此步骤包含将该导热凸柱插入该第一通孔,并将该讯号凸柱插入该第二通孔,其中该基板延伸于该黏着层上方,该导电层延伸于该介电层上方,该导热凸柱延伸贯穿该第一开口并进入该第一通孔,该讯号凸柱延伸贯穿该第二开口并进入该第二通孔,该黏着层是介于该基座与该基板之间且未固化,一第一缺口是位于该第一通孔内且介于该导热凸柱与该基板之间,此外,一第二缺口是位于该第二通孔内且介于该讯号凸柱与该基板之间;(6)加热熔化该黏着层;(7)使该基座与该基板彼此靠合,借此使该导热凸柱在该第一通孔内向上移动,并使该讯号凸柱在该第二通孔内向上移动,同时对该基座与该基板之间的熔化黏着层施加压力,其中该压力迫使该熔化黏着层向上流 Extending through the first opening, the signal extending through the boss and the second opening; (5) disposed on the substrate on the adhesive layer, this step comprising the thermally conductive stud is inserted into the first through hole, and the signal studs inserted into the second through hole, wherein the substrate extends over the adhesive layer, the conductive layer extending over the dielectric layer to that, the thermally conductive stud extending through the first opening and into the first through hole, the signal a second stud extending through the opening and into the second through-hole, the adhesive layer is interposed between the base substrate and the uncured, a first notch is located between the first through-hole and between the heat conductive studs and the substrate, in addition, a second notch located in the second through-hole and between the boss and the substrate signal; (6) heating and melting the adhesive layer; (7) the against the base and the substrate to each other, whereby the thermally conductive stud is moved in the first through hole and the stud is moved upward signal in the second through-hole, while the base and the substrate melt adhesive layer between the application of pressure, wherein the pressure force of the adhesive layer melt flows upwardly 所述缺口,且所述导热凸柱、所述讯号凸柱与该熔化黏着层是延伸于该介电层上方;(8)加热固化该熔化黏着层,借此将所述导热凸柱、所述讯号凸柱及该基座机械性黏附至该基板;(9)设置一半导体器件于一散热座上,该散热座至少包含该导热凸柱与该基座,其中该半导体器件重叠于该凸柱,一导线至少包含一焊垫、一端子、该讯号凸柱及该导电层的一选定部分,且该焊垫与该端子间的一导电路径包含该讯号凸柱;(10)电性连接该半导体器件至该焊垫,借此电性连接该半导体器件至该端子;以及(11)热连接该半导体器件至该导热凸柱,借此热连接该半导体器件至该基座。 The gap, and the heat conducting boss, the boss and the signal melt adhesive layer extends over the dielectric layer; (8) the heat-curing melt adhesive layer, whereby the thermally conductive studs, the said studs and said base signal mechanically adhered to the substrate; (9) is provided a semiconductor device to a heat dissipating seat, which comprises at least the thermally conductive heat sink studs with the base, wherein the semiconductor device coincide with the projections column, comprising at least one of a wire bonding pad, a selected portion of a terminal stud and the signal of the conductive layer, and the pad with a conductive path between the signal terminals including the studs; (10) electrically the semiconductor device is connected to the pad, thereby electrically connecting the semiconductor device to the terminal; and (11) thermally connected to the heat conducting semiconductor device to the stud, whereby the semiconductor device is thermally connected to the base.

[0052] 提供该导热凸柱、该讯号凸柱与该基座可包含:提供一金属板;于该金属板上形成一图案化的蚀刻阻层,其选择性曝露该金属板;蚀刻该金属板,使其形成该图案化的蚀刻阻层所定义的图案,借此于该金属板上形成一凹槽,其延伸进入但未贯穿该金属板;而后去除该图案化的蚀刻阻层,其中该导热凸柱包含该金属板的一第一未受蚀刻部分,该第一未受蚀刻部分是突出于该基座上方,且被该凹槽侧向环绕,该讯号凸柱则包含该金属板的一第二未受蚀刻部分,该第二未受蚀刻部分是突出于该基座上方,且被该凹槽侧向环绕,该基座也为该金属板的一未受蚀刻部分,此未受蚀刻部分是位于所述导热凸柱、所述讯号凸柱与该凹槽下方。 [0052] Providing the thermally conductive studs, the stud and the base signal may comprise: providing a metal plate; forming a patterned etch resist layer on the metal plate, the metal plate is selectively exposed; etching the metal so that it fits the pattern of the patterned etch resist layer is formed as defined, thereby forming a recess in the metal plate, which extend into but not through the metal plate; then removing the patterned etch barrier layer, wherein the boss comprises a first thermally unprotected etched portion of the metal plate, etching the unprotected first projecting portion is at the upper base, and laterally surrounds the recess, which signal contains the metal stud plate a second etching of the unprotected portion of the second part were not etch the projecting above the base, and is surrounded by the groove side, but also the base for an unprotected portion of the metal plate is etched, this is not etched portion is positioned by the heat conducting boss, the boss downward signal with the recess.

[0053] 提供该黏着层可包含:提供一未固化环氧树脂的胶片。 [0053] Providing the adhesive layer may comprise: providing a film of uncured epoxy resin. 使该黏着层流动可包含:熔化该未固化环氧树脂;并挤压该基座与该基板之间的该未固化环氧树脂。 The adhesive layer may flow comprising: melting the uncured epoxy; and pressed between the base and the substrate, the uncured epoxy resin. 固化该黏着层可包含:固化该熔化的未固化环氧树脂。 Curing the adhesive layer may comprise: melted curing the uncured epoxy resin. [0054] 提供该散热座可包含:在固化该黏着层之后与设置该半导体器件之前,在该导热凸柱上提供一盖体,该盖体位于该导热凸柱的一顶部上方,邻接该导热凸柱的顶部,同时从上方覆盖该导热凸柱的顶部,且自该导热凸柱的顶部沿所述侧面方向侧向延伸而出。 [0054] providing the heat sink may comprise: before setting this semiconductor device, there is provided a lid in the thermally projection column after curing the adhesive layer, the body is located above a top of the lid thermally conductive stud, adjacent to the thermally conductive the top of the stud, while the heat-conducting top cover from above the boss, and laterally extends out from the top of the thermally conductive boss along the lateral direction.

[0055] 提供该焊垫可包含:在固化该黏着层之后,去除该导电层的选定部分。 [0055] The pad may be provided comprising: after curing the adhesive layer, removing selected portions of the conductive layer.

[0056] 提供该焊垫也可包含:在固化该黏着层之后,研磨所述导热凸柱、所述讯号凸柱、该黏着层及该导电层,以使所述导热凸柱、所述讯号凸柱、该黏着层及该导电层在一面向该向上方向的上侧表面是彼此侧向齐平;而后去除该导电层的选定部分,以使该焊垫包含该导电层的选定部分。 [0056] The pad may also be provided comprising: after curing the adhesive layer, grinding the thermally conductive studs, the studs signal, the adhesive layer and the conductive layer, so that the thermally conductive studs, the signal studs, the adhesive layer and the conductive layer on one surface on the side surface side to the upward direction is flush with each other; and then removing selected portions of the conductive layer, so that the pad comprises a selected portion of the conductive layer . 所述研磨可包含:研磨该黏着层而不研磨所述导热凸柱和所述讯号凸柱;而后研磨所述导热凸柱、所述讯号凸柱、该黏着层及该导电层。 The abrasive may include: grinding the thermally conductive adhesive layer without grinding the studs and the stud signal; then grinding the heat conductive studs, the studs signal, the adhesive layer and the conductive layer. 所述去除可包含:利用一可定义该焊垫的图案化蚀刻阻层对该导电层进行湿式化学蚀刻。 The removing may comprise: using a patterned etching define the pad wet chemical etch barrier layer to the conductive layer.

[0057] 提供该焊垫也可包含:在研磨完成后,于所述导热凸柱、所述讯号凸柱、该黏着层与该导电层上沉积导电金属以形成一第二导电层;然后去除这些导电层的选定部分,以使该焊垫包含这些导电层的选定部分。 [0057] The pad may also be provided comprising: After milling is completed, to the thermally conductive studs, the studs signal, the adhesive layer with a conductive metal is deposited on the conductive layer to form a second conductive layer; then removed these selected portions of the conductive layer, so that the pad comprises selected portions of the conductive layers. 沉积导电金属以形成该第二导电层可包含:将一第一被覆层以无电镀被覆的方式设于所述导热凸柱、所述讯号凸柱、该黏着层与该导电层上;而后将一第二被覆层以电镀方式设于该第一被覆层上。 Depositing a conductive metal to form the second conductive layer may comprise: a first coating layer to the plating coating provided on the heat conducting manner studs, said studs signal, the adhesive layer and the upper conductive layer; and after a second coating layer disposed to electroplating on the first cladding layer. 所述去除可包含:利用可定义该焊垫的图案化蚀刻阻层对这些导电层进行湿式化学蚀刻。 The removing may comprise: These conductive layers may be defined using a wet chemical etch resist layer patterned etching of the pad.

[0058] 提供该端子可包含:在固化该黏着层之后,去除该基座的选定部分。 [0058] The terminals may be provided comprising: after curing the adhesive layer, removing selected portions of the base. 所述去除可包含:利用可定义该端子的图案化蚀刻阻层对该基座进行湿式化学蚀刻,以使该端子包含该基座的一未受蚀刻部分,此未受蚀刻部分邻接该讯号凸柱,且与该基座分尚,彼此隔开,所以已非该基座的一部分。 The removal may include: etching using the patterned resist layer may define the base terminal of the wet chemical etching, so that the terminal comprises etching a portion of the unprotected base, adjacent to the projection of this signal were not etched portion column, and the sub-base is still spaced from each other, have a portion of the non-base. 如此一来,该焊垫与该端子便可于同一湿式化学蚀刻步骤中利用不同的图案化蚀刻阻层同时形成。 In this way, the pad can be formed simultaneously using different patterned etch resist layer in the same wet-chemical etching step with the terminal.

[0059] 提供该盖体可包含:去除该第二导电层的选定部分。 [0059] The cover may be provided comprising: removing selected portions of the second conductive layer. 提供该盖体也可包含:先完成前述研磨,然后利用可定义该盖体的图案化蚀刻阻层去除该第二导电层的选定部分,以使该盖体包含该第二导电层的选定部分。 The cover may also be provided comprising: a first complete the polishing, and etched by using the patterned resist layer may define the lid member is removed selected portions of the second conductive layer, so that the cover including the second conductive layer is selected from fixed part. 如此一来,该焊垫与该盖体便可通过同一研磨工序,并于同一湿式化学蚀刻步骤中利用同一图案化蚀刻阻层同时形成。 Thus, the pads and the cover can be through the same grinding step, and simultaneously formed with the same patterned etching resist layer in the same wet-chemical etching step.

[0060] 使该黏着层流动可包含:以该黏着层填满所述缺口。 [0060] The adhesive layer may comprise flow: In the adhesive layer fills the gap. 使该黏着层流动也可包含:挤压该黏着层,使其通过所述缺口,到达所述导热凸柱、所述讯号凸柱与该基板上方,并及于所述导热凸柱和所述讯号凸柱顶面与该基板顶面邻接所述缺口的部分。 The adhesive layer may also comprise flow: the adhesive layer is extruded, passed through the gap, reaches the heat conducting studs, said studs signal with the upper substrate, and the thermal conductivity and to said boss and convex surface adjacent to the top of the column signal to the notch portion of the substrate top surface.

[0061] 固化该黏着层可包含:将所述导热凸柱、所述讯号凸柱与该基座机械性结合于该基板。 [0061] The curing of the adhesive layer may comprise: the thermally conductive stud, the stud signal bound to the substrate and the base mechanically.

[0062] 设置该半导体器件可包含:将该半导体器件设置于该盖体上。 [0062] The semiconductor device can be provided comprising: the semiconductor device disposed on the cover. 设置该半导体器件也可包含:将该半导体器件设置于该导热凸柱、该盖体、该第一开口与该第一通孔上方,并使该半导体器件重叠于该导热凸柱、该盖体、该第一开口与该第一通孔,但不重叠于该讯号凸柱、该第二开口与该第二通孔。 The semiconductor device may also be provided comprising: the semiconductor device is disposed on the heat conductive studs, the cover, the first opening and the upper first through hole, and the semiconductor device superposed on the heat conductive studs, the cover the first opening and the first through-hole, but does not overlap the signal protruding post, the second opening and the second through hole.

[0063] 设置该半导体器件可包含:提供一第一焊锡与一第二焊锡,其中该第一焊锡位于一包含LED芯片的LED封装体与该焊垫之间,该第二焊锡则位于该LED封装体与该盖体之间。 [0063] The semiconductor device can be provided comprising: providing a first solder with a second solder, wherein the first solder is located between the LED chip comprising a LED package body and the pad, the solder is located at the second LED the package with the cover between. 电性连接该半导体器件可包含:在该LED封装体与该焊垫之间提供该第一焊锡。 Electrically connecting the semiconductor device may comprise: providing a first solder between the LED package body and the pad. 热连接该半导体器件可包含:在该LED封装体与该盖体之间提供该第二焊锡。 Thermally connecting the semiconductor device may comprise: providing a second solder between the LED package body and the lid.

[0064] 设置该半导体器件可包含:在一半导体芯片与该盖体之间提供一固晶材料。 [0064] The semiconductor device can be provided comprising: providing a solid crystalline material between a semiconductor chip and the cover. 电性连接该半导体器件可包含:在该芯片与该焊垫之间提供一打线。 Electrically connecting the semiconductor device may comprise: providing a wire bonding between the chip and the pads. 热连接该半导体器件可包含:在该芯片与该盖体之间提供该固晶材料。 Thermally connecting the semiconductor device may comprise: providing the solid crystal material between the chip and the cover.

[0065] 该黏着层可接触所述导热凸柱、所述讯号凸柱、该基座、该盖体与该介电层,从下方覆盖该基板,于所述侧面方向覆盖并环绕所述导热凸柱、所述讯号凸柱,并延伸至该组体制造完成后与同批生产的其他组体分离所形成的外围边缘。 [0065] The adhesive layer may be in contact with the thermally conductive studs, the studs signal, the base, the lid body and the dielectric layer covering the substrate from below, to cover the side surface direction and surrounding the thermally conductive boss, said boss signal, and extending to the peripheral edges of the group after the manufacture thereof and the other group with separation of the formed batch.

[0066] 当该组体制造完成且与同批生产的其他组体分离后,该基座可从下方覆盖该半导体器件、该导热凸柱与该盖体,同时支撑该基板,并与该组体的外围边缘保持距离。 [0066] After completion of the set body and separated from the same manufacturing batch production of other groups body, the base may cover from below the semiconductor device, the thermally conductive boss and the cover, while supporting the substrate, and the group distance from the peripheral edge retention member.

[0067] 本发明的有益效果在于:本发明具有多项优点。 Advantageous Effects [0067] the present invention: the present invention has a number of advantages. 该散热座可提供优异的散热效果,并使热能不流经该黏着层。 The heat sink may provide an excellent heat dissipation effect, and the heat does not flow through the adhesive layer. 因此,该黏着层可为低导热性的低成本电介质且不易脱层。 Thus, the adhesive layer may be difficult to delamination of medium and low thermal conductivity, low-cost electricity. 该导热凸柱与该基座可一体成形以提高可靠度。 The thermally conductive boss may be integrally formed with the base in order to improve the reliability. 该盖体可为该半导体器件量身订做以提升热连接的效果。 The cover can be tailored to enhance the effect of the semiconductor device for thermally connected. 该黏着层可介于所述导热凸柱、所述讯号凸柱与该基板之间以及该基座与该基板之间,借以在该散热座与该基板之间提供坚固的机械性连接。 The thermally conductive adhesive layer may be interposed between the studs, and between the base and the substrate between the signal boss and the substrate, thereby providing a strong mechanical connection between the heat sink and the substrate. 该导线可形成简单的电路图案以提供讯号路由,或形成复杂的电路图案以实现具弹性的多层讯号路由。 The wires may be formed to provide a simple signal routing circuit pattern, a circuit pattern or form complex to implement, flexible, multilayer signal routing. 该导线也可在该介电层上方的该焊垫与该黏着层下方的该端子间提供垂直讯号路由。 The wire may be welded to the pad over the dielectric layer provides routing and vertical signal between the terminals below the adhesive layer. 该基座可为该基板提供机械性支撑,防止其弯曲变形。 The base provides mechanical support for the substrate, to prevent bending deformation. 该组体可利用低温工序制造,不只降低应力,也提高可靠度。 The group member may be manufactured using a low temperature process, not only reduce the stress, but also improve the reliability. 该组体也可利用电路板、导线架与卷带式基板制造厂可轻易实施的高控制工序加以制造。 The body may also be set using the board, it is manufactured with high volume control step with the lead frame type substrate can be easily implemented in the factory.

[0068] 本发明的上述及其他特征与优点将于下文中通过各种实施例进一步加以说明。 [0068] The above and other features and advantages of the invention will be further described hereinafter by various embodiments.

附图说明 BRIEF DESCRIPTION

[0069] 图I至图4为剖面图,说明本发明一实施例中用以制作一凸柱及一基座的方法; [0069] Figure I is a sectional view to FIG. 4, a method for making a boss and a base in an embodiment according to the present invention;

[0070] 图5及图6分别为图4的俯视图及仰视图; [0070] FIGS. 5 and 6 are a top view and a bottom view of Figure 4;

[0071] 图7及图8为剖面图,说明本发明一实施例中用以制作一黏着层的方法; [0071] FIG 7 and FIG 8 is a cross-sectional view illustrating a method for making an adhesive layer according to the present invention, in one embodiment;

[0072] 图9及图10分别为图8的俯视图及仰视图; [0072] Figures 9 and 10 are a plan view and a bottom view of FIG 8;

[0073] 图11及图12为剖面图,说明本发明一实施例中用以制作一基板的方法; [0073] FIG. 11 and FIG. 12 is a cross-sectional view illustrating a method for making a substrate according to the embodiment of the invention;

[0074] 图13及图14分别为图12的俯视图及仰视图; [0074] FIGS. 13 and 14 are top plan view and a bottom view of FIG 12;

[0075] 图15至图26为剖面图,说明本发明一实施例中用以制作一导热板的方法,该导热 [0075] FIGS. 15 to 26 is a cross sectional view illustrating an embodiment of a method for making a heat conducting plate embodiment of the present invention, the thermally conductive

板在其黏着层上设有一基板; Plate which is provided with an adhesive layer on the substrate;

[0076] 图27及图28分别为图26的俯视图及仰视图; [0076] FIGS. 27 and 28 are a top view and a bottom view of Figure 26;

[0077] 图29、30及图31分别为本发明一实施例中一导热板的剖面图、俯视图及仰视图, [0077] Figures 29, 30 and 31 respectively present a cross-sectional view of the embodiment of the invention a thermally conductive plate, a top view and a bottom view,

该导热板在其黏着层上设有一导线; The heat conducting plate which is provided with an adhesive layer on the wire;

[0078] 图32、33及图34分别为本发明一实施例中一半导体芯片组体的剖面图、俯视图及仰视图,该半导体芯片组体包含一导热板及一具有背面接点的LED封装体; [0078] FIGS. 32, 33 and 34 are respectively a cross-sectional view of a semiconductor body of a chipset embodiment, a top view and a bottom view of the present invention, the semiconductor chip set comprises a heat conducting plate and the LED package having a backside contact ;

[0079] 图35、36及图37分别为本发明一实施例中一半导体芯片组体的剖面图、俯视图及仰视图,该半导体芯片组体包含一导热板及一具有侧引脚的LED封装体; [0079] FIGS. 35 and 36 and a cross-sectional view of a semiconductor body of a chipset embodiment, a top view and a bottom view, respectively, of the present invention 37, the semiconductor chip set comprises a heat conducting plate and a LED package having a side pin body;

[0080] 图38、39及图40分别为本发明一实施例中一半导体芯片组体的剖面图、俯视图及仰视图,该半导体芯片组体包含一导热板及一半导体芯片。 [0080] FIGS. 38, 39 and 40 respectively present a cross-sectional view of a semiconductor chip in a set of Example embodiment of the invention, a top view and a bottom view of a semiconductor chip set comprises a heat conducting plate and a semiconductor chip.

具体实施方式[0081] 下面结合附图及实施例对本发明进行详细说明。 DETAILED DESCRIPTION [0081] The following embodiments in conjunction with the accompanying drawings and embodiments of the present invention will be described in detail.

[0082] 图I至图4为剖面图,绘示本发明的一实施例中一种制作一导热凸柱22、一讯号凸柱24与一基座26的方法,图5及图6分别为图4的俯视图及仰视图。 [0082] Figure I is a sectional view to FIG. 4, illustrates an embodiment of the present invention, a technique for making a thermally conductive boss 22, a method of signal boss 24 with a base 26 of FIG. 5 and FIG. 6 respectively a bottom plan view and FIG. 4 FIG.

[0083] 图I为金属板10的剖面图,金属板10包含相背的主要表面12及14。 [0083] Figure I is a cross-sectional view of the metal plate 10, 10 comprises a metal plate 12 and the opposite major surface 14. 图示的金属板10是一厚度为330微米的铜板。 10 is shown a metal plate having a thickness of 330 microns of copper. 铜具有导热性高、结合性良好与低成本等优点。 Copper has the advantage of high thermal conductivity, low cost and good binding. 金属板10可由多种金属制成,如铜、铝、铁镍合金、铁、镍、银、金、其混合物及其合金。 The metal plate 10 may be made of various metals, such as copper, aluminum, iron-nickel alloy, iron, nickel, silver, gold, alloys and mixtures thereof.

[0084] 图2为一剖面图,显示金属板10上形成有一图案化的蚀刻阻层16与一全面覆盖的蚀刻阻层18。 [0084] FIG. 2 is a sectional view showing a patterned etch resist layer 16 and the etching resist layer 18 is formed on a full coverage of the metal plate 10. 图中所示的图案化的蚀刻阻层16与全面覆盖的蚀刻阻层18是沉积于金属板10上的光阻层,其制作方式是利用压模技术以热滚轮同时将光阻层分别压合于表面12及14。 The patterned etch barrier layer 16 shown in FIG etching resist layer 18 is fully covered with a photoresist layer deposited on the metal plate 10, which is produced using the stamper mode techniques to simultaneously heat roller photoresist layer are press 12 and 14 bonded to the surface. 湿性旋涂法及淋幕涂布法也为适用的光阻形成技术。 Wet spin coating method and a curtain coating method is also applicable to the photoresist forming technique. 将一光罩(图未示)靠合于光阻层,然后依照现有技术,令光线选择性通过光罩,使受光的光阻部分变为不可溶解;之后再以显影液去除未受光且仍可溶解的光阻部分,使光阻层形成图案。 The a mask (not shown) by bonding in the photoresist layer, then according to the prior art, so that the light selective mask by the light receiving portion of the photoresist becomes insoluble; then again to remove the developing solution and the light unaffected still soluble portions of the photoresist so that the photoresist layer is patterned. 因此,图案化的蚀刻阻层16具有一可选择性曝露表面12的图案,而全面覆盖的蚀刻阻层18则无图案且覆盖表面14。 Thus, the patterned etch resist layer 16 is selectively exposed with a pattern surface 12, and the etching resist layer 18, no comprehensive coverage pattern and covers the surface 14.

[0085] 图3为一剖面图,显示金属板10形成有掘入但未穿透金属板10的凹槽20。 [0085] FIG. 3 is a sectional view showing a metal plate 10 is formed with a recess 10 digging into the metal plate 20 but did not penetrate. 凹槽20是以蚀刻金属板10的方式形成,以使金属板10形成由图案化的蚀刻阻层16所定义的图案。 A groove 20 is etched, the metal plate 10 is formed so that the metal plate 10 is patterned by a patterned etch barrier layer 16 is defined. 图中所示的蚀刻方式为正面湿式化学蚀刻。 Etching shown in the figures is a front wet chemical etching. 例如,可将结构体反转,使图案化的蚀刻阻层16朝下,而全面覆盖的蚀刻阻层18朝上,然后利用一面向图案化蚀刻阻层16的底部喷嘴(图未示)将化学蚀刻液朝上喷洒于金属板10及图案化的蚀刻阻层16,与此同时,一面向全面覆盖的蚀刻阻层18的顶部喷嘴(图未示)则不予启动,如此一来便可借助重力去除蚀刻的副产物。 For example, the structures may be reversed, so that the patterned etch barrier layer 16 down, and full coverage of the etching resist layer 18 upwardly, and then use a nozzle bottom for patterned etching-barrier layer 16 (not shown) to chemical etching solution is sprayed upward in the metal plate 10 and the patterned etch resist layer 16 at the same time, a full coverage for the etching-barrier layer a top nozzle (not shown) 18 is not activated, can result by gravity removal of etch byproducts. 或者,利用全面覆盖的蚀刻阻层18提供背面保护,也可将结构体浸入化学蚀刻液中以形成凹槽20。 Alternatively, using the full coverage etching resist layer 18 provides a back surface protection, but also the structure can be immersed in a chemical etching solution to form a recess 20. 所述化学蚀刻液对铜具有高度针对性,且可刻入金属板10达300微米。 The highly specific chemical etching solution for copper, and the metal plate 10 be carved up to 300 microns. 因此,凹槽20自表面12延伸进入但未穿透金属板10,与表面14距离30微米,深度则为300微米。 Thus, the recess 12 extends from the surface 20, but not penetrate into the metal plate 10, the surface 14 a distance 30 m, the depth was 300 microns. 化学蚀刻液也对图案化的蚀刻阻层16下方的金属板10造成侧向蚀入。 Chemical etching solution may also cause the side of the metal plate 16 beneath the patterned etch barrier layer 10 is etched into. 适用的化学蚀刻液可为含碱氨的溶液或硝酸与盐酸的稀释混合物。 Suitable chemical etching solution may be an alkali solution of ammonia or dilute mixture of nitric acid and hydrochloric acid. 换句话说,所述化学蚀刻液可为酸性或碱性。 In other words, the chemical etching solution may be acidic or basic. 足以形成凹槽20而不致使金属板10过度曝露于化学蚀刻液的理想蚀刻时间可由试误法决定。 Sufficient to form the grooves 20 without causing excessive metal plate 10 is exposed to the chemical etching solution over the etching time may be determined by trial and error.

[0086] 图4、5及图6分别为去除图案化的蚀刻阻层16及全面覆盖的蚀刻阻层18后的金属板10的剖面图、俯视图及仰视图,其中图案化的蚀刻阻层16与全面覆盖的蚀刻阻层18已经溶剂处理去除。 [0086] Figures 4, 5 and 6 for the removal of the patterned etch barrier layer 16 and the etch barrier layer covering the full cross-sectional view of the metal plate 18, respectively 10, a top view and a bottom view, wherein the patterned etch barrier layer 16 and comprehensive coverage resist layer 18 has an etching treatment to remove the solvent. 例如,所用溶剂可为PH为14的强碱性氢氧化钾溶液。 For example, the PH may be strongly alkaline potassium hydroxide solution 14 with a solvent.

[0087] 蚀刻后的金属板10因此包含导热凸柱22、讯号凸柱24及基座26。 [0087] etching the metal plate 10 thus comprises a thermally conductive stud 22, the stud 24 and the base signal 26.

[0088] 导热凸柱22为金属板10受图案化的蚀刻阻层16保护的一第一未受蚀刻部分。 [0088] The heat conductive stud 22 is a metal plate 10 by the patterned etch barrier layer 16 is protected by a first unprotected etched portion. 导热凸柱22是邻接基座26,与基座26形成一体,且突伸于基座26上方,并由凹槽20从侧向包围。 Heat conductive stud 22 abuts base 26 is integrally formed with the base 26 and protrude above the base 26, surrounded by the groove 20 from the lateral direction. 导热凸柱22高300微米(等于凹槽20的深度),其顶面(表面12的圆形部分)的直径为1000微米,而底部(邻接基座26的圆形部分)的直径则为1100微米。 High heat conductive bosses 22 300 microns (equal to the depth of the recess 20), the diameter of the top surface (surface 12 of the circular portion) is 1000 m, and the diameter of the bottom (adjacent to the circular portion of the base 26), compared with 1100 m. 因此,导热凸柱22呈平顶锥柱形(类似一平截头体),其侧壁渐缩,直径则自基座26处朝其平坦圆形顶面向上递减。 Thus, the thermally conductive stud 22 has a flattened cylindrical cone (similar to a frustum), tapered sidewalls, the diameter decreasing from the base 26 toward the flat circular top surface thereof. 该渐缩侧壁是因化学蚀刻液侧向蚀入图案化的蚀刻阻层16下方而形成。 The tapered side walls are etched by a chemical etching solution into the bottom side of the patterned etch barrier layer 16 is formed. 该顶面与该底部的圆周同心(如图5所示)。 The top surface concentric with the circumference of the bottom (as shown in Figure 5).

[0089] 讯号凸柱24为金属板10受图案化的蚀刻阻层16保护的一第二未受蚀刻部分。 [0089] 24 of the metal plate 10 by the patterned etch barrier layer, a second signal unaffected etched portion 16 protects the stud. 讯号凸柱24是邻接基座26,与基座26形成一体,且突伸于基座26上方,并由凹槽20从侧向包围。 Signal boss 24 contiguous base 26 is integrally formed with the base 26 and protrude above the base 26, surrounded by the groove 20 from the lateral direction. 讯号凸柱24高300微米(等于凹槽20的深度),其顶面(表面12的圆形部分)的直径为300微米,而底部(邻接基座26的圆形部分)的直径则为400微米。 Signal 300 micron high studs 24 (equal to the depth of the recess 20), the diameter of the top surface (surface of circular portion 12) is 300 microns, while the diameter of the bottom (adjacent to the circular portion of the base 26), compared with 400 m. 因此,讯号凸柱24呈平顶锥柱形(类似一平截头体),其侧壁渐缩,直径则自基座26处朝其平坦圆形顶面向上递减。 Thus, the signal boss 24 is cylindrical flattened cone (similar to a frustum), tapered sidewalls, the diameter decreasing from the base 26 toward the flat circular top surface thereof. 该渐缩侧壁是因化学蚀刻液侧向蚀入图案化的蚀刻阻层16下方而形成。 The tapered side walls are etched by a chemical etching solution into the bottom side of the patterned etch barrier layer 16 is formed. 该顶面与该底部的圆周同心(如图5所示)。 The top surface concentric with the circumference of the bottom (as shown in Figure 5).

[0090] 基座26为金属板10在导热凸柱22与讯号凸柱24下方的一未受蚀刻部分,并自导热凸柱22、讯号凸柱24沿一侧向平面(如左、右等侧面方向)侧向延伸,厚度为30微米(即330-300)。 [0090] The base 26 is a metal plate 10 at a portion below the thermal etching of unprotected stud boss 22 and signal 24, and since the heat conductive studs 22, the stud 24 along one side of the signal to the plane (left, right, etc. the lateral direction) extends laterally, with a thickness of 30 microns (i.e., 330-300).

[0091] 导热凸柱22、讯号凸柱24与基座26可经处理以加强与环氧树脂及焊料的结合度。 [0091] 22, the stud 24 and the base signal 26 may be treated to enhance the bonding of the epoxy resin and the thermally conductive solder lug. 例如,导热凸柱22、讯号凸柱24与基座26可经化学氧化或微蚀刻以产生较粗糙的表面。 For example, the thermally conductive studs 22, the stud 24 and the base signal 26 may be micro-chemical oxidation or etching to produce rougher surface.

[0092] 导热凸柱22、讯号凸柱24与基座26在附图中为通过削减法形成的单一金属(铜) 体。 [0092] The heat conductive studs 22, 26 are formed by a single metal reduction process in the drawings boss 24 of the base signal (copper) body. 此外,也可利用一接触件冲压金属板10,其中该接触件具有可定义导热凸柱22的第一凹槽或孔洞以及可定义讯号凸柱24的第二凹槽或孔洞,以使导热凸柱22、讯号凸柱24与基座26成为冲压成型的单一金属体。 Further, the contact member may also be used a punching metal plate 10, wherein the contact member having a first recess defined heat conducting stud or hole or the second recess 22 and the holes 24 of the lug define the signal, so that the heat conductive protrusions column 22, boss 24 and signals base 26 as a single member stamped and formed metal. 或者,可利用增添法形成导热凸柱22、讯号凸柱24,其作法是通过电镀、化学气相沉积(CVD)、物理气相沉积(PVD)等技术,将导热凸柱22、讯号凸柱24沉积于基座26上。 Alternatively, it may be formed by adding method thermally conductive studs 22, the signal boss 24, which practice is by electroplating, chemical vapor deposition (CVD), physical vapor deposition (PVD) technology, the heat conductive studs 22, the signal boss 24 is deposited on the base 26. 例如,可在铜质基座26上电镀焊料导热凸柱22及焊料讯号凸柱24 ;在此情况下,导热凸柱22与基座26是以冶金界面相接,彼此邻接但并非一体成形,讯号凸柱24与基座26是以冶金界面相接,彼此邻接但并非一体成形。 For example, copper may be in the base 26 on the boss 22 and the signal solder electroplated solder heat conductive stud 24; but not formed integrally in this case, the thermally conductive boss 22 and the base 26 is in contact with the metallurgical interface, adjacent to each other, signal boss 24 and the base 26 is in contact with the metallurgical interface, but not adjacent to each other are integrally molded. 或者,可利用半增添法形成导热凸柱22、讯号凸柱24,例如可在导热凸柱22、讯号凸柱24其蚀刻形成的下部上方分别沉积导热凸柱22、讯号凸柱24的上部。 Alternatively, may be formed by a semi-add method thermally conductive studs 22, the signal boss 24, for example, may be deposited respectively a top thermal conduction studs 22, the signal stud 24 above the heat conductive studs 22, the signal lug 24 which is formed by etching the lower portion. 此外,导热凸柱22、讯号凸柱24与基座26也可同时以半增添法形成,例如可在导热凸柱22、讯号凸柱24与基座26其蚀刻形成的下部上方分别沉积导热凸柱22、讯号凸柱24与基座26的同形上部。 Further, heat conductive studs 22, the stud 24 and the base signal 26 may be simultaneously formed in a semi-adding method, for example, are deposited over the thermally conductive heat conductive stud projection 22, 24 with the base signal boss 26 formed by etching a lower portion thereof column 22, boss 24 and the signal shape of the base 26 with the upper portion. 导热凸柱22、讯号凸柱24也可烧结于基座26。 Heat conductive studs 22, the stud 24 may also signal to the sintered base 26.

[0093] 图7及图8为剖面图,说明本发明的一实施例中一种制作黏着层28的方法。 [0093] FIG 7 and FIG 8 is a cross sectional view illustrating an embodiment of a method of one embodiment of the present invention, the adhesive layer 28 is prepared. 图9及图10分别为根据图8所绘制的俯视图及仰视图。 9 and 10 are a plan view and a bottom view of the FIG. 8 drawing.

[0094] 图7为黏着层28的剖面图,其中黏着层28为乙阶(B-stage)未固化环氧树脂的胶片,其为一未经固化且无图案的片体,厚180微米。 [0094] FIG. 7 is a sectional view of the adhesive layer 28, wherein adhesive layer 28 is a B-stage (B-stage) epoxy resin film uncured, which is an uncured and non-patterned sheet, a thickness of 180 microns.

[0095] 黏着层28可为多种有机或无机电性绝缘体制成的各种介电膜或胶片。 [0095] The adhesive 28 may be a variety of various dielectric film or organic film or an inorganic insulator layer is made. 例如,黏着层28起初可为一胶片,其中树脂型态的热固性环氧树脂浸入一加强材料后部分固化至中期。 For example, the first adhesive layer 28 may be a film, a thermosetting type epoxy resin wherein the resin is immersed in a reinforcing material after partially cured to medium. 所述环氧树脂可为FR-4,但也可使用诸如多官能与双马来酰亚胺-三氮杂苯(BT)树脂等其他环氧树脂。 The epoxy resin may be FR-4, may also be used, such as bismaleimide and polyfunctional - Other epoxy triazine (BT) resin or the like. 在特定应用中,氰酸酯、聚酰亚胺及聚四氟乙烯(PTFE)也为可用的环氧树脂。 In certain applications, cyanate ester, polyimide, and polytetrafluoroethylene (PTFE) are also useful epoxy resins. 所述加强材料可为电子级玻璃,也可为其他加强材料,如高强度玻璃、低诱电率玻璃、石英、克维拉纤维(kevlar aramid)及纸等。 The reinforcing material may be an electronic grade glass, it may be other reinforcing materials, such as high-strength glass, a low dielectric of glass, quartz, Kevlar fiber (kevlar aramid), and paper. 所述加强材料也可为织物、不织布或无方向性微纤维。 The reinforcing material may also be a fabric, woven fabric or non-oriented microfibers. 可将诸如硅(研粉熔融石英)等填充物加入胶片中以提升导热性、热冲击阻抗力与热膨胀匹配性。 May be such as silicon (powdered fused silica) like filler added to the film to enhance the thermal conductivity, thermal shock impedance matching thermal expansion forces. 可利用市售预浸溃体,如美国威斯康星州奥克莱WL Gore & Associates的SPEEDBOARD C胶片即为一例。 Commercially available prepreg can collapse thereof, such as film, Wisconsin SPEEDBOARD C WL Gore & Associates of Oakley is an example.

[0096] 图8、9及图10分别为具有开口30、32的黏着层28的剖面图、俯视图及仰视图。 [0096] Figures 8, 9 and 10 are a sectional view of the openings 30, 32 having adhesive layer 28, a top view and a bottom view of FIG. 开口30为第一窗口,其贯穿黏着层28且直径为1150微米。 A first window opening 30, through which the adhesive layer 28 and a diameter of 1150 microns. 开口32为第二窗口,其贯穿黏着层28且直径为450微米。 Opening a second window 32, through which the adhesive layer 28 and a diameter of 450 microns. 开口30、32是以机械方式钻透该胶片而形成,但也可以其他技术制作,如冲制及冲压等。 Openings 30, 32 are mechanically drilled through the film is formed, but may be made of other techniques, such as punching and stamping.

[0097] 图11及图12为剖面图,说明本发明的一实施例中一种制作基板34的方法,而图13及图14则分别为根据图12绘制的俯视图及仰视图。 [0097] FIG. 11 and FIG. 12 is a cross sectional view illustrating an embodiment of a method of fabricating the substrate 34 of the embodiment of the present invention, and FIGS. 13 and 14 are respectively a top view and a bottom view according to FIG. 12 plotted in FIG.

[0098] 图11是基板34的剖面图。 [0098] FIG. 11 is a sectional view of a substrate 34. 基板34包含导电层36与介电层38。 Conductive layer 36 comprising the substrate 34 and the dielectric layer 38. 导电层36为电性导体,其接触介电层38且延伸于介电层38上方。 Electrically conductive layer 36 is a conductor, which contacts the dielectric layer 38 and extends over the dielectric layer 38. 介电层38则为电性绝缘体。 The dielectric layer 38 was an electrical insulator. 例如,导电层36是一无图案且厚度为30微米的铜板,而介电层38则为厚度为150微米的环氧树脂。 For example, a non-conductive layer 36 is patterned and a thickness of 30 micrometers of copper, and the dielectric layer 38 was an epoxy resin having a thickness of 150 micrometers.

[0099] 图12、13及图14分别为具有通孔40、42的基板34的剖面图、俯视图及仰视图。 [0099] FIGS. 12, 13 and 14 are cross-sectional view of a through-hole 34 of the substrate 40, 42, a top view and a bottom view of FIG. 通孔40为第一窗口,其贯穿基板34且直径为1150微米。 A first through hole 40 as a window, through which the substrate 34 having a diameter of 1150 microns. 通孔42为第二窗口,其贯穿基板34且直径为450微米。 A second window 42 is a through hole, through which the substrate 34 having a diameter of 450 microns. 通孔40、42是以机械方式钻透导电层36与介电层38而形成,但也可以其他技术制作,如冲制及冲压等。 The through holes 40, 42 are mechanically drilled through the conductive layer 36 and the dielectric layer 38 is formed, but may be made of other techniques, such as punching and stamping. 较佳者,开口30与通孔40具有相同直径,且是以相同的钻头在同一钻台上通过相同方式形成;而开口32与通孔42也具有相同直径,且是以相同的钻头在同一钻台上通过相同方式形成。 It is preferred, with an opening 30 through hole 40 having the same diameter, and are the same in the same drill rig floor is formed by the same manner; the through holes 32 and the opening 42 have the same diameter and the same bit in the same is formed by the same manner as the drill floor.

[0100] 基板34在此绘示为一层压结构,但基板34也可为其他电性相连体,如陶瓷板或印刷电路板。 [0100] In the substrate 34 shown as a laminated structure, the substrate 34 may be other electrical phase piece, such as a ceramic or a printed circuit board. 同样地,基板34可另包含多数个内嵌电路的层体。 Likewise, the substrate 34 may further comprise a plurality of layers of the circuit element embedded.

[0101] 图15至图26为剖面图,说明本发明的一实施例中一种制作导热板74的方法,该导热板74包含导热凸柱22、讯号凸柱24、基座26、黏着层28及基板34。 [0101] FIGS. 15 to 26 is a cross sectional view illustrating an embodiment of a method of making a thermally conductive plate 74 in the embodiment of the present invention, the heat conducting plate 74 comprises a thermally conductive studs 22, the stud signal 24, base 26, adhesive layer 28 and the substrate 34. 图27及图28分别为图26的俯视图及仰视图。 27 and 28 are a top view and a bottom view of FIG. 26.

[0102] 图15为黏着层28设置于基座26上的剖面图。 [0102] FIG. 15 is a sectional view on the adhesive layer 28 disposed on the base 26 of FIG. 黏着层28下降至基座26上,使导热凸柱22向上插入并贯穿开口30,而讯号凸柱24则向上插入并贯穿开口32,最终则使黏着层28接触并定位于基座26。 The adhesive layer 28 is lowered onto the base 26, so that the thermally conductive stud 22 is inserted through opening 30 and upwardly, while the signal boss 24 is inserted through opening 32 and upwardly, eventually the adhesive layer 28 and the contact base 26 is positioned. 较佳者,导热凸柱22在插入及贯穿开口30后是对准开口30且位于开口30内的中央位置但不接触黏着层28 ;而讯号凸柱24在插入及贯穿开口32后也对准开口32且位于开口32内的中央位置但不接触黏着层28。 Are preferred, the thermally conductive stud 22 is inserted through opening 30 and the opening 30 are aligned and positioned in the center of the opening 30 but does not contact the adhesive layer 28; the signals studs 24 are also aligned and inserted through the opening 32 opening 32 and the opening 32 in the center position, but not in contact with the adhesive layer 28.

[0103] 在图16所示结构中,基板34是设置于黏着层28上。 [0103] In the configuration shown in FIG. 16, the substrate 34 is disposed on the adhesive layer 28. 基板34下降至黏着层28上,使导热凸柱22向上插入通孔40,而讯号凸柱24则向上插入通孔42,最终则使基板34接触并定位于黏着层28。 34 down to the substrate on the adhesive layer 28, heat conducting stud 22 is inserted upwardly through hole 40, and the boss 24 is inserted into the signal upwardly through hole 42, the contact is finally positioned on the substrate 34 and adhesive layer 28.

[0104] 导热凸柱22在插入(但并未贯穿)通孔40后是对准通孔40且位于通孔40内的中央位置而不接触基板34。 [0104] In the thermally conductive stud 22 is inserted (but not through) the through hole 40 is aligned with the through holes 40 and 40 located at the center position within the through hole 34 without contacting the substrate. 因此,缺口44是位于通孔40内且介于导热凸柱22与基板34间。 Thus, the notch 44 is positioned within the through-hole 40 and the boss 22 and the interposed heat conducting substrate 34. 缺口44侧向环绕导热凸柱22,同时被基板34侧向包围。 Lateral notches 44 around the heat conductive studs 22, 34 while being laterally surrounded by the substrate. 此外,开口30与通孔40是相互对齐且具有相同直径。 Further, the opening 30 and the through-hole 40 is aligned with each other and have the same diameter.

[0105] 讯号凸柱24在插入(但并未贯穿)通孔42后是对准通孔42且位于通孔42内的中央位置而不接触基板34。 [0105] Signal boss 24 is inserted (but not through) the through hole 42 is aligned with the through holes 42 and 42 located at the center position within the through hole 34 without contacting the substrate. 因此,缺口46是位于通孔42内且介于讯号凸柱24与基板34之间。 Thus, the gap 46 is located within the through hole 42 and boss 24 interposed between the signal 34 and the substrate. 缺口46侧向环绕讯号凸柱24,同时被基板34侧向包围。 Cutout 46 laterally surround signal boss 24, while being surrounded by the substrate 34 laterally. 此外,开口32与通孔42是相互对齐且具有相同直径。 Further, the through-hole 42 and opening 32 are aligned with each other and have the same diameter.

[0106] 此时,基板34是安置于黏着层28上并与之接触,且延伸于黏着层28上方。 [0106] In this case, the substrate 34 is disposed on the adhesive layer 28 and in contact with, and extends above the adhesive layer 28. 导热凸柱22延伸通过开口30后,进入通孔40且到达介电层38。 Thermally conductive stud 22 extending through the rear opening 30, 40 into the through-hole 38 and reaches the dielectric layer. 导热凸柱22较导电层36的顶面低60微米,并经由通孔40朝一向上方向外露。 Thermally conductive than the top surface of the boss 22 of the lower conductive layer 36 60 microns, and exposed via the through-hole 40 toward the upward direction. 讯号凸柱24延伸通过开口32后,进入通孔42且到达介电层38。 Signal boss 24 extends through the opening 32 into the through-hole 42 and reaches the dielectric layer 38. 讯号凸柱24较导电层36的顶面低60微米,并经由通孔42朝该向上方向外露。 Signal boss 24 than the top surface of conductive layer 36 is less than 60 microns, and 42 exposed toward the upward direction via the through hole. 黏着层28接触基座26与基板34且介于该两者间。 The adhesive layer 28 in contact with the substrate 34 and the base 26 is interposed between the two. 黏着层28接触介电层38但与导电层36保持距离。 The adhesive layer 28 in contact with the dielectric layer 38, but keep a distance from the conductive layer 36. 在此阶段,黏着层28仍为乙阶(B-stage)未固化环氧树脂的胶片,而缺口44、46中则为空气。 At this stage, B-stage adhesive layer 28 remains (B-stage) epoxy resin film uncured, while the air gap was 44.

[0107] 图17绘示黏着层28经加热加压后流入缺口44、46。 [0107] FIG. 17 illustrates the adhesive layer 28 after applying heat and pressure flows into the gap 44. 在此图中,迫使黏着层28流入缺口44、46的方法是对导电层36施以向下压力及/或对基座26施以向上压力,也就是说将基座26与基板34相对压合,借以对黏着层28施压;与此同时也对黏着层28加热。 In this figure, the method to force the adhesive layer 28 into the notch 44, 46 is subjected to downward pressure conductive layer 36 and / or upward pressure applied to base 26, i.e. the base 26 and the substrate 34 relative to the pressure together, whereby pressure on the adhesive layer 28; at the same time heating the adhesive layer 28. 受热的黏着层28可在压力下任意成形。 The heated adhesive layer 28 may be formed at any pressure. 因此,位于基座26与基板34间的黏着层28受到挤压后,改变其原始形状并向上流入缺口44、46。 Thus, the base 26 and the rear substrate 34 of the adhesive layer 28 is pressed to change the flow into the gap 44 to its original shape. 基座26与基板34持续朝彼此压合,直到黏着层28填满缺口44、46为止。 Base 26 and substrate 34 continuously toward each other nip, until the adhesive layer 28 fills up the gap 44. 此外,在基座26与基板34之间的间隙缩小后,黏着层28仍旧填满这一缩小了的间隙内。 Further, after the gap between the base 26 and the substrate 34 narrow, the adhesive layer 28 remains to fill the gap reduced.

[0108] 例如,可将基座26及导电层36设置于一压合机的上、下压台(图未不)间。 [0108] For example, the base 26 and the conductive layer 36 is provided on a pressing machine, the lower platen (not FIG un) between. 此外,可将一上挡板及上缓冲纸(图未示)夹置于导电层36与上压台间,并将一下挡板及下缓冲纸(图未示)夹置于基座26与下压台间。 Further, an upper baffle and may be on the buffer sheet (not shown) is sandwiched between the platen 36 and the conductive layer, and the buffer at the bezel and the lower sheet (not shown) sandwiched between the base 26 and between the lower platen. 以此构成的叠合体由上到下依次为上压台、上挡板、上缓冲纸、基板34、黏着层28、基座26、下缓冲纸、下挡板及下压台。 In this stacked body composed of a top to bottom order of the platen, the bezel, the buffer sheet, substrate 34, adhesive layer 28, base 26, the buffer sheet, the bezel and the lower platen. 此外,可利用从下压台向上延伸并穿过基座26对位孔(图未示)的工具接脚(图未示)将此叠合体定位于下压台上。 Further, the use of the base 26 extend through alignment holes (not shown) of the tool pin (not shown) is positioned at this laminated body is pressed from the lower platen up table.

[0109] 而后将上、下压台加热并相互推进,借此对黏着层28加热并施压。 [0109] After the upper, lower heating platen and toward each other, whereby the adhesive layer 28 on the heat and pressure. 挡板可将压台的热分散,使热均匀施加于基座26与基板34乃至于黏着层28。 The baffle may platen heat dispersion, heat is applied uniformly to the base 26 to the substrate 34 and the adhesive layer 28. 缓冲纸则将压台的压力分散,使压力均匀施加于基座26与基板34乃至于黏着层28。 Then the platen pressure buffer dispersing paper, the pressure applied uniformly to the substrate 34 and the base 26 to the adhesive layer 28. 起初,介电层38接触并压合于黏着层28。 Initially, dielectric layer 38 and contacts adhesive layer 28 in the nip. 随着压台持续动作与持续加热,基座26与基板34间的黏着层28受到挤压并开始熔化,因而向上流入缺口44、46,并于通过介电层38后抵达导电层36。 With continued operation of the platens and heating was continued, the adhesive layer between the substrate 34 28 base 26 is pressed and begins to melt, and thus flows upwardly into the notch 44, 46, 36 and the conductive layer by a dielectric layer 38 upon arrival. 例如,未固化环氧树脂遇热熔化后,被压力挤入缺口44、46中,但加强材料及填充物仍留在基座26与基板34间。 For example, after an uncured epoxy resin in case of a hot melt, pressure is extruded into the gap 44, but the reinforcing material and filler remain in the base 26 and the substrate 34. 黏着层28在通孔40内上升的速度大于导热凸柱22,终至填满缺口44。 Adhesive layer 28 is increased in the through hole 40 is greater than the thermal velocity bosses 22, 44 and finally to fill the gap. 黏着层28在通孔42内上升的速度也大于讯号凸柱24,终至填满缺口46。 Adhesive layer 28 is increased in the through hole 42 is greater than the speed signal studs 24, 46 and finally to fill the gap. 黏着层28也上升至稍高于缺口44、46的位置,并在压台停止动作前,溢流至导热凸柱22顶面及导电层36顶面邻接缺口44处,以及讯号凸柱24顶面及导电层36顶面邻接缺口46处。 The adhesive layer 28 is also raised to a position slightly above the notches 44, 46, and the platen is stopped before the operation, the notch 22 adjacent to the overflow surface and the surface of the conductive layer 36 of the thermally conductive studs 44, the stud 24 and the signal surface and surface of the conductive layer 36 adjacent to the notch 46. 若胶片厚度略大于实际所需便可能发生这一情形。 If the film thickness is slightly larger than it actually needed in this situation may occur. 如此一来,黏着层28便在导热凸柱22顶面及讯号凸柱24顶面形成一覆盖薄层。 Thus, adhesive layer 28 will form a thin layer 22 covering the top surface 24 and a surface of the thermally conductive boss boss signal. 压台在触及导热凸柱22及讯号凸柱24后停止动作,但仍持续对黏着层28加热。 In the thermally conductive platens touching studs 22 and 24 stops the operation signal boss, but continued heating of the adhesive layer 28.

[0110] 黏着层28在缺口44、46中向上流动的方向如图中向上粗箭号所示,导热凸柱22、讯号凸柱24与基座26相对于基板34的向上移动如向上细箭号所不,而基板34相对于导热凸柱22、讯号凸柱24与基座26的向下移动则如向下细箭号所示。 44, the notch 28 in the direction of the upward flowing [0110] adhesive layer upward thick arrows shown in FIG number, heat conductive studs 22, the stud 24 and the signal 26 with respect to the upward movement of the base substrate 34 as a fine upward arrow the numbers no and 22 with respect to the substrate 34, the signal boss 24 and the downward movement of the base 26 as shown in No. downward arrow fine thermally conductive boss.

[0111] 图18中的黏着层28已经固化。 The [0111] 18 adhesive layer 28 has been cured.

[0112] 例如,压台停止移动后仍持续夹合导热凸柱22、讯号凸柱24与基座26并供热,借此将已熔化的乙阶(B-stage)环氧树脂转换为丙阶(C-stage)固化或硬化的环氧树脂。 [0112] For example, the platen stops moving clamping continued heat conductive studs 22, the stud 24 and the base signal 26 and heat, whereby the molten B-stage (B-stage) epoxy resin is converted to propionic stage (C-stage) epoxy resin curing or hardening. 因此,环氧树脂是以类似现有多层压合的方式固化。 Accordingly, the epoxy resin in a similar manner as the conventional multilayer laminated cured. 环氧树脂固化后,压台分离,以便将结构体从压合机中取出。 After the epoxy curing, platen separation, is removed from the structure so as to nip press.

[0113] 固化的黏着层28在导热凸柱22与基板34间、讯号凸柱24与基板34间以及基座26与基板34间提供牢固的机械性连接。 [0113] The adhesive layer 28 is cured signal boss 24 and the substrate 34 between the substrate 34 and the base 26 to provide a secure mechanical connection with the thermally conductive boss 22 and the substrate 34,. 黏着层28可承受一般操作压力而不致变形损毁,遇过大压力时则只暂时扭曲。 The adhesive layer 28 can withstand normal operating pressure without deformation damage, only temporarily distort when exposed excessive pressure. 再者,黏着层28可吸收导热凸柱22与基板34间、讯号凸柱24与基板34间以及基座26与基板34间的热膨胀不匹配。 Further, the heat conductive adhesive layer 28 may absorb boss 22 and the substrate 34, between the signal 24 and the boss 34 and the base substrate 26 between the substrate 34 and the thermal expansion mismatch.

[0114] 在此阶段,导热凸柱22、讯号凸柱24与导电层36大致共平面,而黏着层28与导电层36则延伸至一面朝该向上方向的顶面。 [0114] At this stage, 22, the stud 24 and the signal conductive layer 36 is substantially co-planar thermally conductive studs, adhesive layer and the conductive layer 36 extending to the side of the top surface 28 toward the upward direction. 例如,基座26与介电层38间的黏着层28厚120微米,较其初始厚度180微米减少60微米;也就是说导热凸柱22在通孔40中升高60微米,讯号凸柱24在通孔42中升高60微米,而基板34则相对于导热凸柱22、讯号凸柱24下降60微米。 For example, the base 26 and the dielectric layer 3828 between the adhesive layer thickness of 120 microns, 60 microns to reduce its initial thickness than 180 microns; thermally lug 22 that is increased 60 micrometers in the through hole 40, the stud 24 signal 60 rise in the through hole 42 microns, and the substrate 34 relative to the heat conductive studs 22, 24 decrease signal lug 60 microns. 导热凸柱22及讯号凸柱24的高度300微米基本上等同于导电层36 (30微米)、介电层38 (150微米)与下方黏着层28 (120微米)的结合高度。 Highly thermally conductive boss 22 and 300 microns signal boss 24 is substantially identical to conductive layer 36 (30 m), a dielectric layer 38 (150 micrometers) in combination with the height of the lower layer 28 (120 micrometers) adhesion. 此外,导热凸柱22仍位于开口30与通孔40内的中央位置并与基板34保持距离,讯号凸柱24仍位于开口32与通孔42内的中央位置并与基板34保持距离,而黏着层28则填满基座26与基板34间的空间并填满缺口44、46。 Further, the thermally conductive stud 22 is still located in the opening center of the inner 30 and the through holes 40 and 34 keep a distance from the substrate, the signal boss 24 remain centrally located within the opening 32 and the through-hole 42 and the substrate 34 to maintain the distance, and the adhesive the space 28 between the base layer 26 and the substrate 34 to fill the gap 44 and fills. 例如,缺口44 (以及导热凸柱22与基板34间的黏着层28)在导热凸柱22顶面处宽75微米[(1150-1000)/2],缺口46 (以及讯号凸柱24与基板34间的黏着层28)在讯号凸柱24顶面处宽75微米[(450-300)/2]。 For example, the gap 44 (and the heat conductive adhesive layer between the substrate 22 and the stud 34 28) 22 wide at the top surface of the thermally conductive boss 75 microns [(1150-1000) / 2], the notch 46 (the stud 24 and the substrate signal 34 the adhesive layer 28) in the wide face of the signal 24 the stud 75 microns [(450-300) / 2]. 黏着层28在缺口44、46内延伸跨越介电层38。 Adhesive layer 28 in the notch 44, 46 extends across the dielectric layer 38. 换句话说,缺口44中的黏着层28是沿该向上方向及一向下方向延伸并跨越缺44外侧壁的介电层38厚度,而缺口46中的黏着层28则沿该向上方向及该向下方向延伸并跨越缺口46外侧壁的介电层38厚度。 In other words, the adhesive layer 28 is a notch 44 extending in the upward direction and a downward direction and across the thickness of the dielectric layer 38 is shortage of the outer side wall 44, and the adhesive layer 28 of the slots 46 in the upward direction and to the the thickness of the dielectric layer 38 extending across the outer wall and the notch 46. 黏着层28也包含缺口44、46上方的薄顶部分,其接触导热凸柱22、讯号凸柱24的顶面与导电层36的顶面并在导热凸柱22、讯号凸柱24上方延伸10微米。 28 also comprises a thin adhesive layer 44, above the top portion of the notch, heat conductive contact stud 22, the top surface of the conductive layer top surface 36 of the boss 24 of the signal 10 and extends above the thermally conductive boss 22 signal boss 24 m.

[0115] 在图19所示结构中,导热凸柱22、讯号凸柱24、黏着层28及导电层36的顶部皆已去除。 [0115] In the configuration shown in FIG. 19, the thermally conductive studs 22, 24, the top boss signal adhesive layer 28 and the conductive layer 36 is removed have switched.

[0116] 导热凸柱22、讯号凸柱24、黏着层28及导电层36的顶部是以研磨方式去除,例如以旋转钻石砂轮及蒸馏水处理结构体的顶部。 [0116] 22 thermal conductive stud, the stud signal 24, the top layer 28 and the conductive adhesive layer 36 is removed grinding method, for example, the top rotating diamond wheel and the distilled water structure. 起初,钻石砂轮只磨去黏着层28。 Initially, the diamond grinding wheel just rubbed off adhesive layer 28. 持续研磨,则黏着层28因受磨表面下移而变薄。 Continuous grinding, the grinding surface of the adhesive layer 28 due to the thinning down. 钻石砂轮终将接触导热凸柱22、讯号凸柱24与导电层36 (未必同时),因而开始研磨导热凸柱22、讯号凸柱24与导电层36。 Eventually contacting the thermally conductive diamond wheel studs 22, the stud 24 and the signal conductive layer 36 (not necessarily simultaneously), thus beginning the grinding heat conductive studs 22, the stud 24 and the signal conductive layer 36. 持续研磨后,导热凸柱22、讯号凸柱24、黏着层28及导电层36均因受磨表面下移而变薄。 After milling is continued, heat conductive studs 22, the stud signal 24, adhesive layer 28 and conductive layer 36 are thinner due to wear down the surface. 研磨持续至去除所需厚度为止。 The grinding is continued until the desired thickness to be removed. 之后,以蒸馏水冲洗结构体去除污物。 Thereafter, distilled water to remove dirt structure.

[0117] 上述研磨步骤将黏着层28的顶部磨去25微米,将导热凸柱22的顶部磨去15微米,将讯号凸柱24的顶部磨去15微米,并将导电层36的顶部磨去15微米。 [0117] The polishing step of the adhesive layer 28 is rubbed off the top 25 microns, the top 22 of the thermally conductive stud rubbed 15 microns, the top 24 of the stud rubbed off signal 15 microns, and the top conductive layer 36 is rubbed 15 microns. 厚度减少对导热凸柱22、讯号凸柱24或黏着层28均无明显影响,但导电层36的厚度却从30微米大幅缩减至15微米。 Reduced thickness 22, adhesive layer 24 or 28 had no significant effect on the thermal conductivity signal boss boss, the thickness of the conductive layer 36 is never reduced to substantially 30 microns 15 microns.

[0118] 至此,导热凸柱22、讯号凸柱24、黏着层28及导电层36是共同位于介电层38上方一面朝该向上方向的平滑拼接侧顶面上。 [0118] Thus, the thermally conductive studs 22, the stud signal 24, adhesive layer 28 and conductive layer 36 is co-located over the dielectric layer 38 side toward the upward direction side of the top surface smooth splicing. 同样地,导热凸柱22、讯号凸柱24与黏着层28在基座26处是彼此共平面。 Similarly, the thermally conductive stud 22, the stud 24 and the signal 28 at the adhesive layer 26 are coplanar with each other at the base.

[0119] 图20所示的结构体具有导电层50,其是沉积于导热凸柱22、讯号凸柱24、黏着层28及导电层36上。 Structure shown in [0119] FIG. 20 having a conductive layer 50 which is deposited on a thermally conductive boss 22, the signal boss 24, adhesive layer 28 and the conductive layer 36.

[0120] 导电层50接触导热凸柱22、讯号凸柱24、黏着层28及导电层36,并从上方覆盖此四者。 Contacts 50 [0120] layer of thermally conductive studs 22, the stud signal 24, adhesive layer 28 and conductive layer 36, and this covers from above the four. 例如,可将结构体浸入一活化剂溶液中,因而使黏着层28可与无电镀铜产生触媒反应,接着将一第一铜层以无电镀被覆的方式设于导热凸柱22、讯号凸柱24、黏着层28及导电层36上,然后将一第二铜层以电镀方式设于该第一铜层上。 For example, a structure may be immersed in the activator solution, thus making the adhesive layer 28 may be generated with the electroless copper plating reaction catalyst, followed by a first copper plating layer provided in a manner covering the thermally conductive stud 22, stud signal 24, adhesive layer 28 and the conductive layer 36, a second copper layer is then galvanically provided on the first copper layer. 第一铜层厚约2微米,第二铜层厚约13微米,所以导电层50的总厚度约为15微米。 The first copper layer thickness of about 2 micrometers, a second copper layer thickness of about 13 microns, so the total thickness of the conductive layer 50 is approximately 15 microns. 如此一来,导电层36的厚度便增为约30微米(15+15)。 Thus, the thickness of the conductive layer 36 is then increased to about 30 m (15 + 15). 导电层50是作为导热凸柱22与讯号凸柱24的一覆盖层及导电层36的一加厚层。 Conductive layer 50 as a thermally conductive cover layer and the conductive layer 22 and signal boss 24 of stud 36 is a thicker layer. 为便于说明,导热凸柱22、讯号凸柱24与导电层50以及导电层36与50均以单层显示。 For convenience of explanation, the thermally conductive studs 22, the stud 24 and the signal 50 and the conductive layer 50 and conductive layer 36 are single display. 由于铜为同质被覆,导热凸柱22与导电层50间的界线、讯号凸柱24与导电层50间的界线以及导电层36与50间的界线(均以虚线绘示)可能不易察觉甚至无法察觉。 Since copper is a homogeneous coating layer 22 and the conductive, thermally conductive line 50 of the stud, the stud 24 and the signal line 50 and line conductive layers 36 and 50 (the dashed lines are shown) may be difficult to detect even imperceptible. 然而,黏着层28与导电层50间的界线则清楚可见。 However, the boundaries of the adhesive layer 28 and conductive layer 50 are clearly visible.

[0121] 图21所示结构体的上、下表面分别设有图案化的蚀刻阻层52与图案化的蚀刻阻层54。 The [0121] structure shown in FIG. 21, the lower surface of the etch barrier layer 52 are respectively provided with the pattern of the patterned etch barrier layer 54. 图中所示的图案化的蚀刻阻层52、54均为类似于图案化的蚀刻阻层16的光阻层。 FIG patterned etch resist layer 52, 54 shown in the photoresist layer patterned etch resist layer 16 are similar. 图案化的蚀刻阻层52设有可选择性曝露导电层50的图案,而图案化的蚀刻阻层54则设有可选择性曝露基座26的图案。 The patterned etch resist layer 52 is selectively exposed with patterned conductive layer 50, and patterned etch resist layer 54 is selectively exposed with a pattern 26 of the base.

[0122] 在图22所示的结构体中,导电层36、50已经由蚀刻去除其选定部分以形成图案化的蚀刻阻层52所定义的图案,而基座26也已经由蚀刻去除其选定部分以形成图案化的蚀刻阻层54所定义的图案。 [0122] In the structure shown in FIG. 22, the conductive layers 36, 50 has been removed by the etching selected portions thereof to form the pattern 52 is defined by the patterned etch barrier layer, and the base 26 which is removed by the etching has selected portions 54 to form a pattern defined by the patterned etch barrier layer. 所述蚀刻是双面湿式化学蚀刻,其与施用于金属板10者相仿。 The double-sided etching is a wet chemical etch, which is applied to the metal plate 10 are similar. 例如,利用一顶部喷嘴(图未示)及一底部喷嘴(图未示)将化学蚀刻液分别喷洒于结构体的顶面及底面,或者将结构体浸入化学蚀刻液中。 For example, with a top nozzle (not shown) and a bottom nozzle (not shown), respectively, the chemical etching solution is sprayed on the top and bottom surfaces of the structures, or structures immersed in a chemical etchant. 化学蚀刻液可蚀透导电层36、50以露出黏着层28及介电层38,因而将原本无图案的导电层36、50转变为图案层。 Chemical etching liquid permeable conductive layers 36, 50 may be etched to expose the adhesive layer 28 and dielectric layer 38, and thus the original unpatterned conductive layers 36, 50 into a pattern layer. 化学蚀刻液也蚀透基座26以露出黏着层28。 Chemical etching solution may also etch through the base 26 to expose the adhesive layer 28.

[0123] 在图23中,结构体上的图案化蚀刻阻层52、54均已去除。 [0123] In FIG. 23, the etch barrier layer 52 is patterned on the structure have been removed. 去除图案化的蚀刻阻层52,54的方式可与去除图案化的蚀刻阻层16、全面覆盖的蚀刻阻层18的方式相同。 16 may be, in the same manner removing the patterned etch resist layer 52 and removing the patterned etch barrier layer is etched, resist layer 18 is fully covered.

[0124] 蚀刻后的导电层36、50包含焊垫56与路由线58,而蚀刻后的导电层50则包含盖体60。 [0124] After etching the conductive layer 36, 50 comprises a pad 56 and the routing line 58, and the conductive layer 50 after etching comprises a cover 60. 焊垫56与路由线58是导电层36、50受图案化的蚀刻阻层52保护而未被蚀刻的部分,盖体60则为导电层50受图案化的蚀刻阻层52保护而未被蚀刻的部分。 Pad 56 and the line 58 is a route portion 36, 50 and 52 being etched is protected by the patterned etch barrier layer, a conductive layer, the protective cover 60 and 52 by etching the patterned resist layer 50 and the conductive layer being etched part. 如此一来,导电层36、50便成为图案层,其包含焊垫56与路由线58但不包含盖体60。 Thus, the conductive layers 36, 50 becomes the pattern layer, comprising pads 56 and the line 58, but does not contain routing cover 60. 此外,路由线58为一铜导线,其接触介电层38并延伸于其上方,同时邻接且电性连接讯号凸柱24与焊垫56。 Further, the route is a copper wire cable 58 which contacts the dielectric layer 38 and extends thereabove, while adjacent to and electrically connected to signal pad 24 and the boss 56.

[0125] 蚀刻后的基座26包含基座26 (只剩其中央部分)及端子62。 [0125] After the etching of the base 26 includes a base 26 (only the central portion) and the terminal 62. 基座26是原基座26受图案化的蚀刻阻层54保护而未被蚀刻的部分,其沿侧向延伸且于侧面方向超出导热凸柱22之外1000微米。 26 base 26 is protected from being etched portion 54 by the patterned etch resist layer of the original base, and which extend laterally beyond the lateral direction in addition to the thermally conductive studs 221 000 microns. 端子62是原基座26受图案化的蚀刻阻层54保护而未被蚀刻的部分,其邻接讯号凸柱24,延伸于讯号凸柱24下方,且自讯号凸柱24侧向延伸而出,同时接触黏着层28并延伸于黏着层28下方。 62 is a terminal portion 26 and 54 being etched is protected by the patterned etch resist layer of the original base, which signal abutment studs 24, extends below the signal boss 24 and boss 24 extending laterally out from the signal, while contacting the adhesive layer on the adhesive layer 28 and the bottom 28 extends. 基座26仍为一无图案层,但在基座26周缘之外则形成一包含端子62且与基座26保持侧向间距的图案层。 A base 26 remains unpatterned layer, but outside of the peripheral edge 26 of the base 62 and maintain lateral spacing of the base 26 comprises a terminal pattern layer is formed. 因此,端子62与基座26是彼此分离,且端子62已非基座26的一部分。 Thus, the terminal 62 and the base 26 are separated from each other, a portion of the base 26 and the terminal 62 is non. 此外,讯号凸柱24邻接路由线58与端子62并在路由线58与端子62间形成电性连接。 In addition, the signal line 24 adjacent to the routing boss 58 and the terminal 62 and form an electrical connection between the routing line 58 and the terminal 62.

[0126] 讯号凸柱24、焊垫56、路由线58及端子62共同形成导线64。 [0126] Signal boss 24, pads 56, 58 and routing line terminal 62 together form a wire 64. 讯号凸柱24及路由线58是焊垫56与端子62间的一导电路径。 Routing the signal line 24 and the boss 58 is a conductive path between the pads 56 and the terminal 62. 导线64提供从焊垫56至端子62的垂直(由上至下)路由。 Lead 64 is provided from pad 56 to the terminal 62 of the vertical (top to bottom) route. 导线64并不限于这一构型。 The wire 64 is not limited to this configuration. 举例而言,上述导电路径可包含贯穿介电层38的导电孔、额外的路由线(其位于介电层38的上方及/或下方)及被动器件(如设置于其他焊垫上的电阻与电容)。 For example, the conductive path may include a conductive via through the dielectric layer 38, additional routing line (located above the dielectric layer 38 and / or downward) and passive devices (e.g., bonding pad disposed at the other resistor and capacitor ).

[0127] 散热座66包含导热凸柱22、基座26及盖体60。 [0127] 66 comprises a thermally conductive heat sink studs 22, base 26 and cover 60. 导热凸柱22与基座26是一体成形。 Thermally conductive boss 22 and base 26 are integrally molded. 盖体60位于导热凸柱22的顶部上方,邻接导热凸柱22的顶部,同时从上方覆盖导热凸柱22的顶部,并由导热凸柱22的顶部往侧向延伸。 The cover 60 is positioned above the top of the heat conductive stud 22 which is adjacent the top of the thermally conductive boss 22 while covering the top of the heat conductive stud 22 from above, by the top of the thermally conductive stud 22 to extend laterally. 设置盖体60后,导热凸柱22是坐落于盖体60圆周内的中央区域。 After setting the cover body 60, the thermally conductive stud 22 is located in the central region 60 within the circumference of the lid. 盖体60也接触并从上方覆盖其下方黏着层28的一部分,黏着层28的该部分是与导热凸柱22共平面,邻接导热凸柱22,且侧向包围导热凸柱22。 And also contacts cover 60 covers from above a portion of the adhesive layer 28 thereunder, the portion of adhesive layer 28 is coplanar with the thermally conductive boss 22, adjacent to the thermally conductive boss 22 and the boss 22 laterally surrounds the thermally conductive.

[0128] 散热座66实质上为一倒T形的散热块,其包含柱部(导热凸柱22)、翼部(基座26自柱部侧向延伸的部分)以及一导热垫(盖体60)。 [0128] heat sink 66 is substantially an inverted T-shaped block of heat, comprising a column portion (heat conductive stud 22), the wing portion (the base portion 26 extends laterally from the column) and a thermal pad (lid 60).

[0129] 图24的结构体在黏着层28、介电层38、导电层50及盖体60上设有防焊绿漆68,并且在基座26、黏着层28及端子62上设有防焊绿漆70。 Structure [0129] FIG. 24 is adhesive layer 28, a dielectric layer 38, solder mask 68 is provided on the conductive layer 50 and the cover 60, and base 26, adhesive layer 28 is provided on the prevention and the terminal 62 70 solder masking.

[0130] 防焊绿漆68为一电性绝缘层,其可依我们的选择形成图案以曝露焊垫56与盖体60,并从上方覆盖路由线58、黏着层28的外露部分及介电层38的外露部分。 [0130] solder mask 68 is an electrical insulating layer, which is patterned to follow we choose to expose the pad 56 and the lid 60, and cover 58 from above the routing line, exposed portions of the adhesive layer 28 and dielectric exposed portions of layer 38. 防焊绿漆68在焊垫56与盖体60上方的厚度为25微米,且防焊绿漆68在介电层38上方延伸55微米(30+25)。 Solder mask 68 above the thickness of the pad 56 and the cover 60 is 25 micrometers, and the solder mask 68 extends over the dielectric layer 38 is 55 microns (30 + 25).

[0131] 防焊绿漆70为一电性绝缘层,其可依我们的选择形成图案以曝露基座26与端子62,并从下方覆盖黏着层28的外露部分。 [0131] solder mask 70 is an electrical insulating layer, which is patterned to follow we choose to expose the base 26 of the terminal 62, and the lower cover from the exposed portions of the adhesive layer 28. 防焊绿漆70在基座26与端子62下方的厚度为25微米,且防焊绿漆70在黏着层28下方延伸55微米(30+25)。 Solder mask 70 with a thickness of 26 below the terminal base 62 is 25 m, and the solder mask 70 in the adhesive layer extends below 2855 m (30 + 25).

[0132] 防焊绿漆68、70起初为涂布于结构体上的一光显像型液态树脂。 [0132] At first solder mask 68 is applied to an optical imaging type liquid resin on the structure. 之后再于防焊绿漆68、70上形成图案,其作法是令光线选择性通过光罩(图未示),使受光的部分防焊绿漆变为不可溶解,然后利用一显影溶液去除未受光且仍可溶解的部分防焊绿漆,最后再进行硬烤,以上步骤乃现有技艺。 After the pattern is further formed on the solder mask 68 which makes light practice by selective photomask (not shown), solder mask so that part of the light becomes insoluble, and then removed using a developing solution is not solder mask and light receiving portion is still dissolved, and finally a hard bake, the prior art is the above steps.

[0133] 图25所示结构体的基座26、焊垫56、盖体60与端子62上设有被覆接点72。 [0133] The base 26 of the structure shown in FIG. 25, the pad 56 is provided on the covering member 60 contacts the cover 72 and the terminal 62.

[0134] 被覆接点72为一多层金属镀层,其接触基座26与端子62并从下方覆盖其外露的部分,同时接触焊垫56与盖体60并从上方覆盖其外露的部分。 [0134] 72 is a multi-layer coating the contact metal plating, which is in contact with the terminal base 26 from the cover 62 and the bottom portion thereof exposed, while the contact pads 60 and 56 and the lid portion thereof exposed from the top cover. 例如,一镍层是以无电镀被覆的方式设于基座26、焊垫56、盖体60与端子62上,而后再将一金层以无电镀被覆的方式设于该镍层上,其中内部镍层厚约3微米,表面金层厚约O. 5微米,所以被覆接点72的厚度约为3. 5微米。 For example, an electroless nickel layer is provided in a manner covering the base 26, the pad 56, the cover member 60 and the terminal 62, then a layer of gold and then coated in an electroless manner on the nickel layer provided, wherein internal layer thickness of about 3 microns of nickel, the gold surface layer thickness of about 5 microns O., the thickness of the coating 72 contacts about 3.5 microns.

[0135] 以被覆接点72作为基座26、焊垫56、盖体60与端子62的表面处理具有几项优点。 [0135] In the contact cover 72 as the base 26, the pad 56, the cover 60 and the terminal 62 of the surface treatment has several advantages. 内部镍层提供主要的机械性与电性连接及/或热连接,而表面金层则提供一可湿性表面以利焊料回焊。 The main internal nickel layer to provide mechanical and electrical connection and / or thermally connected, and the surface of the gold layer provides a wettable surface to facilitate solder reflow. 被覆接点72也保护基座26、焊垫56、盖体60与端子62不受腐蚀。 Protective coating 72 contacts the base 26, the pad 56, the cover 60 and the terminal 62 from corrosion. 被覆接点72可包含各种金属以符合外部连接媒介的需要。 Covering the metal contacts 72 may comprise various media to meet the needs of the external connections. 例如,一被覆在镍层上的银层可搭配焊锡或打线。 For example, a silver coating layer on the nickel layer can be used with solder or wire.

[0136] 为便于说明,设有被覆接点72的基座26、焊垫56、盖体60与端子62均以单一层体方式显示。 [0136] For convenience of explanation, the contact with the coating 72 of the base 26, the pad 56, the cover 60 and the terminal 62 are displayed a single layer of material. 被覆接点72与基座26、焊垫56、盖体60及端子62间的界线(图未示)为铜 The contact base 26 and cover 72, pad 56, and the terminal 60 of the boundary between the lid 62 (not shown) of copper

/镍界面。 / Nickel interface.

[0137] 至此完成导热板74的制作。 [0137] This completes the production of the thermally conductive plate 74.

[0138] 图26、27及图28分别为导热板74的剖面图、俯视图及仰视图,图中导热板74的边缘已沿切割线而与支撑架及/或同批生产的相邻导热板分离。 [0138] FIGS. 26, 27 and 28 are cross-sectional view showing a heat transfer plate 74, a top view and a bottom view, FIG heat conducting plate 74 has an edge along the cutting line with the support frame and / or the same batch adjacent heat conducting plate separation.

[0139] 导热板74包含黏着层28、基板34、导线64、散热座66及防焊绿漆68、70。 [0139] 74 thermal conduction plate comprising an adhesive layer 28, substrate 34, wires 64, the heat sink 66 and solder mask 68, 70. 基板34包含介电层38。 34 comprises a dielectric substrate layer 38. 导线64包含讯号凸柱24、焊垫56、路由线58及端子62。 Signal wire 64 includes boss 24, pads 56, 58 and routing line terminal 62. 散热座66包含导热凸柱22、基座26及盖体60。 66 comprises a thermally conductive heat sink studs 22, base 26 and cover 60.

[0140] 导热凸柱22延伸贯穿开口30并进入通孔40后,仍位于开口30与通孔40内的中央位置。 [0140] thermally conductive stud 22 extending through opening 30 and into the through hole 40, still in a central position within the opening 30 of the through hole 40. 导热凸柱22的顶部是与黏着层28位于介电层38上方的一相邻部分共平面,而导热凸柱22的底部则与黏着层28其接触基座26的一相邻部分共平面。 The top of the heat conductive stud 22 and the adhesive layer 28 is positioned adjacent a portion of the dielectric layer 38 above the common plane, while the bottom heat conductive stud 22 and the adhesive layer is in contact with an adjacent portion 28 which is coplanar with base 26. 导热凸柱22保持平顶锥柱形,其渐缩侧壁使其直径自基座26朝导热凸柱22邻接盖体60的平坦圆顶向上递减。 Thermally conductive boss 22 holding flat-topped cylindrical cone, which tapers in diameter from the base 26 so that the side walls flat dome cover toward the body 60 adjacent to the thermally conductive stud 22 decreasing upwards.

[0141] 讯号凸柱24延伸贯穿开口32并进入通孔42后,仍位于开口32与通孔42内的中央位置。 After the [0141] signal bosses 24 extend through openings 32 and into the through-hole 42, still in a central position within the opening 32 of the through hole 42. 讯号凸柱24的顶部是与黏着层28位于介电层38上方的一相邻部分共平面,而讯号凸柱24的底部则与黏着层28其接触端子62的一相邻部分共平面。 Signal top stud 24 and the adhesive layer 28 is positioned adjacent a portion of the dielectric layer 38 coplanar with the top and the bottom signal is the stud 24 and the adhesive layer is adjacent to a portion 28 coplanar contact terminal 62. 讯号凸柱24保持平顶锥柱形,其渐缩侧壁使其直径自端子62朝讯号凸柱24邻接路由线58的平坦圆顶向上递减。 Signal boss 24 holding flat-topped cylindrical cone, which tapers from the diameter of the sidewall so that the signal terminal 62 toward the projections 24 adjacent to the column line route flat dome 58 upwardly decreasing.

[0142] 基座26从下方覆盖导热凸柱22与盖体60,且与导热板74的外围边缘保持距尚。 [0142] thermal conductivity of the base cover 26 from below boss 22 and the cover member 60, and held with the peripheral edge of the heat conducting plate 74 away from the still.

[0143] 盖体60位于导热凸柱22上方,与之邻接并为热连接。 [0143] the cover 60 is positioned above the thermally conductive studs 22, and adjacent thereto is thermally connected. 盖体60同时从上方覆盖导热凸柱22的顶部,并自导热凸柱22顶部沿侧向延伸。 While the cover member 60 covering from above the top of the heat conductive studs 22 and 22 extending from the top lateral heat conducting boss. 盖体60也从上方接触并覆盖黏着层28的一部分,黏着层28的该部分是邻接导热凸柱22,与导热凸柱22共平面,且侧向环绕导热凸柱22。 Lid 60 also contacts and covers a portion of the adhesive layer 28 from above, the adhesive layer 28 is adjacent to the portion of the thermally conductive bosses 22, 22 with a thermally conductive studs coplanar, and laterally surrounding the thermally conductive boss 22. 盖体60也与焊垫56共平面。 Cover 60 and the pad 56 are also coplanar.

[0144] 黏着层28是设置于基座26上并于其上方延伸。 [0144] The adhesive layer 28 is disposed on the base 26 and extends thereabove. 黏着层28在缺口44内接触且介于导热凸柱22与介电层38间,并填满导热凸柱22与介电层38间的空间。 Adhesive layer 28 in contact with the notch 44 and the stud 22 and interposed thermally conductive dielectric layer 38, and fills the boss 22 and the thermally conductive space 38 between the dielectric layer. 黏着层28在缺口46内接触且介于讯号凸柱24与介电层38间,并填满讯号凸柱24与介电层38间的空间。 Adhesive layer 28 in contact with the notch 46 and the stud 24 between the signal 38 and the dielectric layer and the dielectric layer 24 fills the space between the boss 38 signal. 黏着层28在缺口44、46外则接触且介于基座26与介电层38间,并填满基座26与介电层38间的空间。 The adhesive layer 28 in contact with the outer notch 44, 46 and 26 interposed between the base and the dielectric layer 38 and fills the space 38 between the base 26 and the dielectric layer. 黏着层28是从导热凸柱22侧向延伸并越过端子62,重叠于端子62,并从上方覆盖基座26位于导热凸柱22周缘外的一部分,同时沿侧面方向覆盖且环绕导热凸柱22与讯号凸柱24。 The adhesive layer 28 extends laterally from a thermally conductive boss 22 and over terminal 62, the terminal 62 overlaps and covers the base 26 from the top portion located outside the peripheral edge of the thermally conductive boss 22 while covering the side surfaces in the direction of the thermally conductive boss 22 and surrounds and signal boss 24. 黏着层28也填满基板34与散热座66间的绝大部分空间。 The adhesive layer 28 also fills the majority of the substrate 34 and the space 66 between the heat sink. 此时黏着层28已固化。 At this time, the adhesive layer 28 is cured.

[0145] 基板34是设置于黏着层28上并与之接触。 [0145] substrate 34 is disposed on the adhesive layer 28 and in contact therewith. 此外,基板34延伸于其下方黏着层28的上方,且延伸于基座26上方。 The substrate 34 extends over the bottom thereof the adhesive layer 28, and extends above the base 26. 导电层36 (以及焊垫56与路由线58)接触介电层38并延伸于其上方,而介电层38则接触且介于黏着层28与导电层36间。 Conductive layer 36 (pads 56 and 58 and routing line) contact with the dielectric layer 38 and extends thereabove, and the dielectric layer 38 interposed between and in contact with the adhesive layer 36 and the conductive layer 28.

[0146] 导热凸柱22与讯号凸柱24具有相同厚度且彼此共平面。 [0146] thermally conductive boss 22 and signal boss 24 having the same thickness and coplanar with each other. 基座26与端子62具有相同厚度且彼此共平面。 Base 26 of the terminal 62 having the same thickness and coplanar with each other. 此外,导热凸柱22、讯号凸柱24的顶部及底部均与黏着层28共平面。 Further, heat conductive studs 22, the top and bottom signals stud 24 and the adhesive layer 28 are coplanar.

[0147] 导热凸柱22、讯号凸柱24、基座26、盖体60及端子62均与基板34保持距离。 [0147] 22 thermal conductive stud, the stud signal 24, base 26, cover 60 and the terminal 62 and the substrate 34 are kept a distance. 因此,基板34与散热座66是机械性连接且彼此电性隔离。 Thus, the substrate 34 and heat sink 66 are mechanically connected to each other and electrically isolated.

[0148] 同批制作的导热板74经裁切后,其黏着层28、介电层38及防焊绿漆68、70均延伸至裁切而成的垂直边缘。 [0148] After cutting the same batch fabricated thermally conductive plate 74, which adhesive layer 28, the dielectric layer 38 and the solder mask 68, 70 extends perpendicular to the cutting edges formed.

[0149] 焊垫56是一专为LED封装体或半导体芯片等半导体器件量身订做的电性界面,该半导体器件将于后续制程中设置于盖体60上。 [0149] Pad 56 is a specially tailored interface for electrical LED package or a semiconductor device such as a semiconductor chip, the semiconductor device in the subsequent processes will be provided on the cover member 60. 端子62是一专为下一层组体(例如来自一印刷电路板的可焊接线)量身订做的电性界面。 Terminal 62 is designed for a lower layer group (e.g. from a printed circuit board may be welded line) tailored electrical interface. 盖体60是一专为该半导体器件量身订做的热界面。 Cover 60 is a thermal interface specifically tailored for the semiconductor device. 基座26是一专为下一层组体(例如前述印刷电路板或一电子设备的散热装置)量身订做的热接口。 The base 26 is designed for a lower layer group (e.g. a heat sink for printed wiring board or an electronic device) tailored thermal interface. 此外,盖体60是经由导热凸柱22而热连接至基座26。 Further, the cover 60 is connected to the base 26 via the bosses 22 and the heat thermal conductivity.

[0150] 焊垫56与端子62在垂直方向上彼此错位,且分别外露于导热板74的顶面及底面,借此提供该半导体器件与下一层组体间的垂直路由。 [0150] 56 and the terminal pads 62 offset from each other in the vertical direction, and are exposed from the top and bottom thermal conduction plate 74, thereby providing a vertical route between the semiconductor device and the lower layer of the group thereof.

[0151] 焊垫56与盖体60两者的顶面于介电层38上方为共平面,而基座26与端子62两者的底面则于黏着层28下方为共平面。 Both the top surface 60 [0151] 56 and the cover pad over the dielectric layer 38 in coplanar, the bottom surface of the base 26 and both the terminal 62 to the adhesive layer 28 below the coplanar.

[0152] 为便于说明,导线64于剖面图中是绘示为一连续电路迹线。 [0152] For convenience of explanation, in the line 64 is a schematic cross-sectional view shown as a continuous circuit trace. 然而,导线64通常同时提供X与Y方向的水平讯号路由,也就是说焊垫56与端子62彼此在X与Y方向形成侧向错位,而路由线58则构成X与Y方向的路径。 However, the wire 64 is generally horizontal signal routing while providing X and Y directions, i.e. pads 56 and the terminal 62 is formed laterally offset from each other in the X and Y directions, and the line 58 constitute the routing path of the X and Y directions.

[0153] 散热座66可将随后设置于盖体60上的半导体器件所产生的热能扩散至导热板74所连接的下一层组体。 [0153] The heat sink 66 may be subsequently provided to the semiconductor device on the heat generated by the cover 60 to the lower diffusion layer of thermally conductive plate member group 74 is connected. 该半导体器件产生的热能流入盖体60,自盖体60进入导热凸柱22,并经由导热凸柱22进入基座26。 The heat generated in the semiconductor device flows into the lid 60, the lid 60 from the boss 22 into the heat conductive and heat conductive stud 22 into the base 26 via. 热能从基座26沿该向下方向散出,例如扩散至一下方散热装置。 Thermal energy radiated from the base 26 in the downward direction, for example, diffusion to an underlying heat sink.

[0154] 导热板74的导热凸柱22、讯号凸柱24与路由线58均未外露,其中导热凸柱22被盖体60覆盖,讯号凸柱24及路由线58是由防焊绿漆68覆盖,而黏着层28则同时由防焊绿漆68、70覆盖。 [0154] The heat conducting plate 74 thermally conductive studs 22, the stud 24 and the signal line 58 routes were not exposed, wherein the cover body 22 is covered with 60 heat conducting boss, boss 24 and the signal line 58 is routed by the solder mask 68 covering, while the adhesive layer 28 is covered by a solder mask 68, 70 simultaneously. 为便于说明,图27以虚线绘示导热凸柱22、讯号凸柱24、黏着层28与路由线58。 For convenience of explanation, shown by dashed lines in FIG. 27 to 22 heat conductive stud, the stud signal 24, adhesive layer 28 and routing line 58. · ·

[0155] 导热板74也包含其他导线64,这些导线64基本上是由讯号凸柱24、焊垫56、路由线58与端子62所构成。 [0155] 74 thermal conduction plate 64 may also comprise other wires, these wires 64 consisting essentially of the signal boss 24, pads 56, 58 and routing line terminal 62 constituted. 为便于说明,在此只说明并绘示单一导线64。 For purposes of illustration, and in this description only illustrates a single wire 64. 在导线64中,讯号凸柱24、焊垫56及端子62通常具有相同的形状及尺寸,而路由线58则通常采用不同的路由构型。 In the line 64, the signal boss 24, 56 and the terminal pads 62 generally have the same shape and size, and the routing lines 58 usually different routing configuration. 例如,部分导线64设有间距,彼此分离,且为电性隔离,而部分导线64则彼此交错或导向同一焊垫56、路由线58或端子62且彼此电性连接。 For example, the spacing portion of the wire 64 is provided, separated from each other, and are electrically isolated, and the portion of the wire guide 64 interleaved with each other or the same pad 56, routing lines or terminals 62 and 58 are electrically connected to each other. 同样地,部分焊垫56可用以接收独立讯号,而部分焊垫56则共享一讯号、电源或接地端。 Likewise, part of the pad 56 may be used to separate the received signal, and the shared part of the pad 56 a signal, power or ground terminal.

[0156] 导热板74可适用于具有蓝、绿及红色LED芯片的LED封装体,其中各LED芯片包含一阳极与一阴极,且各LED封装体包含对应的阳极端子与阴极端子。 [0156] applicable to a heat conductive plate 74 blue, green and red LED chips LED packages, wherein each LED chip includes an anode and a cathode, and each LED package comprising an anode terminal and the cathode terminal of the corresponding. 在此例中,导热板74可包含六个焊垫56与四个端子62,以便将每一阳极从一独立焊垫56导向一独立端子62,并将每一阴极从一独立焊垫56导向一共同的接地端子62。 In this embodiment, the heat conducting plate 74 may comprise six pads 56 and four terminals 62, each of the anode so as to separate from a guide pad 56 a separate terminal 62, and each of the cathode independent from the guide pad 56 a common ground terminal 62.

[0157] 在各制造阶段均可利用一简易清洁步骤去除外露金属上的氧化物与残留物,例如可对本案结构体施行一短暂的氧电浆清洁步骤。 [0157] In various stages of fabrication can be simplified by using a cleaning step to remove the oxide residue on the exposed metal, for example a short oxygen plasma cleaning step is performed on the case structure. 或者,可利用一过锰酸钾溶液对本案结构体进行一短暂的湿式化学清洁步骤。 Alternatively, using a solution of potassium permanganate case structure for a short wet chemical cleaning step. 同样地,也可利用蒸馏水淋洗本案结构体以去除污物。 Similarly, the case may be rinsed with distilled water to remove the soil structure. 此清洁步骤可清洁所需表面而不对结构体造成明显的影响或破坏。 This cleaning step may be cleaned without causing a significant effect on the structure or desired surface damage.

[0158] 本案的优点在于导线64形成后不需从中分离或分割出汇流点或相关电路系统。 [0158] the advantage that the case does not need the bus divided or separated therefrom or associated circuitry points after the wire 64 is formed. 汇流点可于形成焊垫56、路由线58、盖体60与端子62的湿式化学蚀刻步骤中分离。 Confluent point may be formed in the pad 56, the routing line 58, the cover 60 and the terminal 62 is separated from a wet chemical etching step.

[0159] 导热板74可包含钻透或切通黏着层28、基板34与防焊绿漆68、70而形成的对位孔(图未示)。 [0159] 74 may comprise a heat conducting plate or drill cutting through the adhesive layer 28, the substrate 34 with the alignment holes 68, 70 formed by solder mask (not shown). 如此一来,当导热板74需于后续制程中设置于一下方载体时,便可将工具接脚插入对位孔中,借以将导热板74定位。 Thus, when the required heat conducting plate 74 is provided in subsequent processes to a lower side of the carrier, the tool pin can be inserted into the alignment hole, whereby the heat conducting plate 74 is positioned.

[0160] 导热板74可略去盖体60。 [0160] 74 thermal conduction plate lid 60 may be omitted. 欲达这一目的,可调整图案化的蚀刻阻层52,使整个通孔40上方的导电层50均曝露于用以形成焊垫56及路由线58的化学蚀刻液中。 To achieve this object, the adjustable patterned etch resist layer 52, so that the entire through-hole 50 of the upper conductive layer 40 are exposed to pads 56 to form a line 58 and routed chemical etching solution. 略去盖体60的另一作法是不设导电层50。 Another approach is the cover body 60 does not omit the conductive layer 50.

[0161] 导热板74可容纳多个半导体器件而非只容纳单一半导体器件。 [0161] heat conducting plate 74 can not only accommodate a plurality of semiconductor devices accommodated single semiconductor device. 欲达这一目的,可调整图案化的蚀刻阻层16以定义更多导热凸柱22与讯号凸柱24,调整黏着层28以包含更多开口30、32,调整基板34以包含更多通孔40、42,调整图案化的蚀刻阻层52以定义更多焊垫56、路由线58与盖体60,并调整防焊绿漆68以包含更多开口。 To achieve this object, the adjustable patterned etch resist layer 16 to define a more heat conductive stud boss 22 and signal 24, to adjust the adhesive layer 28 to include more openings 30, 32 is adjusted through the substrate 34 to include more holes 40, 42 to adjust the patterned etch resist layer 52 to define more pads 56, 58 and the lid routing line 60, and adjust the solder mask 68 to contain more openings. 端子62以外的器件可改变侧向位置以便为四个半导体器件提供一2x2阵列。 The terminal device 62 other than the lateral position may be varied to provide a 2x2 array of four semiconductor devices. 此外,部分但非所有器件的剖面形状及高低(即侧面形状)也可有所调整。 In addition, some but not all cross-sectional shape and height of the device (i.e., the side surface shape) can be adjusted. 例如,焊垫56、盖体60与端子62可保持相同的侧面形状,而路由线58则具有不同的路由构型。 For example, the pad 56, the cover 60 and the terminal 62 side may remain the same shape, and the routing lines 58 having different routing configuration.

[0162] 图29、30及图31分别为本发明一实施例中一导热板76的剖面图、俯视图及仰视图,该导热板76在其黏着层28上设有一导线64。 [0162] Figures 29, 30 and 31 respectively present a cross-sectional view of the embodiment of a heat-conducting plate 76 of the invention, a top view and a bottom view of the heat conducting plate 76 is provided with a wire 64 on which the adhesive layer 28.

[0163] 本实施例省略介电层38,且导线64是与黏着层28接触。 Contact wires 64 and the adhesive layer 28 [0163] embodiment of the present embodiment will be omitted dielectric layer 38, and. 为求简明,凡导热板74的相关说明适用于此实施例者均并入此处,相同的说明不予重复。 For the sake of simplicity, all instructions thermally conductive plate 74 for this embodiment is incorporated herein caught embodiment, the same description will not be repeated. 同样地,本实施例导热板76的器件与导热板74的器件相仿者,均采用对应的参考标号。 Similarly, the thermally conductive plate device embodiment 76 and the heat conducting plate 74 by a device similar to the present embodiment, corresponding reference numerals are used.

[0164] 导热板76包含黏着层28、导线64、散热座66与防焊绿漆68、70。 [0164] thermally conductive adhesive layer 28 comprising a plate 76, the wire 64, the heat sink 66 and the solder mask 68, 70. 导线64包含讯号凸柱24、焊垫56、路由线58与端子62。 Signal wire 64 includes boss 24, pads 56, 58 and routing line terminal 62. 散热座66包含导热凸柱22、基座26与盖体60。 66 comprises a thermally conductive heat sink studs 22, base 26 and cover 60.

[0165] 本实施例的导电层36较前一实施例要厚。 A conductive layer [0165] 36 of the present embodiment over the previous embodiment is thicker. 例如,导电层36的厚度由前一实施例中的30微米增为130微米,如此一来,导电层36便不至于在搬动时弯曲晃动。 For example, the thickness of the conductive layer 36 from the previous embodiment is 30 microns by 130 microns, thus, they will not bend conductive layer 36 when moving shaking. 焊垫56与路由线58的厚度也因此增加,且焊垫56与路由线58均接触并重叠于黏着层28。 Pads 56 and 58 of the routing line thereby increasing the thickness, and the pad 56 and the routing lines 58 are in contact and overlap with the adhesive layer 28. 导热板76并无对应于介电层38的介电层。 Thermal conduction plate 76 does not correspond to the dielectric layer of the dielectric layer 38.

[0166] 导热板76的制作方式与导热板74类似,但必须针对导热凸柱22、讯号凸柱24与导电层36而进行适当调整。 [0166] Production Method heat conducting plate 76 and the heat transfer plate 74 is similar to, but have 22, boss 24 and the signal conductive layer 36 be appropriately adjusted for the thermally conductive boss. 例如将金属板10的厚度由330微米改为280微米,以使导热凸柱22、讯号凸柱24的高度由300微米降为250微米。 The thickness of the metal plate, for example, 10 to 280 microns by 330 microns, so that the heat conductive studs 22, the stud height signal 24 by 300 micrometers down to 250 micrometers. 缩短蚀刻时间即可达成这一目的。 Shorten the etching time to achieve this purpose. 然后依前文所述的方式,将黏着层28设置于基座26上,再将导电层36单独设置于黏着层28上;对黏着层28加热及加压,使黏着层28流动并固化;接着以研磨方式使结构体的顶面成为平面,再将导电层50沉积于该顶面。 Then according to the foregoing embodiment, the adhesive layer 28 is disposed on the base 26, and then the conductive layer 36 is provided on a separate adhesive layer 28; 28 of the adhesive layer is heated and pressurized, so that the adhesive layer 28 to flow and solidify; then in that the top surface of the grinding method in a flat structure, the conductive layer 50 is then deposited on the top surface. 然后蚀刻导电层36、50以形成焊垫56与路由线58,蚀刻导电层50以形成盖体60,蚀刻基座26以形成端子62,再将防焊绿漆68设置于该顶面以选择性曝露焊垫56与盖体60,并将防焊绿漆70设置于结构体的底面以选择性曝露基座26与端子62,最后再以被覆接点72针对基座26、焊垫56、盖体60与端子62而进行表面处理。 36, 50 is then etched to form a conductive layer pad 56 and the routing line 58, conductive layer 50 is etched to form the cover 60, base 26 is etched to form the terminal 62, and then solder mask disposed on the top surface 68 to select exposure of the pad 56 and the lid 60, and the solder mask 70 is provided on the bottom surface to selectively expose the structure of the base 26 and the terminal 62, and finally to the base 26 for covering the contacts 72, the pad 56, cover 60 and the terminal 62 and the surface treatment.

[0167] 图32、33及图34分别为本发明一实施例中一半导体芯片组体100的剖面图、俯视图及仰视图,该半导体芯片组体100包含一导热板74及一具有背面接点的LED封装体102。 [0167] FIGS. 32, 33 and 34 respectively present a cross-sectional view of a semiconductor chip set 100 according to an embodiment of the invention, a top view and a bottom view of a semiconductor chip 100 comprises a set of contacts 74 and a back plate having a heat conducting LED package 102.

[0168] 半导体芯片组体100包含导热板74、LED封装体102及焊锡104、106。 [0168] The semiconductor chip 100 comprises a set of heat conducting plate 74, LED package 102 and the solder 104. LED封装体102包含LED芯片108、基座110、打线112、电接点114、热接点116与透明封装材料118。 LED package 102 includes an LED chip 108, base 110, wire 112, electrical contacts 114, 116 and the hot junction transparent encapsulating material 118. LED芯片108的一电极(图未示)是经由打线112电性连接至基座110中的一导电孔(图未示),借以将LED芯片108电性连接至电接点114。 LED chip 108 is an electrode (not shown) is electrically connected via a wire 112 to a conductive via (not shown) in the base 110, whereby the LED chip 108 is electrically connected to the electrical contacts 114. LED芯片108是通过一固晶材料(图未示)设置于基座110上,使LED芯片108热连接且机械性黏附于基座110,借此将LED芯片108热连接至热接点116。 LED chips 108 by a die bonding material (not shown) provided on the base 110, so that LED chip 108 is connected thermally and mechanically adhered to the base 110, thereby connecting the LED chip 108 to heat the hot junction 116. 基座110为一具有低导电性及高导热性的陶瓷块,电接点114、热接点116是被覆于基座110背部并自基座110背部向下突伸。 A base 110 having a low electrical conductivity and high thermal conductivity of the ceramic block, electrical contacts 114, 116 is coated with the hot junction to the base 110 and the back of the back from the base 110 projecting downward.

[0169] LED封装体102是设置于基板34与散热座66上,电性连接至基板34,并热连接至散热座66。 [0169] LED package 102 is disposed on the substrate 34 and the heat sink 66, is electrically connected to the substrate 34, and thermally connected to the heat sink 66. 详而言之,LED封装体102是设置于焊垫56与盖体60上,重叠于导热凸柱22,且经由焊锡104电性连接至基板34,并经由焊锡106热连接至散热座66。 Specifically speaking, LED package 102 is disposed on the upper pad 56 and the cover member 60, boss 22 overlaps the thermally conductive, and is connected to the substrate 34 via the solder 104 electrically, and is connected to the heat sink 66 through the solder 106 heat. 例如,焊锡104接触且位于焊垫56与电接点114之间,同时电性连接且机械性黏合焊垫56与电接点114,借此将LED芯片108电性连接至端子62。 For example, the contact 104 and between the solder 56 and the electrical contact pad 114, while being electrically and mechanically connected to bonding pad 56 and the electrical contacts 114, whereby the LED chip 108 is electrically connected to the terminal 62. 同样地,焊锡106接触且位于盖体60与热接点116之间,同时热连接且机械性黏合盖体60与热接点116,借此将LED芯片108热连接至基座26。 Similarly, the solder 106 in contact with and positioned between the cover 60 and the hot junctions 116, while the body 60 and is thermally connected with the hot junction 116 mechanical bonding cap, thereby connecting the chip LED 108 to heat the base 26. 焊垫56上设有镍/金的被覆金属接垫以利与焊锡104稳固结合,且焊垫56的形状及尺寸均配合电接点114,借此改善自基板34至LED封装体102的讯号传导。 With nickel / gold coated on a metal pad 56 and the solder pads 104 to facilitate stable binding, and the shape and size of the pad 56 are mating electrical contacts 114, thereby improving the signal transduction from the substrate 34 to the LED package 102 . 同样地,盖体60上设有镍/金的被覆金属接垫以利与焊锡106稳固结合,且盖体60的形状及尺寸均配合热接点116,借此改善自LED封装体102至散热座66的热传递。 Likewise, with a nickel / gold coated metal cover body 60 and the solder pads 106 to facilitate stable binding, and the shape and size of lid 60 are mating hot junctions 116, thereby improving package from the LED 102 to the heat sink 66 heat transfer. 至于导热凸柱22的形状及尺寸则并未且也不需配合热接点116而设计。 As for the shape and size of the heat conductive stud 22 is not complex and also the hot junction 116 need not designed.

[0170] 透明封装材料118为一固态电性绝缘保护性塑料包覆体,其可为LED芯片108及打线112提供诸如抗潮湿及防微粒等环境保护。 [0170] a transparent encapsulating material 118 is a solid electrically insulating protective plastic wrap, which may provide such fine particles moisture-resistant and anti-environmental protection of the LED chip 108 and wire 112. LED芯片108与打线112是埋设于透明封装材料118中。 LED chip 108 and the wire 112 is embedded in the transparent encapsulating material 118.

[0171] 若欲制造半导体芯片组体100,可将一焊料沉积于焊垫56及盖体60上,然后将接点114与116分别放置于焊垫56及盖体60上方的焊料上,继而使该焊料回焊以形成接着的焊锡104、106。 [0171] Ruoyu producing a semiconductor chip set 100, a solder may be deposited on the pad 56 and the cover 60, and the contacts 114 and 116 are placed on the solder pads 56 and the cover member 60 upward, in turn, causes the solder is then reflowed to form the solder 104.

[0172] 例如,先以网版印刷的方式将锡膏选择性印刷于焊垫56及盖体60上,而后利用一抓取头与一自动化图案辨识系统以步进重复的方式将LED封装体102放置于导热板74上。 [0172] For example, the first screen printing paste selective manner on the printed pads 56 and the cover member 60, then by means of a gripping head with an automated pattern recognition system to a step and repeat manner LED package 102 is placed on the heat conducting plate 74. 回焊机的抓取头将电接点114、热接点116分别放置于焊垫56及盖体60上方的锡膏上。 Gripping the welding head back electrical contacts 114, 116 are placed in a hot junction on the solder pads 56 and the cover member 60 upward. 接着加热锡膏,使其以相对较低的温度(如190°C)回焊,然后移除热源,静待锡膏冷却并固化以形成硬化焊锡104、106。 Solder paste is then heated, so that at a relatively low temperature (e.g. 190 ° C) solder reflow, and then remove the heat source, wait solder to cool and solidify to form a hardened solder 104. 或者,可于焊垫56与盖体60上放置锡球,然后将电接点114、热接点116分别放置于焊垫56与盖体60上方的锡球上,接着加热锡球使其回焊以形成接着的焊锡104、106。 Alternatively, the pad 56 in the cover body 60 is placed with the solder balls, and the electrical contacts 114, 116 are placed on the hot junction 56 and the pad cover body 60 above the solder balls, followed by heating the solder balls so as to reflow solder 104 is then formed.

[0173] 焊料起初可经由被覆或印刷或布置技术沉积于导热板74或LED封装体102上,使其位于导热板74与LED封装体102间,并使其回焊。 [0173] At first the solder may be deposited by coating or printing techniques or disposed on the thermally conductive plate 74 or the LED package 102, the thermally conductive plate 74 to be located with the LED package 102, and allowed to reflow. 焊料也可置于端子62上以供下一层组体使用。 Solder may also be placed on the terminal 62 for use the next layer group thereof. 此外,可利用一导电黏着剂(例如填充银的环氧树脂)或其他连接媒介取代焊料,且焊垫56、盖体60与端子62上的连接媒介不必相同。 Further, by using a conductive adhesive (e.g., silver filled epoxy) substituted solder or other connection media, and the pad 56, the connecting medium 60 and the terminal cover 62 need not be identical.

[0174] 该半导体芯片组体100为一第二级单晶模块。 [0174] The semiconductor chip 100 is set to a second stage crystal module.

[0175] 图35、36与图37分别为本发明一实施例中一半导体芯片组体200的剖面图、俯视图及仰视图,其中该半导体芯片组体200包含一导热板74及一具有侧引脚的LED封装体202。 [0175] FIGS. 35, 36 and 37, respectively, is a sectional view of a semiconductor chip set 200 in an embodiment according to the invention, a top view and a bottom view, wherein the semiconductor chip 200 comprises a set of heat conducting plate 74 and a side lead having LED package 202 feet.

[0176] 在此实施例中,该LED封装体202具有侧引脚而不具有背面接点。 [0176] In this embodiment, the LED package 202 having a pin without having the back side contacts. 为求简明,凡半导体芯片组体100的相关说明适用于此实施例者均并入此处,相同的说明不予重复。 For the sake of simplicity, the instructions 100 of all of the semiconductor body suitable for this embodiment chipset incorporated herein caught embodiment, the same description will not be repeated. 同样地,本实施例组体的器件与组体100的器件相仿者,均采用对应的参考标号,但其编码的基数由100改为200。 Similarly, the group member devices of the present embodiment and the embodiment is similar to the device 100 of the player group, corresponding reference numerals are used, but encoded by the base 100 to 200. 例如,LED芯片208对应于LED芯片108,而基座210则对应于基座110,以此类推。 For example, the LED chip 208 corresponding to the LED chip 108 and the base 210 corresponds to the base 110, and so on.

[0177] 半导体芯片组体200包含导热板74、LED封装体202与焊锡204、206。 [0177] The semiconductor chip 200 comprises a set of heat conducting plate 74, LED package 202 and the solder 204. LED封装体202包含LED芯片208、基座210、打线212、引脚214与透明封装材料218。 The LED package 202 includes an LED chip 208, a base 210, a line 212, pin 214 and the transparent encapsulant 218. LED芯片208是经由打线212电性连接至引脚214。 LED chip 208 is connected to pin 214 via a wire 212 electrically. 基座210背面包含热接触表面216,此外,基座210是窄于基座110且与热接点116具有相同的侧向尺寸及形状。 Back of the base 210 comprises a thermal contact surface 216, moreover, it is narrower than the base 210 and the base 110 and the hot junction 116 has the same shape and lateral dimensions. LED芯片208是经由一固晶材料(图未示)设置于基座210上,使LED芯片208热连接且机械性黏附于基座210,借此将LED芯片208热连接至热接触表面216。 LED chip 208 via a die bonding material (not shown) provided on the base 210, the LED chip 208 is connected thermally and mechanically adhered to the base 210, whereby the LED chip 208 is connected to the hot thermal contact surface 216. 引脚214自基座210往侧向延伸,而热接触表面216则面朝下。 210 to the pin 214 extends laterally from the base, and the thermal contact surface 216 facing down.

[0178] LED封装体202是设置于基板34与散热座66上,电性连接至基板34,且热连接至散热座66。 [0178] LED package 202 is disposed on the substrate 34 and the heat sink 66, is electrically connected to the substrate 34, and thermally coupled to the heat sink 66. 详而言之,LED封装体202是设置于焊垫56与盖体60上,重叠于导热凸柱22,且经由焊锡204电性连接至基板34,并经由焊锡206热连接至散热座66。 Specifically speaking, LED package 202 is disposed on the upper pad 56 and the cover member 60, boss 22 overlaps the thermally conductive, and is connected to the substrate 34 via the solder 204 electrically, and is connected to the heat sink 66 through the solder 206 heat. 例如,焊锡204接触且位于焊垫56与引脚214之间,同时电性连接且机械性黏合焊垫56与引脚214,借此将LED芯片208电性连接至端子62。 For example, the solder 204 in contact with and positioned between the pin 56 and the pad 214, while being electrically and mechanically connected to bonding pad 56 and pin 214, whereby the LED chip 208 is electrically connected to the terminal 62. 同样地,焊锡206接触且位于盖体60与热接触表面216之间,同时热连接且机械性黏合盖体60与热接触表面216,借此将LED芯片208热连接至基座26。 Similarly, the solder 206 in contact with and between the body 216 and the thermal contact surface 60 of the lid, while the body 60 and is thermally connected to the thermal contact surface 216 mechanically bonding the cover, whereby the LED chip 208 is connected thermally to the base 26.

[0179] 若欲制造半导体芯片组体200,可将一焊料置于焊垫56与盖体60上,然后分别在焊垫56与盖体60上方的焊料上放置引脚214与热接触表面216,继而使该焊料回焊以形成接着的焊锡204、206。 [0179] Ruoyu producing a semiconductor chip set 200, a solder pad 56 may be placed with the cover body 60, respectively, and then the pin 214 and the pads are placed in thermal contact surface 216 on the solder 60 and the cover 56 over the , so that the solder is then reflowed to form the solder 204, 206 next.

[0180] 该半导体芯片组体200为一第二级单晶模块。 [0180] The semiconductor chip 200 is set as a second stage crystal module.

[0181] 图38、39及图40分别为本发明一实施例中一半导体芯片组体300的剖面图、俯视图及仰视图,其中该半导体芯片组体300包含一导热板74及一半导体芯片302。 [0181] FIGS. 38, 39 and 40 respectively present a cross-sectional view of a semiconductor chip embodiment of a set 300 of the invention, a top view and a bottom view, wherein the semiconductor chip 300 comprises a set of heat conducting plate 74 and a semiconductor chip 302 . [0182] 在此实施例中,该半导体器件为一芯片而非一封装体,且该芯片302是设置于前述散热座66而非前述基板34上。 [0182] In this embodiment, the semiconductor device is a chip instead of a package, and the chip 302 is disposed on the heat sink 66 instead of the substrate holder 34. 此外,该芯片302是重叠于前述导热凸柱22而非前述基板34,且该芯片302是经由一打线304电性连接至前述焊垫56,并利用一固晶材料306热连接至前述盖体60。 In addition, the chip 302 is superposed on the heat conductive studs 22 instead of the substrate 34, and the chip 302 is connected to the pad 56 via a wire 304 electrically, using a die attach material 306 is thermally connected to the lid 60.

[0183] 半导体芯片组体300包含导热板74、芯片302、打线304、固晶材料306及封装材料308。 [0183] The semiconductor chip 300 comprises a set of heat conducting plate 74, chip 302, wire 304, die attach material 306 and packaging material 308. 芯片302包含顶面310、底面312与打线接垫314。 Chip 302 includes a top surface 310, bottom surface 312 and the wire bonding pad 314. 顶面310为活性表面且包含打线接垫314,而底面312则为热接触表面。 310 is a top surface of the active surface and comprising wire bonding pad 314, the bottom surface 312 compared to the thermal contact surface.

[0184] 芯片302是设置于散热座66上,电性连接至基板34,且热连接至散热座66。 [0184] chip 302 is disposed on the heat sink 66, is electrically connected to the substrate 34, and thermally coupled to the heat sink 66. 详而言之,芯片302是设置于盖体60上,位于盖体60的周缘内,重叠于导热凸柱22但未重叠于基板34。 Specifically speaking, a chip 302 is disposed on the cover member 60, 60 located within the periphery of the cover, overlap the heat conductive stud 22 to the substrate 34 but not overlapping. 此外,芯片302是经由打线304电性连接至基板34,同时经由固晶材料306热连接且机械性黏附于散热座66。 In addition, the chip 302 is connected to the substrate 34 via bonding wires 304 electrically also connected via a die attach material 306 thermally and mechanically adhered to the heat sink 66. 例如,打线304是连接于并电性连接焊垫56及打线接垫314,借此将芯片302电性连接至端子62。 For example, bonding wires 304 and electrically connected to the connection pads 56 and wire contact pads 314, whereby the chip 302 is electrically connected to the terminal 62. 同样地,固晶材料306接触且位于盖体60与热接触表面312之间,同时热连接且机械性黏合盖体60与热接触表面312,借此将芯片302热连接至基座26。 Similarly, die bonding material 306 between the contact 312 and the body 60 and the thermal contact surface of the lid, while the body 60 and is thermally connected to the thermal contact surface 312 mechanically bonding the cover, whereby the chip 302 thermally connected to the base 26. 焊垫56上设有镍/银的被覆金属接垫以利与打线304稳固接合,借此改善自基板34至芯片302的讯号传送。 With nickel / silver solder pads 56 on the coated metal pad 304 to facilitate wire and firmly bonded, thereby improving the signal transmitted from the substrate 34 to the chip 302. 此外,盖体60的形状及尺寸是与热接触表面312配适,借此改善自芯片302至散热座66的热传送。 Further, the cover 60 is in shape and size with appropriate thermal contact surface 312, thereby improving heat transfer from the chip 302 to the heat sink 66. 至于导热凸柱22的形状及尺寸则并未且也不需配合热接触表面312而设计。 As for the shape and size of the heat conductive protrusion 22 is not pillar and also needs no thermal contact surface 312 mating design.

[0185] 封装材料308为一固态电性绝缘保护性塑料包覆体,其可为芯片302及打线304提供抗潮湿及防微粒等环境保护。 [0185] encapsulating material 308 is a solid electrically insulating protective plastic wrap, which may provide environmental protection against humidity and the like of the particle chip 302 and wire 304. 芯片302与打线304是埋设于封装材料308中。 Chip 302 and the wire 304 is embedded in the encapsulating material 308. 此外,若芯片302是一诸如LED的光学芯片,则封装材料308可为透明状。 Further, when the chip 302 is a chip such as an LED optics, the encapsulation material 308 may be transparent. 封装材料308在图39中呈透明状是为方便图示说明。 Encapsulation material 308 in FIG. 39 was transparent for the convenience of illustration.

[0186] 若欲制造半导体芯片组体300,可利用固晶材料306将芯片302设置于盖体60上,接着将焊垫56及打线接垫314以打线接合,而后形成封装材料308。 [0186] Ruoyu producing a semiconductor chip set 300, die attach material 306 may utilize the chip 302 is provided on the cover member 60, then pad 56 and wire bonding pad 314 bonded to the wire, then the encapsulating material 308 is formed.

[0187] 例如,固晶材料306原为一具有高导热性的含银环氧树脂膏,并以网版印刷的方式选择性印刷于盖体60上。 [0187] For example, crystalline solid raw material 306 having high thermal conductivity of a silver-containing epoxy resin paste, and screen printing manner selectively printed on the cover 60. 然后利用一抓取头及一自动化图案辨识系统以步进重复的方式将芯片302放置于该环氧树脂银膏上。 Then using a gripping head and a pattern recognition system to automate a step and repeat manner chip 302 is placed on the epoxy silver paste. 继而加热该环氧树脂银膏,使其在相对低温(如1900C )下硬化以完成固晶。 Then heating the epoxy silver paste, and cured at relatively low temperatures (e.g., 1900C) to complete the solid crystal. 打线304为金线,其随即以热超音波连接焊垫56及打线接垫314。 Wire is a gold wire 304, which is then thermally ultrasonic connection pads 56 and wire contact pads 314. 最后再将封装材料308转移模制于结构体上。 Then the final transfer molding encapsulation material 308 to the structural member. [0188] 芯片302可通过多种连接媒介电性连接至焊垫56,利用多种热黏着剂热连接并机械性黏附于散热座66,并以多种封装材料封装。 [0188] chip 302 may be connected through a variety of media is electrically connected to the pad 56, using a variety of thermal adhesive properties thermally and mechanically adhered to the heat sink 66, a variety of packaging materials and packaging.

[0189] 该半导体芯片组体300为一第一级单晶封装体。 [0189] The semiconductor chip 300 is set as a first stage single crystal package.

[0190] 上述的半导体芯片组体与导热板只为说明范例,本发明可通过其他多种实施例实现。 [0190] The semiconductor chip group and the heat conductive plate member only illustrated examples, the present invention may be implemented by various other embodiments. 此外,上述实施例可依设计及可靠度的考虑,彼此混合搭配使用或与其他实施例混合搭配使用。 Further, considering the above-described embodiments to follow the design and reliability, mixed with one another or used with the other embodiments mix and match. 例如,该基板可包含多阵列单层导线与多阵列多层导线。 For example, the substrate may comprise an array of multiple wires with a single multi-array multi-layer wire. 该导热板可包含多个凸柱,且这些凸柱是排成一阵列以供多个半导体器件使用,此外,该导热板为配合额外的半导体器件,可包含更多导线。 The heat conducting plate may comprise a plurality of studs, these studs and are arranged in an array for a semiconductor device using a plurality of, in addition, the thermally conductive plate with additional semiconductor device may comprise more wires. 同样地,该半导体器件可为一具有多枚LED芯片的LED封装体,而该导热板则可包含更多导线以配合额外的LED芯片。 Likewise, the semiconductor device may have a plurality of pieces of LED chip LED package, which comprises a heat conducting plate can fit more additional wires to the LED chip. 该半导体器件与该盖体可重叠于该基板,并从上方覆盖该导热凸柱。 The semiconductor device and the cover may be superimposed on the substrate and covering from above the thermally conductive boss. [0191] 该半导体器件可独自使用该散热座或与其他半导体器件共享该散热座。 [0191] The semiconductor device may be used on their own, or share the cooling block and the cooling block other semiconductor devices. 例如,可将单一半导体器件设置于该散热座上,或将多个半导体器件设置于该散热座上。 For example, a single semiconductor device may be disposed on the heat dissipating seat, or a plurality of semiconductor devices disposed on the heat dissipating seat. 举例而言,可将四枚排列成2x2阵列的小型芯片黏附于该导热凸柱,而该基板则可包含额外的导线以配合这些芯片的电性连接。 For example, a small chip are arranged in four 2x2 array may be thermally adhered to the boss, and the substrate may include additional wires to fit these chips are electrically connected. 这一作法远较为每一芯片设置一微小导热凸柱更具经济效益。 This approach is far more each chip set a small thermal conductivity boss is more economical.

[0192] 该半导体芯片可为光学性或非光学性。 [0192] The semiconductor chip may be an optical or non-optical properties. 例如,该芯片可为一LED、一太阳能电池、一微处理器、一控制器或一射频(RF)功率放大器。 For example, the LED may be a chip, a solar cell, a microprocessor, a controller or a radio frequency (RF) power amplifier. 同样地,该半导体封装体可为一LED封装体或一射频模块。 Likewise, the semiconductor package may be a LED package or an RF module. 因此,该半导体器件可为一经封装或未经封装的光学或非光学芯片。 Thus, the semiconductor device may be a packaged or unpackaged optical or non-optical chip. 此夕卜,我们可利用多种连接媒介将该半导体器件机械性连接、电性连接及热连接至该导热板,包括利用焊接及使用导电及/或导热黏着剂等方式达成。 Bu this evening, we can use a variety of semiconductor devices connected to the media connected mechanically, electrically and thermally connected to the heat conducting plate is connected, by welding and including use of a conductive and / or thermally conductive adhesive or the like way to achieve.

[0193] 该散热座可将该半导体器件所产生的热能迅速、有效且均匀散发至下一层组体而不需使热流通过该黏着层、该基板或该导热板的他处。 [0193] The cooling block the heat of the semiconductor device can be produced rapidly, efficiently and uniformly distributing layer next to the body without the group that the heat flow through the adhesive layer, the substrate of the heat conducting plate or elsewhere. 如此一来便可使用导热性较低的黏着层,进而大幅降低成本。 In this way you can use the low thermal conductivity of the adhesive layer, thereby greatly reducing the cost. 该散热座可包含一体成形的导热凸柱与基座,以及与该导热凸柱为冶金连接及热连接的一盖体,借此提高可靠度并降低成本。 The heat sink may comprise a thermally conductive boss integrally formed with the base, as well as the metallurgy of the thermally conductive stud connections and thermally connected to a cover, thereby increasing the reliability and reduce costs. 该盖体可与该焊垫共平面,以便与该半导体器件形成电性、热能及机械性连接。 The pad cover may be co-planar with the solder, to form a semiconductor device with the electrical, thermal and mechanical connection. 此外,该盖体可依该半导体器件量身订做,而该基座则可依下一层组体量身订做,借此加强自该半导体器件至下一层组体的热连接。 In addition, the cover of the semiconductor device tailored to follow, and the base layer is set to follow the tailor-made body, thereby strengthening the thermal connection from one group to the next semiconductor device body. 例如,该导热凸柱在一侧向平面上可呈圆形,该盖体在一侧向平面上可呈矩形,更进一步地,可呈正方形,且该盖体的侧面形状与该半导体器件热接点的侧面形状相同或相似。 For example, the thermally conductive boss may be in a plane on one side of the circle, the cover may be a rectangular shape on a plane to one side, further, it may be a square, and the shape of the body and the side surface of the semiconductor device heated lid side contacts identical or similar shape.

[0194] 该散热座可与该半导体器件及该基板为电性连接或电性隔离。 [0194] The cooling block can be connected to the semiconductor device and the substrate to be electrically isolated or electrically. 例如,位于研磨后的表面上的该第二导电层可包含一路由线,该路由线是在该基板与该盖体之间延伸通过该黏着层,借以将该半导体器件电性连接至该散热座。 For example, the second conductive layer on the surface of the polished wire may comprise a routing, the routing line extending between the substrate and the cover through the adhesive layer, whereby the semiconductor device is electrically connected to the heat sink seat. 之后,该散热座可电性接地,借以将该半导体器件电性接地。 Thereafter, the heat sink may be electrically grounded, whereby the semiconductor device is electrically grounded.

[0195] 该散热座可为铜质、铝质、铜/镍/铝合金或其他导热金属结构。 [0195] The cooling block can be copper, aluminum, copper / nickel / aluminum alloy or other conductive metal structures.

[0196] 该导热凸柱可沉积于该基座上或与该基座一体成形。 [0196] The thermally conductive stud may be deposited on the base or formed integrally with the base. 该导热凸柱可与该基座一体成形,因而成为单一金属体(如铜或铝)。 The thermally conductive boss may be integrally formed with the base, and thus become a single metal (such as copper or aluminum). 该导热凸柱也可与该基座一体成形,使该两者的接口包含单一金属体(例如铜),至于他处则包含其他金属(例如凸柱的上部为焊料,凸柱的下部及基座则为铜质)。 The boss can also be thermally molded integrally with the base, so that both the interface comprises a single metal body (e.g., copper), as elsewhere contains other metals (e.g., an upper portion of the solder lug, the lower portion of the stud and the base seat, compared with copper). 该导热凸柱也可与该基座一体成形,使该两者的接口包含多层单一金属体(例如在一铝核心外设有一镍缓冲层,而该镍缓冲层上则设有一铜层)。 The boss can also be thermally molded integrally with the base, so that the two multilayer interface comprises a single metal body (e.g. a nickel-aluminum core having a peripheral buffer layer, the buffer layer on the nickel is provided with a copper layer) .

[0197] 该讯号凸柱可沉积于该端子上或与该端子一体成形。 [0197] The signal boss may be deposited on the terminal or integrally formed with the terminal. 该讯号凸柱可与该端子一体成形,因而成为单一金属体(如铜或铝)。 The signal may be integrally formed with the boss of the terminal, thus becoming a single metal (such as copper or aluminum). 该讯号凸柱也可与该端子一体成形,使该两者的接口包含单一金属体(例如铜),至于他处则包含其他金属(例如凸柱的上部为焊料,凸柱的下部及端子则为铜质)。 The signal may be integrally formed lug and the terminal, so that both the interface comprises a single metal body (e.g., copper), as elsewhere contains other metals (e.g., an upper portion of the solder lug, and the lower portion of the terminal stud as copper). 该讯号凸柱也可与该端子一体成形,使该两者的接口包含多层单一金属体(例如在一铝核心外设有一镍缓冲层,而该镍缓冲层上则设有一铜层)。 The signal may be integrally formed lug and the terminal, so that the two multilayer interface comprises a single metal body (e.g. a nickel-aluminum core having a peripheral buffer layer, the buffer layer on the nickel is provided with a copper layer).

[0198] 该导热凸柱可包含一平坦的顶面,且该顶面是与该黏着层共平面。 [0198] The thermally conductive stud may comprise a flat top surface, and the top surface is coplanar with the adhesive layer. 例如,该导热凸柱可与该黏着层共平面,或者该导热凸柱可在该黏着层固化后接受蚀刻,因而在该导热凸柱上方的黏着层形成一凹穴。 For example, the boss can be thermally, or thermally conductive stud acceptable the etching of the adhesive layer after curing and the adhesive layer is co-planar, thereby forming a recess in the thermally conductive adhesive layer side of the pillar projection. 我们也可选择性蚀刻该导热凸柱,借以在该导热凸柱中形成一延伸至其顶面下方的凹穴。 We also selectively etching the thermally conductive boss, thereby forming a downward extending recesses in the top surface of the thermally conductive boss in. 在上述任一情况下,该半导体器件均可设置于该导热凸柱上并位于该凹穴中,而该打线则可从该凹穴内的该半导体器件延伸至该凹穴外的该焊垫。 In either case, the semiconductor device can be provided in the projection column and thermal conductivity is located in the cavity, and the wire may extend from the semiconductor device within the cavity to the outer cavity of the pad . 在此情况下,该半导体器件可为一LED芯片,并由该凹穴将LED光线朝该向上方向聚焦。 In this case, the semiconductor device may be an LED chip, the LED cavity by the focus light toward the upward direction.

[0199] 该基座可为该基板提供机械性支撑。 [0199] The base provides mechanical support for the substrate. 例如,该基座可防止该基板在金属研磨、芯片设置、打线接合及模制封装材料的过程中弯曲变形。 For example, the base metal can be prevented in the substrate polishing, a chip set, and the process of wire bonding the molded packaging material bending deformation. 此外,该基座的背部可包含沿该向下方向突伸的鳍片。 In addition, the back of the base may comprise a downward direction along the projecting fins. 例如,可利用一钻板机切削该基座的底面以形成侧向沟槽,而这些侧向沟槽即为鳍片。 For example, using a drilling machine cutting a bottom surface of the base plate to form a lateral groove, and these lateral grooves is the fin. 在此例中,该基座的厚度可为500微米,所述沟槽的深度可为300微米,也就是说所述鳍片的高度可为300微米。 In this embodiment, the thickness of the base may be 500 microns, the depth of the groove may be 300 microns, which means that the fin height may be 300 microns. 所述鳍片可增加该基座的表面积,若所述鳍片是曝露于空气中而非设置于一散热装置上,则可提升该基座经由热对流的导热性。 The fins increase the surface area of ​​the base, if the fin is exposed to the air rather than on a heat sink is provided, which can enhance the thermal conductivity of the base via the heat convection.

[0200] 该盖体可在该黏着层固化后,该焊垫及/或该端子形成之前、中或后,以多种沉积技术制成,包括以电镀、无电镀被覆、蒸发及喷溅等技术形成单层或多层结构。 [0200] Before the cover may be, the pad and / or the terminal is formed after the adhesive layer is cured, or after, made in a variety of deposition techniques, including electroplating, electroless plating coating, evaporation and sputtering, etc. techniques for forming monolayer or multilayer structure. 该盖体可采用与该导热凸柱相同的金属材质,或采用与邻接该盖体的导热凸柱顶部相同的金属材质。 The cover can be the same as the heat conducting metal material boss, or a thermally conductive and is adjacent to the cover top boss same metal material. 此外,该盖体可跨越该通孔并延伸至该基板,或坐落于该通孔的周缘内。 In addition, the cover may be across the through hole and extends into the substrate, or is located in the periphery of the through hole. 因此,该盖体可接触该基板或与该基板保持距离。 Accordingly, the cover may be in contact with the substrate or keep a distance from the substrate. 在上述任一情况下,该盖体均是从该导热凸柱的顶部沿侧面方向侧向延伸而出。 In either case, the cover are made from the top of the thermally conductive stud extending from a lateral direction along the side surface.

[0201] 该黏着层可在该散热座与该基板之间提供坚固的机械性连接。 [0201] The adhesive layer may provide a strong mechanical connection between the heat sink and the substrate. 例如,该黏着层可自该导热凸柱侧向延伸并越过该导线到达该组体的外围边缘,该黏着层可填满该散热座与该基板之间的空间,且该黏着层可为一具有均匀分布的结合线的无孔洞结构。 For example, the adhesive layer may be thermally from the boss and extending laterally beyond the peripheral edge of the wire to the group member, the adhesive layer may fill the space between the cooling block and the substrate, and the adhesive layer may be a binding line having a non-uniform distribution of the pore structure. 该黏着层也可吸收该散热座与该基板之间因热膨胀所产生的不匹配现象。 The adhesive layer can also absorb the thermal expansion mismatch between the substrate and the cooling block generated. 此外,该黏着层可为一低成本电介质,且不需具备高导热性。 In addition, the adhesive layer may be a low-cost dielectric, and need not have a high thermal conductivity. 再者,该黏着层不易脱层。 Further, the adhesive layer is easily delaminated.

[0202] 我们可调整该黏着层的厚度,使该黏着层实质填满所述缺口,并使几乎所有黏着剂在固化及/或研磨后均位于结构体内。 [0202] We can adjust the thickness of the adhesive layer, the adhesive layer so that the substance fills the gap, and almost all the adhesive after curing and / or ground structures are located in vivo. 例如,理想的胶片厚度可由试误法决定。 For example, the ideal film thickness determined by trial and error. 同样地,我们也可调整该介电层的厚度以达这一效果。 Similarly, we can adjust the thickness of the dielectric layer to achieve this effect.

[0203] 该基板可为一低成本的层压结构,且不需具备高导热性。 [0203] The substrate may be a laminated structure of a low cost, and without comprising high thermal conductivity. 此外,该基板可包含单一导电层或多数层导电层。 In addition, the conductive substrate may comprise a single layer or multiple layers of conductive layer. 再者,该基板可包含该导电层或由该导电层组成。 Further, the substrate may comprise a conductive layer or the conductive layer.

[0204] 该导电层可单独设置于该黏着层上。 [0204] The conductive layer may be disposed on the adhesive layer separately. 例如,可先在该导电层上形成所述通孔,然后将该导电层设置于该黏着层上,使该导电层接触该黏着层,并朝该向上方向外露,与此同时,所述导热凸柱和所述讯号凸柱则延伸进入所述通孔,并通过所述通孔朝该向上方向外露。 For example, the first conductive layer formed on the through-hole, and the conductive layer is disposed on the adhesive layer so that the conductive layer is in contact with the adhesive layer, and exposed toward the upward direction, at the same time, the thermally conductive the boss and the boss signal extends into the through hole, and exposed through the through hole toward the upward direction. 在此例中,该导电层的厚度可为100至200微米,例如125微米,此厚度一方面够厚,所以搬运时不致弯曲晃动,一方面则够薄,所以不需过度蚀刻即可形成图案。 In this embodiment, the thickness of the conductive layer may be 100 to 200 microns, 125 microns, for example, the thickness is on the one hand thick enough, it will not bend shaking during transportation, on the one hand are thin enough, so that a pattern can be formed without overetching .

[0205] 也可将该导电层与该介电层一同设置于该黏着层上。 [0205] The conductive layer may be disposed on the adhesive layer together with the dielectric layer. 例如,可先将该导电层设置于该介电层上,然后在该导电层及该介电层上形成所述通孔,接着将该导电层及该介电层设置于该黏着层上,使该导电层朝该向上方向外露,并使该介电层接触且介于该导电层与该黏着层之间,因而将该导电层与该黏着层隔开,与此同时,所述导热凸柱和所述讯号凸柱则延伸进入所述通孔,并通过所述通孔朝该向上方向外露。 For example, the first conductive layer may be disposed on the dielectric layer, and the through hole is formed on the conductive layer and the dielectric layer, then the conductive layer and the dielectric layer disposed on the adhesive layer, the conductive layer is exposed toward the upward direction, and the dielectric layer contacting and interposed between the conductive layer and the adhesive layer, and thus the conductive layer and the adhesive layer spaced apart, at the same time, the thermally conductive protrusions the signal column and the boss extends into the through hole, and exposed through the through hole toward the upward direction. 在此例中,该导电层的厚度可为10至50微米,例如30微米,此厚度一方面够厚,足以提供可靠的讯号传导,一方面则够薄,可降低重量及成本。 In this embodiment, the thickness of the conductive layer may be 10 to 50 microns, for example 30 microns, the thickness is on the one hand thick enough, enough to provide a reliable signal transduction, is thin enough on the one hand, it can reduce the weight and cost. 此外,该介电层恒为该导热板的一部分。 Further, the dielectric constant for a portion of the heat conducting plate.

[0206] 也可将该导电层与一载体同时设置于该黏着层上。 [0206] The conductive layer may be simultaneously provided with a support on the adhesive layer. 例如,可先利用一薄膜将该导电层黏附于一诸如双定向聚对苯二甲酸乙二酯胶膜(Mylar)的载体,然后只在该导电层而非该载体上形成所述通孔,接着将该导电层及该载体设置于该黏着层上,使该载体覆盖该导电层,且朝该向上方向外露,并使该薄膜接触且介于该载体与该导电层之间,至于该导电层则接触且介于该薄膜与该黏着层之间,与此同时,所述导热凸柱和所述讯号凸柱则对准所述通孔,并由该载体从上方覆盖。 For example, the first conductive layer using a film adhered to a carrier such as bis oriented polyethylene terephthalate film (a Mylar), and only the through hole is formed on the conductive layer instead of the support, then the conductive layer and the support disposed on the adhesive layer, so that the support covers the conductive layer and exposed toward the upward direction, and the film in contact with and interposed between the carrier and the conductive layer, as the conductive and a contact layer is interposed between the adhesive layer and the film, while the thermally conductive studs and the signal is aligned with the boss through hole by the support cover from above. 该黏着层固化后,可利用紫外光分解该薄膜,以便将该载体从该导电层上剥除,从而使该导电层朝该向上方向外露,之后便可研磨及图案化该导电层以形成该导线。 After the adhesive layer is cured, can decompose the film with ultraviolet light, so that the carrier strip from the conductive layer, so that the conductive layer is exposed toward the upward direction, and can then be polished and patterning the conductive layer to form the wire. 在此例中,该导电层的厚度可为10至50微米,例如30微米,此厚度一方面够厚,足以提供可靠的讯号传导,一方面则够薄,可降低重量及成本;至于该载体的厚度可为300至500微米,此厚度一方面够厚,所以搬运时不致弯曲晃动,一方面又够薄,有助 In this embodiment, the thickness of the conductive layer may be 10 to 50 microns, for example 30 microns, the thickness is on the one hand thick enough, enough to provide a reliable signal transduction, is thin enough on the one hand, can reduce the weight and cost; As the carrier the thickness may be 300 to 500 microns, the thickness is on the one hand thick enough, it will not bend shaking during transportation, on the one hand and thin enough to facilitate

于减少重量及成本。 To reduce the weight and cost. 该载体只为一暂时固定物,并非永久属于该导热板的一部分。 The carrier is only a temporary fixture, a portion of the heat conducting plate is not permanently belong.

[0207] 该焊垫与该端子可视该半导体器件与下一层组体的需要而采用多种封装形式。 [0207] The pads and the terminals of the semiconductor device and the visual needs of one group under the body using a variety of packages.

[0208] 该焊垫的顶面与该盖体的顶面可为共平面,如此一来便可通过控制锡球的崩塌程度,强化该半导体器件与该导热板之间的焊接。 [0208] The top surface of the pad top surface of the cover may be coplanar, can result by controlling the degree of collapse of solder balls, the strengthen the welding between the semiconductor device and the heat conducting plate.

[0209] 位于该介电层上的该焊垫与该路由线可在该基板尚未或已然设置于该黏着层上时,以多种沉积技术制成,包括以电镀、无电镀被覆、蒸发及喷溅等技术形成单层或多层结构。 [0209] positioned on the dielectric layer of the pads and the wire routing can not yet or when the substrate is already disposed on the adhesive layer, made of a variety of deposition techniques, including electroplating, electroless plating coating, and evaporated sputtering technology forming monolayer or multilayer structure. 例如,可在该基板尚未设置于该黏着层上时、或在该基板已通过该黏着层而黏附于所述导热凸柱、所述讯号凸柱与该基座后,于该基板上形成该导电层的图案。 For example, when the substrate has not been provided on the adhesive layer, or by means of the adhesive layer is adhered to the thermally conductive studs on the substrate after the stud and the base signal, which is formed on the substrate patterning the conductive layer.

[0210] 以所述被覆接点进行表面处理的工序可在该焊垫及该端子形成之前或之后进行。 [0210] In the coating of the contact surface-treating step may be performed before the bonding pad and the terminal or after the formation. 例如,该被覆层可沉积于该基座及该第二导电层上,然后利用图案化的蚀刻阻层定义该焊垫与该端子并进行蚀刻,以使该被覆层具有图案。 For example, the covering layer may be deposited on the base and the second conductive layer is then etched using the patterned resist layer that defines the terminal pad and etched, so that the coating layer has a pattern.

[0211] 该导线可包含额外的焊垫、端子、导电孔、讯号凸柱、路由线以及被动器件,且可为不同构型。 [0211] The conductor may comprise additional pads, terminals, via, boss signal routing lines and passive devices, and may be different configurations. 该导线可作为一讯号层、一功率层或一接地层,端视其相应半导体器件焊垫的目的而定。 The wires may be used as a signal layer, a power layer or a ground layer, depending on the purpose of its respective terminal pads of the semiconductor device may be. 该导线也可包含各种导电金属,例如铜、金、镍、银、钯、锡、其混合物及其合金。 The lead may also comprise various conductive metals such as copper, gold, nickel, silver, palladium, tin, alloys and mixtures thereof. 理想的组成既取决于外部连接媒介的性质,也取决于设计及可靠度方面的考虑。 Ideal composition depends both on the nature of the external connection medium, but also on the design and reliability considerations. 此外,本领域中技术人员应可了解,在该半导体芯片组体中所用的铜可为纯铜,但通常是以铜为主的合金,如铜-锆(99. 9%铜)、铜-银-磷-镁(99. 7%铜)及铜-锡-铁-磷(99. 7%铜),借以提高如抗张强度与延展性等机械性能。 Moreover, those skilled in the art will readily appreciate, the semiconductor chip set used in the copper body can be copper, but is generally copper-based alloys such as copper - zirconium (99.9% copper), copper - silver - P - Mg (99.7% Cu) and copper - tin - iron - phosphate (99.7% copper), thereby improving ductility and tensile strength as mechanical properties.

[0212] 在一般情况下,最好在前述研磨后的表面上设有该盖体、介电层、防焊绿漆、被覆接点及第二导电层,但在某些实施例中则可省略之。 [0212] In general, the cover is preferably provided, a dielectric layer, a solder mask, covering the contact and the second conductive layer on the surface after the polishing, but in certain embodiments may be omitted of. 例如,若该开口及通孔是以冲孔而非钻孔的方式产生,因而使该导热凸柱顶部的形状及尺寸均与该半导体器件的热接触表面相配适,则可省略该盖体与该第二导电层以降低成本。 For example, if the opening and the through hole is not punched drilling mode is generated, thus the shape and size of the thermally conductive stud top are adapted to match the thermal contact surface of the semiconductor device, the cover may be omitted and the second conductive layer to reduce cost. 同样地,可省略该介电层以降低成本。 Likewise, the dielectric layer may be omitted to reduce costs.

[0213] 该导热板可包含一导热孔,该导热孔是与所述导热凸柱和所述讯号凸柱保持距离,并于所述开口及所述通孔外延伸穿过该介电层与该黏着层,同时邻接且热连接该基座与该盖体,借此提升自该盖体至该基座的散热效果,并促进热能在该基座内扩散。 [0213] The heat conducting plate may comprise a thermal via, the thermally conductive aperture is to distance the thermally conductive studs and the stud signal, and to said outer opening and said through hole extending through the dielectric layer the adhesive layer while adjacent to and thermally connected to the base and the cover, thereby lifting the cover from the base to the cooling effect, and promote diffusion of heat within the susceptor. [0214] 本案的组体可提供水平或垂直的单层或多层讯号路由。 [0214] The case body may provide a set of vertical or horizontal single or multilayer signal routing.

[0215] 林文强等人于2009年11月11日提出申请的第12/616,773号美国专利申请案:「具有凸柱/基座的散热座及基板的半导体芯片组体」即揭露一种具有水平单层讯号路由的结构,其中焊垫、端子与路由线均位于介电层上方,这一美国专利申请案的内容在此以引用的方式并入本文。 No. 12 / 616,773 U.S. Patent Application [0215] Lin Wenqiang et al., Filed on November 11, 2009: "heat sink substrate having a boss and / chipset semiconductor base body" i.e., discloses a a monolayer structure having a horizontal signal routes, wherein the pad, terminal and routing lines are located over the dielectric layer, the content of this U.S. patent application is hereby incorporated by reference herein.

[0216] 林文强等人于2009年11月11日提出申请的第12/616,775号美国专利申请案:「具有凸柱/基座的散热座及导线的半导体芯片组体」则揭露另一种具有水平单层讯号路由的结构,其中焊垫、端子与路由线是位于黏着层上方,且该结构未设置介电层,这一美国专利申请案的内容在此以引用的方式并入本文。 No. 12 / 616,775 US patent application Ser. [0216] Lin Wenqiang et al., Filed on November 11, 2009: "have a boss / base of the heat sink and the lead group of semiconductor chip body" is to expose another species having a single horizontal signal routing structure, wherein the pad, terminal and routing lines are located above the adhesive layer, and the dielectric layer structure is not provided, the contents of this U.S. patent application is hereby incorporated by reference herein .

[0217] 王家忠等人于2009年9月11日提出申请的第12/557,540号美国专利申请案:「具有凸柱/基座的散热座及水平讯号路由的半导体芯片组体」揭露一种具有水平多层讯号路由的结构,其中介电层上方的焊垫与端子是利用穿过该介电层的第一及第二导电孔以·及该介电层下方的路由线达成电性连接,这一美国专利申请案的内容在此以引用的方式并入本文。 No. 12 / 557,540 US patent application Ser. [0217] Wangjia Zhong et al., Filed on September 11, 2009: "have a boss / heat sink base and the level of signal routing semiconductor chipset body" expose having a horizontal structure of the multilayer signal routing, terminal pads and the top of the dielectric layer is formed using the first and second conductive via through the dielectric layer to the dielectric-layer routing and lower line to achieve an electrical connection, the content of this U.S. patent application is hereby incorporated by reference herein.

[0218] 王家忠等人于2009年9月11日提出申请的第12/557,541号美国专利申请案:「具有凸柱/基座的散热座及垂直讯号路由的半导体芯片组体」则揭露一种具有垂直多层讯号路由的结构,其中介电层上方的焊垫与黏着层下方的端子是利用穿过该介电层的第一导电孔、该介电层下方的路由线以及穿过该黏着层的第二导电孔达成电性连接,这一美国专利申请案的内容在此以引用的方式并入本文。 No. 12 / 557,541 U.S. Patent Application [0218] Wangjia Zhong et al., Filed on September 11, 2009: "having a stud / heat sink base and the vertical semiconductor chip signal routing groups thereof" is discloses a multilayer structure having a vertical routing signal, wherein the dielectric layer above the pad and the adhesive layer is formed using the lower terminals of the first conductive via through the dielectric layer, routing line below the dielectric layer and through through the adhesive layer, a second electrically conductive connection Kongda Cheng, the contents of U.S. patent application is hereby incorporated by reference herein.

[0219] 该导热板的作业格式可为单一或多个导热板,视制造设计而定。 [0219] The format of the job may be a single heat conducting plate or a plurality of heat conducting plates, depending on the design of manufacturing. 例如,可单独制作单一导热板。 For example, a single heat conducting plate can be made separately. 或者,可利用单一金属板、单一黏着层、单一基板、单一顶部防焊绿漆及单一底部防焊绿漆同时批次制造多个导热板,而后再行分离。 Alternatively, a metal plate with a single, a single adhesive layer, a single substrate, the top of the solder mask and a single bottom solder mask while a single batch process a plurality of heat conducting plates, and then separated from the line. 同样地,针对同一批次中的各导热板,我们也可利用单一金属板、单一黏着层、单一基板、单一顶部防焊绿漆与单一底部防焊绿漆同时批次制造多组分别供单一半导体器件使用的散热座与导线。 Similarly, for the same batch of each heat transfer plate, we can also use a single metal plate, a single adhesive layer, a single substrate, the top of the solder mask with a single bottom solder mask while a single batch process a plurality of sets for each single heat sink and a semiconductor device using the wire.

[0220] 例如,可在一金属板上蚀刻出多条凹槽以形成该基座、多个导热凸柱与多个讯号凸柱;而后将一具有对应所述导热凸柱、所述讯号凸柱的开口的未固化黏着层设置于该基座上,以使每一凸柱均延伸贯穿一对应开口;然后将一基板(其具有单一导电层、单一介电层以及对应所述导热凸柱、所述讯号凸柱的通孔)设置于该黏着层上,以使每一凸柱均延伸贯穿一对应开口并进入一对应通孔;而后利用压台将该基座与该基板彼此靠合,迫使该黏着层进入所述通孔内介于所述导热凸柱、所述讯号凸柱与该基板之间的缺口;然后固化该黏着层,继而研磨所述导热凸柱、所述讯号凸柱、该黏着层及该第一导电层以形成一顶面;然后将第二导电层被覆设置于所述导热凸柱、所述讯号凸柱、该黏着层及该第一导电层上;接着蚀刻该第一与第二导电层以形成多组分 [0220] For example, a plurality of grooves may be etched in a metal plate to form the base, a plurality of columns and a plurality of thermally conductive protrusions studs signals; and will have a thermal conductivity corresponding to the studs, the signal projection the uncured adhesive layer having an opening disposed in columns on the base, so that each boss extends through an opening corresponding to; then, a substrate (having a single conductive layer, a dielectric layer, and the single corresponding to the heat conducting studs , the signal through hole of the stud) disposed on the adhesive layer, so that each stud extends through a corresponding opening and into a corresponding through-hole a; then using the base platen and the substrate engaged against each other to force the adhesive layer into the through hole between the heat-conducting projections, the gap between the boss and the substrate signal column; then curing the adhesive layer, and then grinding the heat conductive studs, projecting the signal column, the adhesive layer and the first conductive layer to form a top surface; a second conductive layer is then disposed on the heat conductive covering studs, said studs signal, on the adhesive layer and the first conductive layer; then etching the first and second conductive layer to form a multi-component 别对应所述讯号凸柱的焊垫及路由线,蚀刻该第二导电层以形成多个分别对应所述导热凸柱的盖体,并蚀刻该基座以形成多个对应所述导热凸柱的基座以及多个对应所述讯号凸柱的端子;而后将顶部防焊绿漆设于结构体上,并使该顶部防焊绿漆产生图案,借以曝露所述焊垫及所述盖体,另将底部防焊绿漆设于该结构体上,使该底部防焊绿漆产生图案,借以曝露所述基座及所述端子;而后以被覆接点对所述基座、所述焊垫、所述端子及所述盖体进行表面处理;最后于所述导热板外围边缘的适当位置切割或劈裂该基板、该黏着层及所述防焊绿漆,以使个别的导热板彼此分离。 Correspond respectively to the signal pad and the stud routing line, etching the second conductive layer to form said plurality of heat conducting cover respectively corresponding boss of the base and etched to form a corresponding plurality of the thermally conductive studs and a plurality of base signals corresponding to the terminal stud; after the solder mask disposed on top of the structure, and the top of the solder mask generation pattern, thereby exposing the pad and the cover another bottom solder mask disposed on the structural body, so that the bottom solder mask generation pattern, thereby exposing the base and the terminal; then point to cover the base, the pad the terminal and the cover surface treatment; finally cut in place of the peripheral edge of the heat conducting plate or splitting the substrate, the adhesive layer, and the solder mask, so that the individual heat conductive plate separated from each other . [0221] 该半导体芯片组体的作业格式可为单一组体或多个组体,取决于制造设计。 [0221] The semiconductor chip job format set group may be a single body or a plurality of groups thereof, depending on the production design. 例如,可单独制造单一组体。 For example, a single group member can be manufactured separately. 或者,可同时批次制造多个组体,之后再将各导热板一一分离。 Alternatively, the batch process can be simultaneously a plurality of groups thereof, each heat transfer plate after then separated one by one. 同样地,也可将多个半导体器件电性连接、热连接及机械性连接至批次量产中的每一导热板。 Similarly, a plurality of semiconductor devices may also be connected electrically, thermally and mechanically connected to each of the heat conducting plate in a batch production.

[0222] 例如,可将多个锡膏部分分别沉积于多个焊垫及盖体上,而后将多个LED封装体分别置于所述锡膏部分上,接着同时加热所述锡膏部分以使其回焊、硬化并形成多个焊接点,之后再将各导热板分离。 [0222] For example, the plurality of solder paste portions are deposited on the plurality of pads and the lid member, and a plurality of LED packages are disposed after the solder portion, then while heating said solder paste to portions reflow, curing and forming a plurality of weld points, then after separation of the heat conducting plate.

[0223] 在另一范例中是将多个固晶材料分别沉积于多个盖体上,而后将多枚芯片分别放置于所述固晶材料上,之后再同时加热所述固晶材料以使其硬化并形成多个固晶,而后将所述芯片打线接合至对应的焊垫,接着在所述芯片与打线形成对应的封装材料,最后再将各导热板分离。 [0223] In another example, the plurality of solid polycrystalline material is deposited respectively on the plurality of the lid member, and after the multi-chip pieces are placed on the solid crystal material, then while heating and then the solid material to crystalline hardening and forming a plurality of solid crystal, and after the wire bonding to the corresponding die pad, then to form the corresponding packaging material in the chip and wire, then separated and finally heat conducting plate.

[0224] 我们可通过单一步骤或多道步骤使各导热板彼此分离。 [0224] We each heat conducting plate in a single step or multi-step channel separated from each other. 例如,可将多个导热板批次制成一平板,接着将多个半导体器件设置于该平板上,然后再将该平板所构成的多个半导体芯片组体一一分离。 For example, the plurality of heat conducting plate made of a flat batch, followed by a plurality of semiconductor devices disposed on the plate, and then separated one by one the plurality of semiconductor chips composed of flat plate groups. 或者,可将多个导热板批次制成一平板,而后将该平板所构成的多个导热板分切为多个导热板条,接着将多个半导体器件分别设置于所述导热板条上,最后再将各导热板条所构成的多个半导体芯片组体分离为个体。 Alternatively, a plurality of heat conducting plates may be formed into a tablet batches, then the plurality of flat heat conducting plate is composed of a plurality of heat conducting strips cut, followed by a plurality of semiconductor devices are respectively provided on the heat conductive strip , then finally sets a plurality of semiconductor chips each heat transfer body configured slats separated into the individual. 此外,在分割导热板时可利用机械切割、雷射切割、分劈或其他适用技术。 Further, when the thermally conductive plate divided by mechanical cutting, laser cutting, or other applicable techniques splittable.

[0225] 在本文中,「邻接」一语意指器件是一体成形(形成单一个体)或相互接触(彼此无间隔或未隔开)。 [0225] As used herein, "contiguous" is meant a phrase device is integrally molded (formed single individual), or contact with each other (no or spaced apart). 例如,该导热凸柱是邻接该基座,这与形成该导热凸柱时采用增添法或削减法无关。 For example, the thermally conductive stud is adjacent to the base, which is formed when using the method to add the independent thermal conductive stud or cut method.

[0226] 「重叠」一语意指位于上方并延伸于一下方器件的周缘内。 The [0226] "overlap" a phrase means positioned above and extending to a lower side of the periphery of the device. 「重叠」包含延伸于该周缘的内、外或坐落于该周缘内。 "Overlap" includes extending the inner periphery of the outer or inner periphery located. 例如,该半导体器件是重叠于该导热凸柱,乃因一假想垂直线可同时贯穿该半导体器件与该导热凸柱,不论该半导体器件与该导热凸柱间是否存在有另一同为该假想垂直线贯穿的器件(如该盖体),且也不论是否有另一假想垂直线只贯穿该半导体器件而未贯穿该导热凸柱(也就是说位于该导热凸柱的周缘外)。 For example, the semiconductor device is superposed on the thermally conductive boss, was due to an imaginary vertical line may extend through the semiconductor device simultaneously with the thermally conductive studs, regardless of whether the semiconductor device exists between the thermally conductive boss that there is another same imaginary vertical line through a device (e.g., the cover), and regardless of whether there is another imaginary vertical line through the semiconductor device but not only through the thermally conductive boss (boss that is located in the heat conducting outer periphery). 同样地,该黏着层是重叠于该基座并被该焊垫重叠,而该基座则被该导热凸柱重叠。 Likewise, the adhesive layer is superimposed on the base of the pad and overlap, and the thermal conductivity of the base were overlapped boss. 同样地,该导热凸柱是重叠于该基座且位于其周缘内。 Similarly, the thermally conductive stud is superimposed on the base and located within its circumference. 此外,「重叠」与「位于上方」同义,「被重叠」则与「位于下方」同义。 In addition, the "overlapping" and "located above" synonymous "overlapped" and then "located under the" synonymous.

[0227] 「接触」一语意指直接接触。 [0227] "engagement" means direct contact with a language. 例如,该介电层接触该焊垫但并未接触该导热凸柱或该基座。 For example, the dielectric layer contacting the pad but not in contact with the thermally conductive studs or the base.

[0228] 「覆盖」一语意指从上方、从下方及/或从侧面完全覆盖。 [0228] "cover" below and / or completely covered by the phrase means from above, from the side. 例如,该基座从下方覆盖该导热凸柱,但该导热凸柱并未从上方覆盖该基座。 For example, from the bottom of the base to cover the heat conducting studs, but it does not cover the thermally conductive stud from above the base.

[0229] 「层」字包含设有图案或未设图案的层体。 [0229] "layer" layer contains the word body is provided with a pattern or design pattern. 例如,当该基板设置于该黏着层上时,该导电层可为该介电层上一空白无图案的平板;而当该半导体器件设置于该散热座上之后,该导电层可为该介电层上一具有间隔导线的电路图案。 For example, when the substrate is disposed on the adhesive layer, the conductive layer on the dielectric layer that may be a flat plate blank unpatterned; and when the semiconductor device is provided in the base of the heat dissipation, the conductive layer may be mediated for a dielectric layer having a circuit pattern spaced conductors. 此外,「层」可包含多数叠合层。 In addition, the "layer" may contain most of the laminated layer.

[0230] 「焊垫」一语与该导线搭配使用时是指一用于连接及/或接合外部连接媒介(如焊料或打线)的连接区域,而该外部连接媒介则可将该导线电性连接至该半导体器件。 [0230] "pad" with a phrase used when the wire is a means for connecting and / or engaging an external connection media (e.g., solder or wire) connection region, which may be an intermediary for the external connection wire electrically connected to the semiconductor device.

[0231] 「端子」一语与该导线搭配使用时是指一连接区域,其可接触及/或接合外部连接媒介(如焊料或打线),而该外部连接媒介则可将该导线电性连接至与下一层组体相关的一外部设备(例如一印刷电路板或与其连接的一导线)。 [0231] "terminal" a phrase when used with a means to the wire connection region, which may contact and / or engage external connection media (e.g., solder or wire), which may be an intermediary for the external connection wire electrically connected to an external device associated with the one group member (e.g., a printed circuit board or a conductor connected thereto). [0232] 「盖体」一语与该散热座搭配使用时是指一用于连接及/或接合外部连接媒介(如焊料或导热黏着剂)的接触区域,而该外部连接媒介则可将该散热座热连接至该半导体器件。 [0232] "cover" a phrase when used with the heat sink refers to a base for connecting and / or engaging an external connection media (e.g., solder or a thermally conductive adhesive) contact areas, and the medium may be connected to the external heat sink thermally connected to the semiconductor device.

[0233] 「开口」与「通孔」等语同指贯穿孔洞。 [0233] "opening" and "through-hole" and other words with finger through the hole. 例如,当该导热凸柱插入该黏着层的该开口时,该导热凸柱是沿向上方向曝露于该黏着层。 For example, when the boss is inserted into the thermally conductive adhesive layer of the opening, the thermally conductive stud is exposed to the upward direction of the adhesive layer. 同样地,当该导热凸柱插入该基板的该通孔时,该导热凸柱是沿向上方向曝露于该基板。 Similarly, when the thermally conductive stud is inserted into the through hole of the substrate, the thermally conductive stud is exposed to the upward direction of the substrate.

[0234] 「插入」一语意指器件间的相对移动。 [0234] "Insert" means a relative movement between the device language. 例如,「将该导热凸柱插入该通孔中」包含:该导热凸柱固定不动而由该基板向该基座移动;该基板固定不动而由该导热凸柱向该基板移动;以及该导热凸柱与该基板两者彼此靠合。 For example, "the heat conductive studs are inserted into the through hole" includes: the thermally conductive stud of the stationary and moving the substrate to the base; the substrate is moved by a stationary boss to the thermally conductive substrate; and the thermal conductivity of both the boss against the substrate to each other. 又例如,「将该导热凸柱插入(或延伸至)该通孔内」包含:该导热凸柱贯穿(穿入并穿出)该通孔;以及该导热凸柱插入但未贯穿(穿入但未穿出)该通孔。 As another example, "insert the thermally conductive stud (or extending to) the through hole" includes: the thermally conductive stud through (penetrates into and out of) the through hole; and a thermally conductive stud is inserted but not through (penetrate but not piercing) through the hole.

[0235] 「彼此靠合」一语也指器件间的相对移动。 [0235] "lean against each other," a phrase also refers to the relative movement between devices. 例如,「该基座与该基板彼此靠合」包含:该基座固定不动而由该基板移往该基座;该基板固定不动而由该基座向该基板移动;以及该基座与该基板相互靠近。 For example, "the base and the substrate engaged against each other" includes: the base and moved to the stationary base of the substrate; the substrate is moved from the stationary base to the substrate; and the base approach each other and the substrate.

[0236] 「对准」一语意指器件间的相对位置。 [0236] "aligned" means a relative position between the device language. 例如,当该黏着层已设置于该基座上、该基板已设置于该黏着层上、该导热凸柱已插入并对准该开口,且该通孔已对准该开口时,无论该导热凸柱是插入该通孔或位于该通孔下方且与其保持距离,该导热凸柱均已对准该通孔。 For example, when the adhesive layer is disposed on the base, the substrate is disposed on the adhesive layer, the thermally conductive boss is inserted and aligned with the opening, and the opening of the through hole is aligned, regardless of the thermally conductive the stud is inserted into the through hole or a through hole located below the holder and its distance from the thermally conductive studs have been aligned with the through hole.

[0237] 「设置于」一语包含与单一或多个支撑器件间的接触与非接触。 [0237] "is set in" a phrase that contains a single or a plurality of support contacts between the device and the non-contact. 例如,该半导体器件是设置于该散热座上,不论该半导体器件是实际接触该散热座或是与该散热座以一固晶材料相隔。 For example, the semiconductor device is disposed on the heat dissipating seat, regardless of whether the semiconductor device is actually in contact with the cooling block or a solid polycrystalline material spaced apart from the heat sink. 同样地,该半导体器件是设置于该散热座上,不论该半导体器件是只设置于该散热座上或是同时设置于该散热座与该基板上。 Likewise, the semiconductor device is disposed on the heat dissipating seat, regardless of whether the semiconductor device is provided only to the heat dissipating seat or simultaneously disposed on the heat sink and the substrate holder.

[0238] 「黏着层…于该缺口之中」一语意指位于该缺口中的该黏着层。 [0238] "... to the adhesive layer into the gap," the phrase refers to the adhesive layer is located in the gap. 例如,「黏着层在该缺口中延伸跨越该介电层」意指该缺口内的该黏着层延伸跨越该介电层。 For example, "adhesive layer extending across the notch of the dielectric layer" means the dielectric layer within the adhesive layer extending across the gap. 同样地,「黏着层于该缺口之中接触且介于该导热凸柱与该介电层之间」意指该缺口中的该黏着层接触且介于该缺口内侧壁的该导热凸柱与该缺口外侧壁的该介电层之间。 Likewise, "the notch in the adhesive layer in contact with and interposed between the boss of the thermally conductive dielectric layer and" thermally conductive studs within the sidewall of the notch of the notches means that the adhesive layer is in contact with and between the dielectric layer between the outer side walls of the notch.

[0239] 「上方」一语意指向上延伸,且包含邻接与非邻接器件以及重叠与非重叠器件。 [0239] The phrase means extends upwardly, adjacent to and including a non-adjacent device and overlapped with the non-overlapping device "above." 例如,该导热凸柱是延伸于该基座上方,同时邻接、重叠于该基座并自该基座突伸而出。 For example, the thermally conductive boss extending to the upper base, while adjacent, superimposed on the base and projecting out from the base. 同样地,该导热凸柱是延伸至该介电层上方,即便该导热凸柱并未邻接或重叠于该介电层。 Similarly, the thermally conductive boss extends upward into the dielectric layer, even though the heat conductive studs are not adjacent to or superimposed on the dielectric layer.

[0240] 「下方」一语意指向下延伸,且包含邻接与非邻接器件以及重叠与非重叠器件。 [0240] The phrase means extending downwardly and comprising a device adjacent to the non-adjacent and non-overlapping and overlapping device "below." 例如,该基座是延伸于该导热凸柱下方,邻接该导热凸柱,被该导热凸柱重叠,并自该导热凸柱突伸而出。 For example, the base extends below the thermally conductive stud, the stud adjacent the thermally conductive, thermally conductive studs which are overlapped, and since the thermally conductive stud protrudes out. 同样地,该导热凸柱是延伸于该介电层下方,即便该导热凸柱并未邻接该介电层或被该介电层重叠。 Similarly, the thermally conductive boss extends below the dielectric layer, even though the heat conductive studs are not adjacent to the dielectric layer or the dielectric layer overlaps.

[0241] 所谓「向上」及「向下」的垂直方向并非取决于该半导体芯片组体(或该导热板)的定向,凡熟悉此项技艺的人士可轻易了解其实际所指的方向。 [0241] The so-called vertical direction "up" and "down" does not depend on the orientation of the group of semiconductor chips (or the heat conducting plate), where a person familiar with this art can readily understand the meaning of the actual direction. 例如,该导热凸柱是沿向上方向垂直延伸于该基座上方,而该黏着层则沿向下方向垂直延伸于该焊垫下方,这与该组体是否倒置及/或是否是设置于一散热装置上无关。 For example, the thermally conductive stud is in the upward direction extends perpendicular to the upper base, and the adhesive layer is perpendicular to the pad extends downward in the downward direction, whether it upside down with the set body and / or whether it is disposed in a independent of the heat sink. 同样地,该基座是沿一侧向平面自该导热凸柱「侧向」延伸而出,这与该组体是否倒置、旋转或倾斜无关。 Similarly, from the base along one side of the plane of the thermally conductive boss "laterally" extended out, whether this is inverted with the group member, irrespective of rotating or tilting. 因此,该向上及向下方向是彼此相对且垂直于侧面方向,此外,侧向对齐的器件是在一垂直于该向上与向下方向的侧向平面上彼此共平面。 Thus, the up and down direction relative to and perpendicular to the lateral direction. In addition, the device is laterally aligned laterally in a plane perpendicular to the upward and downward direction coplanar with each other to each other. [0242] 本发明的半导体芯片组体具有多项优点。 The semiconductor chip body set [0242] of the present invention has a number of advantages. 该组体的可靠度高、价格平实且极适合量产。 High reliability of the set body, modest price and extremely suitable for mass production. 该组体尤其适用于易产生高热且需优异散热效果方可有效及可靠运作的高功率半导体器件,例如LED封装体、大型半导体芯片以及多个同时使用的小型半导体器件(例如以阵列方式排列的多枚小型半导体芯片)。 The group is particularly suitable for body heat is easy to produce and excellent in heat dissipation effect needs to be valid and reliable operation of high power semiconductor devices, such as LED packages, the large and small semiconductor chips while using a plurality of semiconductor devices (e.g., arranged in an array of rounds of small semiconductor chips).

[0243] 本案的制造工序具有高度适用性,且是以独特、进步的方式结合运用各种成熟的电性连接、热连接及机械性连接技术。 [0243] manufacturing process of the case has a height of suitability, and is unique and progressive use of a variety of mature incorporated electrical connection, thermal connection and mechanical connection technology. 此外,本案的制造工序不需昂贵工具即可实施。 Further, in case the manufacturing process can be implemented without an expensive tool. 因此,此制造工序可大幅提升现有封装技术的产量、良率、效能与成本效益。 Accordingly, this manufacturing process can significantly enhance the production yield, performance and cost-effectiveness of the prior art packaging. 再者,本案的组体极适合于铜芯片及无铅的环保要求。 Furthermore, the case body electrode group is adapted to the chip and copper lead-free environmental requirements.

[0244] 在此所述的实施例是为例示之用,其中所涉及的本技艺现有器件或步骤或经简化或有所省略以免模糊本发明的特点。 [0244] The embodiments described herein are illustrative only and the present prior art devices involved therein or step or some characteristic thereof will be omitted or simplified to avoid obscuring the present invention. 同样地,为使附图清晰,附图中重复或非必要的器件及参考标号或有所省略。 Likewise, for the clarity of the drawing, figures or optionally repeating device or be omitted and reference numeral.

[0245] 精于此项技艺的人士针对本文所述的实施例当可轻易思及各种变化及修改。 [0245] The person skilled in the art for this embodiment as described herein and can be easily thought that various changes and modifications. 例如,前述的材料、尺寸、形状、大小、步骤的内容与步骤的顺序皆只为范例。 For example, the material, the content of the order of the step size, the shape, the size, the above-described steps are only examples. 上述人士可在不脱离本发明的精神与范围的条件下从事这些改变、调整与均等技艺,其中本发明的范围是由权利要求书加以界定。 These people may be involved in these changes, adjustments and uniformly in the art without departing from the spirit and scope of the present invention, the scope of the present invention is to be defined by the claims.

Claims (54)

1. 一种半导体芯片组体,其特征在于:该半导体芯片组体至少包含: 一半导体器件; 一黏着层,其至少具有第一开口及第二开口; 一散热座,其至少包含一导热凸柱及一基座,其中该导热凸柱是邻接该基座并沿一向上方向延伸于该基座上方,该基座是沿一与该向上方向相反的向下方向延伸于该导热凸柱下方,并沿垂直于该向上及向下方向的侧面方向从该导热凸柱侧向延伸;及一导线,其至少包含一焊垫、一端子及一讯号凸柱,其中该讯号凸柱是延伸于该焊垫下方及该端子上方,且该焊垫与该端子间的一导电路径包含该讯号凸柱; 其中该半导体器件是位于该导热凸柱上方并重叠于该导热凸柱,该半导体器件是电性连接至该焊垫,从而电性连接至该端子,且该半导体器件是热连接至该导热凸柱,从而热连接至该基座; 其中该黏着层是设置于该基座 A semiconductor chip set body, wherein: the semiconductor chip set comprises at least: a semiconductor device; an adhesive layer having at least a first opening and a second opening; a heat sink, which includes at least one thermally conductive protrusion column and a base, wherein the thermally conductive stud is adjacent to the base and extending in the upward direction above the base, the base is in a direction opposite to the upwardly extending downwardly below the thermally conductive boss and a thermally conductive stud extending from the lateral side surface in the direction perpendicular to the up and down direction; and a wire, which comprises at least one pad, a signal terminal and a boss, wherein the boss extends to a signal the pad and the upper below the terminal, and the pad with a conductive path between the terminals including the signal studs; wherein the semiconductor device is located on the thermally conductive projection column direction and overlap with the thermally conductive studs, the semiconductor device is electrically connected to the pad, thereby electrically connected to the terminals, and the semiconductor device is thermally connected to the thermally conductive boss, thereby thermally connected to the base; wherein the adhesion layer is disposed on the base ,延伸于该基座上方,并自该导热凸柱侧向延伸至该端子或越过该端子; 其中该焊垫是延伸于该黏着层上方,而该端子则延伸于该黏着层下方;以及其中该导热凸柱延伸进入该第一开口,该讯号凸柱延伸进入该第二开口,所述导热凸柱与所述讯号凸柱具有相同厚度且彼此共平面,该基座与该端子具有相同厚度且彼此共平面。 , Extends to the upper base, and extending laterally from the thermally conductive studs or over the terminal to the terminal; wherein the pad extends above the adhesive layer, and the terminals are extending beneath the adhesive layer; and wherein the thermally conductive stud extending into the first opening, the signal boss extending into the second opening, the heat conductive studs and the studs signal having the same thickness and coplanar with each other, the base and the terminals having the same thickness and coplanar with each other.
2.根据权利要求I所述的半导体芯片组体,其特征在于:该半导体器件为一包含LED芯片的LED封装体。 The semiconductor body of a chipset according to claim I, wherein: the semiconductor device is an LED chip comprising an LED package.
3.根据权利要求2所述的半导体芯片组体,其特征在于:该LED封装体是利用一第一焊锡电性连接至该焊垫,并利用一第二焊锡热连接至该散热座。 The semiconductor body of the chip set according to claim 2, wherein: the LED package using a first electrically connected to the solder pad, and using a second solder is thermally connected to the cooling block.
4.根据权利要求I所述的半导体芯片组体,其特征在于:该半导体器件为一半导体芯片。 4. The semiconductor body of a chipset according to claim I, wherein: the semiconductor device is a semiconductor chip.
5.根据权利要求4所述的半导体芯片组体,其特征在于:该芯片是利用一打线电性连接至该焊垫,并利用一固晶材料热连接至该散热座。 The semiconductor chip set according to claim 4, wherein: the chip is the use of a wire electrically connected to the pad, using a die attach material is thermally coupled to the cooling block.
6.根据权利要求I所述的半导体芯片组体,其特征在于:该黏着层接触所述导热凸柱、所述讯号凸柱、该基座、该焊垫与该端子。 The semiconductor body of a chipset according to claim I, wherein: the adhesive layer contacts the thermally conductive studs, the studs signal, the base, the pads and the terminals.
7.根据权利要求I所述的半导体芯片组体,其特征在于:该黏着层在所述侧面方向覆盖且环绕所述导热凸柱、所述讯号凸柱。 The semiconductor body of a chipset according to claim I, wherein: the adhesive layer overlying and surrounding the side surface direction of the heat conducting boss, the boss signal.
8.根据权利要求I所述的半导体芯片组体,其特征在于:该黏着层同形被覆于所述导热凸柱、所述讯号凸柱的侧壁。 The semiconductor body of a chipset according to claim I, wherein: the adhesive layer is coated onto the thermally conductive formed with studs, the side walls of the stud signal.
9.根据权利要求I所述的半导体芯片组体,其特征在于:该黏着层与所述导热凸柱和所述讯号凸柱的顶部及底部共平面。 The semiconductor body of a chipset according to claim I, wherein: the adhesive layer and the heat-conducting protrusions of the top and bottom and the column signal studs coplanar.
10.根据权利要求I所述的半导体芯片组体,其特征在于:该黏着层自该导热凸柱侧向延伸且越过该端子。 The semiconductor chip body 10. The set according to claim I, wherein: the adhesive layer from the thermally conductive boss extending laterally across the terminal.
11.根据权利要求I所述的半导体芯片组体,其特征在于:该黏着层延伸至该半导体芯片组体的外围边缘。 11. The semiconductor chip according to claim I component precursor, wherein: the adhesive layer extends to the periphery of the semiconductor chip set body edge.
12.根据权利要求I所述的半导体芯片组体,其特征在于:该导热凸柱是与该基座一体成形,该讯号凸柱则与该端子一体成形。 The semiconductor chip body 12. The set according to claim I, characterized in that: the thermally conductive stud is integrally formed with the base, the boss is integrally formed signal to the terminal.
13.根据权利要求I所述的半导体芯片组体,其特征在于:该导热凸柱为平顶锥柱形,其直径自该基座至该导热凸柱的一平坦顶部是呈向上递减,且该讯号凸柱为平顶锥柱形,其直径自该端子至该讯号凸柱的一平坦顶部是呈向上递减。 13. The semiconductor body of a chipset according to claim I, characterized in that: the thermally conductive flat-topped cone cylindrical stud having a diameter from the top to the base of a planar heat conducting boss is a decreasing direction, and the flat-topped cone signal cylindrical stud having a diameter of from the terminal to a flat top of the stud signal is a decreasing upward.
14.根据权利要求I所述的半导体芯片组体,其特征在于:该基座从下方覆盖该导热凸柱,支撑该黏着层,且与该半导体芯片组体的外围边缘保持距离。 The semiconductor chip body 14. A set as claimed in claim I, wherein: the base from below to cover the heat conducting studs supporting the adhesive layer, and keep a distance from the peripheral edge of the semiconductor body chipset.
15.根据权利要求I所述的半导体芯片组体,其特征在于:该导线是与该散热座保持距离,且该焊垫、该端子与该讯号凸柱则接触该黏着层。 15. The semiconductor chip component precursor as claimed in claim I, wherein: the lead is held distance from the heat sink, the pads and the terminals of the adhesive layer is in contact with the stud signal.
16.根据权利要求I所述的半导体芯片组体,其特征在于:该端子是邻接该讯号凸柱,延伸于该讯号凸柱下方,并沿所述侧面方向自该讯号凸柱侧向延伸。 The semiconductor body of a chipset according to claim I, wherein: the signal terminals is adjacent to the boss, the boss extending downward signal, and the signal extending from the boss laterally along the lateral direction.
17.根据权利要求I所述的半导体芯片组体,其特征在于:该散热座至少包含一盖体,该盖体位于该导热凸柱的一顶部上方,邻接该导热凸柱的该顶部,并从上方覆盖该导热凸柱的该顶部,同时沿所述侧面方向自该导热凸柱的该顶部侧向延伸。 17. The semiconductor body of a chipset according to claim I, wherein: the heat sink comprises at least a cover, the cover is positioned above a top of the thermally conductive stud, adjacent to the top of the thermally conductive boss, and from above to cover the top of the thermally conductive stud, while from the top side of the thermal conductive stud extending in the lateral direction.
18.根据权利要求17所述的半导体芯片组体,其特征在于:该盖体与该焊垫于该黏着层上方为共平面。 The semiconductor body of the chip set according to claim 17, wherein: the cover over the pad to the adhesive layer is a co-planar.
19.根据权利要求17所述的半导体芯片组体,其特征在于:该盖体为矩形,该导热凸柱的该顶部则为圆形。 The semiconductor body of the chip set according to claim 17, wherein: the cover is rectangular, the top portion of the thermally conductive stud was circular.
20.根据权利要求19所述的半导体芯片组体,其特征在于:该盖体为正方形。 20. The semiconductor body of the chip set of claim 19, wherein: the cover is square.
21.根据权利要求17所述的半导体芯片组体,其特征在于:该盖体的尺寸及形状是配合该半导体器件的一热接触表面而设计,该导热凸柱的该顶部的尺寸及形状则并非配合该半导体器件的该热接触表面而设计。 21. The semiconductor body of the chip set of claim 17, wherein: the size and shape of the lid member is in thermal contact surface with a semiconductor device and the design, size and shape of the top of the heat conducting boss is the semiconductor device is not fit the design of the contact surface of the heat.
22. —种半导体芯片组体,其特征在于:该半导体芯片组体至少包含: 一半导体器件; 一黏着层,其至少具有第一开口及第二开口; 一散热座,其至少包含一导热凸柱及一基座,其中该导热凸柱是邻接该基座并与该基座一体成形,且该导热凸柱是沿一向上方向延伸于该基座上方,该基座是沿一与该向上方向相反的向下方向延伸于该导热凸柱下方,并沿垂直于该向上及向下方向的侧面方向自该导热凸柱侧向延伸;及一导线,其至少包含一焊垫、一端子、一路由线及一讯号凸柱,其中该路由线邻接该焊垫,该讯号凸柱则邻接该路由线与该端子,并延伸于该焊垫与该路由线下方,同时延伸于该端子上方,且该焊垫与该端子间的一导电路径包含该路由线与该讯号凸柱; 其中该半导体器件是设置于该散热座上,重叠于该导热凸柱但并未重叠于该讯号凸柱, 22. - chipset semiconductor body, wherein: the semiconductor chip set comprises at least: a semiconductor device; an adhesive layer having at least a first opening and a second opening; a heat sink, which includes at least one thermally conductive protrusion column and a base, wherein the thermally conductive stud is adjacent to the base and integrally formed with the base, and the heat conducting boss is in a direction extending upward to the upper base, which is a direction upward with the direction opposite the downward direction extending below the thermally conductive studs, extending from the thermally conductive boss in a lateral direction perpendicular to the side face upward and downward direction; and a wire, which comprises at least a pad, a terminal, a routing line and a signal boss, wherein the routing line adjacent to the pad, the signal boss is adjacent to the route line and the terminal, and extends below the bonding pad and the routing lines, while extending to the upper terminal, and the pad with a conductive path between the terminals of the route comprises a signal line and the stud; wherein the semiconductor device is disposed on the heat dissipating seat, overlapping in the thermally conductive stud but does not coincide with the signal boss, 半导体器件是电性连接至该焊垫,从而电性连接至该端子,且该半导体器件是热连接至该导热凸柱,从而热连接至该基座; 其中该黏着层是设置于该基座上,延伸于该基座上方,并于所述侧面方向覆盖且环绕所述导热凸柱、所述讯号凸柱,同时延伸至该半导体芯片组体的外围边缘; 其中该焊垫延伸于该黏着层上方;以及其中该导热凸柱延伸进入该第一开口,该讯号凸柱延伸进入该第二开口,所述导热凸柱与所述讯号凸柱具有相同厚度,彼此共平面,且延伸穿过该黏着层,该基座与该端子具有相同厚度,彼此共平面,且延伸于该黏着层下方,所述导热凸柱和所述讯号凸柱的顶部及底部是与该黏着层共平面。 The semiconductor device is electrically connected to the pad, thereby electrically connected to the terminals, and the semiconductor device is thermally connected to the thermally conductive boss, thereby thermally connected to the base; wherein the adhesion layer is disposed on the base on the upper base extends, in the lateral direction and covering and surrounding the heat conducting boss, the boss signal, while extending to the periphery of the semiconductor body chipset edges; wherein the pad extends in the adhesive above the layer; and wherein the thermally conductive stud extending into the first opening, the signal boss extending into the second opening, the heat conductive studs and the studs signal having the same thickness, coplanar with each other, and extends through the adhesive layer, the base and the terminals having the same thickness, coplanar with each other, and extending below the adhesive layer, the top and bottom of the thermally conductive studs and the stud signal is co-planar with the adhesive layer.
23.根据权利要求22所述的半导体芯片组体,其特征在于:该半导体器件为一半导体芯片,且是利用一固晶材料设置于该散热座上,并利用一打线电性连接至该焊垫,同时利用该固晶材料热连接至该散热座。 The semiconductor chip body 23. The set according to claim 22, wherein: the semiconductor device is a semiconductor chip, and the use of a solid polycrystalline material is disposed on the heat dissipating base, using a wire electrically connected to the pads, while using the solid crystal material thermally coupled to the cooling block.
24.根据权利要求22所述的半导体芯片组体,其特征在于:该黏着层接触所述导热凸柱、所述讯号凸柱、该基座、该焊垫、该端子与该路由线。 The semiconductor chip body 24. The set according to claim 22, wherein: the adhesive layer contacts the thermally conductive studs, the studs signal, the base of the pad, and the route of the line terminal.
25.根据权利要求22所述的半导体芯片组体,其特征在于:该导热凸柱为平顶锥柱形,其直径自该基座至该导热凸柱的一平坦顶部是呈向上递减,该导热凸柱的该顶部为圆形,一盖体是设置于该导热凸柱的该顶部上,位于该导热凸柱的该顶部上方,邻接该导热凸柱的该顶部,并从上方覆盖该导热凸柱的该顶部,同时沿所述侧面方向自该导热凸柱的该顶部侧向延伸,该盖体为矩形。 The semiconductor chip body 25. The set according to claim 22, characterized in that: the thermally conductive flat-topped cone cylindrical stud having a diameter from the base to the top of a planar heat conducting boss is a decreasing direction, the the top of the heat conducting boss is circular, a cover is disposed on the top of the thermally conductive studs, the upper top of the protrusion of the heat conducting column, the thermally conductive stud adjacent the top, and covering the heat conducting from above the top of the boss, extending laterally from the top of the thermally conductive studs, while the cover is rectangular in the lateral direction.
26.根据权利要求25所述的半导体芯片组体,其特征在于:该盖体为正方形。 26. The member of the group of semiconductor chips of claim 25, wherein: the cover is square.
27.根据权利要求25或26所述的半导体芯片组体,其特征在于:该盖体与该焊垫于该黏着层上方为共平面。 27. The semiconductor chip group 25 or claim 26, wherein: the cover over the pad to the adhesive layer is a co-planar.
28. 一种半导体芯片组体,其特征在于:该半导体芯片组体至少包含: 一半导体器件; 一黏着层,其至少具有第一开口及第二开口; 一散热座,其至少包含一导热凸柱及一基座,其中该导热凸柱是邻接该基座,并沿一向上方向延伸于该基座上方,该基座是沿一与该向上方向相反的向下方向延伸于该导热凸柱下方,并沿垂直于该向上及向下方向的侧面方向从该导热凸柱侧向延伸; 一基板,其至少包含一焊垫及一介电层,其中第一及第二通孔延伸贯穿该基板;及一导线,其至少包含该焊垫、一端子及一讯号凸柱,其中该讯号凸柱是延伸于该焊垫下方及该端子上方,且该焊垫与该端子间的一导电路径包含该讯号凸柱; 其中该半导体器件是位于该导热凸柱上方并重叠于该导热凸柱,该半导体器件是电性连接至该焊垫,从而电性连接至该端子,且该半导体 28. A semiconductor chip set body, wherein: the semiconductor chip set comprises at least: a semiconductor device; an adhesive layer having at least a first opening and a second opening; a heat sink, which includes at least one thermally conductive protrusion column and a base, wherein the thermally conductive stud is adjacent to the base, along a direction extending upward to the upper base, which is a direction opposite to the upward direction to the downward direction extending thermally conductive stud below, and extend along the sides perpendicular to the direction of upward and downward direction from the side of the thermally conductive stud; a substrate, which comprises at least a pad and a dielectric layer, wherein the first and second through hole extending through the a substrate; and a conductor, comprising at least the pad, a terminal, and a signal boss, wherein the signal boss is extending and the above and below the pad terminal, and the pad a conductive path between the terminal the stud comprises a signal; wherein the semiconductor device is located on the thermally conductive protrusion in the column direction and overlapping the thermally conductive studs, the semiconductor device is electrically connected to the pad, thereby electrically connected to the terminals, and the semiconductor 件是热连接至该导热凸柱,从而热连接至该基座; 其中该黏着层是设置于该基座上,延伸于该基座上方,延伸进入该第一通孔内一介于该导热凸柱与该基板之间的第一缺口,延伸进入该第二通孔内一介于该讯号凸柱与该基板之间的第二缺口,并于所述缺口内延伸跨越该介电层,该黏着层自该导热凸柱侧向延伸至该端子或越过该端子,且该黏着层是介于该导热凸柱与该介电层之间、该讯号凸柱与该介电层之间以及该基座与该介电层之间; 其中该基板是设置于该黏着层上,且延伸于该基座上方; 其中该焊垫是延伸于该介电层上方,而该端子则延伸于该黏着层下方;以及其中该导热凸柱延伸进入该第一开口与该第一通孔,该讯号凸柱延伸进入该第二开口与该第二通孔,所述导热凸柱与所述讯号凸柱具有相同厚度且彼此共平面,该基座与该端子具有相 Member is thermally connected to the thermally conductive boss, thereby thermally connected to the base; wherein the adhesion layer is disposed on the base, the base extends on the upper, extends into a through hole between the first protrusion of the heat conducting the gap between the first pillar and the substrate, the second through bore extending into a second gap interposed between the boss and the signal substrate, and the dielectric layer extends across said gap, the adhesive thermally conductive layer extends from the boss laterally or over the terminal to the terminal, and the adhesive layer is interposed between the boss and the thermally conductive dielectric layer, the signal between the boss and the base dielectric layer, and between the seat and the dielectric layer; wherein the substrate is disposed on the adhesive layer, and extending to the upper base; wherein the pad extends above the dielectric layer, and the terminal is in the adhesive layer extends below; and wherein the thermally conductive stud extending into the first opening and the first through hole, the signal boss extending into the second opening and the second through hole, the heat conducting boss having a boss with the signal same thickness and coplanar with each other, the base and the terminal has a phase 厚度且彼此共平面。 The thickness and coplanar with each other.
29.根据权利要求28所述的半导体芯片组体,其特征在于:该半导体器件为一包含LED芯片的LED封装体。 The semiconductor chip body 29. The set according to claim 28, wherein: the semiconductor device is an LED chip comprising an LED package.
30.根据权利要求29所述的半导体芯片组体,其特征在于:该LED封装体是利用一第一焊锡电性连接至该焊垫,并利用一第二焊锡热连接至该散热座。 30. The semiconductor body of the chip set according to claim 29, wherein: the LED package using a first electrically connected to the solder pad, and using a second solder is thermally connected to the cooling block.
31.根据权利要求28所述的半导体芯片组体,其特征在于:该半导体器件为一半导体-H-* II心/TO The semiconductor chip body 31. The set according to claim 28, wherein: the semiconductor device is a semiconductor -H- * II Heart / TO
32.根据权利要求31所述的半导体芯片组体,其特征在于:该芯片是利用一打线电性连接至该焊垫,并利用一固晶材料热连接至该散热座。 The semiconductor body 32. The chipset according to claim 31, wherein: the chip is the use of a wire electrically connected to the pad, using a die attach material is thermally coupled to the cooling block.
33.根据权利要求28所述的半导体芯片组体,其特征在于:该黏着层于该第一缺口内接触该导热凸柱与该介电层,并于该第二缺口内接触该讯号凸柱与该介电层,同时于所述缺口外接触该基座、该端子与该介电层。 The semiconductor chip body 33. The set according to claim 28, wherein: the adhesive layer is in contact with the first notch boss and the thermally conductive dielectric layer, and in contact with the signal in the second boss notch while the outer notch contacts the base and the dielectric layer, the dielectric layer to the terminal.
34.根据权利要求28所述的半导体芯片组体,其特征在于:该黏着层于所述侧面方向覆盖且环绕所述导热凸柱、所述讯号凸柱。 34. The semiconductor body of the chip set according to claim 28, wherein: the adhesive layer covering and surrounding the side surface direction of the heat conducting boss, the boss signal.
35.根据权利要求28所述的半导体芯片组体,其特征在于:该黏着层同形被覆于所述导热凸柱、所述讯号凸柱的侧壁。 The semiconductor chip body 35. The set according to claim 28, wherein: the adhesive layer is coated onto the thermally conductive formed with studs, the side walls of the stud signal.
36.根据权利要求28所述的半导体芯片组体,其特征在于:该黏着层与所述导热凸柱和所述讯号凸柱的顶部及底部共平面。 The semiconductor chip body 36. The set according to claim 28, wherein: the adhesive layer and the top and bottom of the thermally conductive studs and the studs coplanar signal.
37.根据权利要求28所述的半导体芯片组体,其特征在于:该黏着层自该导热凸柱侧向延伸且越过该端子。 The semiconductor chip body 37. The set according to claim 28, wherein: the adhesive layer from the thermally conductive boss extending laterally across the terminal.
38.根据权利要求28所述的半导体芯片组体,其特征在于:该黏着层延伸至该半导体芯片组体的外围边缘。 The semiconductor chip body 38. The set according to claim 28, wherein: the adhesive layer extends to the periphery of the semiconductor chip set body edge.
39.根据权利要求28所述的半导体芯片组体,其特征在于:该导热凸柱是与该基座一体成形,该讯号凸柱则与该端子一体成形。 39. The semiconductor body of the chip set according to claim 28, characterized in that: the thermally conductive stud is integrally formed with the base, the boss is integrally formed signal to the terminal.
40.根据权利要求28所述的半导体芯片组体,其特征在于:该导热凸柱为平顶锥柱形,其直径自该基座至该导热凸柱的一平坦顶部是呈向上递减,且该讯号凸柱为平顶锥柱形,其直径自该端子至该讯号凸柱的一平坦顶部是呈向上递减。 The semiconductor chip body 40. The set according to claim 28, characterized in that: the thermally conductive flat-topped cone cylindrical stud having a diameter from the top to the base of a planar heat conducting boss is a decreasing direction, and the flat-topped cone signal cylindrical stud having a diameter of from the terminal to a flat top of the stud signal is a decreasing upward.
41.根据权利要求28所述的半导体芯片组体,其特征在于:该基座从下方覆盖该导热凸柱,支撑该基板,且与该半导体芯片组体的外围边缘保持距离。 The semiconductor chip body 41. The set according to claim 28, wherein: the base from below to cover the heat conducting stud, for supporting the substrate, and keep a distance from the peripheral edge of the semiconductor body chipset.
42.根据权利要求28所述的半导体芯片组体,其特征在于:该导线是与该散热座保持距离,该焊垫接触该介电层,该端子接触该黏着层,该讯号凸柱则接触该黏着层与该介电层。 The semiconductor chip body 42. The set according to claim 28, wherein: the lead is held distance from the heat sink, the pad contact the dielectric layer, the adhesive layer is in contact with the terminal, the boss is in contact with the signal the adhesive layer and the dielectric layer.
43.根据权利要求28所述的半导体芯片组体,其特征在于:该端子是邻接该讯号凸柱,延伸于该讯号凸柱下方,并沿所述侧面方向自该讯号凸柱侧向延伸。 The semiconductor chip body 43. The set according to claim 28, wherein: the signal terminals is adjacent to the boss, the boss extending downward signal, and the signal extending from the boss laterally along the lateral direction.
44.根据权利要求28所述的半导体芯片组体,其特征在于:该散热座至少包含一盖体,该盖体位于该导热凸柱的一顶部上方,邻接该导热凸柱的该顶部,并从上方覆盖该导热凸柱的该顶部,同时沿所述侧面方向自该导热凸柱的该顶部侧向延伸。 The semiconductor chip body 44. The set according to claim 28, wherein: the heat sink comprises at least a cover, the cover is positioned above a top of the thermally conductive stud, adjacent to the top of the thermally conductive boss, and from above to cover the top of the thermally conductive stud, while from the top side of the thermal conductive stud extending in the lateral direction.
45.根据权利要求44所述的半导体芯片组体,其特征在于:该盖体与该焊垫于该介电层上方为共平面。 The semiconductor chip body 45. The set according to claim 44, wherein: the cover with the pad above the dielectric layer coplanar.
46.根据权利要求44所述的半导体芯片组体,其特征在于:该盖体为矩形,该导热凸柱的该顶部则为圆形。 The semiconductor chip body 46. The set according to claim 44, wherein: the cover is rectangular, the top portion of the thermally conductive stud was circular.
47.根据权利要求46所述的半导体芯片组体,其特征在于:该盖体为正方形。 The semiconductor chip body 47. The set according to claim 46, wherein: the cover is square.
48.根据权利要求44所述的半导体芯片组体,其特征在于:该盖体的尺寸及形状是配合该半导体器件的一热接触表面而设计,该导热凸柱的该顶部的尺寸及形状则并非配合该半导体器件的该热接触表面而设计。 The semiconductor chip body 48. The set according to claim 44, wherein: the size and shape of the lid member is in thermal contact surface with a semiconductor device and the design, size and shape of the top of the heat conducting boss is the semiconductor device is not fit the design of the contact surface of the heat.
49. 一种半导体芯片组体,其特征在于:该半导体芯片组体至少包含: 一半导体器件; 一黏着层,其至少具有第一开口及第二开口; 一散热座,其至少包含一导热凸柱、一基座及一盖体,其中该导热凸柱是邻接该基座并与该基座一体成形,该导热凸柱是沿一向上方向延伸于该基座上方,并为该基座与该盖体提供热连接,该基座是沿一与该向上方向相反的向下方向延伸于该导热凸柱下方,并沿垂直于该向上及向下方向的侧面方向自该导热凸柱侧向延伸,该盖体位于该导热凸柱的一顶部上方,邻接该导热凸柱的该顶部,并从上方覆盖该导热凸柱的该顶部,同时沿所述侧面方向自该导热凸柱的该顶部侧向延伸; 一基板,其至少包含一焊垫、一路由线及一介电层,其中第一及第二通孔延伸贯穿该基板;及一导线,其至少包含该焊垫、该路由线、一端子与 49. A semiconductor chip set body, wherein: the semiconductor chip set comprises at least: a semiconductor device; an adhesive layer having at least a first opening and a second opening; a heat sink, which includes at least one thermally conductive protrusion columns, a base and a cover, wherein the thermally conductive stud is adjacent to the base and integrally formed with the base, the thermally conductive boss extends along a direction upward to the upper base, and the base and that the cover provides thermally connected to the base along a direction opposite to the upwardly extending downwardly below the thermally conductive boss, and in the direction perpendicular to the side face upward and downward direction from the boss laterally thermally extend, the cover is positioned above a top of the thermally conductive stud, adjacent to the top of the thermally conductive studs and the top cover from above, the thermally conductive boss, while in the lateral direction of the top from the heat conducting stud extends laterally; a substrate, comprising at least one pad, a routing line and a dielectric layer, wherein the first and second through-holes extending through the substrate; and a conductor, comprising at least the bonding pad, the routing line , and a terminal 讯号凸柱,其中该路由线邻接该焊垫,该讯号凸柱则邻接该路由线与该端子,并延伸于该焊垫与该路由线下方,同时延伸于该端子上方,且该焊垫与该端子间的一导电路径包含该路由线与该讯号凸柱; 其中该半导体器件是设置于该盖体上,重叠于该导热凸柱但并未重叠于该讯号凸柱,该半导体器件是电性连接至该焊垫,从而电性连接至该端子,且该半导体器件是热连接至该盖体,从而热连接至该基座; 其中该黏着层是设置于该基座上,延伸于该基座上方,延伸进入该第一通孔内一介于该导热凸柱与该基板之间的第一缺口,延伸进入该第二通孔内一介于该讯号凸柱与该基板之间的第二缺口,并于所述缺口内延伸跨越该介电层,该黏着层是介于该导热凸柱与该介电层之间、该讯号凸柱与该介电层之间以及该基座与该介电层之间,该黏着层于所述侧面 Signal studs, wherein the routing line adjacent to the pad, the signal boss is adjacent to the route line and the terminal, and extends below the bonding pad and the routing lines, while extending to the upper terminal, and the pads and a conductive path between the terminals of the route comprises a signal line and the stud; wherein the semiconductor device is disposed on the cover, overlapping the thermally conductive boss in overlapping but not to the stud signal, the semiconductor device is electrically connected to the pad, thereby electrically connected to the terminals, and the semiconductor device is thermally connected to the cover, thereby thermally connected to the base; wherein the adhesion layer is disposed on the base, extends to the above the base, extends into the first through hole a gap interposed between the first thermally conductive studs and the substrate, extends into the second through hole a signal is interposed between said second boss and the substrate gap, and extending across the cutout in the dielectric layer, the adhesive layer is interposed between the boss and the thermally conductive dielectric layer, and the signal between the base and the boss and the dielectric layer between the dielectric layer, the adhesive layer on the side surface 向覆盖且环绕所述导热凸柱、所述讯号凸柱,且延伸至该半导体芯片组体的外围边缘; 其中该焊垫延伸于该介电层上方;以及其中该导热凸柱延伸进入该第一开口与该第一通孔,该讯号凸柱延伸进入该第二开口与该第二通孔,所述导热凸柱与所述讯号凸柱具有相同厚度,彼此共平面,且延伸穿过该黏着层与该介电层,该基座与该端子具有相同厚度,彼此共平面,且延伸于该黏着层与该介电层下方,所述导热凸柱和所述讯号凸柱的顶部及底部是与该黏着层共平面。 The covering and surrounding the heat conducting boss, the boss signal, and extending to the peripheral edge of the semiconductor chip set body; wherein the electrical bonding pad extends above the dielectric layer; and wherein the thermally conductive stud extending into the second a first opening and the through hole, the signal boss extending into the second opening and the second through-hole, the boss of the heat conductive studs signal having the same thickness, coplanar with each other, and extends through the adhesive layer and the dielectric layer, the base and the terminals having the same thickness, coplanar with each other, and extending below the adhesive layer and the dielectric layer, the top and bottom of the thermally conductive studs and the stud signal It is coplanar with the adhesive layer.
50.根据权利要求49所述的半导体芯片组体,其特征在于:该半导体器件为一半导体芯片,且是利用一固晶材料设置于该盖体上,并利用一打线电性连接至该焊垫,同时利用该固晶材料热连接至该盖体。 The semiconductor chip body 50. The set according to claim 49, wherein: the semiconductor device is a semiconductor chip, and the use of a solid polycrystalline material is disposed on the cover, and using a wire electrically connected to the pads, while the use of a solid polycrystalline material is thermally connected to the cover.
51.根据权利要求49所述的半导体芯片组体,其特征在于:该黏着层于所述缺口内接触所述导热凸柱、所述讯号凸柱与该介电层,并于所述缺口外接触该基座、该端子与该介电层,该介电层则接触该焊垫与该路由线,并与所述导热凸柱、所述讯号凸柱、该基座与该端子保持距离。 The semiconductor chip body 51. The set according to claim 49, wherein: the adhesive layer is in contact with said notch in said heat conducting boss, the boss of the signal gap and the dielectric layer, and the outer contacting the base, the terminals of the dielectric layer, the dielectric layer is in contact with the pads and the routing line, and the signal studs, the distance from the terminal holding base and the heat conducting studs.
52.根据权利要求49所述的半导体芯片组体,其特征在于:该导热凸柱为平顶锥柱形,其直径自该基座至该盖体是呈向上递减,该讯号凸柱为平顶锥柱形,其直径自该端子至该路由线是呈向上递减,该导热凸柱的该顶部为圆形,该盖体则为矩形。 The semiconductor chip body 52. ​​The set according to claim 49, characterized in that: the thermally conductive flat-topped cone cylindrical stud having a diameter from the base to the cover is a decreasing direction, the signal level of boss top cone column having a diameter of the route from the terminal to the line is a decreasing direction, the top portion of the heat conducting boss is circular, rectangular, compared with the cover.
53.根据权利要求52所述的半导体芯片组体,其特征在于:该盖体则为正方形。 The semiconductor chip body 53. The set according to claim 52, wherein: the cover was a square.
54.根据权利要求49所述的半导体芯片组体,其特征在于:该盖体与该焊垫于该介电层上方为共平面。 The semiconductor chip body 54. The set according to claim 49, wherein: the cover with the pad above the dielectric layer coplanar.
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