CN102055313B - Power factor correction control device in fixed frequency constant on time current make-and-break mode - Google Patents
Power factor correction control device in fixed frequency constant on time current make-and-break mode Download PDFInfo
- Publication number
- CN102055313B CN102055313B CN2011100046980A CN201110004698A CN102055313B CN 102055313 B CN102055313 B CN 102055313B CN 2011100046980 A CN2011100046980 A CN 2011100046980A CN 201110004698 A CN201110004698 A CN 201110004698A CN 102055313 B CN102055313 B CN 102055313B
- Authority
- CN
- China
- Prior art keywords
- output
- generation module
- module
- termination
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P80/00—Climate change mitigation technologies for sector-wide applications
- Y02P80/10—Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier
Abstract
The invention discloses a power factor correction control device which comprises an voltage ring module, a sawtooth wave generating module, a comparator Uc, a clocked flip-flop, a driving pulse generating module and a driving module, wherein the input of the voltage ring module is connected with an output voltage feedback end, the output of the voltage ring module is connected to one input end of the comparator Uc, the other input end of the comparator Uc is connected with an output end of the swatooth wave generating module, the output end of the comparator Uc is connected with one input end of the driving pulse generating module, the other input end of the driving pulse generating module is connected with the output end of the clocked flip-flop, one output end of the driving pulse generating module is connected with the input end of the driving pulse generating module, the other output end of the driving pulse generating module is connected with the input end of the sawtooth wave generating module, and the output end of the driving module is connected with the driving end. The invention can realize high power factor of the input current in an entire input range; and the performance of the power factor correction control device is better than that of the traditional control chip in a critical intermittent mode.
Description
Technical field
The invention belongs to the switch power technology field, relate to a kind of control device that is operated in the circuit of power factor correction of the constant frequency under the discontinuous current pattern (Discontinuous conduction mode is hereinafter to be referred as DCM), constant ON time.
Background technology
The extensive use of power electronic equipment causes severe contamination to utility network, and harmonic wave and idle problem come into one's own day by day.In order to alleviate the extent of injury of electric pollution, many countries have formulated corresponding standard one after another, as the harmonic standard IEEE555-2 of International Electrotechnical Commission and IEC1000-3-2 etc.Usually adopt power factor correction (Power Factor Correction is called for short PFC) technology in the Switching Power Supply, suppress harmonic wave effectively as active power factor correcting (Active Power Factor Correction is called for short APFC) technology.
Anti exciting converter is widely used in the middle low power converter owing to simple in structure.Present a kind of application trend is to constitute the single-stage pfc circuit at anti exciting converter in conjunction with the power factor correction chip that some often are applied to the electric current critical discontinuous mode of non-isolation type topology, as utilizes multiplier sampling input voltage waveform, is operated in the L6562 of electric current critical discontinuous mode and need not multiplier, is operated in the NCP1607 of permanent ON time control etc.The common ground of these two kinds of different control modes is all to be that the control main circuit is operated in the electric current critical conduction mode, and advantage is that the efficient of circuit is higher; Shortcoming is that the power factor of circuit is lower for circuit of reversed excitation or buck-boost circuit, especially under the high input voltage situation.
For anti exciting converter, direct current input current average value expression formula is shown in (1), and the input current average value expression formula is more near half-sinusoid, and then the power factor of circuit is more high.
Being operated in electric current critical discontinuous mode single-stage for these two kinds of L6562 or NCP1607 instead swashs for the pfc circuit:
Wherein
For output voltage is converted the former limit of transformer voltage afterwards,
kBe the current/voltage coefficient of correspondence, D is duty ratio, is the ratio of ON time and switch periods; Normalized output current wave in half power frequency period as shown in Figure 1, wherein
S=V o ' / V Ac , can see along with
sDiminish, namely the input voltage amplitude increases, and the wave distortion of input current is more severe, and power factor is more low.
Therefore, overcome the prior art defective, the power factor that the raising single-stage instead swashs pfc circuit is to have very much practical significance and a challenging job.
Summary of the invention
The present invention proposes a kind of fixed permanent ON time discontinuous current pattern single-stage frequently and instead swash the PFC control device, this control device need not multiplier, and structure is very simple, can obtain higher power factor.
The technical scheme that technical solution problem of the present invention is taked is:
The present invention includes the Voltage loop module, the sawtooth waveforms generation module, comparator Uc, clocked flip-flop, driving pulse generation module and driver module, the input of Voltage loop module connects output voltage feedback end (FB), the input of comparator Uc is received in the output of Voltage loop module, the output of another input termination sawtooth waveforms generation module of comparator Uc, an input of the output termination driving pulse generation module of comparator Uc, the output of another input termination clocked flip-flop of driving pulse generation module, the input of an output termination driver module of driving pulse generation module, the input of another output termination sawtooth waveforms generation module of driving pulse generation module, the output of driver module connects drive end (DRV).
The Voltage loop module is made up of input resistance Rf, error amplifier Uf, compensating network and voltage reference Vref; The termination output voltage feedback end (FB) of input resistance Rf wherein, the negative input end of another termination error amplifier of input resistance Rf, the positive input termination voltage reference Vref of error amplifier Uf, for the error amplifier of voltage-type, compensating network is connected across between the negative input end and output of error amplifier Uf.
The sawtooth waveforms generation module is made up of positive supply VDD, DC current source IDC, capacitor C s and switch S c; The termination positive supply VDD of constant-current source IDC wherein, behind the end of another termination capacitor C s of DC current source IDC and the end of switch S c as the output of sawtooth waveforms generation module, the other end ground connection of the other end of capacitor C s and switch S c, the anti-phase output of the control termination driving pulse generation module of switch S c, the sawtooth waveforms generation module is at main circuit switch pipe conduction period generation sawtooth waveforms; At main circuit switch pipe blocking interval, sawtooth waveforms generation module output low level,
The output of the negative input termination error amplifier of comparator Uc, i.e. the output of Voltage loop module, the output of the positive input termination sawtooth waveforms generation module of comparator Uc.Comparator compares the output signal of sawtooth waveforms generation module and the output signal of Voltage loop module, and when the output signal of sawtooth waveforms generation module rises to when equating with the output signal of Voltage loop module, comparison module output is high level from the low level upset.
The driving pulse generation module generally is made of rest-set flip-flop, the output of the R termination comparator Uc of rest-set flip-flop, the output of the S termination clocked flip-flop of rest-set flip-flop, the forward output Q of rest-set flip-flop is the forward output of driving pulse generation module, the anti-phase output of rest-set flip-flop
Reversed-phase output for the driving pulse generation module.
The positive output end of the input termination driving pulse generation module of driver module, the output of driver module connects the gate pole of main circuit switch pipe through drive end (DRV).
Input resistance Rf in the described Voltage loop module can remove in some application scenario.
Error amplifier Uf in the described Voltage loop module also can adopt current mode to misplace, the output that corresponding compensating network one termination misplaces, other end ground connection.
Positive supply VDD in the described sawtooth waveforms generation module can be that external power supply directly produces, and also can be the reference power supply that produces by external power supply.
Constant-current source IDC generation circuit belongs to known technology in the described sawtooth waveforms generation module, and constant-current source IDC numerical value can be made as fixed value, also can adjust by external parameter.
The input of described comparison module is respectively the output signal of sawtooth waveforms generation module and the output signal of Voltage loop module.
Described clocked flip-flop generation circuit belongs to known technology, is used for producing the clock signal of fixed cycle.
Described driver module is used for strengthening the driving force of described driving pulse generation module, and its implementation can be the push-pull configuration (totem structure) that two bipolar transistors or metal oxide semiconductor field effect tube constitute, and belongs to known technology
The present invention is particularly useful for isolated form circuit of reversed excitation or non-isolation type buck-boost circuit to obtain higher power factor, also can be used for other topological circuit such as boost circuit, buck circuit etc.
The main circuit that the present invention uses need be operated in the discontinuous current pattern, so main circuit parameter must suitably design to guarantee that circuit can not enter continuous current mode.
Operation principle of the present invention is as follows: the main circuit output voltage is received the negative input end of sending into the error amplifier Uf of Voltage loop module after the resistance R _ f through output voltage feedback end (FB), this feedback signal compares with the voltage reference Vfef that is connected on the positive input terminal of error amplifier Uf, error between the two is after compensating network is amplified, deliver to the negative input end of comparator Uc as the output of Voltage loop module, the sawtooth signal that produces with the sawtooth waveforms generation module compares, when sawtooth signal rises to the output amplitude of Voltage loop module, comparator Uc exports high level, the high level of comparator Uc output is as the reset signal of driving pulse generation module, determined the turn-off time point of driving pulse, and opening of driving pulse is that regular time in cycle signal by clocked flip-flop produces decides, therefore the ON time of driving pulse is decided by output and the sawtooth waveforms slope of Voltage loop module, because the sawtooth waveforms slope is only determined by electric capacity Sc and constant-current source IDC, when these two is fixed, the sawtooth waveforms slope is also just fixing, thereby under specific input voltage and certain loads, the stable state output of Voltage loop module also is fixed value, thereby the ON time of driving pulse is steady state value; When input voltage amplitude or loading condition changed, the output level of Voltage loop module changed, thereby the pass breakpoint of driving pulse is changed, and the ON time of corresponding driving pulse changes, and formed negative feedback and made output voltage stabilization.
Instead swash pfc circuit when the present invention is applied to single-stage, because ON time is constant, so the peak value of input current is directly proportional with input voltage, still can use formula (1) to represent; Because switch periods is constant, so circuit duty ratio D is constant, can obtain the mean value of input current thus:
（5）
By formula (5) as seen, the mean value of input current is to be sinusoidal rule fully to change, and therefore can obtain very high power factor.
Beneficial effect of the present invention is: the Power Factor Correction Control device of deciding the permanent ON time discontinuous current of frequency pattern that the present invention proposes can be realized the High Power Factor of input current in the full input range, and performance is better than traditional critical discontinuous mode control; Core control devices can be integrated into single-chip in addition.
Description of drawings
Fig. 1 instead swashs the normalized input current waveform of pfc circuit for the single-stage of critical discontinuous mode control;
Fig. 2 is circuit block diagram of the present invention;
Fig. 3 instead swashs pfc circuit embodiment schematic diagram for the present invention with the anti-single-stage that swashs the main circuit formation;
Fig. 4 is the main waveform among the anti-sharp pfc circuit embodiment of the single-stage of the present invention and anti-sharp main circuit formation;
Fig. 5 implements schematic diagram for the non-isolation type pfc circuit of the present invention and liter-step-down (buck-boost) main circuit formation.
Embodiment
Be elaborated below in conjunction with block diagram of the present invention and specific embodiment schematic diagram content of the present invention.
With reference to Fig. 2, the fixed Power Factor Correction Control device of permanent ON time discontinuous current pattern frequently comprises: Voltage loop module 100, sawtooth waveforms generation module 200, comparator 300, clocked flip-flop 400, driving pulse generation module 500, driver module 600.An input of comparator 300 is received in the output of Voltage loop module 100, the output of another input termination sawtooth waveforms generation module of comparator 300, the output of comparator 300 connects an input of driving pulse generation module 500, the output of another input termination clocked flip-flop 400 of driving pulse generation module, another output of driving pulse generation module 500 connects the input of driver module 600.
Sawtooth waveforms generation module 200 is made up of positive supply VDD, DC current source IDC, capacitor C s and switch S c; The termination positive supply VDD of constant-current source IDC wherein, behind the end of another termination capacitor C s of DC current source IDC and the end of switch S c as the output of sawtooth waveforms generation module, the other end ground connection of the other end of capacitor C s and switch S c, the anti-phase output of the control termination driving pulse generation module of switch S c, the sawtooth waveforms generation module is at main circuit switch pipe conduction period generation sawtooth waveforms; At main circuit switch pipe blocking interval, sawtooth waveforms generation module output low level.
The clock signal that clocked flip-flop 400 output frequencies are fixing, embodiment belongs to techniques well known
Driving pulse generation module 500 comprises rest-set flip-flop, the output of the R termination comparator 300 of rest-set flip-flop, the output of the S termination clocked flip-flop 400 of rest-set flip-flop, the forward output Q of rest-set flip-flop is the forward output of driving pulse generation module 400, the anti-phase output of rest-set flip-flop
Anti-phase output for driving pulse generation module 400.
The positive output end of the input termination driving pulse generation module 500 of driver module 600, the output of driver module 600 is delivered to the gate pole of outside main circuit switch pipe through drive end (DRV).
The single-stage that Fig. 3 constitutes for the present invention and circuit of reversed excitation main circuit anti-sharp pfc circuit the specific embodiment schematic diagram, wherein control section is identical with content of the present invention shown in Figure 2, and the circuit of reversed excitation main circuit partly comprises alternating current input power supplying, rectifier bridge B1, input capacitance Cin, absorbs network, transformer T, switching tube Q1, output diode D1, output capacitance Co, load, output voltage feedback network.Cin is the polarity free capacitor of low capacity, is used for filtering high-frequency current harmonic wave, and to the not influence of output waveform of rectifier bridge B1, the output voltage feedback network is mainly used to output voltage is carried out sampling feedback, and plays buffer action.Fig. 4 is the main waveform in embodiment illustrated in fig. 3, wherein
v 100 , v 200 With
v 400 Be respectively the output waveform of Voltage loop module 100, sawtooth waveforms generation module 200 and clocked flip-flop 400,
v GDRV Be the output waveform of driver module 600,
i Pri Be the primary current waveform,
i Pk It is primary current peak value waveform.
The present invention can be applied to isolated form output, also can be applied to non-isolation type output.Fig. 5 is the non-isolation type pfc circuit embodiment connection diagram of buck (buck-boost) the circuit formation of the present invention and a kind of non-isolation; Wherein control section is identical with content of the present invention shown in Figure 2, and main circuit partly is the buck-boost circuit of an interchange input, belongs to techniques well known.
The concrete module those skilled in the art that the present invention includes can have numerous embodiments under the prerequisite of its spirit, or by various compound mode, form different specific embodiments, are not described in detail here.
No matter above how detailed explanation is, can have many modes to implement the present invention in addition, and described in the specification is specific embodiment of the present invention.All spirit essence is done according to the present invention equivalent transformation or modification all should be encompassed within protection scope of the present invention.
The above-mentioned detailed description of the embodiment of the invention be not exhaustive or be used for limiting the present invention to above-mentioned clear and definite in form.Above-mentioned with schematic purpose specific embodiment of the present invention and example are described in, those skilled in the art will recognize that and can carry out various equivalent modifications within the scope of the invention.
At above-mentioned declarative description specific embodiment of the present invention and having described in the anticipated optimal set pattern, no matter how detailed explanation appearred hereinbefore, also can be implemented in numerous ways the present invention.The details of foregoing circuit structure and control mode thereof is carried out in the details at it can carry out considerable variation, yet it still is included among the present invention disclosed herein.
Should be noted that as above-mentioned employed specific term should not redefine this term here with restriction of the present invention some certain features, feature or the scheme relevant with this term for being illustrated in when explanation some feature of the present invention or scheme.In a word, should be with the terminological interpretation in the claims of enclosing, used for not limiting the invention to disclosed specific embodiment in the specification, unless above-mentioned detailed description part defines these terms clearly.Therefore, actual range of the present invention not only comprises the disclosed embodiments, also is included in to implement or carry out all equivalents of the present invention under claims.
Claims (5)
1. decide the Power Factor Correction Control device of permanent ON time discontinuous current pattern frequently, it is characterized in that: comprise the Voltage loop module, the sawtooth waveforms generation module, comparator Uc, clocked flip-flop, driving pulse generation module and driver module, the input of Voltage loop module connects the output feedback end, the negative input end of comparator Uc is received in the output of Voltage loop module, the output of the positive input termination sawtooth waveforms generation module of comparator Uc, the R end of the output termination driving pulse generation module of comparator Uc, the output of the S termination clocked flip-flop of driving pulse generation module, the positive output Q of driving pulse generation module connects the input of driver module, the anti-phase output of driving pulse generation module
Connect the input of sawtooth waveforms generation module, the output termination drive end of driver module;
The Voltage loop module is made up of input resistance Rf, error amplifier Uf, compensating network and voltage reference Vref; Wherein the termination of input resistance Rf is exported feedback end, the negative input end of another termination error amplifier Uf of input resistance Rf, the positive input termination voltage reference Vref of error amplifier Uf;
The sawtooth waveforms generation module is made up of positive supply VDD, DC current source IDC, capacitor C s and switch S c; The termination positive supply VDD of DC current source IDC wherein, behind the end of another termination capacitor C s of DC current source IDC and the end of switch S c as the output of sawtooth waveforms generation module, the other end ground connection of the other end of capacitor C s and switch S c, the anti-phase output of the control termination driving pulse generation module of switch S c, the sawtooth waveforms generation module is at main circuit switch pipe conduction period generation sawtooth waveforms; At main circuit switch pipe blocking interval, sawtooth waveforms generation module output low level;
The output of the negative input termination error amplifier Uf of comparator Uc, the output of the positive input termination sawtooth waveforms generation module of comparator Uc; The output signal of the sawtooth waveforms generation module of comparator Uc and the output signal of Voltage loop module compare, when the output signal of sawtooth waveforms generation module rises to when equating with the output signal of Voltage loop module, comparator Uc output is high level from the low level upset;
The driving pulse generation module is made of rest-set flip-flop, the output of the R termination comparator Uc of rest-set flip-flop, the output of the S termination clocked flip-flop of rest-set flip-flop, the forward output Q of rest-set flip-flop is the positive output of driving pulse generation module, the anti-phase output of rest-set flip-flop
Anti-phase output for the driving pulse generation module;
The positive output of the input termination driving pulse generation module of driver module, the output termination drive end of driver module.
2. Power Factor Correction Control device according to claim 1, it is characterized in that: the error amplifier Uf in the described Voltage loop module is the voltage-type error amplifier, compensating network is connected across between the negative input end and output of error amplifier Uf.
3. Power Factor Correction Control device according to claim 1, it is characterized in that: the error amplifier Uf in the described Voltage loop module is the current mode error amplifier, the output of compensating network one termination error amplifier Uf, other end ground connection.
4. Power Factor Correction Control device according to claim 1, it is characterized in that: the positive supply VDD in the described sawtooth waveforms generation module is that external power supply directly produces, or by external power supply at the inner reference power supply that produces of device.
5. Power Factor Correction Control device according to claim 1 is characterized in that: described driver module is two bipolar transistors or two push-pull configurations that metal oxide semiconductor field effect tube constitutes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100046980A CN102055313B (en) | 2011-01-11 | 2011-01-11 | Power factor correction control device in fixed frequency constant on time current make-and-break mode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100046980A CN102055313B (en) | 2011-01-11 | 2011-01-11 | Power factor correction control device in fixed frequency constant on time current make-and-break mode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102055313A CN102055313A (en) | 2011-05-11 |
| CN102055313B true CN102055313B (en) | 2013-07-10 |
Family
ID=43959357
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011100046980A Active CN102055313B (en) | 2011-01-11 | 2011-01-11 | Power factor correction control device in fixed frequency constant on time current make-and-break mode |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102055313B (en) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103166446B (en) * | 2011-12-13 | 2015-05-13 | 万国半导体(开曼)股份有限公司 | Power factor correcting device and correcting method thereof |
| CN102638169B (en) * | 2012-05-08 | 2014-11-05 | 矽力杰半导体技术(杭州)有限公司 | Control circuit and control method of flyback convertor and alternating current-direct current power converting circuit applying control circuit of flyback convertor |
| CN103812323A (en) * | 2012-11-08 | 2014-05-21 | 常州隆辉照明科技有限公司 | Power factor compensating circuit |
| CN103151928B (en) * | 2013-03-20 | 2016-02-03 | 深圳Tcl新技术有限公司 | Switching power circuit and constant power output method thereof |
| CN103701318B (en) * | 2014-01-10 | 2016-05-25 | 矽力杰半导体技术(杭州)有限公司 | For the control circuit of staggered-parallel-type Switching Power Supply |
| CN104038045B (en) * | 2014-06-13 | 2016-09-07 | 杭州电子科技大学 | high power factor correction control circuit and device |
| CN104660028B (en) * | 2015-01-22 | 2017-09-29 | 矽力杰半导体技术(杭州)有限公司 | A kind of circuit of power factor correction |
| CN105827123B (en) * | 2016-05-20 | 2018-08-21 | 杰华特微电子（杭州）有限公司 | Power converting circuit and its drive control circuit |
| CN108063609B (en) * | 2017-12-27 | 2024-01-23 | 杰华特微电子股份有限公司 | Frequency control circuit, control method and switching circuit |
| CN111478581B (en) * | 2020-05-15 | 2023-04-25 | 电子科技大学 | Upper power tube conduction time timing circuit with wide input voltage range |
| CN114944748B (en) * | 2022-07-20 | 2022-11-18 | 中科(深圳)无线半导体有限公司 | Constant frequency control circuit and method for constant on-time control mode converter |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101777770A (en) * | 2010-02-12 | 2010-07-14 | 浙江大学 | Control circuit for voltage dropping type power factor corrector |
-
2011
- 2011-01-11 CN CN2011100046980A patent/CN102055313B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101777770A (en) * | 2010-02-12 | 2010-07-14 | 浙江大学 | Control circuit for voltage dropping type power factor corrector |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102055313A (en) | 2011-05-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102055313B (en) | Power factor correction control device in fixed frequency constant on time current make-and-break mode | |
| CN101777770B (en) | Control circuit for voltage dropping type power factor corrector | |
| CN105356734B (en) | It is a kind of that the Buck circuit power managing chips containing ripple compensation are controlled based on COT | |
| US9847710B2 (en) | Universal system structure for low power adapters | |
| CN102364848B (en) | Primary side-controlled constant current switch power supply controller and primary side-controlled constant current switch power supply control method | |
| CN101925237B (en) | Primary constant-current control device of isolated type flyback converter | |
| CN104038045B (en) | high power factor correction control circuit and device | |
| CN203482091U (en) | Converter and power factor controller | |
| CN203933384U (en) | A kind of high power factor correction control circuit and device | |
| US20120112719A1 (en) | Rectifier circuit | |
| CN103840670A (en) | Energy-saving type high-frequency switching power source | |
| CN113224942B (en) | Non-isolated Buck-Boost bridgeless PFC converter system | |
| CN103051187A (en) | Switching power supply circuit under double ring control | |
| CN107127422B (en) | Arc welder power supply of high power factor technique | |
| CN202168002U (en) | Primary-side control type power switch and alternating current-direct current converter | |
| CN201054545Y (en) | Middle power multi-channel output thin switch power supply | |
| CN110912405A (en) | Four-switch buck-boost converter based on voltage mode control | |
| CN102427293A (en) | Low output ripple wave parallel power-factor correction (PFC) transform control method and device | |
| CN201956901U (en) | Power factor correction control circuit | |
| CN203788505U (en) | Multi-loop control-based Buck-Boost semiconductor lighting drive circuit | |
| CN105792447B (en) | The LED drive circuit and its high power factor correction device of no electrolytic capacitor | |
| CN106230263B (en) | A kind of positive activation type zero voltage switch supply convertor | |
| CN204578367U (en) | A kind of Switching Power Supply of BOOST circuit topological structure | |
| CN202652073U (en) | Switch power supply circuit capable of realizing output constant current control | |
| US20230208279A1 (en) | Active diode circuit and ac/dc power conversion circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20201214 Address after: Room 3003-1, building 1, Gaode land center, Jianggan District, Hangzhou City, Zhejiang Province Patentee after: Zhejiang Zhiduo Network Technology Co.,Ltd. Address before: 310018 No. 2 street, Xiasha Higher Education Zone, Hangzhou, Zhejiang Patentee before: HANGZHOU DIANZI University Effective date of registration: 20201214 Address after: 224008 7th floor, D2 building, Xinlong Plaza, No.38 Renmin South Road, Xindu street, Chengnan New District, Yancheng City, Jiangsu Province (CND) Patentee after: Yancheng Yannan high tech Zone Urban Industry Development Co.,Ltd. Address before: Room 3003-1, building 1, Gaode land center, Jianggan District, Hangzhou City, Zhejiang Province Patentee before: Zhejiang Zhiduo Network Technology Co.,Ltd. |
|
| TR01 | Transfer of patent right |