CN102054770B - Method for manufacturing complementary metal-oxide semiconductor (CMOS) image sensor - Google Patents
Method for manufacturing complementary metal-oxide semiconductor (CMOS) image sensor Download PDFInfo
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- CN102054770B CN102054770B CN 200910198351 CN200910198351A CN102054770B CN 102054770 B CN102054770 B CN 102054770B CN 200910198351 CN200910198351 CN 200910198351 CN 200910198351 A CN200910198351 A CN 200910198351A CN 102054770 B CN102054770 B CN 102054770B
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Abstract
The invention provides a method for manufacturing a complementary metal-oxide semiconductor (CMOS) image sensor. The method comprises the following steps: providing a semiconductor substrate; forming a gate structure on the region for forming metal-oxide semiconductor (MOS) transistors of the semiconductor substrate; implanting first ions on the region for forming light-emitting diodes of the semiconductor substrate to form a first doped region with a doping type opposite to that of the semiconductor substrate; forming a sacrificial layer covering the semiconductor substrate; forming a photoresist pattern layer exposed out of the first doped region on the sacrificial layer; implanting second ions to form a covering layer on the surface of the first doped region, wherein the ion doping type of the covering layer is opposite to that of the first doped region; removing the photoresist pattern layer and the sacrificial layer in other positions except the covering layer; and forming spacers on the side walls of the gate structure. By the method, the light-emitting diodes are prevented from generating dark current, thus finally preventing the CMOS image sensor from generating leakage current.
Description
Technical field
The present invention relates to field of semiconductor manufacture, relate in particular to a kind of manufacture method of cmos image sensor.
Background technology
CMOS (Complementary Metal Oxide Semiconductor) (CMOS) imageing sensor (image sensor) chip is a kind of semiconductor device that light signal is converted to the signal of telecommunication, in recent years, because integrated at circuit, the plurality of advantages of energy consumption and manufacturing cost aspect, cmos image sensor has obtained fast development.Cmos image sensor comprises a series of pixel unit (pixel cells) and peripheral circuit (periphery circuit), each pixel unit comprises a light-emitting diode and at least one MOS transistor, thereby detect the signal of telecommunication of each unit pixel by being in MOS transistor in the pattern of opening the light, described light-emitting diode is used for absorbing the incident light energy and light energy is converted into photoelectric current.
In the manufacture craft of cmos image sensor, crucial is to reduce the dark current (dark current) that light-emitting diode produces, to improve the picture quality of cmos image sensor.
Shown in accompanying drawing 4, structural representation for existing each step of cmos image sensor manufacture craft, with reference to the accompanying drawings 1, in Semiconductor substrate 100, has fleet plough groove isolation structure 101 (STI), be used to form light-emitting diode and MOS transistor between the adjacent fleet plough groove isolation structure 101, described Semiconductor substrate is for example mixed for the P type.On the zone that is used to form MOS transistor of described Semiconductor substrate, deposit successively grid oxic horizon 102 and grid 103, described grid oxic horizon 102 and grid 103 consist of the grid structure of MOS transistor, optionally, the material of described gate oxide is such as being silica etc., and the material of grid for example is polysilicon.
With reference to the accompanying drawings 2, in the zone that is used to form light-emitting diode of described Semiconductor substrate, carry out the first Implantation, in described Semiconductor substrate, form the first doped region 104 of certain depth and doping content, the ionic type that injects in described the first ion implantation technology is opposite with the doping ionic type of Semiconductor substrate, for example, described Semiconductor substrate is that N-type is mixed, and then the doping type of described the first doped region 104 is that the P type mixes.Described the first doped region 104 forms a PN junction with Semiconductor substrate, forms photodiode, is used for the photon of incident is converted into electronics.
With reference to the accompanying drawings 3, cover the insulation material layer of described grid structure at the described area deposition that is used to form MOS transistor, and adopt the described insulation material layer of plasma etching industrial etching, to form side wall 105 (spacer) at described grid structure sidewall.Form in the technique of side wall at described plasma etching, plasma carries out chemical etching and physical bombardment simultaneously to described insulation material layer, some etching ion can collide the sidewall of grid structure, and change the original direction of motion, these ions that change the direction of motion may bombard the zone that is used to form light-emitting diode that is positioned on the Semiconductor substrate, thereby to being used to form the regional injury of light-emitting diode, as shown in Figure 3, cause the damage of umbilicate type on the surface of the first doped region 104, this damage can cause cmos image sensor generation leakage current.
Shown in 4, carry out the second Implantation on the surface of described the first doped region 104 with reference to the accompanying drawings, form cover layer 106 at the first doped region 104, the doping type of described cover layer 106 is opposite with the doping type of the first doped region 104.Form again a PN junction between cover layer 106 and the first doped region 204, the flow direction of the electric current that the PN junction that is used for forming between control the first doped region 104 and the Semiconductor substrate 100 forms after photon is converted into electronics.
From accompanying drawing 4, can find out, form after the described cover layer 106, the damage of the umbilicate type that produces on the first doped region 104 surfaces still exists, in the position that produces the umbilicate type damage, larger dark current can be produced, cmos image sensor generation leakage current can be caused.
Summary of the invention
The invention provides a kind of manufacture method of cmos image sensor, can form in the zone that is used to form light-emitting diode the problem of umbilicate type damage to solve existing cmos image sensor manufacture method.
A kind of manufacture method of cmos image sensor comprises:
Semiconductor substrate is provided, is formed with the isolation structure for the isolation active area in the described Semiconductor substrate, described active area comprises the zone that is used to form MOS transistor and the zone that is used to form light-emitting diode; The zone that is used to form MOS transistor in described Semiconductor substrate forms grid structure;
The first Implantation is carried out in the zone that is used to form light-emitting diode in described Semiconductor substrate, forms first doped region opposite with the Semiconductor substrate doping type;
Form and cover described Semiconductor substrate, the sacrifice layer of grid structure and the first doped region;
Form the photoresist pattern layer that exposes the first doped region at described sacrifice layer;
Take described photoresist pattern layer as mask, carry out the second Implantation, to form cover layer on described the first doped region surface, described tectal doping ionic type is opposite with the doping ionic type of the first doped region;
Remove the sacrifice layer of other position outside photoresist pattern layer and the cover layer;
Form side wall at described grid structure sidewall.
The embodiment of the invention also provides a kind of cmos image sensor, comprising:
Semiconductor substrate is formed with the isolation structure for the isolation active area in the described Semiconductor substrate, described active area comprises the zone that is used to form MOS transistor and the zone that is used to form light-emitting diode; The described side wall that has grid structure and be positioned at the grid structure sidewall on the zone of MOS transistor that is used to form; The described zone that is used to form light-emitting diode comprises the first doped region that is positioned at Semiconductor substrate, and be positioned at successively cover layer and sacrifice layer on the first doped region, wherein, the doping type of the first doped region is opposite with tectal doping type with Semiconductor substrate.
Owing to adopted technique scheme, compared with prior art, the present invention has the following advantages:
Adopt the described method of present embodiment, at first form sacrifice layer at described the first doped region, then see through sacrifice layer and carry out the second Implantation formation cover layer on the first doped region surface, in the technique that forms subsequently side wall, even adopt existing plasma etch process, the plasma that etching is used is known from experience change direction of motion bump Semiconductor substrate, also can only stay depression in described sacrificial layer surface, owing to consist of cover layer and the thing damage of the first doped region surface of light-emitting diode, therefore can not make light-emitting diode produce dark current, finally avoid cmos image sensor to produce leakage current.
Description of drawings
Fig. 1 to Fig. 4 is the structural representation of existing each step of cmos image sensor manufacture craft;
Fig. 5 to Figure 11 is the structural representation of each step of the described cmos image sensor manufacture method of the specific embodiment of the invention.
Embodiment
According to background technology; the manufacture method of existing cmos image sensor; adopting plasma etching industrial etching insulation material layer to form in the technique of side wall; change the direction of motion thereby plasma is known from experience and the insulation material layer of grid structure bumps; cause changing the zone that is used to form light-emitting diode on the plasma strike Semiconductor substrate of the direction of motion; the first doped region at light-emitting diode forms the umbilicate type damage; therefore; the present invention proposes a kind of method; before adopting plasma etching industrial etching insulation material layer formation side wall; form sacrifice layer in the zone that is used to form light-emitting diode; the first doped region for the protection of light-emitting diode; even there is the zone that is used to form light-emitting diode on plasma and the Semiconductor substrate to bump; also can only form defective at sacrifice layer, and can not have influence on the first doped region of light-emitting diode.
Below in conjunction with accompanying drawing the specific embodiment of the present invention is described in detail.
Present embodiment provides a kind of manufacture method of cmos image sensor, comprising:
Step S1, with reference to the accompanying drawings shown in 5, Semiconductor substrate 200 is provided, the active area of described Semiconductor substrate is to carry out the zone that ion doping has formed N trap or P trap, in the present embodiment, be doped to example and describe to carry out the P type in the described Semiconductor substrate, can not think that the application only is only applicable to double conductor and carries out the P type and mix.
Continue with reference to the accompanying drawings shown in 5, be formed with the isolation structure 201 for the isolation active area in the described Semiconductor substrate 200, described isolation structure for example is fleet plough groove isolation structure (STI), described active area comprises the zone that is used to form MOS transistor and the zone that is used to form light-emitting diode, is respectively applied at corresponding region formation MOS transistor and light-emitting diode; For cmos image sensor, the position of described MOS transistor and light-emitting diode is adjacent, and MOS transistor is used for controlling the current blocking that light-emitting diode is produced and gets up or spill out.
Execution in step S2 forms grid structure in the zone that is used to form MOS transistor of described Semiconductor substrate 200; With reference to the accompanying drawings shown in 5, described grid structure comprises and is positioned at successively on the Semiconductor substrate 200 grid oxic horizon 202 and grid 203 that optional, the material of described gate oxide is such as being silica etc., the material of grid for example is polysilicon, can adopt chemical vapor deposition method to form.Certainly, can also adopt other any structure well known to those skilled in the art and the manufacture craft of described grid structure form, and material also can be done selection according to existing technique, as long as its purpose is to make MOS transistor.
Step S3 shown in 6, carries out the first Implantation in the zone that is used to form light-emitting diode of described Semiconductor substrate 200 with reference to the accompanying drawings, forms first doped region 204 opposite with the Semiconductor substrate doping type; Described the first doped region 204 forms a PN junction with Semiconductor substrate, forms photodiode, is used for the photon of incident is converted into electronics.
Be doped to example take described Semiconductor substrate as the P type, then the doping type of described the first doped region 204 is N-type, the positive 5 valency ions that the ion that described N-type is mixed can provide positron for V main group in the periodic table of elements for example, for example phosphonium ion or arsenic ion.
Take phosphonium ion as example, the technique of carrying out the first Implantation is: ion implantation energy is 150 to 200Kev, and ion implantation dosage is 3E12 to 3E13atoms/cm
2Preferably, implant energy is 170KeV, and ion implantation dosage is 6.0E12atoms/cm
2
Step S4 shown in 7, forms and covers described Semiconductor substrate 200, the sacrifice layer 207 of grid structure and the first doped region 204 with reference to the accompanying drawings; The material of described sacrifice layer 207 for example is amorphous polysilicon.
In a specific embodiment of the present invention, described sacrificial layer material for example is polysilicon, and thickness is 50～300 dusts, and manufacture craft for example is low-pressure chemical vapor deposition process.
Step S5 shown in 8, forms the photoresist pattern layer 208 that exposes the first doped region 204 at described sacrifice layer 207 with reference to the accompanying drawings; The technique that forms photoresist pattern layer 208 for example is: adopt spin coating proceeding to form photoresist layer at sacrifice layer 207, the thickness of photoresist layer is greater than the height of grid structure, at last, adopt exposure, developing process is processed described photoresist layer, removal is positioned at the photoresist on the first doped region 204, forms photoresist pattern layer 207.
Step S6, shown in 9, take described photoresist pattern layer 208 as mask, carry out the second Implantation with reference to the accompanying drawings, to form cover layer 206 on described the first doped region 204 surfaces, the doping ionic type of described cover layer 206 is opposite with the doping ionic type of the first doped region 204.
In described the second ion implantation technology, the ion that injects should form cover layer 206 on the first doped region surface by described sacrifice layer 207, therefore, as shown in Figure 9, described cover layer 206 is between described the first doped region 204 and sacrifice layer 207.
Because the doping ionic type of doping ionic type first doped region 204 of described cover layer 206 is opposite, therefore, form again a PN junction between cover layer 206 and the first doped region 204, described PN junction is used for the PN junction (photodiode) of formation between control the first doped region 204 and the Semiconductor substrate 200, the flow direction of the electric current that forms after photon is converted into electronics is the flow direction of electric current shown in dotted line in the accompanying drawing 9.
Continuation is doped to example take Semiconductor substrate as the P type, the doping type of the first doped region 204 is N-type, tectal ion doping type is the P type, the compound ions that the ion that described P type mixes can provide the positive 3 valency ions in hole for III main group in the periodic table of elements or contain the III major element for example, for example boron ion or boron fluoride ion.
With BF
2Ion is example, and the technique of carrying out the second Implantation is: implant energy is 10 to 60Kev, and ion implantation dosage is 2E12 to 2E13atoms/cm
2Preferably, implant energy is 20KeV, and ion implantation dosage is 5.0E12atoms/cm
2
Step S7 with reference to the accompanying drawings shown in 10, removes photoresist pattern layer 208 and the sacrifice layer 207 of other position except cover layer 206.The technique of removing described photoresist pattern layer 208 for example is cineration technics, do not repeat them here, remove after the photoresist pattern layer, continue to adopt wet-etching technology to remove other locational sacrifice layer outside the cover layer 206, that is to say, only keep the sacrifice layer that is positioned on the cover layer 206.
The technique of removing other locational sacrifice layer outside the cover layer 206 for example is: form photoresist layer at described sacrifice layer; and adopt and expose; developing process is removed most photoresist; only keep photoresist at cover layer 206; then adopt the described sacrifice layer of wet etching solution etching that contains ammoniacal liquor; remove the sacrifice layer of not protected by photoresist, only keep the sacrifice layer that is positioned on the cover layer 206.The percent by volume of ammoniacal liquor and deionized water for example is 1: 20～1: 200 in the described wet etching solution.
Step S8 shown in 11, forms side wall 205 at described grid structure sidewall with reference to the accompanying drawings.
The technique that forms described side wall 205 is common process, for example, forms insulation material layer at described grid structure and Semiconductor substrate, then, adopts the described insulation material layer of plasma etching industrial etching to form side wall.Form in the technique of side wall at described plasma etching insulation material layer; same as the prior art; plasma carries out chemical etching and physical bombardment simultaneously to described insulation material layer; some etching ion can collide the sidewall of grid structure; and change the original direction of motion; but; because sacrifice layer 207 is positioned at the surface of cover layer 206; therefore; these ions that change the direction of motion can only bombard on the sacrifice layer 207; therefore; the cover layer of photodiode area has been protected in the existence of sacrifice layer 207; thereby avoided the flow direction of the electric current of the uncontrollable photodiode formation of cover layer generation damage, caused the defective of cmos image sensor generation leakage current.
Present embodiment also provides a kind of cmos image sensor, shown in 11, comprising with reference to the accompanying drawings:
Described grid structure comprises grid oxic horizon 202 and the grid 203 that is positioned at successively on the Semiconductor substrate, and described sacrificial layer material is polysilicon, and thickness is 50 to 300 dusts.
Optionally, described Semiconductor substrate is that the P type mixes, and described the first doped region is that N-type is mixed, and described cover layer is that the P type mixes.
Although oneself discloses the present invention as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can make various changes or modifications, so protection scope of the present invention should be as the criterion with the claim limited range.
Claims (8)
1. the manufacture method of a cmos image sensor is characterized in that, comprising:
Semiconductor substrate is provided, is formed with the isolation structure for the isolation active area in the described Semiconductor substrate, described active area comprises the zone that is used to form MOS transistor and the zone that is used to form light-emitting diode;
The zone that is used to form MOS transistor in described Semiconductor substrate forms grid structure;
The first Implantation is carried out in the zone that is used to form light-emitting diode in described Semiconductor substrate, forms first doped region opposite with the Semiconductor substrate doping type;
Form and cover described Semiconductor substrate, the sacrifice layer of grid structure and the first doped region;
Form the photoresist pattern layer that exposes the first doped region at described sacrifice layer;
Take described photoresist pattern layer as mask, carry out the second Implantation, to form cover layer on described the first doped region surface, described tectal doping ionic type is opposite with the doping ionic type of the first doped region;
Remove the sacrifice layer of other position outside photoresist pattern layer and the cover layer;
Form side wall at described grid structure sidewall.
2. the manufacture method of cmos image sensor according to claim 1 is characterized in that, described sacrifice layer is polysilicon layer.
3. the manufacture method of cmos image sensor according to claim 2 is characterized in that, the thickness of described polysilicon layer is 50 to 300 dusts.
4. the manufacture method of cmos image sensor according to claim 1 is characterized in that, described Semiconductor substrate is that the P type mixes, and described the first doped region is that N-type is mixed, and described cover layer is that the P type mixes.
5. the manufacture method of cmos image sensor according to claim 4 is characterized in that, the doping ion of described the first doped region is phosphonium ion.
6. the manufacture method of cmos image sensor according to claim 5 is characterized in that, the injection technology of phosphonium ion is: ion implantation energy is 150 to 200Kev, and ion implantation dosage is 3E12 to 3E13atoms/cm
2
7. the manufacture method of cmos image sensor according to claim 4 is characterized in that, described cover layer is that P type doping ion is the boron fluoride ion.
8. the manufacture method of cmos image sensor according to claim 7 is characterized in that, the injection technology of boron fluoride ion is: implant energy is 10 to 60Kev, and ion implantation dosage is 2E12 to 2E13atoms/cm
2
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| CN101211839A (en) * | 2006-12-27 | 2008-07-02 | 东部高科股份有限公司 | Method for fabricating a CMOS image sensor |
| CN101304005A (en) * | 2007-05-08 | 2008-11-12 | 中芯国际集成电路制造(上海)有限公司 | Method for forming CMOS image sensor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101211839A (en) * | 2006-12-27 | 2008-07-02 | 东部高科股份有限公司 | Method for fabricating a CMOS image sensor |
| CN101304005A (en) * | 2007-05-08 | 2008-11-12 | 中芯国际集成电路制造(上海)有限公司 | Method for forming CMOS image sensor |
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