CN102033371B - Array substrate and manufacturing method thereof - Google Patents

Array substrate and manufacturing method thereof Download PDF

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Publication number
CN102033371B
CN102033371B CN200910093484A CN200910093484A CN102033371B CN 102033371 B CN102033371 B CN 102033371B CN 200910093484 A CN200910093484 A CN 200910093484A CN 200910093484 A CN200910093484 A CN 200910093484A CN 102033371 B CN102033371 B CN 102033371B
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layer
common electrode
region
sealant
substrate
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CN200910093484A
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CN102033371A (en
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张志男
梁国鹏
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北京京东方光电科技有限公司
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Abstract

The invention discloses an array substrate and a manufacturing method thereof. The array substrate comprises a display area and a border area which is arranged at the periphery of the display area, and the border area comprises a substrate, a common electrode layer arranged above the substrate, a protective layer arranged above the common electrode layer, a through hole which is formed on the protection layer and is arranged above the common electrode layer, a transparent conducting layer which is arranged above the protection layer and is filled in the through hole, and a shielding wire which is formed on the common electrode layer and the protection layer and is arranged above the substrate, wherein the shielding wire is arranged at the outer side of the through hole and the inner side of a border sealing glue area, the border sealing glue area is arranged above the transparent conducting layer and the border sealing glue of the border sealing glue area is filled in the shielding wire. In the technical scheme in the invention, the display quality of the lower edge area can be effectively ensured.

Description

阵列基板及其制造方法 Array substrate and manufacturing method thereof

技术领域 FIELD

[0001] 本发明涉及液晶显示器制造领域,特别涉及一种阵列基板及其制造方法。 [0001] The present invention relates to a liquid crystal display manufacturing, and more particularly relates to an array substrate and a manufacturing method.

背景技术 Background technique

[0002] 随着液晶显示技术的发展,具有低消耗功率、无辐射等特性的TFT IXD已经成为液晶显不市场的主流。 [0002] With the liquid crystal display technology, with a TFT IXD characteristics of low power consumption, no radiation has become the mainstream LCD is not the market. 图I为现有技术中液晶显不面板的结构不意图,图2为图I中的局部放大图,图3为图2中AA向剖视图,如图I、图2和图3所示,图I中的液晶显示面板的阵列基板包括显示区域I和位于该显示区域I四周的边框区域,该边框区域包括上边沿区域21、左边沿区域22、下边沿区域23和右边沿区域24。 FIG. I is not prior art liquid crystal display panel structure is not intended, FIG. 2 is a partial enlarged view of FIG. I, FIG. 2 FIG. 3 is a cross-sectional view taken along line AA, FIG. I, 2 and 3, FIG. I is a liquid crystal display array substrate panel includes a display region I and is located in the border area I around the display region, the frame region includes an upper edge area 21, the left edge region 22, the lower edge region 23 and a right edge region 24. 边框区域的上边沿区域21和左边沿区域22为集成电路板,边框区域的下边沿区域(还可称为数据反对面)23为虚线所示区域,下边沿区域23的具体结构可参见图2和图3所示。 The upper edge region of the frame region 21 and the left edge of region 22 is an integrated circuit board, the lower edge region of the frame region (also referred to as data opposite surface) 23 as a region indicated by broken lines, the lower edge of a specific configuration of the region 23 can be seen in FIG. 2 and 3. 下边沿区域23包括基板3、位于基板3之上的公共电极层4、位于公共电极层4之上的保护层5、多个形成于保护层5上并位于公共电极层4之上的过孔6、位于保护层5之上并填充于过孔6的透明导电层7以及位于所述透明导电层7之上的封框胶区域8。 The lower edge region 23 includes a substrate 3, of the substrate on the 3 common electrode layer 4, the protective layer 5 over 4 common electrode layer, a plurality of formed on the protective layer 5 and located over the aperture on the four common electrode layer 6, located on the protection layer 5 and is filled through the transparent conductive layer hole 6, 7 and the sealant region of the transparent conductive layer above 7, 8. 进一步地,下边沿区域23还包括多个形成于公共电极层4上并位于基板3之上的狭缝9。 Further, the lower edge region 23 further includes a plurality of formed on a common electrode layer 4 and is located in the slit on the substrate 39. 其中,公共电极层4可用于稳定公共电极电压并为彩膜基板提供公共电极电压,从图3可以看出,公共电极层4的边缘与基板3的边缘之间的距离可设置为IOOum至300um,从而保证公共电极层4所提供的公共电极电压的稳定性;保护层5可用于防止公共电极层4被腐蚀;透明导电层7可通过过孔6和封框胶区域8内的金球Au Ball (或称为导电球)将公共电极层4与彩膜基板的透明导电层导通,从而使公共电极层4可以为彩膜基板提供稳定的电压。 Wherein the common electrode layer 4 may be used to stabilize the common electrode voltage and provides a common electrode voltage is a color filter substrate, it can be seen from FIG. 3, the distance between the edges of the substrate, the common electrode layer 4 of 3 may be set to IOOum to 300um to ensure the stability of the common electrode voltage to the common electrode 4 provided layer; protective layer 5 may be used to prevent corrosion of the common electrode layer 4; 7 via the transparent conductive layer through the gold ball holes 6 and 8 in the sealant area Au ball (or referred to as conductive balls) common electrode layer 4 and the transparent conductive layer of the color filter substrate is turned, so that the common electrode layer 4 may provide a stable voltage for the color filter substrate. 在图2中为了清楚表示出阵列基板各层的具体结构,覆盖于透明导电层7之上的封框胶区域8以虚线框表示。 For clarity in FIG. 2 shows a specific configuration of the array substrate layers, overlying the transparent conductive layer 7 of the sealant region 8 indicated by a dashed box. 从图2和图3中可以看出,为防止空气或者水汽中的酸性物质腐蚀透明导电层7,封框胶区域8的宽度要大于透明导电层的宽度。 As can be seen in FIGS. 2 and 3, in order to prevent corrosion of the transparent conductive layer acidic substance air or water vapor 7, the width of the sealant region 8 is greater than the width of the transparent conductive layer.

[0003] 上述阵列基板的边框区域中的公共电极层容易出现被腐蚀的现象,以边框区域的下边沿区域中的公共电极层4为例,下边沿区域中的公共电极层4会出现被腐蚀的现象。 [0003] The common electrode layer frame region of the array substrate are prone to corrosion phenomena to the common electrode layer at the edge region of the frame region in the fourth example, the common electrode layer at the edge region 4 will corrode The phenomenon. 如图2和图3所示,由于下边沿区域可能存在不可见裂痕或者各层结构间致密性不足的问题,水汽会从封框胶区域8与保护层5之间的缝隙渗入到过孔6的位置。 2 and FIG. 3, since the lower edge region there may not be visible between the cracks or the structure of layers of insufficient compactness problems, moisture can penetrate from the gap between the sealant region 8 and the protective layer 5 to the through hole 6 s position. 由于过孔6的位置存在电压差,水汽中的酸性离子(例如C1、S等)与位于过孔6下方的公共电极层4的活性金属(例如Al、Nd等)发生电化学反应,使公共电极层4被腐蚀。 Because of the position of the via hole 6 of a voltage difference, acidic ion water vapor (e.g. C1, S, etc.) through the electrochemical reaction located below the hole 6 active metal (e.g., Al, Nd, etc.) of a common electrode layer 4, the common electrode layer 4 is etched. 随着电化学反应的进行,公共电极层4逐渐被腐蚀掉,当公共电极层4被腐蚀的面积足够大时,公共电极层4提供的公共电极电压会出现异常,从而造成液晶显示面板的下边沿区域出现显示不良,降低了显示品质。 As the electrochemical reaction, the common electrode layer 4 is etched gradually, when the corroded area common electrode layer 4 is sufficiently large, the common electrode voltage provided by the common electrode layer 4 will be abnormal, resulting in the liquid crystal display panel the edge of the area appear a poor display reduced display quality. 当公共电极层4被腐蚀的情况严重时,甚至会影响到封框胶区域8,造成封框胶区域8发生液晶(LiquidCrystal,简称:LC)污染以及出现气泡(Bubble)等不良,从而进一步降低了显示品质。 When the case of corrosion of the common electrode layer 4 serious, even affect the sealant zone 8, resulting in 8 of the liquid crystal occurs sealant region (LiquidCrystal, abbreviation: LC) contamination and air bubbles (Bubble) and other undesirable, thereby further reducing the display quality.

发明内容[0004] 本发明的目的是针对现有技术中的问题,提供一种阵列基板及其制造方法,从而有效保证边框区域的显示品质。 [0004] The present invention is directed to problems of the prior art, provides an array substrate and a manufacturing method, so as to effectively ensure the display quality of the border area.

[0005] 为实现上述目的,本发明提供了一种阵列基板,包括:显示区域和位于所述显示区域四周的边框区域,所述边框区域包括: [0005] To achieve the above object, the present invention provides an array substrate, comprising: a display area and positioned in the display frame region around the frame region comprising:

[0006]基板; [0006] a substrate;

[0007] 位于所述基板之上的公共电极层; [0007] provided on said common electrode layer on a substrate;

[0008] 位于所述公共电极层之上的保护层; [0008] The protective layer is positioned above the common electrode layer;

[0009] 形成于所述保护层上并位于所述公共电极层之上的过孔; [0009] The through hole formed in the upper layer and the common electrode layer located over the protective;

[0010] 位于所述保护层之上并填充于所述过孔的透明导电层; [0010] The protective layer located over and filled in the through hole of the transparent conductive layer;

[0011] 形成于所述公共电极层和所述保护层上并位于所述基板之上的隔离线,所述隔离线位于所述过孔的外侧和封框胶区域的内侧,所述封框胶区域位于所述透明导电层之上并且所述封框胶区域的封框胶填充于所述隔离线中。 [0011] formed on the common electrode layer and the protective layer and located over said substrate line of separation, the separation line is located inside the outer and sealant region of the through-hole, said sealing frame gum region is located above the transparent conductive layer and the sealant sealant glue areas filled in the isolation line.

[0012] 为实现上述目的,本发明实施例还提供了一种阵列基板的制造方法,包括: [0012] To achieve the above object, the present invention further provides an array substrate manufacturing method, comprising:

[0013] 在基板上形成公共电极层,在显示区域的公共电极层上形成栅线栅电极和公共电极,在边框区域的公共电极层上形成隔离线,所述隔离线位于基板之上; [0013] is formed on the substrate, a common electrode layer, a gate line of the gate electrode and the common electrode on the common electrode layer of the display region is formed spacer lines on the common electrode layer in the frame region, the separation line is located on the substrate;

[0014] 在基板上形成公共电极层保护层,所述公共电极层保护层位于所述公共电极层之上; [0014] In the substrate to form a common electrode layer, a protective layer, the common electrode layer protective layer on the common electrode layer on top;

[0015] 在基板上形成位于所述公共电极层之上的数据层和位于所述数据层之上的数据层保护层,保护层包括所述公共电极层保护层和所述数据层保护层; [0015] In the substrate on which is located the common electrode layer on top of the data layer, and the data layer on top of the data layer, a protective layer, a protective layer including the common electrode layer, a protective layer and the data layer, a protective layer;

[0016] 在显示区域的保护层上形成过孔,在边框区域的保护层上形成过孔并去除填充于隔离线中的保护层,在边框区域的保护层上形成的过孔位于所述公共电极层之上; [0016] In the display area of ​​the protective layer is formed over the hole in the border area of ​​the protective layer is formed over the hole and remove the filling in the line of separation of the protective layer in the border area of ​​the protective layer forming vias in said public electrode layer on top;

[0017] 在基板上形成透明导电层,所述透明导电层位于所述保护层之上并填充于所述过孔,所述隔离线位于所述过孔的外侧和封框胶区域的内侧,所述封框胶区域位于所述透明导电层之上并且封框胶区域的封框胶填充于所述隔离线。 [0017] forming a transparent conductive layer on a substrate, the transparent conductive layer located over the protective layer and filling in the via hole, the separation line located over the medial-lateral and the sealant region aperture, the sealant region of the transparent conductive layer above and sealant areas sealant is filled in the isolation line.

[0018] 本发明实施例的技术方案中,通过在边框区域的过孔外侧和封框胶区域内侧设置以封框胶填充的隔离线,水汽被隔离线阻挡而无法进入过孔,避免过孔位置的公共电极层被腐蚀,从而有效保证了边框区域的显示品质。 [0018] The technical solutions of the embodiments of the present invention, the via outer and sealant region provided inside the frame region in a sealant filling line of separation, the water vapor is blocked isolated lines can not enter through the hole, to avoid vias the position of the common electrode layer is corroded, so as to effectively ensure the border area of ​​display quality.

[0019] 下面通过附图和实施例,对本发明的技术方案做进一步的详细描述。 [0019] The following drawings and embodiments, further detailed description of the technical solution of the present invention.

附图说明 BRIEF DESCRIPTION

[0020] 图I为现有技术中液晶显示面板的结构示意图; [0020] Figure I is a schematic structural diagram of a display panel of the prior art liquid crystal;

[0021] 图2为图I中的局部放大图; [0021] FIG. 2 is a partially enlarged view of FIG. I is;

[0022] 图3为图2中AA向剖视图; [0022] FIG. 3 is a FIG. 2 taken along line AA cross-sectional view;

[0023] 图4为本发明实施例一提供的阵列基板的下边沿区域的放大图; [0023] FIG. 4 embodiment of the present invention to provide a lower edge of the array substrate enlarged view of the area;

[0024] 图5为图4中BB向剖视图; [0024] FIG. 5 is a BB in view of the cross-section of FIG. 4;

[0025] 图6a为本发明实施例二中形成公共电极层的示意图; [0025] Figure 6a of the present invention embodiment two form a common electrode layer of the schematic;

[0026] 图6b为本发明实施例二中形成保护层的示意图; [0026] a schematic view of the protective layer is formed the second embodiment in FIG. 6b of the present invention;

[0027] 图6c为本发明实施例二中形成过孔的示意图; [0027] FIG. 6c embodiment schematic view of the hole in embodiment two is formed through the present invention;

[0028] 图6d为本发明实施例二中形成透明导电层的示意图;[0029] 图6e为本发明实施例二中形成封框胶区域的示意图。 [0028] FIG. 6d a schematic view of a transparent conductive layer for forming the second embodiment of the present invention; [0029] FIG. 6e schematic sealant region forming the second embodiment of the present invention.

具体实施方式 Detailed ways

[0030] 本发明实施例一提供了一种阵列基板,该阵列基板包括显示区域和位于显示区域四周的边框区域,其中显示区域和边框区域的结构和位置关系可参见图I中所示。 [0030] Embodiments of the invention an provides an array substrate, the array substrate includes a display region and a frame region area around which shows the structure and the positional relationship between the region and the frame region can be seen in Figure I below. 本实施例中,边框区域包括:基板、位于基板之上的公共电极层,形成于保护层之上并位于公共电极层之上的过孔,位于保护层之上并填充于过孔的透明导电层,形成于公共电极层和保护层上并位于基板之上的隔离线,隔离线位于过孔的外侧和封框胶区域的内侧,该封框胶区域位于透明导电层之上并且该封框胶区域的封框胶填充于隔离线中。 In this embodiment, the border area includes: a substrate of the substrate above the common electrode layer, a protective layer formed over and in a common electrode layer on top of vias, the protective layer on top and filled vias transparent conductive layer, is formed on the common electrode layer and the protective layer and over the substrate shield wire line is located through the outer and inner sealant region aperture, the sealant region is located above the transparent conductive layer and the sealing frame sealant glue areas filled in the isolation line.

[0031] 具体地,以边框区域的下边沿区域为例,边框区域的下边沿区域可参见图4和图5所示,图4为本发明实施例一提供的阵列基板的下边沿区域的放大图,图5为图4中BB向剖视图,如图4和图5所示,下边沿区域包括基板3、公共电极层4、保护层5、透明导电层7、隔离线10和过孔6,换言之,隔离线10和过孔6位于下边沿区域,其中下边沿区域的多个过孔6形成过孔区域6'。 Magnification of the edge regions [0031] Specifically, the lower edge region of the frame region as an example, the lower edge region of the frame region can be seen in FIG. 4 and FIG. 5, FIG. 4 of the present invention, an array substrate according to a first embodiment of the FIG, 4, FIG. 5 is a sectional view along line BB, as shown in FIG. 4 and 5, the lower edge region comprises a substrate 3, a common electrode layer 4, protective layer 5, the transparent conductive layer 7, and the spacer 10 via line 6, in other words, the separation line 10 and the via hole 6 located in the edge area, wherein a plurality of through holes 6 formed in the lower edge region of the via hole region 6 '. 公共电极层4位于基板3之上,保护层5位于公共电极层4之上,过孔6形成于保护层5上并位于公共电极层4之上,透明导电层7位于保护层5之上并填充于过孔6,隔离线10形成于公共电极层4和保护层5上并位于基板3之上,隔离线10还位于过孔区域6'的外侧和封框胶区域8的内侧,封框胶区域8位于透明导电层7之上并且封框胶区域8的封框胶填充于隔离线10。 The common electrode layer 4 positioned on the substrate 3, the protective layer 5 located in a common electrode layer over 4, through holes 6 formed on the protective layer 5 and located in a common electrode layer over 4, the transparent conductive layer 7 is located over the protective layer 5 and inside filled in the via hole 6, the separation line 10 is formed on common electrode layer 4 and the protective layer 5 and of the substrate on the 3, the separation line 10 is also located in the via hole region 6 'of the outer and sealant region 8, sealant glue areas 8 the transparent conductive layer above 7 and sealant areas sealant 8 filled in the separation line 10.

[0032] 进一步地,下边沿区域还可以包括形成于公共电极层4上并位于基板3之上的狭缝9。 [0032] Further, the lower edge region may also comprise formed on a common electrode layer 4 and is located in the slit on the substrate 39.

[0033] 本实施例中,隔离线10的长度可大于等于过孔区域6'的长度。 [0033] In this embodiment, the length of the separation line 10 may be greater than or equal over the length of the bore region 6 '. 隔离线10的宽度可以为IOum至25um。 The width of the separation line 10 may be IOum to 25um.

[0034] 本实施例中,封框胶区域的封框胶的材料为树脂Resin、感光材料UVPhotoInitiator、填充剂Filter、硬化剂Hardener或者附属材料Additive。 [0034] In this embodiment, sealant to sealant area material resin Resin, photosensitive material UVPhotoInitiator, fillers Filter, hardener Hardener or subsidiary material Additive. 封框胶区域的宽度和位置可采用现有技术中封框胶区域的宽度和位置,无需因为隔离线10改变封框胶区域的宽度和位置。 Width and position of the sealant region can be the width and position of the prior art sealant region without because changing the separation line 10 width and position of the sealant area.

[0035] 本实施例中,基板3可采用厚度为0. 5um至I. Ium的玻璃基板,该玻璃基板优选为耐热性、耐药品性、透明性以及绝缘性高的玻璃基板。 [0035] The present embodiment 3 can be used the substrate thickness of 0. 5um to I. Ium glass substrate, the glass substrate is preferably a heat-resistance, chemical resistance, transparency and a high insulating glass substrate.

[0036] 本实施例中,公共电极层4的厚度可以为0. Ium至0. 3um,公共电极层的材料可采用金属或者金属化合物,例如,Al、Mo或者金属硅化合物等。 [0036] In this embodiment, the thickness of the common electrode layer 4 may be 0. Ium to 0. 3um, the material of the common electrode layer can be a metal or metal compound, e.g., Al, Mo, or metal-silicon compound.

[0037] 本实施例中,保护层5(或称为钝化层Passivation)的材料可采用SiNx。 [0037] In this embodiment, the material of the protective layer 5 (or known as a passivation layer Passivation) may be employed SiNx. 因阵列基板下边沿区域不存在数据层区域,所以保护层5兼具公共电极层绝缘层和钝化绝缘层的作用。 Because the edge area data layer region absence array substrate, the protective layer 5 both as an insulating layer and a passivation insulating layer, a common electrode layer.

[0038] 本实施例中,透明导电层的材料可采用IT0,透明导电层的厚度可以为0. Ium至0. 2um0 [0038] In this embodiment, the material of the transparent conductive layer can be IT0, thickness of the transparent conductive layer may be 0. Ium to 0. 2um0

[0039] 当有水汽从保护层5与封框胶区域8之间的缝隙渗入时,由于存在以封框胶区域8的封框胶填充的隔离线10,而封框胶的致密性和稳定性均很高,因此水汽被隔离线10阻挡无法渗入到过孔6,使过孔6位置的公共电极层4不会被腐蚀。 [0039] When penetration of moisture into the gap between the protective layer 8 5 and sealant areas, due to the presence in sealant sealant region 8 filled with the separation line 10, and the sealant denseness and stability resistance are high, so water vapor is 10 barrier can not penetrate into the through-hole 6 the line of separation, so that through the common electrode layer 6 position of the hole 4 is not corroded.

[0040] 本实施例的技术方案中,通过在边框区域的过孔外侧和封框胶区域内侧设置以封框胶填充的隔离线,水汽被隔离线阻挡而无法进入过孔,避免过孔位置的公共电极层被腐蚀,从而有效保证了边框区域的显示品质。 Technical Solution [0040] according to the present embodiment, the through vias outside and the sealant zone provided inside the frame region in a sealant filling line of separation, the water vapor is blocked isolated lines can not enter through the hole, to avoid the via hole position the common electrode layer is etched, so as to effectively ensure the display quality of the border area. 尤其是在对液晶显示面板进行信赖性测试时,即在高温、高湿且大于60小时的环境进行测试时,本实施例可有效避免公共电极层被腐蚀这一不可逆的不良现象的产生,从而在保证显示品质的同时,减少了信赖性测试时不可逆的不良现象的发生。 When especially when the liquid crystal display panel reliability test, i.e. at high temperature and humidity and greater than 60 hours environment test, the present embodiment can effectively prevent the common electrode layer is etched to produce the irreversible undesirable phenomena, thereby to ensure display quality while reducing the occurrence of irreversible when the reliability test negative phenomena. 特别是对于容易被腐蚀的下边沿区域,通过在下边沿区域的过孔区域外侧和封框胶区域内侧设置以封框胶填充的隔离线,水汽被隔离线阻挡而无法进入过孔,避免过孔位置的公共电极层被腐蚀,从而有效保证了下边沿区域的显示品质。 Especially for the lower edge region susceptible to corrosion through vias area outside and the sealant zone provided inside lower edge zone to sealant filling line of separation, the water vapor is blocked isolated lines can not enter through the hole, to avoid vias a common electrode layer position is etched, so as to effectively ensure the display quality of the lower edge region.

[0041] 本发明实施例例二还提供了一种阵列基板的制造方法,该方法包括:在基板上形成公共电极层,显示区域的公共电极层上形成有栅线栅电极和公共电极,边框区域的公共电极层上形成有隔离线,该隔离线位于基板之上;在基板上形成公共电极层保护层,该公共电极层保护层位于公共电极层之上;在基板上形成公共电极层的数据层和位于数据层之上的数据层保护层,保护层包括公共电极层保护层和数据层保护层;在显示区域的保护层上形成过孔,在边框区域的保护层上形成过孔并去除填充于隔离线中的保护层,在边框区域的保护层上形成的过孔位于公共电极层之上;在基板上形成透明导电层,该透明导电层位于保护层之上并填充于过孔,隔离线位于过孔的外侧和封框胶区域的内侧,封框胶区域位于透明导电层之上并且封框胶区域的封框胶填充于 Example Example [0041] The present invention two further provides a method of manufacturing an array substrate, the method comprising: forming a common electrode layer on a substrate, a display gate line of the gate electrode and the common electrode are formed on the common electrode layer region, border is formed on the common electrode layer region has a separation line, the line of separation located on the substrate; forming a common electrode layer of the protective layer on a substrate, the common electrode layer is a protective layer positioned above the common electrode layer; forming a common electrode layer on a substrate data layer and data layer of the protective layer is disposed above the data layer, the protective layer comprises a common electrode layer of the protective layer and the data layer of the protective layer; forming a through hole in the protective layer of the display area, via holes are formed on the protective layer in the frame region and removing filled in the protective layer of the separator line, through the hole formed on the protective layer of the frame region is located above the common electrode layer; forming a transparent conductive layer on a substrate, the transparent conductive layer, a protective layer over and filled vias located inside and outside of the hole through the sealant line isolation region, the sealant layer region is located on the transparent conductive sealant and the sealant is filled in a region 隔离线。 The line of separation.

[0042] 下面结合附图,详细描述本发明中阵列基板的制造方法。 [0042] below with reference to the accompanying drawings, the method for producing the present invention, the array substrate described in detail. 为清楚的说明本发明中阵列基板的制造方法,下面的各个示意图以及具体描述均以下边沿区域为例。 For clarity of the manufacturing method of the present invention, the array substrate, the following respective schematic and specific description are the following edge REGIONS.

[0043] 图6a为本发明实施例二中形成公共电极层的示意图,如图6a所示,可通过构图工艺在基板3上形成公共电极层4。 [0043] Figure 6a schematic diagram of the second embodiment is formed in the common electrode layer of the present invention, as shown, may be a common electrode layer 4 on the substrate. 3 6a through a patterning process. 具体地,首先通过构图工艺中的溅射(Sputter)工艺在基板3上形成公共电极层4,再通过构图工艺在下边沿区域的公共电极层4上形成隔离线10。 Specifically, the first by a patterning process of sputtering (Sputter) technology at the substrate 3 to form a common electrode layer 4, and then patterning the lower edge region of the common electrode layer 4 formed on the isolation line 10. 进一步地,还可通过构图工艺在下边沿区域的公共电极层4上形成狭缝9。 Further, the common electrode layer 9 formed in the edge region of the slit 4 also lower by a patterning process.

[0044] 图6b为本发明实施例二中形成保护层的示意图,如图6b所示,保护层5覆盖整个基板3。 A schematic view of the protective layer according to the second embodiment of the [0044] present invention. FIG. 6b, 6b, the protective layer 5 covers the entire substrate 3. 由于下边沿区域不包括数据层,因此在下边沿区域,数据层保护层直接位于公共电极保护层之上,并且公共电极保护层和数据层保护层可以合称为保护层5。 Since the lower edge of the region does not include the data layer, and therefore the lower edge region, the data protective layer directly on the common electrode protection layer, and the common electrode protective layer and the data layer, the protective layer may be collectively referred to as the protective layer 5. 图6b中以保护层5表示公共电极保护层和数据层保护层。 FIG. 6b denotes a common electrode protective layer and the data layer of the protective layer to protect the layer 5.

[0045] 图6c为本发明实施例二中形成过孔的示意图,如图6c所示,具体可通过构图工艺在下边沿区域的保护层5上形成多个过孔6并去除填充于隔离线10中的保护层5。 [0045] FIG. 6c schematic hole formed through the second embodiment of the present invention, shown in Figure 6c, in particular on the protective layer 5 at the edge regions are formed a plurality of through holes may be lower by a patterning process 6 and removing the filled isolation line 10 the protective layer 5. 下边沿区域的多个过孔6形成过孔区域。 A plurality of through holes in the lower edge region 6 is formed through the hole region.

[0046] 图6d为本发明实施例二中形成透明导电层的示意图,如图6d所示,具体可通过构图工艺在基板3上形成透明导电层7。 [0046] FIG. 6d a schematic view of a transparent conductive layer for forming the second embodiment of the present invention, shown in FIG. 6d, specifically may be a transparent conductive layer 7 on the substrate 3 through a patterning process.

[0047] 在形成透明导电层之后即完成了阵列基板的制造过程。 [0047] After forming the transparent conductive layer to complete the fabrication process of the array substrate. 进一步地,在阵列基板与彩膜基板对盒的过程中,在阵列基板的基板3上还形成封框胶区域8。 Further, in the process of the array substrate and the color filter substrate cassette, the substrate array substrate 3 is also formed sealant region 8. 封框胶区域8位于透明导电层7之上并且封框胶区域8的封框胶填充于隔离线10。 Sealant region 8 of the transparent conductive layer above 7 and sealant areas sealant 8 filled in the separation line 10. 在下边沿区域,隔离线10位于过孔区域的外侧和封框胶区域8的内侧,图6e为本发明实施例二中形成封框胶区域的示意图,如图6e所示,具体可通过构图工艺在基板3上形成封框胶区域8。 The lower edge region, the separation line 10 is located through the inner hole region outer and sealant region 8, FIG. 6e of the present invention, a schematic view of sealant forming region second embodiment, as 6e shown, particularly by a patterning process forming sealant region 8 on the substrate 3.

[0048] 采用本实施例中的方法制造出的阵列基板,当有水汽从保护层5与封框胶区域8之间的缝隙渗入时,由于存在以封框胶区域8的封框胶填充的隔离线10,而封框胶的致密性和稳定性均很高,因此水汽被隔离线10阻挡无法渗入到过孔6,使过孔6位置的公共电极层4不会被腐蚀。 [0048] The present array substrate of this embodiment is manufactured embodiment, when a vapor 5 and the gap between the 8 sealant region penetrate from the protective layer, due to the presence in sealant sealant region 8 filled the separation line 10, and the sealant compactness and stability are very high, so water vapor is the separation line 10 the barrier can not penetrate into the through hole 6, so that through the common electrode layer 6 position of the hole 4 is not corroded.

[0049] 本实施例的技术方案中,通过在边框区域的过孔外侧和封框胶区域内侧设置以封框胶填充的隔离线,水汽被隔离线阻挡而无法进入过孔,避免过孔位置的公共电极层被腐蚀,从而有效保证了边框区域的显示品质。 Technical Solution [0049] according to the present embodiment, the through vias outside and the sealant zone provided inside the frame region in a sealant filling line of separation, the water vapor is blocked isolated lines can not enter through the hole, to avoid the via hole position the common electrode layer is etched, so as to effectively ensure the display quality of the border area. 在形成栅线栅电极的同时形成隔离线,无需增加任何工艺步骤,容易实现。 Forming an isolation line while forming the gate line of the gate electrode, without adding any process step, it is easy to implement. 尤其是在对液晶显示面板进行信赖性测试时,即在高温、高湿且大于60小时的环境进行测试时,本实施例可有效避免公共电极层被腐蚀这一不可逆的不良现象的产生,从而在保证显示品质的同时,减少了信赖性测试时不可逆的不良现象的发生。 When especially when the liquid crystal display panel reliability test, i.e. at high temperature and humidity and greater than 60 hours environment test, the present embodiment can effectively prevent the common electrode layer is etched to produce the irreversible undesirable phenomena, thereby to ensure display quality while reducing the occurrence of irreversible when the reliability test negative phenomena. 特别是对于容易被腐蚀的下边沿区域,通过在下边沿区域的过孔区域外侧和封框胶区域内侧设置以封框胶填充的隔离线,水汽被隔离线阻挡而无法进入过孔,避免过孔位置的公共电极层被腐蚀,从而有效保证了下边沿区域的显示品质。 Especially for the lower edge region susceptible to corrosion through vias area outside and the sealant zone provided inside lower edge zone to sealant filling line of separation, the water vapor is blocked isolated lines can not enter through the hole, to avoid vias a common electrode layer position is etched, so as to effectively ensure the display quality of the lower edge region.

[0050] 最后应说明的是:以上实施例仅用以说明本发明的技术方案而非对其进行限制,尽管参照较佳实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对本发明的技术方案进行修改或者等同替换,而这些修改或者等同替换亦不能使修改后的技术方案脱离本发明技术方案的精神和范围。 [0050] Finally, it should be noted that: the above embodiments are intended to illustrate the present invention and not to limit it, although the present invention has been described in detail with reference to preferred embodiments, those of ordinary skill in the art should be understood : it may still make modifications or equivalent replacements of the technical solution of the present invention, and such modifications or equivalent replacements not make the technical solution of the modified departing from the spirit and scope of the technical solutions of the present invention.

Claims (12)

1. 一种阵列基板,其特征在于,包括:显示区域和位于所述显示区域四周的边框区域,所述边框区域包括: 基板; 位于所述基板之上的公共电极层; 位于所述公共电极层之上的保护层; 形成于所述保护层上并位于所述公共电极层之上的过孔; 位于所述保护层之上并填充于所述过孔的透明导电层; 形成于所述公共电极层和所述保护层上并位于所述基板之上的隔离线,所述隔离线位于所述过孔的外侧和封框胶区域的内侧,所述封框胶区域位于所述透明导电层之上并且所述封框胶区域的封框胶填充于所述隔离线中。 An array substrate, comprising: a display area and the display area is located around the border area, the border area includes: a substrate; the substrate is located above the common electrode layer; a common electrode located protective layer over the layer; formed on the through hole layer and located above the common electrode of the protective layer; located above the protective layer and filling the transparent conductive layer of said through hole; formed in the a common electrode layer and the protective and positioned on the layer above the substrate line of separation, the separation line located over the medial-lateral and the sealant region aperture, the sealant region of the transparent conductive and over the sealant layer region of the sealant is filled in the isolation line.
2.根据权利要求I所述的阵列基板,其特征在于,所述隔离线和所述过孔位于所述边框区域的下边沿区域,位于所述下边沿区域的多个过孔形成过孔区域,所述隔离线位于所述过孔区域的外侧。 The array substrate of claim I, wherein said separation line and the via hole located in the edge area of ​​the frame region, located in the lower region of the plurality of vias is formed through the hole edge region the isolation line is located outside the through hole region.
3.根据权利要求I所述的阵列基板,其特征在于,所述隔离线的宽度为10微米至25微米。 3. The array substrate I according to claim, characterized in that the width of the isolated line is 10 to 25 microns.
4.根据权利要求2所述的阵列基板,其特征在于,所述隔离线的长度大于等于所述过孔区域的长度。 4. The array substrate of claim 2, wherein a length of the dividing line is larger than or equal to the over-length of the bore region.
5.根据权利要求I所述的阵列基板,其特征在于,所述封框胶区域的封框胶的材料为树脂、感光材料、填充剂、硬化剂或者附属材料。 The array substrate I according to claim, characterized in that the material of the sealant glue region of the sealant resin, a photosensitive material, a filler, a hardener or a subsidiary material.
6.根据权利要求I所述的阵列基板,其特征在于,所述透明导电层的材料为ITO。 6. The array substrate according to claim I, wherein the material of the transparent conductive layer ITO.
7. —种阵列基板的制造方法,其特征在于,包括: 在基板上形成公共电极层,在显示区域的公共电极层上形成栅线栅电极和公共电极,在边框区域的公共电极层上形成隔离线,所述隔离线位于基板之上; 在基板上形成公共电极层保护层,所述公共电极层保护层位于所述公共电极层之上;在基板上形成位于所述公共电极层之上的数据层和位于所述数据层之上的数据层保护层,保护层包括所述公共电极层保护层和所述数据层保护层; 在显示区域的保护层上形成过孔,在边框区域的保护层上形成过孔并去除填充于隔离线中的保护层,在边框区域的保护层上形成的过孔位于所述公共电极层之上; 在基板上形成透明导电层,所述透明导电层位于所述保护层之上并填充于所述过孔,所述隔离线位于所述过孔的外侧和封框胶区域的内侧,所述封框胶区域位于所 7. - A method of manufacturing an array substrate of the kind, which is characterized in that, comprising: a common electrode layer on a substrate, forming a gate electrode and a gate line common electrode on the display area of ​​the common electrode layer, the common electrode layer is formed on the border region line of separation, the separation line is located on the substrate; forming a common electrode layer of the protective layer on a substrate, the common electrode layer is a protective layer positioned over said common electrode layer; forming in said common electrode layer on a substrate on data layer and a data layer of the protective layer above the data layer, the protective layer comprises a common electrode layer, protective layer and the data layer of the protective layer; forming a through hole in the protective layer of the display area, in the frame region It is formed on the protective layer via hole and remove filled in the protective layer of the separator line, through the hole formed on the protective layer of the frame region is located above the common electrode layer; forming a transparent conductive layer on a substrate, the transparent conductive layer the protective layer located over and filled in the through hole, the isolation line is located outside of the vias and sealant region inside the sealant is located in the area 述透明导电层之上并且封框胶区域的封框胶填充于所述隔离线。 On said transparent conductive layer and the sealant sealant region filled in the isolation line.
8.根据权利要求7所述的方法,其特征在于,所述隔离线和所述过孔位于所述边框区域的下边沿区域,位于所述下边沿区域的多个过孔形成过孔区域,所述隔离线位于所述过孔区域的外侧。 8. The method according to claim 7, wherein said separation line and the via hole located in the edge area of ​​the frame region, located in the lower region of the plurality of vias is formed through the hole edge region, the separation line located through the outer hole region.
9.根据权利要求7所述的方法,其特征在于,所述隔离线的宽度为10微米至25微米。 9. The method according to claim 7, characterized in that the width of the isolated line is 10 to 25 microns.
10.根据权利要求8所述的方法,其特征在于,所述隔离线的长度大于等于所述过孔区域的长度。 10. The method of claim 8, wherein the length of the dividing line is larger than or equal to the over-length of the bore region.
11.根据权利要求7所述的方法,其特征在于,所述封框胶区域的封框胶的材料为树脂、感光材料、填充剂、硬化剂或者附属材料。 11. The method according to claim 7, characterized in that the sealant material of the sealing frame region gum resin, photosensitive material, a filler, a hardener or a subsidiary material.
12.根据权利要求7所述的方法,其特征在于,所述透明导电层的材料为ITO。 12. The method according to claim 7, characterized in that the material of the transparent conductive layer ITO.
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