CN102004217B - Circuit structure capable of reducing influence of test and testing method thereof - Google Patents
Circuit structure capable of reducing influence of test and testing method thereof Download PDFInfo
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- CN102004217B CN102004217B CN 200910172028 CN200910172028A CN102004217B CN 102004217 B CN102004217 B CN 102004217B CN 200910172028 CN200910172028 CN 200910172028 CN 200910172028 A CN200910172028 A CN 200910172028A CN 102004217 B CN102004217 B CN 102004217B
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Abstract
The invention provides a circuit structure capable of reducing the influence of a test and a testing method thereof. The circuit structure comprises a first test terminal and a second test terminal, wherein a symmetrical circuit unit is coupled between the first test terminal and the second test terminal; the symmetrical circuit unit contains a plurality of transistors which are configured symmetrically to construct the first part of circuit and the second part of circuit. A switch control unit displaces the transistors of the first part of circuit and second part of circuit alternately according to a group of control signals to be connected between the first test terminal and the second test terminal.
Description
Technical field
The invention relates to a kind of measuring technology of symmetric circuit, and particularly relevant for a kind of technology, can reduce owing to the test circuit characteristic that the electric crystal characteristic variations has influence on essence that produces, relate in particular to a kind of tested circuit structure that affects and method of testing of reducing.
Background technology
The operational amplifier that generally has the symmetrical structure circuit, through behind the reliability test, can electrically or on every side layout environments be different because of the operation of element, and cause also difference to some extent of indivedual attenuation degrees between the inner member.This can cause operational amplifier make a mistake result, for example problem of inconsistent (Mismatch).
Fig. 1 a to Fig. 1 b is the amplifying circuit synoptic diagram in the conventional operation amplifier.Fig. 1 a is symmetric circuit unit 100, and Fig. 1 b is the operation of actual operation amplifier.Consult Fig. 1 a, symmetric circuit unit 100 comprises four MOS electric crystal M1～M4, disposes in the mode of symmetry.One end of one current source 102 is connected between electric crystal M1 and the M2, and the other end is connected in ground voltage.The gate terminal of electric crystal M1 is connected to an input endpoint VI, and the gate terminal of electric crystal M2 is connected to an exit point VO.Electric crystal M1 and electric crystal M2 constitute a pair of electric crystal.In addition, electric crystal M3 and electric crystal M4 also constitute a pair of electric crystal.Yet electric crystal M1 is to connect to consist of a part of circuit with electric crystal M3, and electric crystal M2 also is to connect to consist of another part circuit with electric crystal M4.Except the connection of gate terminal control slightly the difference, electric crystal M1 and electric crystal M3 are symmetrical in fact electric crystal M2 and electric crystal M4.Consult Fig. 1 b, behind outer meeting resistance R1 and R2, with regard to the actual application that reaches operational amplifier.
The conventional operation amplifier can be because of electrical different in transient state of input signal VI and output signal VO, and cause through after the reliability testing, and electric crystal M1 is different from the attenuation degree of M3 and electric crystal M2 and M4, thus electric crystal M1 and M2 can to produce decay inconsistent.It is inconsistent that electric crystal M3 and M4 can produce decay too.So operational amplifier is through behind the reliability test, its characteristic meeting is front different with test.
Fig. 2 is the oscillogram of conventional operation amplifier input signal VI and output signal VO.Consult Fig. 2, input signal VI for example is desirable square wave, and the speed in its rising edge and decline source is fast, is close to the vertical change of ladder.And the rising edge of output signal VO and decline source can have some to postpone with the characteristic of electric crystal, but have a desirable fixed value.Yet, inconsistent if electric crystal can produce attenuation degree behind long-time identical electrical reliability test, cause the variation of magnification.
That is to say the inconsistent generation of decay, be because operational amplifier symmetry element in the reliability test process, electrically or on every side layout environments is different and cause attenuation degree different.
Summary of the invention
The invention provides and reduce the tested circuit structure that affects and method of testing, can reduce the inconsistent problem of elements attenuate.
The invention provides a kind of tested circuit structure that affects that reduces, comprise one first test lead and one second test lead.One symmetrical circuit unit is coupled between the first test lead and the second test lead.The symmetric circuit unit comprises a plurality of electric crystals, consists of first's circuit and a second portion circuit with symmetrical arrangement.One switch control unit is controlled those electric crystals that signal alternately exchanges first's circuit and second portion circuit according to one group, to be connected between the first test lead and the second test lead.
According to one embodiment of the invention, the tested circuit structure that affects of described minimizing, wherein for example the symmetric circuit unit is a differential circuit.
According to one embodiment of the invention, the tested circuit structure that affects of described minimizing, wherein for example differential circuit comprises: a current source and four electric crystals.The first electric crystal has a gate terminal, one first link and the second link, and this gate terminal couples by this switch control unit and this first test lead and this second test lead one, and this second link is connected to this current source.The second electric crystal has a gate terminal, one first link and the second link, this gate terminal by this switch control unit and this first test lead and this second test lead in addition one couple, this second link is connected to this current source.The 3rd electric crystal has a gate terminal, one first link and one second link, this first link is connected to a current potential, this second link is connected to this first link of this first electric crystal, this gate terminal is connected to this first link of this first electric crystal and this second electric crystal one by this switch control unit, and the 3rd electric crystal is connected in series with this first electric crystal and consists of this first's circuit.The 4th electric crystal has a gate terminal, one first link and the second link, this first link is connected to this current potential, this second link is connected to this first link of this second electric crystal, this gate terminal is connected to this first link of the in addition one of this first electric crystal and this second electric crystal by this switch control unit, and the 4th electric crystal is connected in series this second portion circuit of formation with this second electric crystal.Two of this first electric crystal and this second electric crystal these first links couple by this switch control unit and this second test lead.
According to one embodiment of the invention, the tested circuit structure that affects of described minimizing, wherein for example two these gate terminal of the 3rd electric crystal and the 4th electric crystal are connected to each other.
According to one embodiment of the invention, the tested circuit structure that affects of described minimizing, wherein for example this switch control unit comprises four switches.The first switch is connected in this gate terminal of this first electric crystal, switches to be connected to this first test lead and this second test lead one.Second switch is connected in this gate terminal of this second electric crystal, switches to be connected to other one of this first test lead and this second test lead.The 3rd switch is connected in this gate terminal of the 3rd electric crystal and the 4th electric crystal and this first link of this first electric crystal and this second electric crystal.The 4th switch is couple to this second test lead with two these the first links of this first electric crystal and this second electric crystal.
According to one embodiment of the invention, the tested circuit structure that affects of described minimizing wherein for example is an operation amplifier circuit, also comprises one first resistor, is connected in a ground voltage and an inner input end.One second resistor is connected in this inside and enters between end and this second test lead.
According to one embodiment of the invention, the tested circuit structure that affects of described minimizing, wherein for example the symmetric circuit unit of operation amplifier circuit comprises: a current source and four electric crystals.The first electric crystal has a gate terminal, one first link and the second link, and this gate terminal couples by this switch control unit and this first test lead and this inside input end one, and this second link is connected to this current source.The second electric crystal has a gate terminal, one first link and the second link, this gate terminal by this switch control unit and this first test lead and this inside input end in addition one couple, this second link is connected to this current source.The 3rd electric crystal, one gate terminal is arranged, one first link and one second link, this first link is connected to a current potential, this second link is connected to this first link of this first electric crystal, this gate terminal is connected to this first link of this first electric crystal and this second electric crystal one by this switch control unit, and the 3rd electric crystal is connected in series with this first electric crystal and consists of this first's circuit.The 4th electric crystal has a gate terminal, one first link and the second link, this first link is connected to this current potential, this second link is connected to this first link of this second electric crystal, this gate terminal is connected to this first link of the in addition one of this first electric crystal and this second electric crystal by this switch control unit, and the 4th electric crystal is connected in series this second portion circuit of formation with this second electric crystal.Two of the first electric crystal and this second electric crystal these first links couple by this switch control unit and this second test lead.
According to one embodiment of the invention, the tested circuit structure that affects of described minimizing, wherein for example two these gate terminal of the 3rd electric crystal and the 4th electric crystal are connected to each other.
According to one embodiment of the invention, the tested circuit structure that affects of described minimizing, wherein for example switch control unit comprises four switches.The first switch is connected in this gate terminal of this first electric crystal, switches to be connected to this first test lead and this inside input end one.Second switch is connected in this gate terminal of this second electric crystal, switches to be connected to other one of this first test lead and this inside input end.The 3rd switch is connected in this gate terminal of the 3rd electric crystal and the 4th electric crystal and this first link of this first electric crystal and this second electric crystal.The 4th switch is couple to this second test lead with two these the first links of this first electric crystal and this second electric crystal.
The invention provides a kind of method of testing of symmetric element circuit structure, wherein circuit structure comprises the many to electric crystal of in fact balanced configuration, by one first test lead and one second test lead this circuit structure is carried out reliability test.Method of testing comprises: switch this many to electric crystal in one first type connection status.Under the first type connection status, be total up to one first test operation in a very first time interval.Switch described many to electric crystal in a Second-Type connection status, wherein be that every two a pair of electric crystals are switched mutually between this first connection status and this second connection status.Under the Second-Type connection status, be total up to one second time interval, wherein should be equal in fact the second time interval in very first time interval.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and cooperate appended graphic being described in detail below.
Description of drawings
Fig. 1 a to Fig. 1 b is the amplifying circuit synoptic diagram in the conventional operation amplifier;
Fig. 2 is the oscillogram of conventional operation amplifier input signal VI and output signal VO;
Fig. 3 a to Fig. 3 b is the changeable symmetric circuit synoptic diagram between two kinds of kenels of one embodiment of the invention;
Fig. 4 is one embodiment of the invention is switched reliability test according to the circuit of Fig. 3 time distribution synoptic diagram;
Fig. 5 is the circuit diagram that one embodiment of the invention differential circuit cooperates switch;
Fig. 6 is the circuit diagram that one embodiment of the invention operation amplifier circuit cooperates switch.
The main element symbol description
M1～M4-electric crystal; 100-symmetric circuit unit;
102,206-current source; 200,202,204-switch element.
Embodiment
The present invention proposes a concept, makes the symmetry element in can examining by the degree test process, and identical electrical and layout environments can be arranged.Below for some embodiment the present invention is described, but the present invention be not limited only to for some embodiment, and also can mutually combine between the illustrated embodiment, reach other alternate embodiment.
Fig. 3 a to Fig. 3 b is the changeable symmetric circuit synoptic diagram between two kinds of kenels of one embodiment of the invention.Consult Fig. 3 a, take the symmetric circuit of operational amplifier as example, its circuit to Fig. 1 is similar.For convenience of description, Fig. 3 a is called A type circuit.Because the configuration of the electric crystal of the symmetric circuit unit 100 of Fig. 3 a is symmetrical, only is on connecting, according to actual not complete symmetries to be arranged, but in fact still keeps symmetry.Therefore, the handover mechanism of the electric crystal M1-M4 of symmetric circuit unit 100 by connecting can exchange the electric crystal of symmetry.The circuit of Fig. 3 b is called the Type B circuit.Type B circuit and A type circuit are in embodiment, and based on the relation of symmetry, electric crystal M1 and electric crystal M2 exchange, and electric crystal M3 and electric crystal M4 exchange.
Because the electric crystal M1 in the A type circuit and electric crystal M2 operating voltage and the electric crystal M1 in the Type B circuit and the electric crystal M2 operating voltage exchange during at identical reliability test when reliability test, therefore, if in the whole reliability test process, switching in the altogether time that A type circuit tests is similar to the altogether time that the Type B circuit is tested that switches in, and then electric crystal M1 is about with the attenuation rate of electric crystal M2 and equates.Same situation and reason also are applicable between electric crystal M3 and the electric crystal M4.
Fig. 4 is one embodiment of the invention is switched reliability test according to the circuit of Fig. 3 time distribution synoptic diagram.Consult Fig. 4, on time shaft, can be distinguished into N section in one section total testing time from start to end.In N section, for example A type circuit and Type B circuit alternately switch and test, and the size of each section need not be identical, but the altogether time that A type circuit is tested will be equal in fact the altogether time that A type circuit is tested.So, for two pairs of electric crystals that four electric crystal M1-M4 consist of, the attenuation characteristic of two electric crystals of every a pair of electric crystal is identical approximately, therefore still can keep the characteristic of symmetric circuit, reduces the inconsistent problem of decay.
In circuit design of the present invention, for example can do by a switch switching unit switching of A type circuit and B circuit, switch switching unit mainly is electric crystal will be exchanged.It is based on the relation of symmetric circuit, and switch switching unit can need not complicated annexation and can reach.The setting of switch switching unit is below more described for some embodiment.
Fig. 5 is the circuit diagram that one embodiment of the invention differential circuit cooperates switch.Consulting Fig. 5, is the basis according to the circuit of Fig. 3, switches by switch control unit.Switch control unit for example can comprise three groups of switch elements 200,202,204, and the corresponding control of each group switch element signal PA, PB can have a plurality of switching states.In other words, four electric crystal M1～M4 do the same circuits that switching can reach mutual switching by switch element, wherein for example electric crystal M1 and M2 have respectively two switch elements to do switching, and the annexation of electric crystal M3 and M4 is cross connection, so another group switch element 200 is done exchange.Switch control unit for example can be the MOS element, does switching by two control signal PA, PB.When control signal PA made in check switch conduction, control signal PB made in check switch be not conducting.Otherwise when control signal PA made in check not conducting of switch, it was conducting that control signal PB makes in check switch.
Scrutablely be, the symmetric circuit of Fig. 5 is take differential circuit as example, but in fact, technical characterictic of the present invention also can be applied to other symmetric circuit, is not limited only to the design of 4 electric crystals.In addition, the design of switch also is not limited to the mode of lifting.
With regard to the application of operational amplifier, Fig. 6 is the circuit diagram that one embodiment of the invention operation amplifier circuit cooperates switch.Consult Fig. 6, the circuit of Fig. 6 is take operation amplifier circuit as example, therefore need to be connected with R2 with the resistor R1 of outside.Operation amplifier circuit is except input end VI, and still inner input end VX with contact resistance device R1 and R2, reaches the effect of amplification.Therefore, the gate terminal of electric crystal M1 and M2 is the one that is connected to input end VI and inner input end VX by switch element 202,204.As aforementioned, switch element 200 is done switching for electric crystal M3 and M4.So, when operational amplifier is controlled signal PB forbidden energy in control signal PA activation, be to test with A type circuit.When controlling signal PB activation when control signal PA forbidden energy in addition, operational amplifier is to test with the Type B circuit.
Above-mentioned switch control mode only is an embodiment, yet based on the needs of the electric crystal that switches, the switch control mode can have other control and connected mode.
As for when the practical operation, also can do according to the time of operation and switch to reduce the inconsistent phenomenon of decay.
Device and concept that the present invention proposes can be applicable to any symmetry element.
The switching over element that the present invention proposes, alternative decision need be considered reliability test and cause the inconsistent part of decay.In the cycle that the present invention changes, as long as long time period one is identical with the time in cycle two or close, can reaches and reduce the inconsistent problem of decay that reliability test causes.
It should be noted that at last: above embodiment only in order to technical scheme of the present invention to be described, is not intended to limit; Although with reference to previous embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment puts down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution break away from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (17)
1. one kind is reduced the tested circuit structure that affects, and comprising:
One first test lead and one second test lead;
One symmetrical circuit unit is coupled between this first test lead and this second test lead, and this symmetric circuit unit comprises a plurality of electric crystals, consists of first's circuit and a second portion circuit with symmetrical arrangement in fact; And,
One switch control unit alternately exchanges the described electric crystal of this first's circuit and this second portion circuit according to one group of control signal, to be connected between this first test lead and this second test lead.
2. the tested circuit structure that affects of minimizing according to claim 1, wherein this symmetric circuit unit is a differential circuit.
3. the tested circuit structure that affects of minimizing according to claim 2, wherein this differential circuit comprises:
One current source;
One first electric crystal has a gate terminal, one first link and the second link, and this gate terminal couples by this switch control unit and this first test lead and this second test lead one, and this second link is connected to this current source;
One second electric crystal has a gate terminal, one first link and the second link, this gate terminal by this switch control unit and this first test lead and this second test lead in addition one couple, this second link is connected to this current source;
One the 3rd electric crystal, one gate terminal, one first link and one second link are arranged, this first link is connected to a current potential, this second link is connected to this first link of this first electric crystal, this gate terminal is connected to this first link of this first electric crystal and this second electric crystal one by this switch control unit, and the 3rd electric crystal is connected in series with this first electric crystal and consists of this first's circuit; And,
One the 4th electric crystal, one gate terminal, one first link and the second link are arranged, this first link is connected to this current potential, this second link is connected to this first link of this second electric crystal, this gate terminal is connected in addition this first link of one of this first electric crystal and this second electric crystal by this switch control unit, the 4th electric crystal is connected in series with this second electric crystal and consists of this second portion circuit
Wherein two of this first electric crystal and this second electric crystal these first links couple by this switch control unit and this second test lead.
4. the tested circuit structure that affects of minimizing according to claim 3, wherein two these gate terminal of the 3rd electric crystal and the 4th electric crystal are connected to each other.
5. the tested circuit structure that affects of minimizing according to claim 3, wherein this switch control unit comprises:
One first switch is connected in this gate terminal of this first electric crystal, switches to be connected to this first test lead and this second test lead one;
One second switch is connected in this gate terminal of this second electric crystal, switches to be connected to other one of this first test lead and this second test lead;
One the 3rd switch is connected in this gate terminal of the 3rd electric crystal and the 4th electric crystal and this first link of this first electric crystal and this second electric crystal; And,
One the 4th switch is couple to this second test lead with two these the first links of this first electric crystal and this second electric crystal.
6. the tested circuit structure that affects of minimizing according to claim 3, wherein this first electric crystal and this second electric crystal are the same conductivity electric crystals, wherein the 3rd electric crystal and the 4th electric crystal are the same conductivity electric crystals, but are different from this first electric crystal and this second electric crystal.
7. the tested circuit structure that affects of minimizing according to claim 1, wherein this symmetric circuit unit is an operation amplifier circuit, this operation amplifier circuit also comprises:
One first resistor is connected in a ground voltage and an inner input end; And,
One second resistor is connected in this inside and enters between end and this second test lead.
8. the tested circuit structure that affects of minimizing according to claim 7, wherein this symmetric circuit unit comprises:
One current source;
One first electric crystal has a gate terminal, one first link and the second link, and this gate terminal couples by this switch control unit and this first test lead and this inside input end one, and this second link is connected to this current source;
One second electric crystal has a gate terminal, one first link and the second link, this gate terminal by this switch control unit and this first test lead and this inside input end in addition one couple, this second link is connected to this current source;
One the 3rd electric crystal, one gate terminal is arranged, one first link and one second link, this first link is connected to a current potential, this second link is connected to this first link of this first electric crystal, this gate terminal is connected to this first link of this first electric crystal and this second electric crystal one by this switch control unit, and the 3rd electric crystal is connected in series with this first electric crystal and consists of this first's circuit; And,
One the 4th electric crystal, one gate terminal is arranged, one first link and the second link, this first link is connected to this current potential, this second link is connected to this first link of this second electric crystal, this gate terminal is connected to this first link of the in addition one of this first electric crystal and this second electric crystal by this switch control unit, and the 4th electric crystal is connected in series this second portion circuit of formation with this second electric crystal
Wherein two of this first electric crystal and this second electric crystal these first links couple by this switch control unit and this second test lead.
9. the tested circuit structure that affects of minimizing according to claim 8 wherein should
Two these gate terminal of the 3rd electric crystal and the 4th electric crystal are connected to each other.
10. the tested circuit structure that affects of minimizing according to claim 8, wherein this switch control unit comprises:
One first switch is connected in this gate terminal of this first electric crystal, switches to be connected to this first test lead and this inside input end one;
One second switch is connected in this gate terminal of this second electric crystal, switches to be connected to other one of this first test lead and this inside input end;
One the 3rd switch is connected in this gate terminal of the 3rd electric crystal and the 4th electric crystal and this first link of this first electric crystal and this second electric crystal; And,
One the 4th switch is couple to this second test lead with two these the first links of this first electric crystal and this second electric crystal.
11. the tested circuit structure that affects of minimizing according to claim 8, wherein this first electric crystal and this second electric crystal are the same conductivity electric crystals, wherein the 3rd electric crystal and the 4th electric crystal are the same conductivity electric crystals, but are different from this first electric crystal and this second electric crystal.
12. the method for testing of a symmetric element circuit structure, wherein this circuit structure comprises the many to electric crystal of in fact balanced configuration, by one first test lead and one second test lead this circuit structure is carried out reliability test, and this method of testing comprises:
Switch this many to electric crystal in one first type connection status;
Under the first type connection status, be total up to one first test operation in a very first time interval;
Switch described many to electric crystal in a Second-Type connection status, wherein be that every two a pair of electric crystals are switched mutually between this first connection status and this second connection status; And,
Under the Second-Type connection status, be total up to one second time interval, wherein should be equal in fact the second time interval in very first time interval.
13. the method for testing of symmetric element circuit structure according to claim 12, wherein this circuit structure is a differential circuit.
14. the method for testing of symmetric element circuit structure according to claim 12, wherein this circuit structure is an operation amplifier circuit.
15. the method for testing of symmetric element circuit structure according to claim 12, this very first time interval is divided into a plurality of sections.
16. the method for testing of symmetric element circuit structure according to claim 12, this second time interval is divided into a plurality of sections.
17. the method for testing of symmetric element circuit structure according to claim 12, this very first time interval is divided into a plurality of sections, and this second time interval is divided into a plurality of sections, and should test interval the mixing with this second time interval of the very first time.
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| CN 200910172028 CN102004217B (en) | 2009-09-03 | 2009-09-03 | Circuit structure capable of reducing influence of test and testing method thereof |
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| CN 200910172028 CN102004217B (en) | 2009-09-03 | 2009-09-03 | Circuit structure capable of reducing influence of test and testing method thereof |
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| CN102004217B true CN102004217B (en) | 2013-03-27 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1622148A (en) * | 2003-11-24 | 2005-06-01 | 联咏科技股份有限公司 | Active matrix system, circuit and drive method therefor of organic light emitting diode display |
| US7116161B2 (en) * | 2003-10-01 | 2006-10-03 | Nec Corporation | Differential amplifier circuit and drive circuit of liquid crystal display unit using the same |
| US7358809B2 (en) * | 2004-11-08 | 2008-04-15 | Elder J Scott | Method for forming elements with reduced variation |
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2009
- 2009-09-03 CN CN 200910172028 patent/CN102004217B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7116161B2 (en) * | 2003-10-01 | 2006-10-03 | Nec Corporation | Differential amplifier circuit and drive circuit of liquid crystal display unit using the same |
| CN1622148A (en) * | 2003-11-24 | 2005-06-01 | 联咏科技股份有限公司 | Active matrix system, circuit and drive method therefor of organic light emitting diode display |
| US7358809B2 (en) * | 2004-11-08 | 2008-04-15 | Elder J Scott | Method for forming elements with reduced variation |
Non-Patent Citations (1)
| Title |
|---|
| JP特开平11-249624A 1999.09.17 |
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