CN101989620B - Metal-insulator-metal (MIM) capacitor and manufacturing method thereof - Google Patents
Metal-insulator-metal (MIM) capacitor and manufacturing method thereof Download PDFInfo
- Publication number
- CN101989620B CN101989620B CN2009100559024A CN200910055902A CN101989620B CN 101989620 B CN101989620 B CN 101989620B CN 2009100559024 A CN2009100559024 A CN 2009100559024A CN 200910055902 A CN200910055902 A CN 200910055902A CN 101989620 B CN101989620 B CN 101989620B
- Authority
- CN
- China
- Prior art keywords
- dielectric layer
- substrate
- crown metal
- metal
- transition zone
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
The invention relates to a method for manufacturing a metal-insulator-metal (MIM) capacitor, comprising the following steps: preparing a substrate which is provided with a top and lateral parts protruding outwards; forming a bottom crown metal on the top of the substrate; forming a dielectric layer at the top and the lateral parts of the substrate, wherein the dielectric layer covers the bottom crown metal; forming an intermediate layer on the dielectric layer, wherein the intermediate layer plays a role in enhancing the bonding strength between the dielectric layer and a top crown metal; removing the intermediate layer on the top of the substrate by adopting a chemical mechanical planarization technology, exposing the dielectric layer, and reserving the intermediate layer at the lateral parts of the substrate; and forming the top crown metal on the exposed dielectric layer and the intermediate layer. Due to the implementation of the above technical scheme, the top crown metal and the dielectric layer are in firm connection, and peeling off does not occur to the top crown metal, thus improving the yield of the MIM capacitor; and due to the adoption of a special process, the property of the capacitor can not be influenced.
Description
Technical field
The present invention relates to a kind of metal-insulator-metal type (metal-insulator-metal is designated hereinafter simply as MIM) electric capacity and manufacture method thereof.
Background technology
Capacity cell be usually used in as in the integrated circuits such as radio frequency IC, monolithic microwave IC as electronic passive device.Common capacitance structure comprises metal-oxide semiconductor (MOS) (MOS) electric capacity, PN junction electric capacity and MIM electric capacity etc.Wherein, MIM electric capacity provides the electrology characteristic that is better than mos capacitance and PN junction electric capacity in some special applications, this is because mos capacitance and PN junction electric capacity all are subject to itself structure, and electrode is easy to generate cavitation layer when work, causes its frequency characteristic to reduce.And MIM electric capacity can provide frequency and temperature correlated characteristic preferably.In addition, in semiconductor was made, MIM electric capacity can be formed at interlayer metal and copper-connection processing procedure, had also reduced degree of difficulty and the complexity integrated with the CMOS front-end process.
Traditional MIM electric capacity comprises bottom crown metal 1, dielectric layer 2 and top crown metal 3 as shown in Figure 1, forms the sandwich structure of folder dielectric layer between the double layer of metal.Wherein bottom crown metal 1 is formed at substrate 10 tops usually, and dielectric layer 2 is formed at base top and sidepiece and covers bottom crown metal 1, and top crown metal 3 is formed at dielectric layer 2 surfaces.Wherein bottom crown metal 1 can be electrode metal commonly used such as Cu or Al usually; Dielectric layer 2 is high k material, is generally SiN; In order to guarantee the size restrictions of MIM capacitor, top crown metal 3 should not be too thick, also need satisfy the demand of big capacitance on the other hand, in order to store more electric charge under thin thickness, the material of top crown metal 3 can be selected a kind of or its combination among Ti, TiN, Ta, the TaN.Yet, because dielectric layer 2 differs greatly with molecular structure between the top crown metal 3, between the two to be connected power poor, when being formed on the dielectric layer 2, top crown metal 3 can cause dislocation on dielectric layer 2 surfaces, especially can the very big dislocation power of generation between the top crown metal 3 of the sidepieces that substrate 10 outwards protrudes and dielectric layer 2, cause top crown metal 3 to peel off and be scattered from dielectric layer 2 to the full wafer wafer, may cause the full wafer wafer to be scrapped, can cause greater loss.
Summary of the invention
Technical problem to be solved by this invention is to overcome the deficiency that the top crown metal that is positioned at base side portion in the prior art peels off from dielectric layer easily, and a kind of novel MIM capacitor is provided.
The structure of MIM capacitor proposed by the invention is: a kind of MIM capacitor, comprise substrate, the sidepiece that described substrate has the top and outwards protrudes, also comprise the bottom crown metal, the dielectric layer that is formed on base top and sidepiece that are formed on base top, be formed on the top crown metal on the dielectric layer, described dielectric layer covers the bottom crown metal, it is characterized in that: also be formed with the transition zone that is used to improve the two bonding force between the dielectric layer of substrate sidepiece and top crown metal.
Another purpose of the present invention provides a kind of manufacture method of corresponding M IM capacitor: comprise the steps:
Prepare substrate, the sidepiece that this substrate has the top and outwards protrudes;
Form the bottom crown metal in base top;
Form dielectric layer in base top and sidepiece, this dielectric layer covers the bottom crown metal;
Form transition zone on dielectric layer, this transition zone has the effect that strengthens dielectric layer and top crown metal pickup power;
Adopt chemical-mechanical planarization technology to remove the transition zone of base top, exposure dielectric layer, the transition zone of reservation substrate sidepiece;
On the dielectric layer of exposure and transition zone, form the top crown metal.
Because the enforcement of technique scheme makes to be connected firmly between top crown metal and the dielectric layer that the top crown metal peeling phenomenon can not take place, and can improve the yield of MIM capacitor; And because the employing of special process, the character of capacitor is unaffected.
Description of drawings
Fig. 1 is existing a kind of MIM capacitor, because top crown metal and dielectric layer bonding force deficiency, the top crown metal peels off from dielectric layer;
Fig. 2 has shown the making flow process of MIM capacitor of the present invention;
Fig. 3 a to Fig. 3 f has shown the manufacture method of MIM capacitor of the present invention.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
A lot of details have been set forth in the following description so that fully understand the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention is not subjected to the restriction of following public concrete enforcement.
Secondly, the present invention utilizes schematic diagram to be described in detail, when the embodiment of the invention is described in detail in detail; for ease of explanation; the profile of expression device architecture can be disobeyed general ratio and be done local the amplification, and described schematic diagram is example, and it should not limit the scope of protection of the invention at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
Referring to Fig. 2, a kind of making flow process of MIM capacitor comprises the steps:
S100: prepare substrate, the sidepiece that this substrate has the top and outwards protrudes;
S101: form the bottom crown metal in base top;
S102: form dielectric layer in base top and sidepiece, this dielectric layer covers the bottom crown metal;
S103: form transition zone on dielectric layer, this transition zone has the effect that strengthens dielectric layer and top crown metal pickup power;
S104: adopt chemical-mechanical planarization technology to remove the transition zone of base top, exposure dielectric layer, the transition zone of reservation substrate sidepiece;
S105: on the dielectric layer of exposure and transition zone, form the top crown metal.
Below in conjunction with Fig. 3 a to Fig. 3 f, above-mentioned making flow process is elaborated, wherein with background technology in identical structure adopt identical label to represent.
S100: prepare substrate, the sidepiece that this substrate has the top and outwards protrudes;
Referring to Fig. 3 a, prepare substrate, this substrate 10 can be a silicon substrate, owing in making wafer technique, need Waffer edge is done chamfered, therefore substrate 10 inevitably has top and the outside sidepiece that protrudes, this sidepiece may be illustrated arc, also may be step, and the application does not limit especially to this.Form groove 11 in this substrate 10 in the presumptive area, the degree of depth of described groove 11 equals the thickness of formed first battery lead plate of subsequent technique, can select as required, and the depth bounds of present embodiment further groove 11 is 200nm~1000nm.Inner surface at groove 11 can also form one deck diffusion impervious layer 12, diffusion impervious layer 12 effects are to prevent that the bottom crown metal 1 that subsequent technique forms from spreading to the semiconductor-based ends 10, material can be Ta, Ti or TiN, TaN etc., can adopt chemical vapour deposition (CVD) CVD or atomic deposition ALD to form.In the present embodiment, described diffusion impervious layer 12 is the TaN layer, adopts atomic deposition ALD to form, and thickness range is 2nm~50nm.
S101: form the bottom crown metal in base top;
Referring to Fig. 3 b, in above-mentioned groove 11, form bottom crown metal 1, the material of described bottom crown metal 1 can be electrode metal commonly used such as Al or Cu, can adopt electrochemistry plating ECP or chemical vapour deposition (CVD) CVD to form.In the present embodiment, described bottom crown metal 1 material is Cu, adopts electrochemistry plating ECP to form, and by chemical-mechanical planarization CMP, removes the metal Cu that overflows in the groove 11.
S102: form dielectric layer in base top and sidepiece, this dielectric layer covers the bottom crown metal;
Referring to Fig. 3 c, form dielectric layer 2 at substrate 10 tops and sidepiece, this dielectric layer 2 covers bottom crown metal 1.The material of described dielectric layer 2 can be SiN commonly used, thickness is 10nm~100nm, it is a hafnium, helps improving the capacitance of formed MIM capacitor, can adopt chemical vapour deposition (CVD) CVD, physical vapour deposition (PVD) PVD or atomic deposition ALD to form.Because substrate 10 itself has the sidepiece (and sidepiece of non-perpendicular decline) of protrusion, therefore when dielectric layer deposition 2, SiN inevitably can be distributed in the top and the sidepiece of substrate 10, forms the shape shown in Fig. 3 c.
S103: form transition zone on dielectric layer, this transition zone has the effect that strengthens dielectric layer and top crown metal pickup power;
Referring to Fig. 3 d, on dielectric layer 2, form transition zone 4, described transition zone 4 can be SiO
2Or carbon doped silicon oxide, oxygen doped sic, thickness is greater than 20nm, can adopt chemical vapour deposition (CVD) CVD to form.About the thickness of transition zone 4, requirement can strengthen the bonding force between dielectric layer 2 and the top crown metal 3, and they can not peeled off, the transition zone 4 that thickness is bigger, and cementability is bigger, but can cause cost to increase, so thickness suits to get final product.
S104: adopt chemical-mechanical planarization technology to remove the transition zone of base top, exposure dielectric layer, the transition zone of reservation substrate sidepiece;
Referring to Fig. 3 e, adopt chemical-mechanical planarization technology CMP to remove the transition zone 4 at substrate 10 tops, the exposure dielectric layer, the transition zone 2 that keeps the substrate sidepiece, but in the process of planarization, the transition zone 4 of substrate 10 sidepieces can not contact with polishing pad, just can not be by worn yet, through after this road technology, the transition zone 4 of substrate 10 sidepieces is retained.
Because the transition zone 4 at substrate 10 tops is removed, make that the structure and the performance of electric capacity of follow-up formation is unaffected; Adopt CMP technology, compare other technology, can realize the purpose that transition zone 4 parts are removed fast, easily.
S105: on the dielectric layer of exposure and transition zone, form the top crown metal.
In order to guarantee the size restrictions of MIM capacitor, top crown metal 3 should not be too thick, also need satisfy the demand of big capacitance on the other hand, in order under thin thickness, to store more electric charge, the material of top crown metal 3 can be selected a kind of or its combination among Ti, TiN, Ta, the TaN, can adopt chemical vapour deposition (CVD) CVD, physical vapour deposition (PVD) PVD or atomic deposition ALD to form.
Referring to Fig. 3 f, in the present embodiment, at first on the dielectric layer 2 of exposure and transition zone 4, adopt TaN layer 31 that physical vapour deposition (PVD) PVD forms one deck 2nm~50nm as buffering, adopt physical vapour deposition (PVD) PVD on TaN layer 31, to form Ta layer 32, thickness range 20nm~100nm then.
Through above-mentioned steps, Fig. 3 f has shown a kind of MIM capacitor, and it comprises substrate 10, since the wafer fabrication process decision, the sidepiece that described substrate 10 has the top and outwards protrudes; Be formed with bottom crown metal 1 at the top of substrate 10; Be formed with dielectric layer 2 at substrate 10 tops and sidepiece, described dielectric layer 2 covers bottom crown metal 1; On dielectric layer 2, be formed with top crown metal 3; And between the dielectric layer 2 of substrate 10 sidepieces and top crown metal 3, also be formed with the transition zone 4 that improves the two bonding force.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting claim; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (10)
1. MIM capacitor, comprise substrate, the sidepiece that described substrate has the top and outwards protrudes, also comprise the bottom crown metal, the dielectric layer that is formed on base top and sidepiece that are formed on base top, be formed on the top crown metal on the dielectric layer, described dielectric layer covers the bottom crown metal, it is characterized in that: also be formed with the transition zone that is used to improve the two bonding force between the dielectric layer of substrate sidepiece and top crown metal.
2. MIM capacitor according to claim 1 is characterized in that: also have diffusion impervious layer between described bottom crown metal and the substrate.
3. MIM capacitor according to claim 1 is characterized in that: the material of described bottom crown metal is Al or Cu.
4. MIM capacitor according to claim 1 is characterized in that: the material of described dielectric layer is SiN, and thickness is 10nm~100nm.
5. MIM capacitor according to claim 1 is characterized in that: be formed with resilient coating between described top crown metal and the dielectric layer.
6. MIM capacitor according to claim 1 is characterized in that: the material of described top crown metal is a kind of or its combination among Ti, TiN, Ta, the TaN.
7. MIM capacitor according to claim 1 is characterized in that: described transition zone is SiO
2Or carbon doped silicon oxide or oxygen doped sic.
8. the manufacture method of a MIM capacitor as claimed in claim 1 comprises the steps:
Prepare substrate, the sidepiece that this substrate has the top and outwards protrudes;
Form the bottom crown metal in base top;
Form dielectric layer in base top and sidepiece, this dielectric layer covers the bottom crown metal;
Form transition zone on dielectric layer, this transition zone has the effect that strengthens dielectric layer and top crown metal pickup power;
Adopt chemical-mechanical planarization technology to remove the transition zone of base top, exposure dielectric layer, the transition zone of reservation substrate sidepiece;
On the dielectric layer of exposure and transition zone, form the top crown metal.
9. manufacture method according to claim 8 is characterized in that: described preparation substrate comprises, forms groove in the substrate presumptive area, forms diffusion impervious layer in groove.
10. manufacture method according to claim 8 is characterized in that: described in exposure dielectric layer and transition zone on form the step that forms resilient coating on the dielectric layer that also is included in exposure before the top crown metal and the transition zone.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009100559024A CN101989620B (en) | 2009-08-04 | 2009-08-04 | Metal-insulator-metal (MIM) capacitor and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009100559024A CN101989620B (en) | 2009-08-04 | 2009-08-04 | Metal-insulator-metal (MIM) capacitor and manufacturing method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101989620A CN101989620A (en) | 2011-03-23 |
CN101989620B true CN101989620B (en) | 2011-11-30 |
Family
ID=43746060
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009100559024A Expired - Fee Related CN101989620B (en) | 2009-08-04 | 2009-08-04 | Metal-insulator-metal (MIM) capacitor and manufacturing method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101989620B (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013052067A1 (en) * | 2011-10-07 | 2013-04-11 | Intel Corporation | Formation of dram capacitor among metal interconnect |
CN102867754A (en) * | 2012-09-07 | 2013-01-09 | 清华大学 | Two-dimensional material nanometer device based on inversion process and forming method of two-dimensional material nanometer device |
CN103779181A (en) * | 2012-10-18 | 2014-05-07 | 中芯国际集成电路制造(上海)有限公司 | MIM capacitor and manufacturing method thereof |
CN104037120A (en) * | 2013-03-06 | 2014-09-10 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing MIM capacitor |
CN104465608A (en) * | 2013-09-23 | 2015-03-25 | 中芯国际集成电路制造(上海)有限公司 | Mim capacitor and manufacturing method thereof |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6078492A (en) * | 1998-04-21 | 2000-06-20 | United Microelectronics Corp. | Structure of a capacitor in a semiconductor device having a self align contact window which has a slanted sidewall |
CN101335268A (en) * | 2007-06-26 | 2008-12-31 | 东部高科股份有限公司 | Metal insulator metal capacitor and method of manufacturing the same |
-
2009
- 2009-08-04 CN CN2009100559024A patent/CN101989620B/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6078492A (en) * | 1998-04-21 | 2000-06-20 | United Microelectronics Corp. | Structure of a capacitor in a semiconductor device having a self align contact window which has a slanted sidewall |
CN101335268A (en) * | 2007-06-26 | 2008-12-31 | 东部高科股份有限公司 | Metal insulator metal capacitor and method of manufacturing the same |
Non-Patent Citations (1)
Title |
---|
JP特开2007-227971A 2007.09.06 |
Also Published As
Publication number | Publication date |
---|---|
CN101989620A (en) | 2011-03-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101989620B (en) | Metal-insulator-metal (MIM) capacitor and manufacturing method thereof | |
TW584907B (en) | Semiconductor device and method for manufacturing the same | |
US7300840B2 (en) | MIM capacitor structure and fabricating method thereof | |
US10290576B2 (en) | Stress reduction apparatus with an inverted cup-shaped layer | |
US10546918B2 (en) | Multilayer buried metal-insultor-metal capacitor structures | |
CN1501500A (en) | Semiconductor devices | |
CN101834152B (en) | Method for manufacturing three-dimensionally stacked resistance conversion memory | |
CN101989621A (en) | Metal-insulator-metal (MIM) capacitor and manufacturing method thereof | |
CN1862818B (en) | Semiconductor device and a method of manufacturing the same | |
CN102420107B (en) | Copper Damascus process MIM (metal-insulator-metal) capacitor manufacturing process and structure | |
US8779589B2 (en) | Liner layers for metal interconnects | |
CN101271880B (en) | Semiconductor device and method of manufacturing the same | |
CN102237295B (en) | Semiconductor structure manufacturing method | |
WO2006057775A2 (en) | Method for fabricating a mim capacitor having increased capacitance density and related structure | |
CN102420101B (en) | Method for manufacturing double-layer metal-insulator-metal capacitor by using copper damascene process | |
CN103779181A (en) | MIM capacitor and manufacturing method thereof | |
CN100521188C (en) | Copper metallized barrier layer structure of integrated circuit or semiconductor device and its preparing method | |
US10147614B1 (en) | Oxide semiconductor transistor and method of manufacturing the same | |
US7687316B2 (en) | Method for adhering semiconductor devices | |
CN101359662B (en) | Semiconductor device | |
US9978607B2 (en) | Through via structure and method | |
CN112038286A (en) | Method for improving hillock defect in copper interconnection process | |
CN102420103B (en) | Copper Damascus process MIM (metal-insulator-metal) capacitor structure and manufacturing process | |
KR100489531B1 (en) | Method for manufacturing capacitor | |
KR20100041220A (en) | Stacted structure of mim capacitor for high density and manufacturing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20111130 Termination date: 20200804 |