CN101986271A - Method and device for dispatching TCAM (telecommunication access method) query and refresh messages - Google Patents

Method and device for dispatching TCAM (telecommunication access method) query and refresh messages Download PDF

Info

Publication number
CN101986271A
CN101986271A CN2010105265388A CN201010526538A CN101986271A CN 101986271 A CN101986271 A CN 101986271A CN 2010105265388 A CN2010105265388 A CN 2010105265388A CN 201010526538 A CN201010526538 A CN 201010526538A CN 101986271 A CN101986271 A CN 101986271A
Authority
CN
China
Prior art keywords
query
message
refresh
queue
fpga
Prior art date
Application number
CN2010105265388A
Other languages
Chinese (zh)
Other versions
CN101986271B (en
Inventor
伍益荣
朱寅
李维民
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Priority to CN 201010526538 priority Critical patent/CN101986271B/en
Publication of CN101986271A publication Critical patent/CN101986271A/en
Application granted granted Critical
Publication of CN101986271B publication Critical patent/CN101986271B/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication
    • G06F9/546Message passing systems or structures, e.g. queues

Abstract

The invention discloses a method and a device for dispatching TCAM (telecommunication access method) query and refresh messages, wherein the method comprises the following steps: an FPGA (field-programmable gate array) is used for placing a query message into a query message queue after receiving the query message; the FPGA is used for placing a refresh message into a refresh message queue after receiving the refresh message; and the FPGA is further used for respectively dispatching the query message in the query message queue and the refresh message in the refresh message queue. According to the invention, the problem of slow query response due to the situation that the refresh priority is higher than the query priority can be solved, functions of high-speed table search, forwarding and table item refreshing can be provided, fast forwarding can be realized, the throughput capacity of a network device can be upgraded and the performances of the network device can be further improved.

Description

调度TCAM查询和刷新消息的方法和装置 Method and apparatus for scheduling TCAM query and update messages

技术领域 FIELD

[0001 ] 本发明涉及网络通信技术领域,尤其涉及一种调度TCAM (Ternary Content Addressable Memory,三态内容寻址存储器)查询和刷新消息的方法和装置。 [0001] The present invention relates to network communication technology, and particularly relates to a method and apparatus TCAM (Ternary Content Addressable Memory, ternary content addressable memory) queries and refresh message scheduling.

背景技术 Background technique

[0002] TCAM主要用于网络设备报文转发时快速查找ACUAccessControl List,访问控制链表)、路由等表项。 [0002] TCAM is mainly used for network equipment packets quickly find ACUAccessControl List forwarding, access control list), routing table entries. 基于FPGA (Fi el (!Programmable Gate Array,现场可编程门阵列)的TCAM查找及刷新技术提供表项更新和查询调度,其中FPGA在处理器或者CPU和TCAM之间起到中转作用。在路由器和交换机等互连设备上,为了实现快速查表转发,TCAM的应用越来越普遍。 Based FPGA (Fi el (! Programmable Gate Array, a field programmable gate array) TCAM lookup and refreshing technology provides entry update and query scheduler, wherein the FPGA play transfer action between processors or CPU and TCAM. Router and the switches and other connected devices, in order to achieve fast lookup table forward, TCAM is more and more common.

[0003] 随着宽带网络的迅速发展,多核处理器的应用也越来越广泛,多个处理器内核集合起来可以提供很高的处理能力,为了充分利用每个单核处理器的资源,转发时将报文的处理分散到各个处理器单元,单个处理器单元都需要对报文进行ACL、路由等表项的查找, 同时CPU需要对TCAM中的表项条目以及处理器外设中的表项内容进行刷新操作,多个处理器需要共同访问单一的TCAM外设,如何使多个处理器实现TCAM的快速查表转发和表项条目刷新,并且使得各处理器的性能均衡,这就是基于FPGA的TCAM查询及刷新装置需要解决的问题。 [0003] With the rapid development of broadband networks, applications multicore processors have become more widespread, more processor cores collections together can provide high processing capabilities, in order to fully utilize the resources of each single-core processor, forwarding when the packet processing distributed to each processor unit, a single processor unit needs to packets ACL, routing table entry lookup, while the CPU needs for the TCAM entry entry and processor peripherals in the table items refresh operation, multiple processors need to work together to access a single TCAM peripherals, how to make more processors to implement fast lookup table forwarding and entry entry TCAM refreshing, and makes balanced performance of each processor, which is based on FPGA-TCAM inquiries and issue devices need to be addressed refreshed.

[0004] 如图1示出了相关技术基于FPGA的TCAM查询及刷新系统的结构框图,其包括处理器、CPU接口、FPGA、TCAM单元和SSRAM(串行静态随机存储器),SSRAM用于存放路由表。 [0004] FIG. 1 shows a block diagram of the related art FPGA-based TCAM inquiries and refresh system which includes a processor, CPU interfaces, FPGA, TCAM cells and SSRAM (serial static random access memory), SSRAM for storing routing table. 该技术的FPGA将TCAM查询和CPU对表项的刷新请求放在同一个队列中,基于查询和刷新的优先级对队列中的请求进行调度,其中,CPU对表项的刷新优先级高于处理器对TCAM查询的优先级。 The art FPGA will TCAM refresh request query and the CPU of the entries in the same queue, based on the query and a refresh priority of requests in the queue scheduling, wherein, the CPU refresh priority entry than the processing It is a priority for TCAM query. 这种分优先级调度的方法,使得查询和刷新的藕合度比较紧密,当有大量表项更新时,查询的响应速度将非常低,易造成网络中报文的阻塞,影响网络设备的吞吐能力。 This prioritized scheduling methods, making the query and refresh the degree of coupling more closely, when a large number of entry update, the response speed of the query will be very low, it could easily lead to the blocking network packets, affecting throughput network equipment .

发明内容 SUMMARY

[0005] 本发明的主要目的在于提供一种调度TCAM查询和刷新消息的方法和装置(包括FPGA装置和网络设备),以至少解决上述因刷新优先级高于查询优先级引起的查询响应较慢的问题。 [0005] The main object of the present invention is to provide a method and apparatus for scheduling TCAM query and refresh message (including the FPGA devices and network equipment), a slow query response to address at least the above-described result refresh priority is higher than priorities for querying caused The problem.

[0006] 根据本发明的一个方面,提供了一种调度TCAM查询和刷新消息的方法,包括: FPGA收到查询消息后,将该查询消息放入查询消息队列;FPGA收到刷新消息后,将该刷新消息放入刷新消息队列;FPGA分别对查询消息队列中的查询消息和刷新消息队列中的刷新消息进行调度。 [0006] In accordance with one aspect of the present invention, there is provided a method of scheduling TCAM query and refresh message comprising: FPGA receives the query message, the query message into a query message queue; the FPGA receive the refresh message, the the refresh message into a refresh message queue; the FPGA each of the query message queries the message queue and a refresh message queue refresh message scheduling.

[0007] 根据本发明的另一方面,提供了一种FPGA装置,包括:查询消息入队模块,用于收到查询消息后,将该查询消息放入查询消息队列;刷新消息入队模块,用于收到刷新消息后,将该刷新消息放入刷新消息队列;查询调度模块,用于对查询消息队列中的查询消息进行调度;刷新调度模块,用于对刷新消息队列中的刷新消息进行调度。 [0007] According to another aspect of the present invention, there is provided a FPGA apparatus, comprising: a query message enqueuing means for receiving the inquiry message, the query message into a query message queue; refresh message enqueuing module, after receiving the refresh message, the refresh message into a refresh message queue; query scheduling module, configured to query message queries the message queue to be scheduled; refresh scheduling module, configured to refresh message queue refresh message scheduling. [0008] 根据本发明的又一方面,提供了一种网络设备,包括上述FPGA装置,该网络设备还包括:处理器,用于向FPGA装置发送查询消息,以及接收FPGA装置返回的查询结果,根据查询结果获取路由信息,根据路由信息进行报文转发;CPU,用于向FPGA装置发送刷新消息,该刷新消息携带有对调度三态内容寻址存储器TCAM进行刷新操作的指示信息。 [0008] According to another aspect of the present invention, there is provided a network device, comprising the above-described FPGA device, the network device further comprises: a processor configured to send a query message to the FPGA device, and receiving FPGA device returns query results, obtaining a query to routing information, it forwards the packet according to the routing information; the CPU, configured to send the refresh message to the FPGA device, the refresh message carrying scheduling ternary content addressable memory TCAM instruction information refresh operation.

[0009] 通过本发明,采用FPGA上设置两个分支,即查询处理分支和刷新处理分支,对两个分支采用单独进行处理,互不干扰,解决了因刷新优先级高于查询优先级引起的查询响应较慢的问题,能够提供高速的查表转发和表项刷新,实现快速转发,提升了网络设备的吞吐能力,进而提高网络设备的性能。 [0009] By the present invention, use is provided two branches on the FPGA, i.e., query processing branch and a refresh processing branch, two branches was treated in a separate, non-interfering, solved by the refresh higher priority than the priorities for querying caused query slow response problems, can provide high-speed table look forward and entry flush, fast forward, enhance the throughput of network equipment, and improve the performance of network devices.

附图说明 BRIEF DESCRIPTION

[0010] 此处所说明的附图用来提供对本发明的进一步理解,构成本申请的一部分,本发明的示意性实施例及其说明用于解释本发明,并不构成对本发明的不当限定。 [0010] The drawings described herein are provided for further understanding of the invention, part of this application configuration, the exemplary embodiment of the present invention are used to explain the present invention without unduly limiting the present invention. 在附图中: In the drawings:

[0011] 图1是根据相关技术的基于FPGA的TCAM查询及刷新系统的结构框图; [0011] FIG. 1 is a related art FPGA-based TCAM query and the system block diagram of the refresh;

[0012] 图2是根据本发明实施例1的调度TCAM查询和刷新消息的方法流程图; [0012] FIG. 2 is a schedule of Example 1 TCAM query and method refresh message flow diagram of the present invention;

[0013] 图3是根据本发明实施例1的提供的缓存队列结构图; [0013] FIG. 3 is a buffer queue configuration diagram provided in Example 1 according to the present invention;

[0014] 图4是根据本发明实施例2的网络设备的结构框图; [0014] FIG. 4 is a block diagram of a network device 2 according to an embodiment of the present invention;

[0015] 图5是根据本发明实施例2的查询消息入队和出队调度的方法流程图; [0015] FIG. 5 is and method dequeue scheduling flowchart enqueued according to the query message the embodiment 2 of the invention;

[0016] 图6是根据本发明实施例2的查询消息入队和出队调度的示意图; [0016] FIG. 6 is a schematic diagram of a query message according to Example 2 of the invention enqueue and dequeue scheduling;

[0017] 图7是根据本发明实施例2的TCAM查询表项的方法流程图; [0017] FIG. 7 is a flowchart TCAM method of lookup table entries Example 2 of the invention;

[0018] 图8是根据本发明实施例2的CPU对表项刷新的方法流程图; [0018] FIG 8 is a flowchart of a method entry flush according to embodiments of the present invention, CPU Example 2;

[0019] 图9是根据本发明实施例3的FPGA装置的结构框图; [0019] FIG. 9 is a block diagram of FPGA apparatus according to the third embodiment of the present invention;

[0020] 图10是根据本发明实施例4的网络设备的结构框图。 [0020] FIG. 10 is a block diagram of a network device according to a fourth embodiment of the present invention.

具体实施方式 Detailed ways

[0021] 下文中将参考附图并结合实施例来详细说明本发明。 [0021] Hereinafter with reference to the accompanying drawings and embodiments of the present invention will be described in detail. 需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。 Incidentally, in the case of no conflict, the embodiments and the features of the embodiments of the present application can be combined with each other.

[0022] 实施例1 [0022] Example 1

[0023] 图2示出了根据本发明实施例的一种调度TCAM查询和刷新消息的方法流程图,该方法包括以下步骤: [0023] FIG 2 illustrates a method of scheduling an embodiment of the present invention TCAM query and refresh message flow diagram of the method comprising the steps of:

[0024] 步骤S102,现场可编程门阵列FPGA收到查询消息后,将查询消息放入查询消息队列; [0024] In step S102, a field programmable gate array (FPGA) after receiving the query message, a query message into a query message queue;

[0025] 步骤S104,FPGA收到刷新消息后,将该刷新消息放入刷新消息队列; After [0025] Step S104, FPGA receive the refresh message, the refresh message into a refresh message queue;

[0026] 步骤S106,FPGA分别对查询消息队列中的查询消息和刷新消息队列中的刷新消 [0026] Step S106, FPGA each query message queries the message queue, and refresh message queue refresh consumption

息进行调度。 Interest rates scheduled.

[0027] 上述FPGA对TCAM的查询和刷新消息采用分路进行存放,能够实现并行调度查询和刷新。 [0027] The FPGA query and a refresh message TCAM using shunt for storage can be realized parallel scheduling queries and refresh.

[0028] 为了实现对于多核处理器时,各处理器TCAM查询的均衡处理,优选地,上述FPGA 上设置有多个查询消息队列,且查询消息队列与处理器一一对应;相应地,步骤S102包括: FPGA将查询消息放入查询消息携带的处理器编号对应的查询消息队列中;步骤S106中的FPGA对查询消息队列中的查询消息进行调度包括:FPGA采用轮询方式调度多个查询消息队列,对被调度的查询消息队列中的查询消息进行出队列处理。 [0028] In order to achieve respect to the multi-core processor, equalization processing of each processor TCAM query, is preferably provided with a plurality of query message queue above the FPGA, and the query message queue processor correspondence; Accordingly, the step S102 comprising: FPGA query message into a query message carrying processor number corresponding to the query message queue; in step S106 FPGA query message queries the message queue to be scheduled comprises: FPGA polling of scheduling a plurality of query message queue , the query message is scheduled query message queue is a queue processing.

[0029] 所谓轮询调度指对每个查询消息队列按照一定的顺序依次调度,在一段时间内, 每个查询消息队列被调度的次数基本相同。 [0029] The so-called polling scheduling assignment queue sequentially scheduled in a certain order for each query message, a period of time, the number of times each query message queue is scheduled substantially the same.

[0030] 优选地,FPGA对被调度的查询消息队列中的查询消息进行出队列处理包括:FPGA 采用先进先出(FIFO,First In First Out)的方式对被调度的查询消息队列中的查询消息进行出队列处理。 [0030] Preferably, FPGA query message is scheduled query message queue is a queue processing comprising: FPGA using FIFO (FIFO, First In First Out) manner query message scheduled query message queue carried out queue processing.

[0031] FPGA对刷新消息队列中的刷新消息进行调度包括:FPGA采用先进先出FIFO的方式对刷新消息队列中的刷新消息进行调度。 [0031] FPGA refresh message queue refresh message scheduling comprising: FPGA using FIFO FIFO manner refresh message queue refresh message scheduling.

[0032] 上述FPGA对查询消息队列中的查询消息进行调度之后,方法还包括:FPGA接收查询消息的查询结果,将查询结果返回给查询消息对应的处理器;处理器根据查询结果获取路由信息,根据路由信息转发报文。 [0032] After the above FPGA query message queries the message queue to be scheduled, the method further comprising: FPGA receive a query query result message, the query results are returned to the query message corresponding to the processor; and a processor for routing information according to the query result, according to the routing information to forward packets.

[0033] 在实际应用中,一般当用户配置改变或者网络中链路状态发生变化时,TCAM表项条目才会进行刷新,而这些改变的频率较低,这就使得分优先级调度有点多余,所以本实施例没有为刷新调度和查询调度设置优先级,而是将二者分别存放在不同的队列中,对存放的队列分别进行调度。 [0033] In practice, typically when the user configuration change or when a link state changes in the network, the TCAM table item entry will be refreshed, and the lower the frequency of change, which makes the sub-priority scheduling bit redundant, Therefore, the present embodiment does not set a priority to the refresh scheduling and query scheduler, but the two were stored in different queues, queue stored scheduling, respectively.

[0034] 参见图3,为本发明实施例提供的缓存队列结构图,缓存队列包括多个查询消息队列和一个刷新消息队列,其中,sl-s5表示查询消息,ul-u5表示刷新消息,具体介绍如下: [0034] Referring to Figure 3, the buffer queue configuration diagram according to an embodiment of the present invention, the buffer queue includes a plurality of query message queues and a refresh message queue, wherein, sl-s5 represent the query message, ul-u5 represented refresh message, particularly described as follows:

[0035] 查询消息队列为多个,对应每个处理器设置,一个查询消息队列用于缓存来自同一个处理器发出的查询消息,本发明实施例的查询消息可以包括:处理器编号、所查询表项类型、查询内容的大小以及查询内容。 [0035] The query message queue is a plurality, corresponding to each processor is provided, a query message queue for buffering from the query message with a processor issues a query message according to embodiments of the present invention may comprise: a processor number, the query entry type, size, query and query. 其中,处理器编号用于确定查询消息所入的队列号, 以及查询结果返回的处理器;表项类型标识是何种表项的查询,是ACL或者路由,还是其他表项;查询内容的大小表示是多少位的查询,比如144/256 ;查询内容是输入查找的条件, 比如查路由输入的内容是目的IP,ACL查找输入的内容是报文的IP五元组,该IP五元组包括源IP址,目的IP地址,源端口号,目的端口号,以及协议类型。 Wherein the processor number is used to determine the query message into a queue number, and a processor query results returned; entry type identifies what kind of lookup table entries, is ACL or routing, or other entries; size of the query content indicate how many bits of inquiry, such as 144/256; query is a condition input look, such as content check routing input is the purpose of IP, ACL find the input content is IP quintuple of packets, the IP quintuple include source IP address, destination IP address, source port number, destination port number, and protocol type. 在将查询消息放入对应的查询消息队列时,可以为该查询消息设置消息编号,以标识该查询消息队列中查询消息进入的先后顺序。 When a query message into a corresponding query message queue to be for the query message setup message number to identify the query message to enter the order queue in the query message.

[0036] 刷新消息队列,多个处理器共用一个FIFO缓存队列,只设一个缓存队列是由于在实际应用中CPU对TCAM条目的刷新操作频率较低,一般是在用户配置更改的情况下才刷新表项。 [0036] Refresh message queue, a plurality of processors share a FIFO buffer queue, provided only a buffer queue due to the lower CPU refresh operation frequency TCAM entry in practical applications, usually only refresh in a case where the user configuration changes entries. 刷新消息的数据结构包括刷新消息编号、刷新条目的类型、刷新内容。 Data structure refresh message includes a refresh message number, the refresh entry type, to refresh the content.

[0037] 缓存队列的长度取2的整数次方,可以直接用查询消息编号或者刷新消息编号的低位找到消息在在缓存队列中的位置,比如缓存队列长度为32,为2的5次方,则取消息编号的二进制数低5位作为其在缓存队列中的位置,例如,消息编号为57,其二进制数为111001,低5位为11001,十进制为25,则该消息入缓存队列25的位置。 [0037] lengths are integer power buffer queue 2, can directly query message number or refresh message number of low Found message at a position in the buffer queue, such as queue length of 32, 5 th power of 2, then take the message number of the low binary number five as its position in the buffer queue, for example, message number 57, which binary number 111001, the lower 5 bits 11001, a decimal 25, then the message to the buffer queue 25 position.

[0038] 上述方法可以应用于多核处理器或者多个处理器用FPGA中转进行TCAM查询及刷新处理中,由于其FPGA上设置两个分支,即查询处理分支和刷新处理分支,对两个分支采用单独进行处理,互不干扰,解决了因刷新优先级高于查询优先级引起的查询响应较慢的问题,能够提供高速的查表转发和表项刷新,实现快速转发,提升了网络设备的吞吐能力, 进而提高网络设备的性能。 [0038] The above method may be applied to a multi-core processor or multiple processors TCAM query and the refresh process in the FPGA transit, since the two branches thereof FPGA, i.e., query processing branch and a refresh processing branch, two branches with a separate processed without disturbing each other, to solve the query result refresh takes precedence over the inquiry priority due to slow response problems, can provide high-speed table look forward and entry flush, fast forward, enhance the throughput of network equipment and further improve the performance of network devices. [0039] 实施例2 [0039] Example 2

[0040] 本实施例提供了一种调度TCAM查询和刷新消息的方法,该方法以在图4所示的网络设备上实现为例进行说明,图4所示的网络设备包括如下功能单元: [0040] The present embodiment provides a method of scheduling TCAM query and update messages, the method implemented on a network device of FIG. 4 as an example, FIG network device shown in Figure 4 includes the following functional units:

[0041] 1)处理器单元,处理器单元通过查询通道与FPGA相连,其内部包括多个处理器, [0041] 1) a processor unit, the processor unit by querying the channel and FPGA connected therein comprising a plurality of processors,

分别用处理器1、处理器2........处理器η表示,多个单核处理器或者多个处理器可以同 Respectively Processor 1, Processor 2 ........ processor η said plurality of single-core processor or multiple processors may be the same

时发出对不同表项的TCAM查询请求。 When issuing TCAM queries for different entries. 查询通道负责传递从各个处理器发出的查询请求以及从FPGA返回的查询结果,处理器根据该查询的结果,访问存储在处理器外设中的表项, 获取报文转发所需的信息,以实现报文的转发。 Interrogation channel is responsible for transmitting a query request sent from the respective processors and returned from the FPGA query result, the processor according to the results of the query, entry access information stored in the processor peripherals acquires packet forwarding information needed to to achieve packet forwarding.

[0042] 2) CPU, CPU通过刷新通道与FPGA相连,CPU通过FPGA对TCAM中表项条目进行增加、删除、更新操作,同时对处理器外设中表项进行相应修改。 [0042] 2) CPU, CPU refresh passage FPGA is connected, the CPU be increased TCAM table item entry by FPGA, deleted or updated, while the processor peripherals table entry modified accordingly.

[0043] 3)处理器外设,包括SRAM (Static Random Access Memory,静态随机存储器)、 DRAM (Dynamic Random Access Memory,动态随机存储器)以及DDR(Double Data Rate,双倍数据传输速率存储器)等外设,上述处理器查询TCAM得到的结果是一个指向存储在外设中的具体表项地址的指针或者索引,根据该指针或索引处理器从外设中读取相应表项信息。 [0043] 3) processor peripherals, including SRAM (Static Random Access Memory, Static Random Access Memory), DRAM (Dynamic Random Access Memory, Dynamic Random Access Memory) and DDR (Double Data Rate, double data rate memory) endures provided, a result of the processor queries TCAM obtained a pointer or an index specific item of the address stored in the peripheral, and read the corresponding entries from the peripheral according to the pointer or index processor. CPU对TCAM表项条目进行更新操作的同时,对存储在外设中相应表项进行相应的修改。 At the same time the CPU TCAM table entry entry updating operation on memory corresponding changes in the peripheral corresponding entries.

[0044] 4) FPGA, FPGA包括查询处理单元和刷新处理单元,其分别响应处理器和CPU发出的查询和刷新请求,查询处理和刷新处理独立运作,在CPU刷新TCAM表项条目的同时,处理器仍然可以进行TCAM查询。 [0044] 4) FPGA, FPGA includes a query processing unit and a refresh processing unit, respectively in response to the query and the refresh request processor and issued by the CPU, query processing and the refresh processing operate independently, refresh while TCAM table entry's in the CPU, the processing you can still be TCAM query.

[0045] 其中,查询处理单元根据单核处理器的个数设置有多个FIFO查询缓存队列(对应于实施例1中的查询消息队列),每个处理器对应一个FIFO队列,队列之间采用轮询调度的原则。 [0045] wherein, query processing unit according to the number of single-core processor provided with a plurality of FIFO query cache queue (corresponding to Embodiment 1 of the query message queue embodiment), each processor corresponds to a FIFO queue, the queues using principles of round robin scheduling. 查询处理单元根据处理器编号将查询消息分发到对应的查询队列中。 Query processing unit according to the processor number query message distributed to the corresponding query queues. 刷新处理单元的功能在于快速响应CPU的更新命令,对TCAM中表项进行更新。 Refresh function processing unit is the rapid response to the update command to the CPU, for TCAM table entries are updated.

[0046] 5) TCAM单元,用于响应CPU通过FPGA发来的刷新消息,更新表项条目;以及用于响应处理器通过FPGA发来的查询消息,并返回查询结果。 [0046] 5) TCAM unit, in response to the CPU via the FPGA sent refresh messages, update entries entry; and in response to the processor through FPGA sent the query message and returns the query results.

[0047] 基于图4所示的网络设备,本实施例提供了一种查询消息入队和出队调度的方法,本实施例的FPGA的查询处理单元维护一个队列状态向量,队列状态向量是一个二进制的数值,相应位置1表示该队列有消息,例如:队列总数为8,队列状态向量00001001表示队列1和队列4中有消息需要出队,而其他6个队列中没有消息需要出队,参见图5,该方法包括以下步骤: [0047] Based on the network device shown in Figure 4, the present embodiment provides a method of query message enqueue and dequeue scheduling, FPGA present embodiment query processing unit maintains a queue state vector, queue status vector is a binary value corresponding to the position 1 represents the queue with a message, for example: queue a total of 8, the queue state vector 00001001 indicates that the queue 1 and queue 4 has message requires a team, while the other six queues no message needs to be dequeued, see 5, the method comprising the steps of:

[0048] 步骤S502,查询消息入队,具体为:查询处理单元接收到查询消息后,根据查询消息的处理器编号分别入队,对查询消息编号,根据入队的队列号将队列状态向量的相应位置1,表示该队列有消息需要出队; [0048] step S502, the query message into the team, specifically: query processing unit receives the query message, the query message processor number are enqueued, the query message number, according to enqueue queue number queue state vector respective positions 1, indicates that the queue has a message needs to be dequeued;

[0049] 步骤S504,查询处理单元对各队列采用轮询的方式循环调度,每轮调度一个队列中的一个查询消息;具体如下: [0049] step S504, the query processing unit employed for each queue mode loop scheduling polling round scheduling a query message queue; follows:

[0050] 步骤1,初始化调度队列号为η = 1,从第一个队列开始调度; [0050] Step 1, initialization scheduler queue number is η = 1, scheduling is started from the first queue;

[0051] 步骤2,如果η大于队列总数,则设置η = 1,即最后一个队列执行了调度后,再从第一个队列开始循环调度;否则,本轮调度队列为η ; After [0051] Step 2, if [eta] is greater than the queue total number, set η = 1, i.e., the last queue perform scheduling, and then start the cycle schedule from the first queue; otherwise, round scheduling queue is [eta];

[0052] 步骤3,判断队列状态向量的相应位是否置1,若置1,表示该队列有查询消息需要出队,则执行步骤4;否则,表示该队列没有查询消息需要调度,执行下一个队列的调度,即执行步骤5 ; [0052] Step 3 determines the corresponding bit queue state vector if set to 1, if set, indicates that the queue has the query message needs to be dequeued, step 4 is performed; otherwise, indicates that the queue does not query message to be scheduled, execution of the next dispatch queue, i.e., step 5;

[0053] 步骤4,队列内部的调度,根据查询消息编号顺序出队,如果该队列所有查询消息都被调度出去,将该队列对应的队列向量中的位清0。 [0053] 4, the queue inside the scheduling step, according to the query message number order dequeued, if the queue all query messages are scheduled out, the queue vector queue corresponding to the bit is cleared.

[0054] 步骤5,η = η+1,执行下一个队列的调度,跳到步骤3。 [0054] Step 5, η = η + 1, perform the next queue scheduling, skip to step 3.

[0055] 参见图6所示的查询消息入队和出队调度的示意图,FPGA根据查询消息的处理器编号将查询消息放入对应的队列,采用轮询方式对各队列的查询消息进行出队处理。 [0055] The schematic query message shown in Figure 6 Referring to FIGS enqueue and dequeue scheduling, FPGA according to the query message processor number query message into a queue corresponding to, polling of the query message for each queue is dequeued deal with.

[0056] 基于图4所示的网络设备,图7示出了根据本实施例的一种TCAM表项查询方法的流程图,该方法包括以下步骤: [0056] Based on the network device shown in FIG. 4, FIG. 7 shows a flow diagram of a TCAM table entry search method according to the present embodiment, the method comprises the steps of:

[0057] 步骤S702,处理器1、处理器2,......,处理器η根据需要发出查询消息,查询消 [0057] step S702, the processor 1, processor 2, ......, processor η issue a query message according to the needs, query message

息中包括处理器编号、所查询表项的类型、查询内容的大小、查询内容,查询消息通过查询通道传送给FPGA ; Information includes a processor number, the type of entries query, size of the content query, the query message to the FPGA by querying the channel;

[0058] 步骤S704,FPGA识别出查询消息,将查询消息按处理器编号入队; [0058] Step S704, FPGA identify the query message, a query message according to the processor number into the team;

[0059] FPGA的查询处理单元维护多个查询消息队列,每个处理器对应一个队列,根据处理器编号将查询消息入队,按照轮询的方式对多个查询消息队列进行调度,每个队列内部按FIFO的原则调度,进行TCAM查询,并将查询结果返回给请求的处理器。 [0059] FPGA query processing unit maintaining a plurality of query messages queues, each processor corresponds to a queue, according to the processor number query message queued for a plurality of query message queue to be scheduled in a polling manner, each queue internal according to the principle scheduling FIFO performs TCAM query, and returns query results processor to the request.

[0060] 步骤S706,查询处理单元将查询消息出队,进入TCAM查询,并将查询的结果按处理器编号返回给相应的处理器; [0060] step S706, the query processing unit a query message dequeued into the TCAM query result and the query by the processor number is returned to the respective processor;

[0061] 步骤S708,处理器根据TCAM查询的结果,即表项信息在处理器外设中的地址,读取表项的具体内容; [0061] step S708, the processor according to the result TCAM query, i.e., entries in the address processor peripherals reads the specific content entries;

[0062] 步骤S710,处理器根据查询到表项的内容进行报文转发。 [0062] step S710, the processor forwards the packet according to the queried content entry.

[0063] 基于图4所示的网络设备,图8示出了根据本实施例的一种CPU对表项刷新的方法流程图,该方法包括以下步骤: [0063] Based on the network device shown in FIG. 4, FIG. 8 illustrates a method of entry flush flowchart in accordance with one CPU to the present embodiment, the method comprises the steps of:

[0064] 步骤S802,CPU发出表项刷新消息,刷新消息中包括表项的类型以及刷新的内容, 刷新消息通过刷新通道传送给FPGA ; [0064] Step S802, CPU issuing entry refresh message, the refresh message comprising type table entries and the contents of refresh, refresh messages FPGA refresh tunneled to;

[0065] 步骤S804,FPGA识别出刷新消息,将刷新消息入队; [0065] Step S804, FPGA identified refresh message, the refresh message enqueued;

[0066] 步骤S806,按照先进先出的原则将刷新消息调度出队; [0066] step S806, the in accordance with the FIFO principle will refresh message dispatch dequeue;

[0067] 步骤S808,TCAM收到刷新消息则将表项条目进行更新,包括增添、删除、修改操作; [0067] step S808, TCAM receive refresh message is entry entry updates, including add, delete, modify operation;

[0068] 步骤S810,CPU对处理器外设表项中的条目进行更新,包括增添、删除、修改操作。 [0068] Step S810, CPU processor peripheral entries of the entry update, including add, delete, modify operation.

[0069] 上述方法中的处理器用FPGA中转进行TCAM的查询访问,FPGA返回指向外设中表项地址的指针或者索引,处理器根据返回的结果,读取处理器外设中的表项;另外,CPU用FPGA中转进行TCAM的刷新操作(即TCAM表项条目的更新操作),同时更新处理器外设中的相应表项信息。 [0069] The methods processor query access TCAM with FPGA transit, FPGA return a pointer or index peripheral table entry address, the processor according to the result returned reads entries processor peripherals; another , the CPU for TCAM refresh operation (i.e., refresh operation TCAM table entry's), and update the corresponding entries in the processor peripherals with FPGA transit.

[0070] 本实施例提供的调度方法支持查询和刷新操作的并行处理,在查询的同时可以进行表项条目的更新,表项条目更新的同时也可以进行查询。 [0070] The present embodiment scheduling method provided support queries and refresh parallel processing operations can be updated table entry's while query table item entry updates also can be queried. 同时,上述方法采用在FPGA上设置与处理器个数对应的查询消息队列,能够解决相关技术只支持单个处理器的查询,对多个处理器或者多线程的并行查询以及多种表项的查询处理能力不足的问题,如果有多个单核处理器并行查询多种表项,查找的效率将比较高;且因采用轮询调度的方式,各个单核处理器的性能也比较均衡。 Meanwhile, the above method using the set number of processors corresponding in the FPGA query message queue, it is possible to solve the related technical support queries only a single processor, multiple processors, or parallel query multiple threads, and query multiple entries the problem of insufficient processing capacity, if there are a plurality of single core processors parallel query multiple entries, search efficiency will be relatively high; and by using the round robin manner, the performance of each single-core processor is more balanced. [0071] 实施例3 [0071] Example 3

[0072] 图9示出了根据本发明实施例的一种FPGA装置的结构框图,该装置包括: [0072] FIG. 9 shows a block diagram of a structure of an FPGA apparatus according to embodiments of the present invention, the apparatus comprising:

[0073] 查询消息入队模块92,用于收到查询消息后,将查询消息放入查询消息队列; [0073] Query message enqueuing module 92, after receiving the query message, a query message into a query message queue;

[0074] 刷新消息入队模块94,用于收到刷新消息后,将刷新消息放入刷新消息队列; [0074] Refresh message enqueuing module 94, after receiving the refresh message, the refresh message into a refresh message queue;

[0075] 查询调度模块96,与查询消息入队模块92相连,用于对查询消息队列中的查询消息进行调度; [0075] The query scheduler module 96, the query message into a coupled force module 92 to the query message queries the message queue to be scheduled;

[0076] 刷新调度模块98,与刷新消息入队模块94相连,用于对刷新消息队列中的刷新消息进行调度。 [0076] Refresh scheduling module 98, and a refresh message enqueuing module is connected 94, a refresh message queue refresh message scheduling.

[0077] 查询消息入队模块92包括:队列确定单元,用于接收到查询消息后,根据查询消息携带的处理器编号确定对应的查询消息队列;其中,FPGA装置上设置有多个查询消息队列,且查询消息队列与处理器一一对应;入队单元,用于将查询消息放入队列确定单元确定的查询消息队列中; [0077] Query message enqueuing module 92 comprises: a queue determining unit configured to, after receiving the query message, the processor according to the query message carries the code number determining corresponding query message queue; wherein a plurality of the query message queue FPGA device , and the query message queue processor correspondence; enqueuing means for a query message in the queue determining unit determines that a query message queue;

[0078] 查询调度模块96包括:轮询调度单元,用于采用轮询方式调度多个查询消息队列;出队单元,用于对轮询调度单元调度的查询消息队列中的查询消息进行出队列处理。 [0078] The query scheduler module 96 comprises: a polling scheduling unit for polling of scheduling a plurality of query message queue; dequeuing means for query message query message to the poll scheduling unit in the queue is the queue deal with.

[0079] 优选地,出队单元包括:出队子单元,用于采用先进先出FIFO的方式对上述轮询调度单元调度的查询消息队列中的查询消息进行出队列处理。 [0079] Preferably, the team unit comprises: dequeuing sub-unit, for employing the query message FIFO FIFO manner as the above-described polling scheduling unit query message queue is a queue processing.

[0080] 刷新调度模块98包括:刷新调度单元,用于采用先进先出FIFO的方式对刷新消息队列中的刷新消息进行调度。 [0080] Refresh scheduling module 98 comprises: a refresh scheduling unit configured manner using FIFO FIFO to refresh message queue refresh message scheduling.

[0081] 其中,上述查询消息包括:处理器编号、所查询表项类型、查询内容的大小以及查询内容。 [0081] wherein the query message comprising: a processor number, the query entry type, query size and query. 处理器编号用于确定查询消息所入的队列号,以及查询结果返回的处理器;表项类型标识是何种表项的查询,是ACL或者路由,还是其他表项;查询内容的大小表示是多少位的查询,比如144/256 ;查询内容是输入查找的条件,比如查路由输入的内容是目的IP,ACL 查找输入的内容是报文的IP五元组,该IP五元组包括源IP址,目的IP地址,源端口号,目的端口号,以及协议类型。 The processor number is used to determine the query message into a queue number, and a processor query results returned; entry type identifies what kind of lookup table entries, is ACL or routing, or other entries; size query representation is how many queries, such as 144/256; query is a condition input look, such as content check routing input is the purpose of IP, ACL find the input content is IP quintuple of packets, the IP quintuple include source IP address, destination IP address, source port number, destination port number, and protocol type. 在将查询消息放入对应的查询消息队列时,可以为该查询消息设置消息编号,以标识该查询消息队列中查询消息进入的先后顺序。 When a query message into a corresponding query message queue to be for the query message setup message number to identify the query message to enter the order queue in the query message.

[0082] 刷新消息队列,本实施例的多个处理器共用一个FIFO缓存队列,本实施例只设一个刷新消息队列是由于在实际应用中CPU对TCAM条目的刷新操作频率较低,一般是在用户配置更改的情况下才刷新表项。 [0082] Refresh message queue, a plurality of processors according to the present embodiment is common to a FIFO buffer queue, the present embodiment only set a refresh message queue due to the lower CPU refresh operation frequency TCAM entry in practical applications, generally in only refresh entries without the user's configuration changes. 刷新消息的数据结构包括刷新消息编号、刷新条目的类型、 刷新内容。 Data structure refresh message includes a refresh message number, the refresh entry type, to refresh the content.

[0083] 上述FPGA装置可以应用于多核处理器或者多个处理器用FPGA中转进行TCAM查询及刷新处理中,由于FPGA装置上设置两个分支,即查询处理分支和刷新处理分支,对两个分支采用单独进行处理,互不干扰,解决了因刷新优先级高于查询优先级引起的查询响应较慢的问题,能够提供高速的查表转发和表项刷新,实现快速转发,提升了网络设备的吞吐能力,进而提高网络设备的性能。 [0083] The FPGA device may be applied to a multi-core processor or multiple processors TCAM query and the refresh process with FPGA transit, since the two branches of the FPGA device, i.e., query processing branch and a refresh processing branch, two branches using treated separately without disturbing each other, to solve the query result refresh takes precedence over the inquiry priority due to slow response problems, can provide high-speed table look forward and entry flush, fast forwarding, enhanced network device throughput capacity, and to improve the performance of network devices.

[0084] 实施例4 [0084] Example 4

[0085] 图10示出了根据本发明实施例的一种网络设备的结构框图,该网络设备包括FPGA装置102、处理器104和CPU 106,FPGA装置102分别与处理器104和CPU 106相连, 其中,FPGA装置102可以按照实施例3中的方式实现,这里不再详述。 [0085] FIG. 10 shows a block diagram of a network device in an embodiment of the present invention, the network device comprises a FPGA device 102, processor 104 and CPU 106, FPGA 102 is connected to the processor 104 and CPU 106, respectively, wherein, FPGA device 102 may manner as in Example 3 to achieve, not described in detail here.

[0086] 处理器104,用于向FPGA装置102发送查询消息,以及接收所述FPGA装置返回的 [0086] processor 104, configured to send a query message to the FPGA 102, and receiving the FPGA device is returned

9查询结果,根据该查询结果获取路由信息,根据该路由信息进行报文转发; 9 results, routing information based on the query result, forward packets based on the routing information;

[0087] CPU 106,用于向FPGA装置102发送刷新消息,其中,该刷新消息携带有对调度TCAM进行刷新操作的指示信息。 [0087] CPU 106, configured to send the refresh message to the FPGA 102, wherein the refresh message carrying scheduling TCAM refresh operation indication information.

[0088] 本实施例的网络设备还可以按照实施例2中图4所示的网络设备实现,具体功能与其相同,这里不再赘述。 [0088] The network apparatus according to the present embodiment may also be according to the network device shown in embodiment 2 in FIG embodiment implemented, specific functions identical thereto is not repeated here.

[0089] 本实施例的网络设备通过在FPGA装置上设置两个分支,即查询处理分支和刷新处理分支,对两个分支采用单独进行处理,互不干扰,解决了因刷新优先级高于查询优先级引起的查询响应较慢的问题,能够提供高速的查表转发和表项刷新,实现快速转发,提升了网络设备的吞吐能力,进而提高网络设备的性能。 [0089] The network apparatus according to the present embodiment, by providing two branches in the FPGA device, i.e., query processing branch and a refresh processing branch, two branches was treated in a separate, non-interfering, solved by the refresh priority than the query priority query caused by slow response problems, can provide high-speed table look forward and entry flush, fast forward, enhance the throughput of network equipment, and improve the performance of network devices.

[0090] 与现有技术相比较,以上实施例提供的技术,通过对查询和刷新的分开处理,使得查询和刷新的处理互不干扰,提高了查询与刷新的效率;将不同处理器的查询消息分开入队,实现了并行查询,各个单核处理器的查询队列轮询调度,使得每个单核处理器的性能均衡。 [0090] Compared with the prior art technology provided in the above embodiment, by processing the query and update separate, such that the query and update processing of non-interfering, improved query refresh efficiency; different processor queries message separated into the team, to achieve a parallel query, each single-core processor queries queue round robin scheduling, such that performance of the equalizer of each single-core processor. 并能够快速响应处理器对TCAM的查询以及表项的刷新,实现快速转发,提高了网络设备吞吐能力,进而提升了网络设备的性能。 And the ability to respond quickly to queries and refresh entries processor TCAM, and fast forwarding, and improves network equipment throughput, and thus enhance the performance of network devices.

[0091] 显然,本领域的技术人员应该明白,上述的本发明的各模块或各步骤可以用通用的计算装置来实现,它们可以集中在单个的计算装置上,或者分布在多个计算装置所组成的网络上,可选地,它们可以用计算装置可执行的程序代码来实现,从而,可以将它们存储在存储装置中由计算装置来执行,并且在某些情况下,可以以不同于此处的顺序执行所示出或描述的步骤,或者将它们分别制作成各个集成电路模块,或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。 [0091] Obviously, those skilled in the art should understand that the modules or steps described above according to the present invention may be general purpose computing device, they can be integrated in a single computing device or distributed across multiple computing devices available on the Internet, optionally, they may be implemented by program code computing device may perform, so to be executed by a computing device stored in a storage means, and in some cases, may be different from this sequence at step illustrated or described, or they are made into integrated circuit modules, or by making them of a plurality of modules or steps into a single integrated circuit module. 这样,本发明不限制于任何特定的硬件和软件结合。 Thus, the present invention is not limited to any particular hardware and software combination.

[0092] 以上所述仅为本发明的优选实施例而已,并不用于限制本发明,对于本领域的技术人员来说,本发明可以有各种更改和变化。 [0092] The above merely illustrate the preferred embodiments of the present invention is not intended to limit the invention to those skilled in the art, the present invention may have various changes and variations. 凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。 Any modification within the spirit and principle of the present invention, made, equivalent substitutions, improvements, etc., should be included within the scope of the present invention.

Claims (10)

  1. 一种调度三态内容寻址存储器TCAM查询和刷新消息的方法,其特征在于,包括:现场可编程门阵列FPGA收到查询消息后,将所述查询消息放入查询消息队列;所述FPGA收到刷新消息后,将所述刷新消息放入刷新消息队列;所述FPGA分别对所述查询消息队列中的查询消息和所述刷新消息队列中的刷新消息进行调度。 A method for addressing memory TCAM query and refresh message tristate scheduling content, characterized by comprising: a field programmable gate array (FPGA) after receiving the query message, the query message into a query message queue; the FPGA yield to refresh message, the refresh message into a refresh message queue; the FPGA each of the query inquiry message in the message queue and the refresh message queue refresh message scheduling.
  2. 2.根据权利要求1所述的方法,其特征在于,所述FPGA上设置有多个查询消息队列,且所述查询消息队列与处理器一一对应;所述FPGA将所述查询消息放入查询消息队列包括:所述FPGA将所述查询消息放入所述查询消息携带的处理器编号对应的查询消息队列中;所述FPGA对所述查询消息队列中的查询消息进行调度包括:所述FPGA采用轮询方式调度所述多个查询消息队列,对被调度的查询消息队列中的查询消息进行出队列处理。 2. The method according to claim 1, characterized in that a plurality of query message queues on the FPGA, and the query message queue processor correspondence; the FPGA the query message into query message queue includes: the FPGA the query message into the query message carries the processor number corresponding to the query message queue; the FPGA to the query inquiry message queue to be scheduled comprises: FPGA based on polling scheduling of the plurality of query message queue, the query message is scheduled query message queue is a queue processing.
  3. 3.根据权利要求2所述的方法,其特征在于,所述FPGA对被调度的查询消息队列中的查询消息进行出队列处理包括:所述FPGA采用先进先出FIFO的方式对所述被调度的查询消息队列中的查询消息进行出队列处理。 The method according to claim 2, wherein said FPGA query message is scheduled query message queue is a queue processing comprising: the FPGA using FIFO FIFO manner scheduling the query message queries the message queue is a queue processing.
  4. 4.根据权利要求1所述的方法,其特征在于,所述FPGA对所述刷新消息队列中的刷新消息进行调度包括:所述FPGA采用先进先出FIFO的方式对所述刷新消息队列中的刷新消息进行调度。 4. The method according to claim 1, wherein the FPGA to the refresh message queue refresh message scheduling comprises: the FPGA using FIFO FIFO manner the refresh message queue refresh message scheduling.
  5. 5.根据权利要求1-4任一项所述的方法,其特征在于,所述FPGA对所述查询消息队列中的查询消息进行调度之后,所述方法还包括:所述FPGA接收所述查询消息的查询结果,将所述查询结果返回给所述查询消息对应的处理器;所述处理器根据所述查询结果获取路由信息,根据所述路由信息转发报文。 5. The method of any one of claims 1 to 4, characterized in that, after the FPGA to the query inquiry message queue to be scheduled, said method further comprising: the FPGA receives the query query result message, the query results are returned to the query processor corresponding to the message; the processor for routing information according to the query result, according to the routing information to forward packets.
  6. 6. 一种现场可编程门阵列FPGA装置,其特征在于,包括:查询消息入队模块,用于收到查询消息后,将所述查询消息放入查询消息队列; 刷新消息入队模块,用于收到刷新消息后,将所述刷新消息放入刷新消息队列; 查询调度模块,用于对所述查询消息队列中的查询消息进行调度; 刷新调度模块,用于对所述刷新消息队列中的刷新消息进行调度。 A field programmable gate array (FPGA) device comprising: a query message enqueuing module, after receiving the query message, the query message into a query message queue; refresh message enqueuing module, with after receiving the refresh message, the refresh message into a refresh message queue; query scheduler module for the query inquiry message queue to be scheduled; refresh scheduling module, configured to refresh message queue refresh message scheduling.
  7. 7.根据权利要求6所述的装置,其特征在于,所述查询消息入队模块包括:队列确定单元,用于接收到所述查询消息后,根据所述查询消息携带的处理器编号确定对应的查询消息队列;其中,所述FPGA装置上设置有多个查询消息队列,且所述查询消息队列与处理器一一对应;入队单元,用于将所述查询消息放入所述队列确定单元确定的所述查询消息队列中;所述查询调度模块包括:轮询调度单元,用于采用轮询方式调度所述多个查询消息队列;出队单元,用于对所述轮询调度单元调度的所述查询消息队列中的查询消息进行出队列处理。 7. The apparatus according to claim 6, wherein the query message enqueuing module comprising: a queue determining unit configured to, after receiving the query message, according to the query processor ID message carries determining a corresponding query message queue; wherein, provided the means of the FPGA with a plurality of query message queues, and the query message queue processor correspondence; enqueuing means for the query message into said queue determining unit determines the query message queue; the query scheduling module comprises: a polling scheduling unit for polling of the scheduling of the plurality of query message queue; dequeuing means to the round robin scheduling unit the scheduling query query message in the message queue is a queue processing.
  8. 8.根据权利要求7所述的装置,其特征在于,所述出队单元包括:出队子单元,用于采用先进先出FIFO的方式对所述轮询调度单元调度的所述查询消息队列中的查询消息进行出队列处理。 8. The apparatus according to claim 7, wherein said dequeuing means comprises: dequeuing subunit, a mode for using FIFO FIFO to the round robin scheduling unit schedules query message queue the query messages out queue processing.
  9. 9.根据权利要求6所述的装置,其特征在于,所述刷新调度模块包括:刷新调度单元,用于采用先进先出FIFO的方式对所述刷新消息队列中的刷新消息进行调度。 9. The apparatus according to claim 6, wherein the refresh scheduling module comprises: a refresh scheduling unit configured manner using FIFO FIFO of the refresh message queue refresh message scheduling.
  10. 10. 一种网络设备,其特征在于,包括权利要求6-9任一项所述的现场可编程门阵列FPGA装置,所述网络设备还包括:处理器,用于向所述FPGA装置发送查询消息,以及接收所述FPGA装置返回的查询结果,根据所述查询结果获取路由信息,根据所述路由信息进行报文转发;CPU,用于向所述FPGA装置发送刷新消息,所述刷新消息携带有对调度三态内容寻址存储器TCAM进行刷新操作的指示信息。 10. A network device, comprising the site of any one of claims 6-9 programmable gate array (FPGA) device, the network device further comprises: a processor, configured to send the FPGA device query message, and the query result receiving the FPGA device returns acquires according to the query result routing information, forwards the packet according to the routing information; the CPU, configured to send the refresh message to the FPGA device, the refresh message carries there scheduling ternary content addressable memory TCAM instruction information refresh operation.
CN 201010526538 2010-10-29 2010-10-29 Method and device for dispatching TCAM (telecommunication access method) query and refresh messages CN101986271B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201010526538 CN101986271B (en) 2010-10-29 2010-10-29 Method and device for dispatching TCAM (telecommunication access method) query and refresh messages

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN 201010526538 CN101986271B (en) 2010-10-29 2010-10-29 Method and device for dispatching TCAM (telecommunication access method) query and refresh messages
PCT/CN2011/080616 WO2012055319A1 (en) 2010-10-29 2011-10-10 Method and device for dispatching tcam (telecommunication access method) query and refreshing messages

Publications (2)

Publication Number Publication Date
CN101986271A true CN101986271A (en) 2011-03-16
CN101986271B CN101986271B (en) 2014-11-05

Family

ID=43710620

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201010526538 CN101986271B (en) 2010-10-29 2010-10-29 Method and device for dispatching TCAM (telecommunication access method) query and refresh messages

Country Status (2)

Country Link
CN (1) CN101986271B (en)
WO (1) WO2012055319A1 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012055319A1 (en) * 2010-10-29 2012-05-03 中兴通讯股份有限公司 Method and device for dispatching tcam (telecommunication access method) query and refreshing messages
CN102662888A (en) * 2012-03-20 2012-09-12 大连梯耐德网络技术有限公司 System for controlling multi-user parallel operation of TCAM, and control method thereof
CN102880680A (en) * 2012-09-11 2013-01-16 大连梯耐德网络技术有限公司 Multi-user statistics method based on random access memory
CN103023782A (en) * 2012-11-22 2013-04-03 北京星网锐捷网络技术有限公司 Method and device for accessing ternary content addressable memory (TCAM)
CN104239337A (en) * 2013-06-19 2014-12-24 中兴通讯股份有限公司 TCAM (ternary content addressable memory) based table look-up processing method and device
WO2016101551A1 (en) * 2014-12-26 2016-06-30 中兴通讯股份有限公司 Method and device for writing data into ternary content addressable memory
WO2016101490A1 (en) * 2014-12-26 2016-06-30 中兴通讯股份有限公司 Update processing method and device
WO2016197607A1 (en) * 2015-06-12 2016-12-15 中兴通讯股份有限公司 Method and apparatus for realizing route lookup

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150278297A1 (en) * 2014-03-28 2015-10-01 Caradigm Usa Llc Methods, apparatuses and computer program products for providing a speed table for analytical models

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1631008A (en) * 2001-07-13 2005-06-22 艾利森公司 Method and apparatus for scheduling message processing
CN1655534A (en) * 2005-02-25 2005-08-17 清华大学 Double stack compatible router searching device supporting access control listing function on core routers
CN1798088A (en) * 2004-12-30 2006-07-05 中兴通讯股份有限公司 Dispatching method and equipment for searching and updating routes based on FPGA
CN101840374A (en) * 2010-04-28 2010-09-22 福建星网锐捷网络有限公司 Processing device, information searching system and information searching method
CN101866357A (en) * 2010-06-11 2010-10-20 福建星网锐捷网络有限公司 Method and device for updating items of three-state content addressing memory

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101986271B (en) * 2010-10-29 2014-11-05 中兴通讯股份有限公司 Method and device for dispatching TCAM (telecommunication access method) query and refresh messages

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1631008A (en) * 2001-07-13 2005-06-22 艾利森公司 Method and apparatus for scheduling message processing
CN1798088A (en) * 2004-12-30 2006-07-05 中兴通讯股份有限公司 Dispatching method and equipment for searching and updating routes based on FPGA
CN1655534A (en) * 2005-02-25 2005-08-17 清华大学 Double stack compatible router searching device supporting access control listing function on core routers
CN101840374A (en) * 2010-04-28 2010-09-22 福建星网锐捷网络有限公司 Processing device, information searching system and information searching method
CN101866357A (en) * 2010-06-11 2010-10-20 福建星网锐捷网络有限公司 Method and device for updating items of three-state content addressing memory

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012055319A1 (en) * 2010-10-29 2012-05-03 中兴通讯股份有限公司 Method and device for dispatching tcam (telecommunication access method) query and refreshing messages
CN102662888A (en) * 2012-03-20 2012-09-12 大连梯耐德网络技术有限公司 System for controlling multi-user parallel operation of TCAM, and control method thereof
CN102880680A (en) * 2012-09-11 2013-01-16 大连梯耐德网络技术有限公司 Multi-user statistics method based on random access memory
CN102880680B (en) * 2012-09-11 2015-08-12 大连梯耐德网络技术有限公司 Multi-user statistical method based on random access memory
CN103023782A (en) * 2012-11-22 2013-04-03 北京星网锐捷网络技术有限公司 Method and device for accessing ternary content addressable memory (TCAM)
CN103023782B (en) * 2012-11-22 2016-05-04 北京星网锐捷网络技术有限公司 A method and apparatus for accessing a ternary content addressable memory
CN104239337A (en) * 2013-06-19 2014-12-24 中兴通讯股份有限公司 TCAM (ternary content addressable memory) based table look-up processing method and device
WO2016101551A1 (en) * 2014-12-26 2016-06-30 中兴通讯股份有限公司 Method and device for writing data into ternary content addressable memory
WO2016101490A1 (en) * 2014-12-26 2016-06-30 中兴通讯股份有限公司 Update processing method and device
CN105791163A (en) * 2014-12-26 2016-07-20 中兴通讯股份有限公司 Updating method and device
WO2016197607A1 (en) * 2015-06-12 2016-12-15 中兴通讯股份有限公司 Method and apparatus for realizing route lookup

Also Published As

Publication number Publication date
WO2012055319A1 (en) 2012-05-03
CN101986271B (en) 2014-11-05

Similar Documents

Publication Publication Date Title
US7590057B2 (en) Network switch and components and method of operation
US7882312B2 (en) State engine for data processor
CA2573156C (en) Apparatus and method for supporting memory management in an offload of network protocol processing
US6460120B1 (en) Network processor, memory organization and methods
US8028292B2 (en) Processor task migration over a network in a multi-processor system
US6842443B2 (en) Network switch using network processor and methods
CN101354719B (en) Associative memory with enhanced abilities
US7876763B2 (en) Pipeline scheduler including a hierarchy of schedulers and multiple scheduling lanes
EP1832085B1 (en) Flow assignment
US20130318280A1 (en) Offloading of computation for rack level servers and corresponding methods and systems
US8504796B2 (en) System and method for storing data in a virtualized high speed memory system with an integrated memory mapping table
US20050259672A1 (en) Method to improve forwarding information base lookup performance
US20130318084A1 (en) Processing structured and unstructured data using offload processors
CN101546276B (en) Method for achieving interrupt scheduling under multi-core environment and multi-core processor
JP4526412B2 (en) Task management method and apparatus in a multiprocessor system
US7076545B2 (en) Load balancing the servicing of received packets
Jose et al. Memcached design on high performance rdma capable interconnects
US7337275B2 (en) Free list and ring data structure management
US6804815B1 (en) Sequence control mechanism for enabling out of order context processing
US6209020B1 (en) Distributed pipeline memory architecture for a computer system with even and odd pids
US9288101B1 (en) Full bandwidth packet handling with server systems including offload processors
US20050060705A1 (en) Optimizing critical section microblocks by controlling thread execution
US20110216773A1 (en) Work-conserving packet scheduling in network devices
US8019902B2 (en) Network adapter with shared database for message context information
USRE45097E1 (en) High speed memory and input/output processor subsystem for efficiently allocating and using high-speed memory and slower-speed memory

Legal Events

Date Code Title Description
C06 Publication
C10 Entry into substantive examination
C14 Grant of patent or utility model