CN101964765B - Signal compensation method and device - Google Patents
Signal compensation method and device Download PDFInfo
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- CN101964765B CN101964765B CN2009101599334A CN200910159933A CN101964765B CN 101964765 B CN101964765 B CN 101964765B CN 2009101599334 A CN2009101599334 A CN 2009101599334A CN 200910159933 A CN200910159933 A CN 200910159933A CN 101964765 B CN101964765 B CN 101964765B
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Abstract
The embodiment of the invention discloses a signal compensation method and a signal compensation device. The method comprises the following steps of: receiving a first signal sequence and a second signal sequence, wherein the second signal sequence is a reverse order sequence of the first signal sequence; performing equalization decision on the first signal sequence and the second signal sequence respectively by using a decision feedback equalizer (DFE); acquiring a first decision sequence and a second decision sequence; comparing a third decision sequence and a fourth decision sequence one by one; and determining an output decision value according to a comparison result. In the method, a problem in signal compensation is found by comparing decision values obtained after performing the equalization decision on two groups of signal sequences in a positive order and a reverse order by using the DFE and a final output value is determined according to the comparison result, which effectively avoids the situation that a plurality of continuous error results are generated by only compensating an input sequence in the positive order when the signal is compensated by using the DFE in the prior art, and improves the quality of signal compensation.
Description
Technical field
The present invention relates to communication technical field, relate in particular to a kind of method for compensating signal and device.
Background technology
In high-speed data communication, the high-speed transfer of signal can produce serious intersymbol interference (ISIinter-symbol interference).Intersymbol interference is present in the radio communication too.For example, exist serious multipath phenomenon in the radio communication, the time delay expansion that symbol interval brings much smaller than multipath effect can cause serious ISI.In order to improve communication quality, usually need to the signal distortion that cause because of ISI be compensated, namely carry out channel equalization.In various equalization methods, the electrical equalization technology is one of study hotspot of the current communications field.
DFF (DFE, Decision Feedback Equalizer) is easy to realize owing to simple in structure, is a kind of equalizer that is used for eliminating ISI the most frequently used in the electrical equalization technology.
The DFE equalizer can be regarded as by two digital filter bank, and comprises feedforward filter and feedback filter.X[n] expression is the signal value that receives of n constantly, X[n+1] signal value is the signal value that the n+1 behind moment n receives constantly, X[n+L] signal value is the signal value that the n+L behind moment n receives constantly, X[n]～X[n+L] be used in the feedforward filter; B[n-1] then be the n-1 signal decision value constantly that the decision unit by equalizer obtains, ..., B[n-M] then be the n-M signal decision value constantly that the decision unit by equalizer obtains, these signal decision values also are used in the feedback filter in order to form the subsequent transmission data except being system's the transmission of data of wanting to recover.
The DFE equalizer has used the signal decision value as feedback, if a signal decision value mistake, the signal decision value of mistake will be used in the equilibrium, thereby causes easier the makeing mistakes of signal decision value of back.Therefore, often present obvious burst characteristics in the court verdict of DFE equalizer output, namely mistake all appears in continuous a plurality of results.
Summary of the invention
In view of this, the embodiment of the invention provides a kind of method for compensating signal and device, and the situation of mistake all appears in continuous a plurality of results when utilizing DFE to realize compensation to light signal by the electrical equalization technology with change.
The embodiment of the invention provides following technical scheme:
A kind of method for compensating signal comprises:
Receive first signal sequence and secondary signal sequence, the inverted sequence sequence that described secondary signal sequence is described first signal sequence;
Utilize DFF DFE respectively described first signal sequence and secondary signal sequence to be carried out the equilibrium judgement, obtain the first judgement sequence and the second judgement sequence;
The 3rd judgement sequence and the 4th judgement sequence are compared one by one, determine the output decision value according to comparison result, described the 3rd judgement sequence be described the first judgement sequence and the second judgement in the sequence by the judgement sequence of backward, described the 4th judgement sequence is the judgement sequence that remains unchanged in described the first judgement sequence and the second judgement sequence;
The output sequence that output is comprised of described output decision value.
A kind of signal compensation apparatus comprises:
The first DFF is used for receiving the first signal sequence, and described first signal sequence is carried out the equilibrium judgement obtain the first judgement sequence;
The second DFF is used for receiving the secondary signal sequence, and described secondary signal sequence is carried out the equilibrium judgement obtain the second judgement sequence, the inverted sequence sequence that described secondary signal sequence is described first signal sequence;
The alternative unit, be used for the 3rd judgement sequence and the 4th judgement sequence are compared one by one, determine the output decision value according to comparison result, and the output sequence that formed by described output decision value of output, described the 3rd judgement sequence be described the first judgement sequence and the second judgement in the sequence by the judgement sequence of backward, described the 4th judgement sequence is the judgement sequence that remains unchanged in described the first judgement sequence and the second judgement sequence.
As seen, in embodiments of the present invention, by utilizing DFF DFE respectively to described first signal sequence with carry out equilibrium judgement with the secondary signal sequence of its inverted sequence and obtain the first judgement sequence and the second judgement sequence; The 3rd judgement sequence and the 4th judgement sequence are compared one by one, determine the output decision value according to comparison result, the method, come problem in the discovery signals compensation by the decision value of two groups of bursts after the judgement of DFE equalizer equalizes of positive sequence and inverted sequence relatively, and determine final output valve according to comparative result, effectively avoided in the prior art when utilizing the DFE equalizer to carry out signal compensation, only by the positive sequence list entries being compensated the situation of the continuous a plurality of erroneous results that produce, improved the quality of signal compensation.
Description of drawings
The flow chart of the method that Fig. 1 provides for one embodiment of the invention;
Fig. 2 is the structural representation of existing DFE equalizer;
The flow chart of the method that Fig. 3 provides for another embodiment of the present invention;
The structural representation of the device that Fig. 4 provides for one embodiment of the invention;
The structural representation of comparing unit in the device that Fig. 5 provides for one embodiment of the invention;
The simulation result schematic diagram that Fig. 6 provides for one embodiment of the invention.
Embodiment
The embodiment of the invention discloses a kind of method for compensating signal and device, for purpose, technical scheme and the advantage that makes the embodiment of the invention is clearer, referring to accompanying drawing, embodiments of the invention are elaborated.
Fig. 1 is the method that one embodiment of the invention provides, and specifically comprises:
S101 receives first signal sequence and secondary signal sequence, the inverted sequence sequence that described secondary signal sequence is described first signal sequence;
S102 utilizes DFF DFE respectively described first signal sequence and secondary signal sequence to be carried out the equilibrium judgement and obtains the first judgement sequence and the second judgement sequence;
S103, the 3rd judgement sequence and the 4th judgement sequence are compared one by one, determine the output decision value according to comparison result, described the 3rd judgement sequence be described the first judgement sequence and the second judgement in the sequence by the judgement sequence of backward, described the 4th judgement sequence is the judgement sequence that remains unchanged in described the first judgement sequence and the second judgement sequence;
S104, the output sequence that output is comprised of described output decision value.
As seen, the method that provides in the embodiment of the invention, come problem in the discovery signals compensation by the decision value of two groups of bursts after the balanced judgement of DFE of positive sequence and inverted sequence relatively, and determine final output valve according to comparative result, effectively avoided in the prior art when utilizing the DFE equalizer to carry out signal compensation, only by the positive sequence list entries being compensated the situation of the continuous a plurality of erroneous results that produce, improved the quality of signal compensation.
The method for compensating signal that the embodiment of the invention provides can be widely used in the different scenes of the communications field, below in conjunction with concrete application scenarios the method that the embodiment of the invention provides is elaborated.
In optical fiber telecommunications system, because the existence of the effects such as dispersion, nonlinear fiber, polarization mode dispersion, the time explanation of signal can occur in light signal when transmitting in fiber channel, cause the phase mutual interference between the data symbol, causes the decline of input and judgement performance.The variation that occurs when transmitting in optical fiber in order to correct light signal, the method that can adopt light signal to compensate can compensate the dispersion in the general single mode fiber such as dispersion compensating fiber, thereby improves the transmission performance of optical fiber telecommunications system.But the low-response that the shortcoming of light signal compensation method comprises the optical component that needs the use cost costliness, change fiber channel etc.
Different from the light signal compensation method, the key of radio channel balancing technique is after light signal is received, be after the opto-electronic conversion, in electric territory by electrical filter etc., equilibrium and compensation are carried out in pulse stretching that dispersion in the Optical Fiber Transmission process, fiber nonlinear effect, filtering etc. are caused etc. in electric territory, and then adjudicate with data and recover.
DFE is easy to realize that the radio channel balancing technique adopts DFE to realize usually in the optical fiber owing to simple in structure.
The theory diagram of DFE equalizer as shown in Figure 2.Among the figure, the DFE equalizer can be regarded as by two digital filter bank, and is respectively feedforward part and feedback fraction among the figure.X[n] expression is the signal value that receives of n constantly, X[n+1] signal value is the signal value that the n+1 behind moment n receives constantly ..., these signal values are used in the feedforward filter; B[n-1] then be the n-1 signal decision value constantly that the decision unit by equalizer obtains, ..., B[n-M] then be the n-M signal decision value constantly that the decision unit by equalizer obtains, these signal decision values also are used in the feedback filter except being system's the transmission of data of wanting to recover.
For the signal value X[n that moment n is received] carry out equilibrium, the DFE equalizer is being attempted from signal value X[n] other signal value constantly that comprises from X[n] balance out.For this reason, the DFE equalizer is delayed time at first to received signal, in order to obtain different signal value and signal decision values constantly.Then, difference signal value constantly is on duty with different tap coefficients with signal decision, and the tap coefficient of feedforward part is C[0] to C[L+1], the tap coefficient of feedback fraction is D[1] to D[M].At other signal value constantly by multiply by different tap coefficients from X[n] after compensation falls, the signal I[n after the equilibrium] enter decision unit and obtain n signal decision value B[n constantly] system that exports as equalizer wants the transmission of data that recovers.The general employing with fixing threshold value of decision unit compares.For example, if I[n] greater than threshold value TH, then B[n] judgement be 1; If I[n] less than threshold value TH, then B[n] judgement be 0.
Because the DFE equalizer has used the signal decision value as feedback, if a signal decision value mistake, the signal decision value of mistake will be used in the equilibrium, thereby cause easier the makeing mistakes of signal decision value of back.Therefore, often present obvious burst characteristics in the court verdict of DFE equalizer output, namely mistake all appears in continuous a plurality of results.
The method for compensating signal that the embodiment of the invention provides can solve the problem that mistake all appears in the continuous a plurality of results of existing DFE equalizer.
Referring to Fig. 3, the method that one embodiment of the invention provides comprises:
S301 receives first signal sequence X [1] ..., X[N], input a DFE equalizer and carry out the equilibrium judgement, obtain the first judgement sequence B F[1] ..., BF[N].
S302 receives secondary signal sequence X [N] ..., X[1], input the 2nd DFE equalizer and carry out the equilibrium judgement, obtain the second judgement sequence B B[N] ..., BB[1].
Need to prove that described first signal sequence and secondary signal sequence are the bursts of a pair of inverted sequence.If the first signal sequence is positive sequence sequence (in the embodiment of the invention, will be called according to the burst that sequential occurs the positive sequence sequence), so described secondary signal sequence is the inverted sequence sequence corresponding with the first signal sequence; If the secondary signal sequence is the positive sequence sequence, the first signal sequence then is the sequence with secondary signal sequence inverted sequence so.Describe as the positive sequence sequence as example take the first signal sequence in the embodiment of the invention.
In embodiments of the present invention, described X[i] (i=1～N) for through the corresponding signal of telecommunication of light signal after the opto-electronic conversion, certain, in other scenes, X[i] also can be the signal in high-speed data communication or the radio communication, to this, the present invention does not do restriction.
An above-mentioned DFE is identical with the structure of the 2nd DFE, specifically can be referring to Fig. 2.
Above-mentioned steps 301 and 302 does not have inevitable sequencing, after acquisition first signal sequence and the secondary signal sequence, can carry out balanced judgement by equalizer simultaneously.
S303 is to the second judgement sequence B B[N] ..., BB[1] backward forms the 3rd judgement sequence B B[1] ..., BB[N]; The first judgement sequence remains unchanged, and is the 4th judgement sequence.
The essence of the 3rd judgement sequence and the 4th judgement sequence is the identical sequence of order, can all be the judgement sequence of positive sequence, also can all be the judgement sequence of inverted sequence.Be about to former the first judgement sequence and the second judgement sequence one of them to carry out the sequence that inverted sequence obtains be the 3rd judgement sequence; Surplus next unaltered sequence is the 4th judgement sequence.
In the embodiment of the invention for convenience, form the 3rd judgement sequence and be described the second judgement sequence is carried out backward, corresponding, the first judgement sequence that does not change just is the 4th judgement sequence, at this moment, the 3rd judgement sequence and the 4th judgement sequence are a pair of positive sequence sequence.
S304, from i=1, the decision value BF[i of the 3rd judgement sequence relatively successively] and the 4th decision value BB[i that adjudicates sequence], if BF[i] with BB[i] identical, then export decision value B[i]=BF[i]=BB[i], i is positive integer; If BF[i] from BB[i] different, then enter step S305.
S305 searches the decision value of described the 3rd judgement sequence and original position PS and the final position PE that the 4th decision value of adjudicating sequence does not wait.
S306 compares DFE corresponding to described the 3rd judgement sequence at the equilibrium value IF at PS place (PS) and balanced threshold value TH, it is poor to obtain the 3rd equilibrium.
At this moment, DFE corresponding to the 3rd judgement sequence is the 2nd DFE.The 3rd balanced poor=| IF (PS)-TH|.Because IF (PS) might be greater than or less than TH, the absolute value of the difference by getting both in the embodiment of the invention is balanced poor as the 3rd.
S307 compares DFE corresponding to described the 4th judgement sequence at the equilibrium value IB at PE place (PE) and TH, it is poor to obtain the 4th equilibrium.
At this moment, DFE corresponding to the 4th judgement sequence is a DFE.The 4th balanced poor=| IB (PE)-TH|.
Above-mentioned steps 306 and 307 does not have inevitable precedence relationship, can carry out simultaneously.
S308, poor and the 4th balanced poor the comparing with the 3rd equilibrium, and according to the definite output decision value from PS to PE of comparative result.
Be specially:
When the 3rd balanced difference is poor greater than the 4th equilibrium, get the value BF[j of the 3rd judgement sequence from the output decision value of PS to PE], j=PS～PE;
When the 4th balanced difference is poor greater than the 3rd equilibrium, get the value BB[j of the 4th judgement sequence from the output decision value of PS to PE], j=PS～PE;
S309 will sentence sequence by the output that the output decision value forms and preserve and export.
Need to prove, if when the 3rd judgement sequence and the 4th judgement sequence are all the inverted sequence sequence, so at last also will be with the output judgement sequence inverted sequence that obtains after the output judgement sequence that obtains to be formed by decision value, the judgement output sequence that forms a positive sequence is exported again.Because the embodiment of the invention provides a kind of method for compensating signal, the signal demand of output meets signal according to the characteristics of sequential positive sequence output at last.
The method that the embodiment of the invention provides, by a positive sequence, a backward two-way input signal are carried out equilibrium and judgement, obtain the two-way decision signal, the two-way decision signal is compared and selects to obtain final court verdict, effectively avoided in the prior art when utilizing the DFE equalizer to carry out signal compensation, only by the positive sequence list entries being compensated the situation of the continuous a plurality of erroneous results that produce, improved the quality of signal compensation.
Referring to Fig. 4, one embodiment of the invention also provides a kind of signal compensation apparatus, comprising:
The first DFF 401 is used for receiving the first signal sequence, and described first signal sequence is carried out the equilibrium judgement obtain the first judgement sequence;
The second DFF 402 is used for receiving the secondary signal sequence, and described secondary signal sequence is carried out the equilibrium judgement obtain the second judgement sequence, the inverted sequence sequence that described secondary signal sequence is described first signal sequence;
Alternative unit 403, be used for the 3rd judgement sequence and the 4th judgement sequence are compared one by one, determine the output decision value according to comparison result, and the output sequence that formed by described output decision value of output, described the 3rd judgement sequence be described the first judgement sequence and the second judgement in the sequence by the judgement sequence of backward, described the 4th judgement sequence is the judgement sequence that remains unchanged in described the first judgement sequence and the second judgement sequence.
Wherein, referring to Fig. 5, alternative unit 403 further comprises:
Storage and backward output module 501 are used for one of described the first judgement sequence and described second judgement sequence are stored, and carry out exporting after the backward;
Storage output module 502 is used for the judgement sequence that remains unchanged among described the first judgement sequence and described the second judgement sequence is stored the line output of going forward side by side;
Alternative module 503, be used for from i=1, the decision value BF[i of the 3rd judgement sequence of storage and backward output module and storage output module output relatively successively] and the 4th decision value BB[i that adjudicates sequence], if BF[i] with BB[i] identical, then export decision value B[i]=BF[i]=BB[i], i is positive integer; If BF[i] from BB[i] different, the decision value and the 4th of then searching described the 3rd judgement sequence is adjudicated different original position PS and the final position PE of decision value of sequence; The 3rd judgement equilibrium value and the balanced threshold value of DFE at PS place corresponding to sequence compared, and it is poor to obtain the 3rd equilibrium; The 4th judgement equilibrium value and the balanced threshold value of DFE at PE place corresponding to sequence compared, and it is poor to obtain the 4th equilibrium; When the 3rd balanced difference is poor greater than the 4th equilibrium, get the value BF[j of the 3rd judgement sequence from the output decision value of PS to PE], j=PS～PE; When the 4th balanced difference is poor greater than the 3rd equilibrium, get the value BB[j of the 4th judgement sequence from the output decision value of PS to PE], j=PS～PE.
The result preserves and output module 504, is used for sentencing sequence to the data that are comprised of the output decision value and preserves and export.
The signal compensation apparatus that the embodiment of the invention provides, by a positive sequence, a backward two-way input signal are carried out equilibrium and judgement, obtain the two-way decision signal, the two-way decision signal is compared and selects to obtain final court verdict, effectively avoided in the prior art when utilizing the DFE equalizer to carry out signal compensation, only by the positive sequence list entries being compensated the situation of the continuous a plurality of erroneous results that produce, improved the quality of signal compensation.
The signal compensation apparatus that the embodiment of the invention provides can be widely used in the communications field, and Fig. 6 is that the signal compensation apparatus that conventional DFE equalizer and the embodiment of the invention provide carries out the comparison of bit error rate performance under the optical fiber dispersion channel circumstance.
Wherein, the type of optical fiber is general single mode fiber in the emulation, and the transmission range of optical fiber is 150 kilometers, does not adopt optical dispersion compensation in the light territory signal to be carried out equilibrium.Curve D FE and DFE-2 have used respectively the signal compensation apparatus that proposes in conventional DFE equalizer and the embodiment of the invention among Fig. 6.Among the figure, transverse axis is the optical receiver received optical power, and unit is dBm; The longitudinal axis is error rate of system.
Can find out significantly from Fig. 6, in order to obtain the identical error rate (such as 10
-3), the signal compensation apparatus that uses the embodiment of the invention to provide can reduce the requirement to the optical receiver received optical power effectively; Perhaps, when identical received optical power, the signal compensation apparatus that uses the embodiment of the invention to provide can reduce error rate of system effectively.
The present invention can describe in the general context of the computer executable instructions of being carried out by computer, for example program module.Usually, program module comprises the routine carrying out particular task or realize particular abstract data type, program, object, assembly, data structure etc.Also can in distributed computing environment (DCE), put into practice the present invention, in these distributed computing environment (DCE), be executed the task by the teleprocessing equipment that is connected by communication network.In distributed computing environment (DCE), program module can be arranged in the local and remote computer-readable storage medium that comprises memory device.
The above only is preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (6)
1. a method for compensating signal is characterized in that, comprising:
Receive first signal sequence and secondary signal sequence, the inverted sequence sequence that described secondary signal sequence is described first signal sequence;
Utilize DFF DFE respectively described first signal sequence and secondary signal sequence to be carried out the equilibrium judgement, obtain the first judgement sequence and the second judgement sequence;
The 3rd judgement sequence and the 4th judgement sequence are compared one by one, determine the output decision value according to comparison result, described the 3rd judgement sequence be described the first judgement sequence and the second judgement in the sequence by the judgement sequence of backward, described the 4th judgement sequence is the judgement sequence that remains unchanged in described the first judgement sequence and the second judgement sequence;
The output sequence that output is comprised of described output decision value.
2. method according to claim 1 is characterized in that, the 3rd judgement sequence and the 4th judgement sequence are compared one by one, determines that according to comparison result the output decision value comprises:
One of described the first judgement sequence and described second judgement sequence are carried out backward form the 3rd judgement sequence; The judgement sequence that described the first judgement sequence and described the second judgement remain unchanged among the sequence is the 4th judgement sequence, from i=1, the decision value BF[i of the 3rd judgement sequence relatively successively] and the 4th decision value BB[i that adjudicates sequence];
If BF[i] with BB[i] identical, then export decision value B[i]=BF[i]=BB[i], i is positive integer;
If BF[i] from BB[i] different, the decision value and the 4th of then searching described the 3rd judgement sequence is adjudicated different original position PS and the final position PE of decision value of sequence;
Described the 3rd judgement equilibrium value and the balanced threshold value of DFF at PS place corresponding to sequence compared, and it is poor to obtain the 3rd equilibrium;
Described the 4th judgement equilibrium value and the balanced threshold value of DFF at PE place corresponding to sequence compared, and it is poor to obtain the 4th equilibrium;
When the 3rd balanced difference is poor greater than the 4th equilibrium, get the value BF[j of the 3rd judgement sequence from the output decision value of PS to PE], j=PS～PE; When the 4th balanced difference is poor greater than the 3rd equilibrium, get the value BB[j of the 4th judgement sequence from the output decision value of PS to PE], j=PS～PE.
3. method according to claim 1 is characterized in that, also comprises:
When described output judgement sequence is not the sequence that increases progressively chronologically, will export after the described output judgement sequence inverted sequence.
4. a signal compensation apparatus is characterized in that, comprising:
The first DFF is used for receiving the first signal sequence, and described first signal sequence is carried out the equilibrium judgement obtain the first judgement sequence;
The second DFF is used for receiving the secondary signal sequence, and described secondary signal sequence is carried out the equilibrium judgement obtain the second judgement sequence, the inverted sequence sequence that described secondary signal sequence is described first signal sequence;
The alternative unit, be used for the 3rd judgement sequence and the 4th judgement sequence are compared one by one, determine the output decision value according to comparison result, and the output sequence that formed by described output decision value of output, described the 3rd judgement sequence be described the first judgement sequence and the second judgement in the sequence by the judgement sequence of backward, described the 4th judgement sequence is the judgement sequence that remains unchanged in described the first judgement sequence and the second judgement sequence.
5. device according to claim 4 is characterized in that, described alternative unit comprises:
Storage and backward output module are used for one of described the first judgement sequence and described second judgement sequence are stored, and carry out exporting after the backward;
The storage output module is used for the judgement sequence that remains unchanged among described the first judgement sequence and described the second judgement sequence is stored the line output of going forward side by side;
The alternative module, be used for from i=1, the decision value BF[i of the 3rd judgement sequence of storage and backward output module and storage output module output relatively successively] and the 4th decision value BB[i that adjudicates sequence], if BF[i] with BB[i] identical, then export decision value B[i]=BF[i]=BB[i], i is positive integer; If BF[i] from BB[i] different, the decision value and the 4th of then searching described the 3rd judgement sequence is adjudicated different original position PS and the final position PE of decision value of sequence; The 3rd judgement equilibrium value and the balanced threshold value of DFE at PS place corresponding to sequence compared, and it is poor to obtain the 3rd equilibrium; The 4th judgement equilibrium value and the balanced threshold value of DFE at PE place corresponding to sequence compared, and it is poor to obtain the 4th equilibrium; When the 3rd balanced difference is poor greater than the 4th equilibrium, get the value of the 3rd judgement sequence from the output decision value of PS to PE; When the 4th balanced difference is poor greater than the 3rd equilibrium, get the value of the 4th judgement sequence from the output decision value of PS to PE;
The result preserves and output module, is used for sentencing sequence to the data that are comprised of the output decision value and preserves and export.
6. device according to claim 4 is characterized in that, described alternative unit when the output judgement sequence that also is used for forming at described output decision value is not the sequence that increases progressively chronologically, will be exported after the described output judgement sequence inverted sequence.
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| CN102870386B (en) * | 2012-06-21 | 2015-04-15 | 华为技术有限公司 | Decision feedback equalizer and receiver |
| CN105432031B (en) * | 2014-07-14 | 2017-11-24 | 华为技术有限公司 | A kind of control circuit of balanced device, balanced device and photoreceiver |
| US11146426B2 (en) * | 2018-03-07 | 2021-10-12 | Xiamen Ux High-Speed Ic Co., Ltd. | Balancing circuit capable of compensating bandwidth attenuation introduced by interference between signals |
| CN108183875B (en) * | 2018-03-07 | 2019-12-27 | 厦门优迅高速芯片有限公司 | Equalizing circuit capable of compensating bandwidth attenuation caused by signal intersymbol interference |
| CN110391875B (en) * | 2018-04-23 | 2020-10-09 | 华为技术有限公司 | Error correction method and error correction device |
| CN113014521A (en) * | 2021-02-23 | 2021-06-22 | 合肥宏晶微电子科技股份有限公司 | Signal compensation method and device and electronic equipment |
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| CN1188578A (en) * | 1995-05-10 | 1998-07-22 | 艾奥尼卡国际有限公司 | Demodulator and method of demodulation in TDM receiver |
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| US6970524B1 (en) * | 1999-12-06 | 2005-11-29 | At&T Corp. | Methods and systems for symbol timing recovery |
| CN101232303A (en) * | 2008-02-22 | 2008-07-30 | 北京航空航天大学 | Low complex degree equalization method based on iteration jam deleting in spread spectrum communication system |
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| WO2007068737A2 (en) * | 2005-12-16 | 2007-06-21 | Ihp Gmbh - Innovations For High Performance Microelectronics / Institut Für Innovative Mikroelektronik | Low-complexity method and device for the adaptive equalization of multipath channels |
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| CN1188578A (en) * | 1995-05-10 | 1998-07-22 | 艾奥尼卡国际有限公司 | Demodulator and method of demodulation in TDM receiver |
| US6970524B1 (en) * | 1999-12-06 | 2005-11-29 | At&T Corp. | Methods and systems for symbol timing recovery |
| CN1398477A (en) * | 2000-02-08 | 2003-02-19 | 艾利森公司 | Methods and systems for decoding symbols by combining matched-filtered samples with hard symbol decisions |
| CN101232303A (en) * | 2008-02-22 | 2008-07-30 | 北京航空航天大学 | Low complex degree equalization method based on iteration jam deleting in spread spectrum communication system |
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