CN101846716B - Method for quickly catching power grid fault start point - Google Patents

Abstract

The invention relates to a method for quickly catching a power grid fault start point. The method is characterized in that FPGA data collection controls an A/D converter and temporarily conserves current voltage digital signals collected by the A/D converter and filtered by a second hardware band pass, the micro control unit of a low current grounding fault line selection device reads the sampled data of all channels from FPGA at regular time and the data is sorted according to the sampled order, one data is picked up at intervals of 16 points in the 128 data of a zero sequence voltage channel and a new data window k(0) to k(7) is obtained, at the same time the sampled data before one cycle corresponding to the 8 data, the first mutational current start discrimination is carried out on data, when delta k (n) is more than a set threshold, the fault start is judged, J value is recorded and the position sequence number of k(j) in data window i(n) is found, which is assumed to be i(p), 48 sampling values before i(p) are picked up, the second mutational current start calculation is carried out, the method is the same and the start point is found, which is the real fault start point.

Description

A kind of method that quickly catchs power grid fault start point

One. technical field

The present invention relates to the comprehensive automation of electric power system system, particularly the method for utilizing low-current ground fault line selection device to quickly catch power grid fault start point in 35kV and following electric pressure electrical network.

Two. background technology

Electric power is the expulsive force of the national economic development, and Microcomputer Protection is the reliable guarantee of electric power safety stable operation.Explicitly call for protective device should satisfy the requirement of reliability, selectivity, sensitivity and quick-action in China's electric system.Quick-action is meant that protective device should excise short trouble as soon as possible; its objective is the raising system stability; alleviate the damaged condition of faulty equipment and circuit, dwindle fault and involve scope, improve the automatic effect that drops into of automatic reclosing and standby power supply or stand-by equipment etc.Generally start with and improve quick-action from aspects such as installing quick-action protection (as carrier current protection, differential protection), the effect of giving full play to instantaneous segment protect of zero sequence ground connection and alternate fast tripping protection, minimizing intrinsic actuation time of relay and switch trip times.

As seen, quick-action is an important indicator weighing the relay system protective value, and an important means of raising quick-action is to accelerate the protection action outlet time.The protection action outlet time mainly follows protection philosophy, protects algorithm relevant.Existing protection algorithm all is based on fault component and calculates, and the fault initiating point is the starting point of fault component, and quick identification fault initiating point helps adding snap action outlet, reduces equipment failure working time, helps support equipment safety.

In addition, in Microcomputer Protection, obtain development and application gradually based on the protection philosophy and the algorithm of fault transient signal in recent years.Contain abundant harmonic component in the transient signal, according to Shannon's theorems, sample frequency must be more than 2 times of harmonic frequency, and therefore, the transient signal protection has very high requirement to the CPU arithmetic capability and the sampling system of Microcomputer Protection.Because transient signal only is present in electric power system fault take place moment, the life period weak point requires microcomputer protecting device to discern in the fastest time and with under the failure message preservation, this has proposed requirements at the higher level to Microcomputer Protection.

Based on the Small Electric Current Earthing And Routing Device of transient zero-sequence current, the theoretical real-time processing that requires under the realization high-speed sampling of its route selection, a prerequisite of its realization is a High Speed Sampling System.Under High Speed Sampling System, microprocessor need carry out real-time to sampled data to be handled, and whether differentiate has fault to take place.If have, log-on data stored programme at once then, the one piece of data that will begin from the trouble spot is preserved, so that carry out next step analysis.In this process, sample frequency is high more, and the workload of the collection of data, calculating and preservation is just big more.Between high-speed sampling and real-time the processing is contradiction.

Therefore, under the certain situation of microprocessor arithmetic capability, adopt two sudden change quantity algorithms, significantly reduce the processor calculating time, improved data-handling capacity, realized that the real-time of data is handled.

The field programmable gate array of low-current ground fault line selection device (hereinafter to be referred as FPGA).

Three. summary of the invention

The objective of the invention is to design a kind of method of utilizing low-current ground fault line selection device to quickly catch power grid fault start point, further to satisfy the requirement of reliability, selectivity, sensitivity and quick-action.

The object of the present invention is achieved like this: a kind of method that quickly catchs power grid fault start point is characterized in that:

A. the on-site programmable gate array FPGA data acquisition of low-current ground fault line selection device is as the temporary core cell of controlling of sampling and data in the whole acquisition system, analog to digital converter is implemented control and temporary transient electric current, the voltage digital signal of being adopted by analog to digital converter behind second order hardware bandpass filtering 50～2MHz of preserving, thereby realized quick high accuracy real-time data acquisition to the monitoring distribution network systems, sample frequency is set 51.2k, i.e. ripple 1024 points weekly;

B. the micro-control unit of low-current ground fault line selection device regularly reads the sampled data of all passages from FPGA, and by the ordering of sampling sequencing;

C. extract data every 16 from 128 data of residual voltage passage, obtain new data window k (0)～k (7), totally 8 data find the sampled data of these 8 corresponding all wavefront of data simultaneously, are designated as k1 (0)～k1 (7);

D. k (0)～k (7) data are carried out the promutation amount and start to differentiate, promptly Δ k (j)=| k (j)-k1 (j) |, j=0～7, when Δ k (n) declares fault initiating when setting threshold, record j value, and find k (j) position number in data window i (n), be assumed to be i (p);

E. get 48 sampled values forward from i (p) beginning, carry out the telomutation amount and start calculating, method is the same, finds the start-up point, and this point is real fault initiating point.

Take the present invention of above measure, in product was used, especially effect was obvious in the electric system Microcomputer Protection.With 1024 point samplings is example, and under the traditional algorithm, the ripple sampling needs to calculate 1024 times weekly, and this programme only need calculate 1024/16+48=112 time, significantly reduce computation of microprocessor, saved the time, realized the real-time property processing under the high-speed sampling.

Four. description of drawings

When accompanying drawing 1 is electric system generation ground connection or short trouble, voltage or current waveform sudden change synoptic diagram.

Accompanying drawing 2 is sampling synoptic diagram of the present invention;

Accompanying drawing 3 is algorithm flow charts of the present invention;

Accompanying drawing 4 is circuit block diagrams of low-current ground fault line selection device;

Accompanying drawing 5 is sampling system part electrical schematic diagrams of low-current ground fault line selection device;

Accompanying drawing 6 is sampling system part electrical schematic diagrams of low-current ground fault line selection device;

Accompanying drawing 7 is low-current ground fault line selection device cpu system part electrical schematic diagrams;

Accompanying drawing 8 is cpu system part electrical schematic diagrams of low-current ground fault line selection device;

Accompanying drawing 9 is cpu system part electrical schematic diagrams of low-current ground fault line selection device;

Accompanying drawing 10 is cpu system part electrical schematic diagrams of low-current ground fault line selection device;

Accompanying drawing 11 is cpu system part electrical schematic diagrams of low-current ground fault line selection device;

Accompanying drawing 12 is cpu system part electrical schematic diagrams of low-current ground fault line selection device;

Accompanying drawing 13 is cpu system part electrical schematic diagrams of low-current ground fault line selection device;

Accompanying drawing 14 is software flow patterns of low-current ground fault line selection device.

Below the present invention is described in further detail in conjunction with the accompanying drawings and embodiments again.

Five. embodiment

The present invention proposes a kind of algorithm of optimization: two sudden change amount starting algorithms, can significantly reduce microprocessor operation time, solved under the high-speed sampling the quick real-time of data and handled problems, improved properties of product greatly.

When accompanying drawing 1 is electric system generation ground connection or short trouble, voltage or current waveform sudden change synoptic diagram.Whether as can be seen, different wave shape is very big before and after the fault, can identify by sampled value comparison i (n) and i (n-N) and break down.In order to prevent system fluctuation and interference, guarantee the safety of algorithm and reliable, just when calculating, need continuous satisfy condition for three times to think to break down usually.

Accompanying drawing 2 is sampling synoptic diagram.I (n) is the raw data window that obtains by device sample frequency timing sampling, and k (m) uniformly-spaced extracts the new data window that obtains from i (n).

Fig. 3 is an algorithm flow chart, is that the algorithm implementation procedure embodies.

When small current neutral grounding system generation singlephase earth fault, ground connection transient voltage electric current can produce sudden change, contains abundant harmonic component in the signal, and the transient state component when being referred to as fault, this signal are to carry out the basis that route selection is analyzed.The transient state component life period is very short, must quick identification also preserve.Traditional way is by microprocessor control AD conversion, and regularly interrupts reading of data.Data of the every collection once amount of sudden change are calculated, and differentiate the fault initiating point.Because sampling interruption frequency height, microprocessor is used for the limited time of computing, and this method is difficult to realize under high-speed sampling, even adopt high performance microprocessor also very difficult.

The present invention adopts the implementation of microprocessor+FPGA, by AD conversion of FPGA control modulus and data read, under the prerequisite of requirement of real time, send out interruptive command with the timing of the 2.5ms time interval to microprocessor, by microprocessor is disposable the data read that collects among the FPGA is come, then this batch data is carried out two sudden change amounts and start calculating, differentiate the fault initiating point.With respect to traditional approach, this implementation real-time is poor slightly, but this species diversity almost is the microsecond level, is negligible for electric system.

Sudden change amount starting algorithm is developed at the distinctive failure message feature of electric system.In electric system, when system normally moved, load current (or voltage) was stable, though or change, can great changes will take place suddenly in the so short time at a power frequency period.When fault took place, electric current can be undergone mutation (seeing accompanying drawing 1), below formula (1) variable quantity that can effecting reaction be out of order:

Δi(n)＝|i(n)-i(n-N)|(1)

When surpassing setting value, Δ i (n) declares fault initiating.

The core of two sudden change amounts is to carry out sudden change amount starting algorithm continuously twice.It is that extracted at equal intervals generates (see figure 2) on raw data window basis that the promutation amount starts the data window that calculates, and is equivalent to reduce sample frequency, reduces calculated amount; The startup of promutation amount will obtain a start-up point after calculating and finishing, and be made as QD1, get a certain amount of original sampling data forward in order from starting beginning then, carry out the telomutation amount and start calculating, find real start-up point, be made as QD2 (seeing accompanying drawing 1).

Algorithm flow is referring to accompanying drawing 3.

1) FPGA is as the temporary core cell of controlling of sampling and data in the whole acquisition system, AD is implemented the also temporary transient AD of preservation of control, and (electric current, voltage digital signal into adopted in 50～2MHz) backs, thereby realized the quick high accuracy real-time data acquisition to the monitoring distribution network systems by second order hardware bandpass filtering.Sample frequency is set 51.2k, i.e. ripple 1024 points weekly.

2) microprocessor MCU timing 2.5ms reads the sampled data of all passages from FPGA, and by the ordering of sampling sequencing, promptly every passage is read 128 point data.

3) extract data every 16 from 128 data of residual voltage passage, obtain new data window k (0)～k (7), totally 8 data find the sampled data of these 8 corresponding all wavefront of data simultaneously, are designated as k1 (0)～k1 (7)

4) k (0)～k (7) data are carried out the promutation amount and start to differentiate, promptly Δ k (j)=| k (j)-k1 (j) |, j=0～7, when Δ k (n) declares fault initiating when setting threshold, record j value, and find k (j) position number in data window i (n), be assumed to be i (p).

5) get 48 sampled values forward from i (p) beginning, carry out the telomutation amount and start calculating, method is the same, finds the start-up point, and this point is real fault initiating point.

Accompanying drawing 4 has provided the circuit block diagram of low-current ground fault line selection device, PT/CT circuit with the voltage transformer (VT) summation current transformer more than a road that joins with electrical network, the filtering circuit that links to each other with voltage transformer (VT) summation current transformer PT/CT circuit and discharge circuit more than one tunnel, the discharge circuit that links to each other with the A/D change-over circuit with filtering circuit more than one tunnel, the A/D change-over circuit that links to each other with the FPGA data acquisition circuit with discharge circuit, the FPGA data acquisition circuit that links to each other with microcontroller circuit with the A/D change-over circuit, with FPGA data acquisition circuit and the microcontroller circuit that links to each other of outlet circuit, the outlet circuit that links to each other with microcontroller circuit also has the power circuit for each circuit working in addition.

Accompanying drawing 5～6 has provided the sampling system part electrical schematic diagram of low-current ground fault line selection device.Accompanying drawing 7～13 has provided the cpu system part electrical schematic diagram of low-current ground fault line selection device.Referring to above accompanying drawing with can finish the manufacturing of hardware of the present invention in conjunction with following material list.

19 inches 4U cabinets of device employing standard, the back of the body is inserted the formula structure.Each plug-in unit strong and weak electricity loop isolates fully, has reduced the coupling of external electromagnetic interference signal in weak-feedback side of transmission line, has strengthened the antijamming capability of device.Device is a core processor with the high performance 32 8-digit microcontroller unit of Motorola, is equipped with powerful peripherals, has extremely strong data processing and information storage capability.Inner structure adopts plug-in type, and each plug-in unit designs according to function, mainly comprises: power insert, CPU card, AC sampling plug-in unit, remote control plug-in unit etc.

Following table 1-table 7 provides the main components and parts numerical value of low-current ground fault line selection device.

Table 1PT/CT module material table

Title	Specifications and models	Quantity
			Mutual inductor	100V/1.2V	1
Mutual inductor	5A/1.2V	11

Table 2 filtering circuit module material table

Title	Specifications and models	Quantity
			Flaky electric capacity	CC41-0805B103K500NT	36
Pellet resistance	R0805-512JT	24

Table 3 discharge circuit module material table

Title	Specifications and models	Quantity
			Pellet resistance	R0805-1000JT	28
Operational amplifier	OPA2227U					2
			Operational amplifier	LF347M			6

Table 4AD modular converter material list

Title	Specifications and models	Quantity
			Integrated circuit	ADS8364		2
Integrated circuit	LF347M						8
			Sheet tantalum electric capacity	CA45-35V-2.2uF-B	1
Sheet tantalum electric capacity	CA45-16V-47uF-D	2
			Pellet resistance	R0805-1002FT	48
Pellet resistance row	CRN-1608-B4R-103JT	3
			Voltage dependent resistor (VDR)	FNR-10K-331	6
Safety electric capacity	CT81-3kV-6800pF	2

Table 5FPGA data acquisition module material list

Title	Specifications and models	Quantity
			Integrated circuit	EP1C3T144C8		1
Integrated circuit	AT25040N-10SC-2.7	1
			Integrated circuit	EPCS1SI8		1
Integrated circuit	MC74HC08AD						1
			LDO	LM1117MPX-ADJ	1
LDO	LT1086CM-3.3	1
			Integrated circuit	MC74HC14AD		1
Integrated circuit	IDT74ALVC164245PV						3
			Crystal oscillator	SG-8002CA-PCB-16MHZ	1

Table 6 microprocessor module material list

Title	Specifications and models	Quantity
			Integrated circuit	MCF5272VF66		1
Integrated circuit	DS1337S						1
			Integrated circuit	MAX793TCSE		1
Integrated circuit	EPM240T100C5						1
			Integrated circuit	HY57V641620HGT-S	2
Integrated circuit	IS62WV25616BLL-55T	2
			Integrated circuit	AM29LV320DB-90EC	1
Integrated circuit	LXT971ALC					1

Table 7 outlet module material list

Title	Specifications and models	Quantity
			Integrated circuit	EPM7064SLC84-10	1
Integrated circuit	MC74HC86AD					1
			Integrated circuit	MC1413BD			3
Relay	DK2a-24V	12
			Relay	DS2Y-S-DC24V	3
Sheet tantalum electric capacity	CA45-16V-47uF-D	2
			Single contact pin	1*2(2.54mm)	1
Double contact pin	2*4(2.54mm)	1
			Jumper wire device	(2S)	4

Software design

In small current neutral grounding system, when circuit generation singlephase earth fault takes place, contain abundant harmonic component in the fault-signal, the zero-sequence current of the faulty line of flowing through is other circuit transient zero-sequence current sum, this zero-sequence current component to arbitrary frequency is all set up, promptly

${\stackrel{\·}{I}}_{0j}\left(f\right)=-\underset{i\≠j}{\mathrm{\Σ}}{\stackrel{\·}{I}}_{0i}\left(f\right)---\left(1\right)$

(1) in the formula

For faulty line j, perfect the zero-sequence current component that circuit i goes up any frequency f; I=1～m, m are the outlet number.

As can be seen, on certain Frequency point, when perfecting the circuit phase place when consistent, the faulty line amplitude equal all perfect circuit amplitude sum and phase place opposite, promptly

$I_{0j}\left(f\right)=\underset{i\≠j}{\mathrm{\Σ}}{I}_{0i}\left(f\right)---\left(2\right)$

First-harmonic at present with the most use is than width of cloth phase comparing method and 5 subharmonic methods, and one that is actually formula (2) is used special case.Can think that first-harmonic or 5 subharmonic are characteristic frequencies that realize route selection.Characteristic frequency should be the most tangible Frequency point of fault circuit and non-fault line otherness.

Therefore, correctly selecting characteristic frequency is the key of route selection.Discover: the phase-frequency characteristic of circuit zero sequence impedance is the cycle square wave function of alternation on positive and negative 90 °, and along with the rising of frequency, the circuit zero sequence impedance is capacitive, perception alternately occurs, and its cycle is relevant with line parameter circuit value, and first section frequency band is capacitive.This is explanation just, and any circuit all has a minimum capacitive frequency band, is feature band if get the public capacitive frequency band of all circuits, and then each zero-sequence current component that perfects circuit all is a capacitive in this frequency band, can both satisfy the requirement of formula (2), sees Fig. 3.

A large amount of RTDS experimental results show that: in the feature band, the harmonic failure feature of amplitude maximum is the most obvious, and the result is the most reliable in route selection.Therefore, the present invention's harmonic wave of extracting the amplitude maximum in the feature band carries out than phase route selection as characteristic frequency.

Quantitative according to Shannon: sample frequency is at least by more than 2 times of measured frequency, and therefore, based on the theoretical High Speed Sampling System support that need be reliable and stable of the route selection of characteristic frequency, this is one of gordian technique that realizes this route selection theory.The sample frequency of the design's invention is 51.2kHz, and promptly ripple is adopted 1024 points weekly.

Under big resistance eutral grounding situation, the fault transient signal a little less than, harmonic content is few, characteristic frequency can not meet the demands; The concentration of energy of this situation explanation fault component is in low-frequency band, and therefore, it is higher to adopt first-harmonic to carry out the route selection reliability.

Accompanying drawing 14 has provided the software flow pattern of low-current ground fault line selection device.The software flow of its use is: enter task 1 and task 2 after the beginning respectively, task 1 enters analog acquisition, whether enter fault initiating again? be to finish after then entering failure wave-recording; Fault initiating does not then enter and calculates residual voltage U ₀, enter U again ₀, be to finish after the fault initiating sign then is set whether greater than definite value; U ₀Then not entering end greater than definite value, does whether task 2 enter fault initiating? otherwise to finishing; Fault initiating is then searched the fault initiating point, enters route selection again and calculates, and enters that message is handled and warning again, finishes after entering the fault initiating sign again.Low-current ground fault line selection device is work like this: CT, PT obtain electric current, voltage signal from protected circuit respectively, and big voltage once, big current signal are converted to the manageable small voltage signal of device; Voltage signal through after CT, the PT conversion enters wave filter, with the higher hamonic wave elimination, prevents that it from producing interference to protective device; Filtered signal, the process operational amplifier carries out the signal amplification and level lifts, with the sample range and the input impedance of coupling AD chip; The AD chip is controlled by FPGA, carries out after the analog to digital conversion, and voltage and current signal has been that digital signal can be carried out computational discrimination for CPU from analog signal conversion.The work of mainly carrying out in CPU the inside has: whether the amplitude of differentiating voltage signal earlier greater than a fixing threshold, if greater than, then enter little electric current route selection discriminating program.Discriminating program extracts the transient state amount of the current signal of adopting, and differentiates according to transient state amount route selection principle, if there is the condition of a circuit to satisfy, thinks that then earth fault takes place for it.Device sends alarm signal by Ethernet to the backstage after selecting the circuit of earth fault, simultaneously, drives the exit plate actuating of relay (isolating switch of relay outlet connection line), the tripping faulty line.

Claims (1)

1. method that quickly catchs power grid fault start point is characterized in that:

A. the on-site programmable gate array FPGA data acquisition of low-current ground fault line selection device is as the temporary core cell of controlling of sampling and data in the whole acquisition system, analog to digital converter is implemented control and the temporary transient electric current of being adopted by analog to digital converter behind second order hardware bandpass filtering 50～2MHz of preserving, voltage digital signal, thereby realized quick high accuracy real-time data acquisition to the monitoring distribution network systems, sample frequency is set 51.2K, i.e. ripple 1024 points weekly, described low-current ground fault line selection device is: the PT/CT circuit with the voltage transformer (VT) summation current transformer more than a road that joins with electrical network, the filtering circuit that links to each other with voltage transformer (VT) summation current transformer PT/CT circuit and discharge circuit more than one tunnel, the discharge circuit that links to each other with the A/D change-over circuit with filtering circuit more than one tunnel, the A/D change-over circuit that links to each other with the FPGA data acquisition circuit with discharge circuit, the FPGA data acquisition circuit that links to each other with microcontroller circuit with the A/D change-over circuit, with FPGA data acquisition circuit and the microcontroller circuit that links to each other of outlet circuit, the outlet circuit that links to each other with microcontroller circuit also has the power circuit for each circuit working in addition;

B. the micro-control unit of low-current ground fault line selection device regularly reads the sampled data of all passages from FPGA, and by the ordering of sampling sequencing;

C. extract data every 16 from 128 data of residual voltage passage, obtain new data window k (0)～k (7), totally 8 data find the sampled data of these 8 corresponding all wavefront of data simultaneously, are designated as k1 (0)～k1 (7);

D. k (0)～k (7) data are carried out the promutation amount and start to differentiate, promptly Δ k (j)=| k (j)-k1 (j) |, j=0～7, when Δ k (n) declares fault initiating when setting threshold, record j value, and find k (j) position number in data window i (n), be assumed to be i (p);

E. get 48 sampled values forward from i (p) beginning, carry out the telomutation amount and start calculating, method is the same, finds the start-up point, and this point is real fault initiating point.

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