Connect public, paid and private patent data with Google Patents Public Datasets

超导陶瓷图案及其制造方法

Info

Publication number
CN1018115B
CN1018115B CN 88102320 CN88102320A CN1018115B CN 1018115 B CN1018115 B CN 1018115B CN 88102320 CN88102320 CN 88102320 CN 88102320 A CN88102320 A CN 88102320A CN 1018115 B CN1018115 B CN 1018115B
Authority
CN
Grant status
Application
Patent type
Prior art keywords
supperconducting
ceramic
pattern
manufacturing
method
Prior art date
Application number
CN 88102320
Other languages
English (en)
Other versions
CN88102320A (zh )
Inventor
山崎舜平
Original Assignee
株式会社半导体能源研究所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L39/00Devices using superconductivity; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof
    • H01L39/24Processes or apparatus peculiar to the manufacture or treatment of devices provided for in H01L39/00 or of parts thereof
    • H01L39/2419Processes or apparatus peculiar to the manufacture or treatment of devices provided for in H01L39/00 or of parts thereof the superconducting material comprising copper oxide
    • H01L39/2464After-treatment, e.g. patterning
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L39/00Devices using superconductivity; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof
    • H01L39/02Details
    • H01L39/12Details characterised by the material
    • H01L39/125Ceramic materials
    • H01L39/126Ceramic materials comprising copper oxide
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L39/00Devices using superconductivity; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof
    • H01L39/24Processes or apparatus peculiar to the manufacture or treatment of devices provided for in H01L39/00 or of parts thereof
    • H01L39/2419Processes or apparatus peculiar to the manufacture or treatment of devices provided for in H01L39/00 or of parts thereof the superconducting material comprising copper oxide
    • H01L39/2422Processes for depositing or forming superconductor layers
    • H01L39/2435Processes for depositing or forming superconductor layers by sputtering
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00Stock material or miscellaneous articles
    • Y10S428/901Printed circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00Stock material or miscellaneous articles
    • Y10S428/922Static electricity metal bleed-off metallic stock
    • Y10S428/9265Special properties
    • Y10S428/93Electric superconducting
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/70High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/701Coated or thin film device, i.e. active or passive
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/70High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/701Coated or thin film device, i.e. active or passive
    • Y10S505/703Microelectronic device with superconducting conduction line
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/70High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/706Contact pads or leads bonded to superconductor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/725Process of making or treating high tc, above 30 k, superconducting shaped material, article, or device
    • Y10S505/73Vacuum treating or coating
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/725Process of making or treating high tc, above 30 k, superconducting shaped material, article, or device
    • Y10S505/742Annealing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24926Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer

Abstract

本发明公开了一种超导陶瓷图案及其制造方法。采用离子注入法将杂质掺入超导陶瓷的一个预定部分,从而降低或破坏掺杂区的起始Tc。在某一工作温度下,杂质掺杂区表现出非超导性,而其它未被掺杂的区域保持超导性。

Description

本发明涉及超导体领域,并且更具体地涉及超导陶瓷图案及其制造方法。

通常使用Nb-Ge金属材料(例如Nb3Ge)等作为超导材料。因为为获得这种普通超导材料的超导性需要非常低的温度,因而使其运行费用非常高,所以这类超导材料的应用受到限制。

此外,近年来已经知道一些呈现超导性能的陶瓷材料。但是,这些超导材料还仅仅是坯料形式,到目前为止仍未产生薄膜形式的这类超导材料。

另一方面,已经知道一些半导体器件,它们在同一基片上备有大量半导体集成电路元件。

近几年来,发展具有高速操作能力的、越来越精细的半导体集成电路已经成为一种必要的事。除了这种精细度之外,由于半导体元件中所产生的热而使可靠性降低、以及在发热部件中操作速度的降低也已经成为问题。因此,已经迫切地需要获得一种利用超导陶瓷的改进结构。

因此,本发明的一个目的是提供一种含有若干低的临界温度区域的超导图案。

本发明的另一个目的是提供一种选择性地降低超导氧化物陶瓷的某些规定部分的临界温度的方法。

根据本发明的一个方面,利用了超导氧化物陶瓷的独特的特性。本发明人已通过实验证明:可以用掺杂的方法来控制超导陶瓷的Tco(在此温度下电阻消失),而其TcOnset(在此温度下电阻率开始下降)几乎保持不变。掺杂部分会具有比较宽的、在Tco和Tc    onset之间的转变温度范围。即,可以把超导陶瓷薄膜的各规定部分变成一些低Tc区,这些区域在未掺杂部分的Tco下能够起电阻或有源区的作用。

在各种典型的情况中,可以根据本发明,按照理想配比式(A1-xBx)yCuzOW来制备所用的超导陶瓷,其中A是元素周期表中Ⅲa和Ⅴb族的一个或几个元素、例如各稀土元素,B是元素周期表中Ⅱa族的一个或几个元素,例如包括铍和镁的碱土金属,并且x=0.1至1;y=2.0至4.0,最好是2.5至3.5;z=1.0至4.0,最好是1.5至3.5;以及w=4.0至10.0,最好是6.0至8.0。该普遍公式的若干例子是:

可以用电子束蒸发,阴极真空喷镀,光增强CVD,光增强PVD等等方法在某一表面上形成这些材料。

例如,用阴极真空喷镀的方法在一绝缘表面上淀积0.1至30微米厚的超导陶瓷薄膜。用掩模通过光刻法除去该薄膜的规定部分,留下那些准备作为各种有源元件(例如Josephson器件)和无源元件(例如电阻或接线)的剩余部分。从该超导陶瓷薄膜的、预定作为低Tc区的规定部分选择性地去除该掩膜;用保留的掩膜为掩蔽对该超导陶瓷膜进行离子注入,以产生低Tc区。离子注入之后,该超导薄膜经过热处理,以补偿由于离子轰击造成的晶体结构的损坏。

图1(A)至1(C)是说明本发明的第一实施例的制造方法的横截面图。

图2是说明本发明的第二实施例的横截面图。

图3是表示本发明的超导陶瓷的电阻率和温度的关系的曲线图。

下面将参考图1(A)至1(C)叙述本发明的超导陶瓷图案的制造方法。图1(A)中,用低频阴极真空喷镀法在由SrTiO3制成的绝缘单晶基片1上淀积0.1至1.0微米厚度的氧化物陶瓷薄膜2,同时选择所使用的靶的成份,使得所淀积的薄膜能够生成一种符合理想配比式(YBa2)Cu3O6-8的薄膜。阴极真空喷镀过程中,使所述基片在氩-氧气氛中加热到700至1000℃(例如850℃)。控制淀积条件(包括靶成份的制备),以保持所淀积的陶瓷薄膜2中所含杂质(Si)的数量不超过百万分之100(100ppm),最好不超过10ppm,所述杂质是在以下步骤中准备有意地加入该陶瓷薄膜的。

完成阴极真空喷镀之后,陶瓷薄膜2在氧化气氛中以800至1000℃温度烧制5至50小时,以便使该陶瓷薄膜转变成超导单晶陶瓷薄膜。图3中所画出的曲线20表示根据实验的、烧制后的陶瓷薄膜1的温度-电阻率关系曲线,如曲线中所示,在Tc22(在该温度下电阻率等于零)和Tc    onset    21(在该温度下电阻率急剧下降)之间出现有一转变区23。

然后,用离子注入法,用复盖薄膜2〔图1(B)〕的光致抗蚀剂掩模3,将硅掺入超导陶瓷薄膜2的部分5。杂质浓度是5×1015至2×1022原子/Cm3,例如5×1019原子/Cm3。此后,该陶瓷薄膜再次在氧化气氛中和700至1000℃的温度下烧制。这种热处理导致杂质的氧化,并因此降低了Tco。当该陶瓷薄膜中的一部分硅被氧化,使该超导陶瓷含有0.1%的氧化硅时,抗蚀剂3也同时以二氧化碳和水的形式出现。该超导陶瓷薄膜的掺杂部分11含有大约99%的基本成份(等于未掺杂部分的成份)。根据实验,由于掺杂工艺的不同,该超导陶瓷薄膜的电阻率-温度关系曲线从曲线20变化到曲线20′。正如从曲线20′所看到的,Tc移到比较低的温度22′,而Tc onset变化不那么大。结果,在掺杂部分中,转变范围23′变宽了。在该情况下,在液氮温度25下,该超导陶瓷薄膜处在转变状态中、此刻具有一定的电阻率26。可以通过调节掺杂的数量来控制临界温度的移动。在随后的处理过程中,甚至在经过700至1000℃高温处理之后,掺杂部分11仍保持比较低的Tco。

准备加入超导陶瓷中的其他杂质的例子有:Al,Mg,Ga,Ge,Ti,Zr,Fe,Ni,Co,B和P。可以组合使用多种杂质。应当使所选用的掺杂密度高于该陶瓷薄膜中已经存在的密度,或者可以把那些在该薄膜中确实没有的杂质加入该薄膜中。

现在将参考图2说明根据本发明制造的另一种图案。在半导体基片1中预先生成一些晶体管或其他器件。在基片1的上表面上生成第一绝缘薄膜6、并构成图案。该绝缘薄膜6由用氧化硅构成的下层薄膜8和用氮化硅构成的上层薄膜9组成。

为了在基片1上构成超导电路,首先象上文实施例中那样用阴极真空喷镀法在基片1的绝缘薄膜6上淀积一层超导氧化物陶瓷薄膜,并用光刻法构成图案。然后,用与上文说明的相同的方法给该陶瓷薄膜掺入离子杂质、以产生在液氮温度下的超导接线10和10′以及低Tc的区域11(该区域可以选择性地用作电阻或有源区)。在该第二实施例中,使陶瓷薄膜在比前一实施例低的温度下经受高温处理,因此,该超导陶瓷图案最后具有多晶结构。该半导体基片上的各器件通过所述超导图案内连。设计制造条件,使得在液氮温度下各掺杂区具有一定的电阻率,而各非掺杂区具有超导性。

在基片1的各淀积薄膜上形成第二绝缘薄膜9′以及另一绝缘薄膜12,薄膜12填满由上述淀积薄膜形成的凹坑、从而形成一个平的上表面。用光刻法在绝缘薄膜9′和12上形成各开口7′。用和第一实施例中所用的相同的方法在绝缘薄膜9′和12上淀积第二超导陶瓷薄膜13。用光刻法使第二超导薄膜构成图案。第一和第二超导陶瓷薄膜通过各开口7′相互连接。

当淀积陶瓷薄膜,然后通过烧制把该薄膜转变成所要求的超导薄膜时,在所述转变之前可对所述陶瓷薄膜进行离子注入。在该情况下,在烧制之后就最终形成了低Tc区和高Tc区。

本发明的包含超导图案的上述各器件预定工作在液氮温度下。但是,随着将来可能的发展,构成具有更高临界温度,例如干冰温度的超导陶瓷薄膜是可能的。通过简单地用可能发展的方法代替所述超导体形成方法,可容易地把本发明用于那种场合。此外,虽然上述超导陶瓷薄膜的掺杂区至今仍然是一种超导材料,但是它不是必然的超导材料,而可以是一种正常的导电材料。即,可以进行根据本发明的掺杂、以使所述超导结构消失。

虽然上述半导体基片备有各有源器件,但是也可以使用其上表面镀有非氧化物薄膜,例如50至5000埃厚度的氮化硅的陶瓷基片。例如用YSZ(已经用钇稳定化处理的锆石)基片来代替,该基片的热膨胀系数基本上与所述陶瓷相同。

还可以按照理想配比式(A1-xBx)yCuzOw来制备本发明所使用的超导陶瓷,式中A是元素周期表的Ⅲa族的一个或几个元素,例如各稀土元素,B是元素周期表的Ⅱa族的一个或几个元素,例如包括铍和镁的各碱土金属,以及x=0至1;y=2.0至4.0,最好是2.5至3.5;z=1.0至4.0,最好是1.5至3.5;以及w=4.0至10.0,最好是6.0至8.0。一个例子是YBa2Cu3O6-8。还可以按照理想配比式(A1-xBx)yCuzOW来制备本发明所用的超导陶瓷,其中A是元素周期表的Vb族的一个或几个元素,例如Bi、Sb和As,B是元素周期表Ⅱa族的一个或几个元素,例如包括铍和镁的碱土金属,以及x=0.3至1,y=2.0至4.0,最好是2.5至3.5;z=1.0至4.0,最好是1.5至3.5;以及w=4.0至10.0,最好是6.0至8.0。该普遍公式的一些例子是BiSrCaCu2Ox以及Bi4Sr3Ca3Cu4Ox。测量了一些遵守公式Bi4SryCa3Cu4Ox(y是大约1.5)的Tc onset和Tco样品;测量结果是40至60°K,此值不算高。用遵守理想配比式Bi4Sr4Ca2Cu4Ox和Bi2Sr3Ca2Cu2Ox的一些样品,获得了比较高的临界温度。表示氧的比例的数是6至10,例如大约8.1。

虽然已经对若干实施例进行了描述,但是,本发明应当仅仅由所附权利要求书所限定,而不应当由各具体实施例所限定。例如,可以用MBE(电子束外延生长法)、气相法、印刷法等等代替阴极真空喷镀法来形成所述超导陶瓷。

Claims (12)

1.一种氧化物超导陶瓷图案,包括基片及其上的氧化物超导陶瓷薄膜,其特征在于在一基片上的所说超导陶瓷至少有一区域掺以杂质,以便改变该掺杂区域的起始临界温度Tco,使其低于未掺以所说杂质的其它区域的Tco。
2.根据权利要求1的图案,所说杂质是从Si、Al、Mg、Ga、Ge、Ti、Zr、Fe、Ni、Co、B和P中选择的一种或几种元素。
3.权利要求1的图案,其特征在于:所述杂质以氧化物的形式包含在所述掺杂区中。
4.权利要求1的图案,其特征在于:所述基片是半导体基片。
5.权利要求1的图案,其特征在于:所述掺杂物杂质浓度是5×1015至2×1022原子/cm3。
6.一种产生超导陶瓷图案的方法,它包括,按照超导性所需要的成份,在基片上生成氧化物陶瓷薄膜;用离子注入技术将杂质掺入所述陶瓷薄膜的一部分中;以及将所述薄膜在氧化气氛中热退火,以使所述陶瓷薄膜具有超导结构。
7.权利要求6的方法,其特征在于进一步包括所述陶瓷薄膜的图案形成步骤。
8.权利要求6的方法,其特征在于:选择掺杂浓度,使它高于所述陶瓷薄膜的原始相应杂质浓度。
9.权利要求8的方法,其特征在于:所述陶瓷薄膜的生成是这样进行的,使得所述原始杂质浓度被限制在不高于百万分之100。
10.权利要求6的方法,其特征在于:所述陶瓷薄膜的生成是用阴极真空喷镀法进行的。
11.权利要求6的方法,其特征在于:所述陶瓷薄膜的生成是用印刷法,电子束外延生长方法或气相法进行的。
12.权利要求6的方法,其特征在于:所述杂质是从Si,Al,Mg,Ga,Ge,Ti,Zr,Fe,Ni,Co,B和P中选择的一种或几种元素。
CN 88102320 1987-04-15 1988-04-15 超导陶瓷图案及其制造方法 CN1018115B (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP9373387A JPS63258083A (en) 1987-04-15 1987-04-15 Manufacture of superconductive material
JP9373287A JP2670554B2 (ja) 1987-04-15 1987-04-15 酸化物超電導材料の作製方法

Publications (2)

Publication Number Publication Date
CN88102320A true CN88102320A (zh) 1988-11-02
CN1018115B true true CN1018115B (zh) 1992-09-02

Family

ID=26435026

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 88102320 CN1018115B (zh) 1987-04-15 1988-04-15 超导陶瓷图案及其制造方法

Country Status (4)

Country Link
US (2) US5098884A (zh)
CN (1) CN1018115B (zh)
DE (2) DE3879536D1 (zh)
EP (1) EP0287383B2 (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5248658A (en) * 1987-04-07 1993-09-28 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a superconducting oxide pattern by laser sublimation
US5401716A (en) * 1987-04-15 1995-03-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing superconducting patterns
DE3879536D1 (de) * 1987-04-15 1993-04-29 Semiconductor Energy Lab Supraleitender keramischer film und verfahren zu dessen herstellung.
US4900716A (en) * 1987-05-18 1990-02-13 Sumitomo Electric Industries, Ltd. Process for producing a compound oxide type superconducting material
US5225394A (en) * 1987-08-31 1993-07-06 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing high Tc superconducting circuits
FR2641530B2 (fr) * 1988-01-29 1993-05-28 Centre Nat Rech Scient Nouveau materiau composite, procede de fabrication et application
EP0358879A3 (en) * 1988-09-13 1991-02-27 Hewlett-Packard Company Method of making high density interconnects
JPH06291374A (ja) * 1993-03-31 1994-10-18 Sumitomo Electric Ind Ltd ジョセフソン接合素子
WO1994027329A1 (en) * 1993-05-14 1994-11-24 The University Of British Columbia Fabrication of oxide superconductor devices by impurity ion implantation
JPH07263767A (ja) 1994-01-14 1995-10-13 Trw Inc イオンインプランテーションを用いたプレーナ型の高温超伝導集積回路
US5912503A (en) * 1997-01-02 1999-06-15 Trw Inc. Planar in-line resistors for superconductor circuits
US7247603B2 (en) * 2003-10-23 2007-07-24 Star Cryoelectronics Charge dissipative dielectric for cryogenic devices
KR100595855B1 (ko) * 2004-12-29 2006-06-23 동부일렉트로닉스 주식회사 알루미늄 증착 콘택트 형성 방법
US7615385B2 (en) 2006-09-20 2009-11-10 Hypres, Inc Double-masking technique for increasing fabrication yield in superconducting electronics
CN102437281A (zh) * 2011-12-08 2012-05-02 南京大学 一种超导隧道结及其制备方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3346425A (en) * 1964-04-01 1967-10-10 Gen Electric Superconductors
US4316785A (en) * 1979-11-05 1982-02-23 Nippon Telegraph & Telephone Public Corporation Oxide superconductor Josephson junction and fabrication method therefor
JPS58122724A (en) * 1982-01-18 1983-07-21 Toshiba Corp Manufacture of semiconductor element
JPH0426542B2 (zh) * 1985-02-20 1992-05-07 Tokyo Shibaura Electric Co
JPS6215864A (en) * 1985-07-15 1987-01-24 Hitachi Ltd Manufacture of solar cell
US4732867A (en) * 1986-11-03 1988-03-22 General Electric Company Method of forming alignment marks in sapphire
US4826808A (en) * 1987-03-27 1989-05-02 Massachusetts Institute Of Technology Preparation of superconducting oxides and oxide-metal composites
US4960751A (en) * 1987-04-01 1990-10-02 Semiconductor Energy Laboratory Co., Ltd. Electric circuit having superconducting multilayered structure and manufacturing method for same
DE3879536D1 (de) * 1987-04-15 1993-04-29 Semiconductor Energy Lab Supraleitender keramischer film und verfahren zu dessen herstellung.
CN1035087C (zh) * 1987-05-18 1997-06-04 住友电气工业株式会社 制作超导电路图形的方法
US4837609A (en) * 1987-09-09 1989-06-06 American Telephone And Telegraph Company, At&T Bell Laboratories Semiconductor devices having superconducting interconnects
JPH01290526A (en) * 1988-05-18 1989-11-22 Seiko Epson Corp High temperature superconducting material
CA2062709C (en) * 1991-03-11 1997-06-24 So Tanaka Superconducting thin film having at least one isolated superconducting region formed of oxide superconductor material and method for manufacturing the same

Also Published As

Publication number Publication date Type
US5098884A (en) 1992-03-24 grant
EP0287383A2 (en) 1988-10-19 application
EP0287383B2 (en) 2002-08-21 grant
EP0287383B1 (en) 1993-03-24 grant
DE3879536T2 (de) 1993-07-01 grant
DE3879536D1 (de) 1993-04-29 grant
EP0287383A3 (en) 1989-04-05 application
DE3879536T3 (de) 2003-07-24 grant
US5877124A (en) 1999-03-02 grant
CN88102320A (zh) 1988-11-02 application

Similar Documents

Publication Publication Date Title
Gurvitch et al. Preparation and substrate reactions of superconducting Y‐Ba‐Cu‐O films
US5366953A (en) Method of forming grain boundary junctions in high temperature superconductor films
US4851895A (en) Metallization for integrated devices
US4432035A (en) Method of making high dielectric constant insulators and capacitors using same
US4994435A (en) Laminated layers of a substrate, noble metal, and interlayer underneath an oxide superconductor
US5828080A (en) Oxide thin film, electronic device substrate and electronic device
US4180596A (en) Method for providing a metal silicide layer on a substrate
US5047385A (en) Method of forming superconducting YBa2 Cu3 O7-x thin films with controlled crystal orientation
US20050239659A1 (en) Biaxially-textured film deposition for superconductor coated tapes
US5138401A (en) Electronic devices utilizing superconducting materials
US4882312A (en) Evaporation of high Tc Y-Ba-Cu-O superconducting thin film on Si and SiO2 with a zirconia buffer layer
US5047390A (en) Josephson devices and process for manufacturing the same
US5236896A (en) Superconducting device having an extremely thin superconducting channel formed of oxide superconductor material
US5168420A (en) Ferroelectrics epitaxially grown on superconducting substrates
US4220959A (en) Josephson tunnel junction with polycrystalline silicon, germanium or silicon-germanium alloy tunneling barrier
US4176365A (en) Josephson tunnel junction device with hydrogenated amorphous silicon, germanium or silicon-germanium alloy tunneling barrier
US4921833A (en) Superconducting member
US4316785A (en) Oxide superconductor Josephson junction and fabrication method therefor
US4470190A (en) Josephson device fabrication method
US4141020A (en) Intermetallic aluminum-transition metal compound Schottky contact
US5051396A (en) Method of manufacturing superconducting patterns by adding impurities
US5196395A (en) Method for producing crystallographic boundary junctions in oxide superconducting thin films
EP0285445A2 (en) Electric circuit having superconducting multilayered structure and manufacturing method for same
EP0181191A2 (en) Superconducting device
US5135906A (en) Superconducting thin film of compound oxide and process for preparing the same

Legal Events

Date Code Title Description
C06 Publication
C10 Request of examination as to substance
C13 Decision
C14 Granted
C15 Extension of patent right duration (from 15 to 20 years)
C19 Lapse of patent right due to non-payment of the annual fee