CN101807929A - Minimum sum decoding method of selective annealing of low density parity check code - Google Patents

Abstract

The invention relates to a minimum sum decoding method of selective annealing of a low density parity check code, which is suitable for soft decision decoding of the low density parity check codes and replaces the traditional multiplicative revise minimum sum decoding method. Based on the minimum sum decoding method, the invention adopts a multiplicative factor smaller than 1 to revise output of check nodes with unsuccessful check. The method comprises the following implementation steps of: merging external information quantity input by the check nodes and information from a channel by a variable node as decision soft information of iteration; probing whether a decision sequence satisfies a check equation; taking down or updating a node sequence set U with unsuccessful check, if U is empty, finishing decoding, and if U is not empty, updating and outputting information to the variable node by the check nodes based on minimum sum regulations; carrying out annealing treatment on check node output information belonging to U plus a factor smaller than 1; and turning to next iterative decoding. In the method, the performance is obviously superior to other improved minimum sum decoding method, and the calculation complexity is far lower than a sum-product algorithm.

Description

The selective annealing minimum and the interpretation method of low density parity check code

Technical field

The present invention is that the soft-decision iterative decoding of low density parity check code is simplified interpretation method, belongs to the decoding technique field of channel error correction coding.

Background technology

At low-density checksum (Low-Density Parity-Check, LDPC) in the middle of Ma the interpretation method, iteration soft-decision decoding method based on bipartite graph has good bit error rate performance, and the irregular LDPC codes for long can reach the performance near shannon limit.The soft-decision algorithm of standard is referred to as sum-product algorithm, and no matter this algorithm is the probability territory or the decoding in log-likelihood ratio territory in the output of calculation check nodal information, always relate to a large amount of additions, multiplication, logarithm and exponent arithmetic, add that interstitial content is more, computational complexity is bigger.Minimum and interpretation method is a simplification to this algorithm, directly minimum the or inferior low information of importing with check-node of reliability is as output, save computings a large amount of in the sum-product algorithm, but performance has been compared certain gap with sum-product algorithm.

The improved one's methods offset correction or the property the taken advantage of method for normalizing of minimum-sum algorithm are on the minimum value or sub-minimum information of output, deduct a modifying factor or are multiplied by a normalization factor, thereby reach the result who exports near sum-product algorithm.This class methods performance compares minimum and interpretation method improvement amplitude is bigger, and complexity does not increase a lot.Because communication system is to transmission rate, bit error rate performance requires further to improve, and a lot of systems begin to gradually adopt length at the irregular LDPC codes more than 8000.Along with the increase of code length and the influence of non-regular distribution, the minimum of offset correction or the property taken advantage of normalization correction and the performance of interpretation method be deterioration to some extent also, increases gradually at a distance of the sum-product algorithm performance gap of standard.

Summary of the invention

Technical problem: the selective annealing minimum and the interpretation method that the purpose of this invention is to provide a kind of low density parity check code, this method is a kind of improved minimum and interpretation method, solve the existing LDPC sign indicating number soft-decision decoding method of simplifying poor-performing when handling long non-regular code, and existing sum-product algorithm complexity problem of higher still; This method is to channel estimating parameter robust more simultaneously.

Technical scheme: a kind of selective annealing minimum and the interpretation method of low density parity check code, it is characterized in that: it is characterized in that: in the minimum and iterative decoding process of low density parity check code, variable node and check-node carry out soft amount of information successively to be upgraded; In iterative process, variable node is declared firmly to gross information content, judges whether success of each verification formula verification; If the verification of verification formula is success all, then iterative decoding stops automatically, otherwise when the soft value of the check-node that carries out is immediately upgraded, check-node to verification succeeds carries out soft value renewal according to original minimum and principle, finishes annealing in process and the unsuccessful check-node of verification be multiply by a factor beta less than 1 on the basis of minimum and the soft value renewal of principle.

Annealing coefficient β can optimize definite by emulation, and preestablishes storage before iterative decoding begins.

Low density parity check code minimum and interpretation method based on selective annealing can be expressed as the step of carrying out in the following order:

1) initialization: BPSK modulates x _n=1-2u _n, n ∈ [1, N] is through the zero-mean variances sigma ²The white Gaussian noise channel, obtain received signal sequence Y={y _n| y _n=x _n+ w _n, n ∈ [1, N] }, initial variable node v _n, n ∈ [1, N] is to check-node c _m, m ∈ A (n) exports side information Initial check-node c _m, m ∈ [1, M] is to variable node v _n, n ∈ B (m) exports side information

Iterations k=0;

2) variable node calculates: each variable node v _nWith the verification formula output information L that participates in _{M, n} ^kAddition is as variable node v _nTo check-node c _mThe output side information:

$L_{\mathrm{nm}}^k=\underset{m^{\′}\∈A\left(n\right)\backslash m}{\mathrm{\Σ}}{L}_{m^{\′}n}^k;$

Variable node v _nCheck-node c with all participations _m, the output side information L of m ∈ A (n) _Mn ^kAddition is always exported as the variable node of current iteration

$L_n^k=y_n+\underset{m\∈A\left(n\right)}{\mathrm{\Σ}}{L}_{\mathrm{mn}}^k$

Output information L according to each variable node of current iteration _n ^k, make symbol according to following formula and declare firmly and obtain output sequence

$z^k=(z_1^k,z_2^k,\·\·\·,z_n^k,\·\·\·,z_N^k)$

$z_n^k=\left\{\begin{array}{ccc}0,& \mathrm{if}& L_n^k>0\\ 1,& \mathrm{if}& L_n^k\≤0\end{array}\right.;$

3) check node calculation preliminary treatment: whether by declaring sequence firmly, it is successful to calculate each verification formula:

$s_m^k=\underset{n\∈B\left(m\right)}{\mathrm{\Σ}}\⊕z_n^k,m\∈[1,M]$

The operation that adds up of expression XOR.Write down the check-node sequence number that all do not satisfy verification With season

Represent that all satisfy the check-node sequence number collection of verification.If not satisfying the node number of verification is 0, also being | U|=0, then step (2) output result will be as final decoding output

Stop the decoding of this frame simultaneously, if can not satisfy and iterations k equals maximum iteration time, then decoding failure stops decoding, otherwise continues iterative decoding, k++;

4) check node calculation: each check-node c _mVariable node output side information L according to the k-1 time iteration _{N ' m} ^K-1, calculate iteration node c the k time according to minimum and principle _mTo variable node v _nThe side information of output if check-node m belongs to set U, then carries out annealing in process, otherwise unannealed; Also promptly carry out following operation:

$\left\{\begin{array}{cc}{L}_{\mathrm{mn}}^k=\mathrm{\β}\·\left(\underset{n^{\′}\∈B\left(m\right)\backslash n}{\mathrm{\Π}}\mathrm{sign}\left(L_{n^{\′}m}^{k-1}\right)\right)\·\left(\underset{n^{\′}\∈B\left(m\right)\backslash n}{\min }\right|L_{n^{\′}m}^{k-1}\left|\right),& \mathrm{ifm}\∈U\\ \left(\underset{n^{\′}\∈B\left(m\right)\backslash n}{\mathrm{\Π}}\mathrm{sign}\left(l_{n^{\′}m}^{k-1}\right)\right)\·\left(\underset{n^{\′}\∈B\left(m\right)\backslash n}{\min }\right|L_{n^{\′}m}^{k-1}\left|\right),& \mathrm{ifm}\∈S\end{array}\right.;$

Jump to step 2 then).

Beneficial effect: whether successful main innovate point of the present invention be the unsuccessful check-node lastest imformation of verification to be annealed on the basis of minimum and rule according to verification mensuration.

Be mainly reflected in the following aspects:

1) whether case of successful is annealed selectively according to verification, and feasible minimum of this new mechanism and decoding algorithm performance are better.

2) compare with method with the existing property taken advantage of correction is minimum, correction effect is better, and the decoding convergence rate is faster.

Description of drawings

Fig. 1 is a LDPC sign indicating number bipartite graph connection diagram.Wherein, Fig. 1 a is the connection diagram of check-node and variable node, and Fig. 1 b is the check-node connection diagram of certain variable node and its participation, and Fig. 1 c is the variable node connection diagram that certain check-node comprises with it.

Fig. 2 is the method flow diagram of a variable node computing unit.

Fig. 3 is total interpretation method flow chart of a check node calculation output unit.

Fig. 4 is a check-node unit calculated minimum, the method flow diagram of sub-minimum and minimum index.

Fig. 5 is the method flow diagram that the check-node unit is minimum and the annealing renewal is exported.

Fig. 6 is the bit error rate curve of 1/2 code check irregular LDPC codes under each interpretation method of (8064,4032).

Fig. 7 is the frame error rate curve of 3/4 code check irregular LDPC codes under each interpretation method of (8064,6048).

All explanation of symbols:

v _n: n variable node;

c _m: m check-node;

A (n): variable node v _nThe check-node set that participates in;

B (m): variable node c _mThe variable node set that comprises;

L (v _n→ c _m)=(L (v _n→ c _m), z _n): variable node v _nTo check-node c _mThe likelihood ratio information L (c that transmits _m→ v _n) and symbolic information z _n

L (c _n→ v _n): variable node c _mTo check-node v _nThe likelihood ratio information of transmitting;

| L (v _n→ c _m) |: variable node v _nTo check-node c _mThe reliability of the likelihood ratio information of transmitting;

Sign (L (v _n→ c _m)): variable node v _nTo check-node c _mTransmit the sign symbol of likelihood ratio information;

Sign (c _m): check-node c _mThe sign symbol of output signal;

Min (c _m): check-node c _mThe minimal reliability of output signal;

Sub-min (c _m): check-node c _mThe inferior minimal reliability of output signal;

Min-ind (c _m): check-node c _mOutput minimal reliability signal corresponding variable node sequence number

MSA: minimum and interpretation method;

NMSA: the property taken advantage of correction minimum and interpretation method;

AN-MSA: wash and select annealing minimum and interpretation method.

Embodiment

The information that the minimum and interpretation method of selective annealing of the present invention merges the external information amount of check-node inflow by variable node and comes self-channel is as the soft information of the judgement of this time iteration, sound out the judgement sequence and whether satisfy check equations, write down or upgrade the set of the unsuccessful node ID of verification, if the unsuccessful check-node sequence number of verification collection is empty, then decoding finishes; If the unsuccessful check-node sequence number of verification collection non-NULL, then check-node upgrades output information according to minimum and rule to variable node, the unsuccessful check-node output information of verification be multiply by one carry out annealing in process, change next iterative decoding over to less than 1 the factor.

Its concrete steps are as follows:

Step 1: the symbolic variable s of this check-node of initialization _m=1, sign ^k(c _m)=1, minimum value min ^k(c _m)=100 and sub-minimum sub-min ^k(c _m)=100.

Step 2: the sign bit for input is done the verification computing

s _m＝s _m·z _n；

Signal L to input ^k(v _i→ c _m), i ∈ B (m) gets symbol and absolute value, then takes turns doing following symbolic operation, and minimum value, the comparison operation of sub-minimum.

sign ^k(c _m)＝sign ^k(c _m)·sign(L ^k(v _i-c _m))；

sub-min ^k(c _m)＝min{sub-min ^k(c _m)，|L ^k(v _i→c _m)|}；

Min ^k(c _m)=min{min ^k(c _m), sub-min ^k(c _m), write down corresponding min-ind (c simultaneously _m).

Step 3: successively to participating in check-node c _mVariable node upgrade output:

If i=min-ind ^k(c _m),

L then ^k(c _m→ v _i)=sign ^k(c _m) sign (L ^k(v _i→ c _m)) sub-min ^k(c _m) otherwise L ^k(c _m→ v _i)=sign ^k(c _m) sign (L ^k(v _i→ c _m)) min ^k(c _m)

If s _m=-1,

L then ^k(c _m→ v _i)=β L ^k(c _m→ v _i).

Fig. 1 (a) is a LDPC sign indicating number bipartite graph structure chart, i.e. the connection diagram of check-node and variable node, and variable node and check-node are designated as v and c respectively.(b) be variable node v _nBe connected signal with the check-node that participates in, and the likelihood ratio information of transmitting between node.(c) be check-node c _mBe connected signal with the variable node that it comprises, and the likelihood ratio information of transmitting between node.

Fig. 2 is the method flow of certain iteration of check node calculation unit.First step initialization sign (c _m) and s _mThe variable node that second step will participate in this check-node is one by one gathered input information and is done and get symbol and comparison operation, obtains the minimum value of input information absolute value, sub-minimum, the symbol product of minimum index and each input information.The 3rd step was pressed the minimum-sum algorithm rule, to the variable node of each input, upgraded the output information of feedback, according to symbol s _mValue, carry out selectively annealed to output information.

Fig. 3 is the detailed description of second step of check-node unit process.At first Shu Ru signal code and current verification formula symbol multiply each other and upgrade verification formula symbol, then will import the absolute value of data and current sub-minimum compares, if input data absolute value is less than sub-minimum then upgrade sub-minimum, at last the sub-minimum data of renewal and current minimum value data are compared, according to the input size of data, upgrade sub-minimum and minimum value respectively or remain unchanged,, then the minimum value index is designated as the node ID of present input data if the renewal of minimum value takes place.

Fig. 4 calculates in the 3rd step of check-node unit, upgrades the detailed description of output information to each variable node.At first corresponding variable node input information symbol and the total output symbol of verification formula are multiplied each other, as information symbol to this node output, if this variable node sequence number equals the minimum value index, then the absolute value of output information is a sub-minimum, and the absolute value of output information is a minimum value if fruit is not waited then.Thereafter, according to symbol s _mValue carry out selectively annealed to output information: if s _m=-1, then output information takes advantage of one to carry out annealing in process less than 1 parameter.

Fig. 5 is that the variable node unit calculates current output and upgrades the method flow of output information to check-node.At first the variable node unit is with each check-node input information addition, and whether as the output of this variable node current iteration, this output directly obtains current decoding output as hard decision, and correct with verification formula check output.If this iteration does not obtain correct decoding output, then the variable node unit deducts the input of each check-node originally respectively with total output, upgrades the output information to corresponding check-node.

Fig. 6 is under the awgn channel, length overall 8064, and the irregular LDPC codes of message length 4032,1/2 code checks is in the NMSA method, and the errored bit code check performance under the AN-MSA method is relatively.The variable node of irregular LDPC codes is distributed as λ (x)=4032x+2688x ²+ 1344x ⁸, check-node is distributed as ρ (x)=4032x ⁶Wherein, x ^D-1Preceding coefficient table indication number is the node number of d.As can be seen from the figure, the performance of AN-MSA method (annealing coefficient β=0.75) has improved about 0.1-0.2dB than NMSA method (property the taken advantage of modifying factor 0.85 of optimization), is better than improving one's methods of other.

Fig. 7: be under the awgn channel, length overall 8064, irregular LDPC codes λ (the x)=1008x+6048x of message length 6048,3/4 code checks ²+ 1008x ⁷, ρ (x)=2016x ²⁷In the NMSA method, the frame error rate performance under the AN-MSA method (annealing coefficient β=0.75) relatively.The amendment scheme that we provide makes decoding performance improve about 0.1-0.2dB than NMSA method (property the taken advantage of modifying factor 0.85 of optimization).

Claims (2)

1. low density parity check code minimum and interpretation method based on a selective annealing is characterized in that: in the minimum and iterative decoding process of low density parity check code, variable node and check-node carry out soft value amount successively to be upgraded; In iterative process, variable node is declared firmly to gross information content, judges whether success of each verification formula verification; If the verification of verification formula is success all, then iterative decoding stops automatically, otherwise when the soft value of the check-node that carries out is immediately upgraded, check-node to verification succeeds carries out soft value renewal according to original minimum and principle, finishes annealing in process and the unsuccessful check-node of verification be multiply by a factor beta less than 1 on the basis of minimum and the soft value renewal of principle.

2. low density parity check code minimum and interpretation method based on selective annealing according to claim 1, it is characterized in that: whether the soft value renewal of check node satisfies verification according to the verification formula is carried out selectively annealed processing, execution is represented based on the bipartite graph of low density parity check code, specifically is expressed as the several steps of carrying out in the following order:

Definition: the check matrix H of low density parity check code _{M * N}=[h _{M, n}], wherein, M is the line number of check matrix, N is the columns of check matrix, h _{M, n}The capable n column element of m of expression check matrix, m span are 1 to M, and the n span is 1 to N; Corresponding bipartite graph variable node and check-node set are V={v _n, n ∈ [1, N] }, C={c _m, m ∈ [1, M] }; Defined variable node v _nCheck-node set A (n)={ m, the h that participates in _{M, n}=1} is contained in check-node c _mVariable node set B (m)={ n, h _{M, n}}=1; Remove check-node c in the definition check-node set A (n) _mNode set A (n) m, remove variable node v among the defined variable node set B (m) _nNode set B (m) n, long be the coded sequence u=(u of N ₁, u ₂..., u _n..., u _N);

Step 1: initialization: two-phase offset keying BPSK modulates x _n=1-2u _n, n ∈ [1, N] obtains received signal sequence Y={y through the white Gaussian noise channel _n| y _n=x _n+ w _n, n ∈ [1, N] }, w wherein _nIt is the zero-mean variances sigma ²White Gaussian noise; Initial variable node v _n, n ∈ [1, N] is to check-node c _m, m ∈ A (n) exports side information

Initial check-node c _m, m ∈ [1, M] is to variable node v _n, n ∈ B (m) exports side information Iterations k=0;

Step 2: variable node calculates: each variable node v _nCheck-node c with all participations _m, the output side information L of m ∈ A (n) _Mn ^kAddition is always exported as the variable node of current iteration the k time

$L_n^k=y_n+\underset{m\∈A\left(n\right)}{\mathrm{\Σ}}{L}_{\mathrm{mn}}^k$

Total output information L according to each variable node of current iteration _n ^k, make symbol according to following formula and declare firmly and obtain output sequence $z^k=(z_1^k,z_2^k,...,z_n^k,...,z_N^k)$

$z_n^k=\left\{\begin{array}{ccc}0,& \mathrm{if}& L_n^k>0\\ 1,& \mathrm{if}& L_n^k\≤0\end{array}\right.;$

Each variable node v _nWith the verification formula output information L that participates in _{M ' n} ^kAddition is as variable node v _nTo check-node c _mThe output side information:

$L_{\mathrm{nm}}^k=\underset{m^{\′}\∈A\left(n\right)\backslash m}{\mathrm{\Σ}}{L}_{m^{\′}n}^k=L_n^k-L_{\mathrm{mn}}^k;$

Be different from minimum-sum algorithm, variable node is to the transmission likelihood ratio information L of check-node _Nm ^k, this information is except normal side information L _Nm ^kAlso need increase by 1 outward and declare information, also promptly along limit v than ultrahard _n→ c _mTransmit:

${\stackrel{\‾}{L}}_{\mathrm{nm}}^k=(L_{\mathrm{nm}}^k,z_n^k);$

Step 3: check node calculation preliminary treatment: each check-node s _mEarlier to side information In declare information z firmly _n ^kHandle, whether the calculation check formula is successful:

$s_m^k=\underset{n\∈B\left(m\right)}{\mathrm{\Σ}}\⊕z_n^k,m\∈[1,M]$

The operation that adds up of expression XOR; Write down the check-node sequence number that all do not satisfy verification

With season

Represent that all satisfy the check-node sequence number collection of verification; If not satisfying the node number of verification is 0, also being | U|=0, then the output result that declares firmly of step 2 will be as final decoding output

Stop the decoding of this frame simultaneously, if can not satisfy and iterations k equals maximum iteration time, then decoding failure stops decoding, otherwise continues iterative decoding, k++;

Step 4:: check node calculation: each check-node c _mVariable node output side information L according to the k-1 time iteration _{N ' m} ^K-1, calculate iteration node c the k time according to minimum and principle _mTo variable node v _nThe side information of output if check-node m belongs to set U, then carries out annealing in process, otherwise unannealed, also promptly carries out following operation:

$\left\{\left\{\begin{array}{ccc}{L}_{\mathrm{mn}}^k=\mathrm{\β}\·\left(\underset{n^{\′}\∈B\left(m\right)\backslash n}{\mathrm{\Π}}\mathrm{sign}\left(L_{n^{\′}m}^{k-1}\right)\right)\·\left(\underset{n^{\′}\∈B\left(m\right)\backslash n}{\min }\right|L_{n^{\′}m}^{k-1}\left|\right),& \mathrm{if}& m\∈U\\ L_{\mathrm{mn}}^k=\left(\underset{n^{\′}\∈B\left(m\right)\backslash n}{\mathrm{\Π}}\mathrm{sign}\left(L_{n^{\′}m}^{k-1}\right)\right)\·\left(\underset{n^{\′}\∈B\left(m\right)\backslash n}{\min }\right|L_{n^{\′}m}^{k-1}\left|\right),& \mathrm{if}& m\∈S\end{array}\right.\right.$

Wherein, β＜1st, annealing coefficient, Sign function is got in expression, Expression belongs to all x of B to subscript _nGet its minimum value; Jump to step 2 after executing.

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