CN101794728B - 制造半导体器件的方法和半导体器件 - Google Patents
制造半导体器件的方法和半导体器件 Download PDFInfo
- Publication number
- CN101794728B CN101794728B CN2009102590341A CN200910259034A CN101794728B CN 101794728 B CN101794728 B CN 101794728B CN 2009102590341 A CN2009102590341 A CN 2009102590341A CN 200910259034 A CN200910259034 A CN 200910259034A CN 101794728 B CN101794728 B CN 101794728B
- Authority
- CN
- China
- Prior art keywords
- groove
- projection
- angle
- semiconductor device
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (10)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008-318100 | 2008-12-15 | ||
JP2008318100A JP5527964B2 (ja) | 2008-12-15 | 2008-12-15 | 半導体装置の製造方法及び半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101794728A CN101794728A (zh) | 2010-08-04 |
CN101794728B true CN101794728B (zh) | 2013-05-08 |
Family
ID=42239502
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009102590341A Expired - Fee Related CN101794728B (zh) | 2008-12-15 | 2009-12-09 | 制造半导体器件的方法和半导体器件 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8377794B2 (zh) |
JP (1) | JP5527964B2 (zh) |
CN (1) | CN101794728B (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9391001B2 (en) | 2013-08-26 | 2016-07-12 | Micron Technology, Inc. | Semiconductor constructions |
KR20210092916A (ko) | 2020-01-17 | 2021-07-27 | 삼성전자주식회사 | 배선 구조물 및 이를 포함하는 수직형 메모리 장치 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6140207A (en) * | 1998-03-06 | 2000-10-31 | Lg Semicon Co., Ltd. | Method of isolating semiconductor devices |
CN1691305A (zh) * | 2004-04-19 | 2005-11-02 | 海力士半导体有限公司 | 半导体器件 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5094973A (en) * | 1987-11-23 | 1992-03-10 | Texas Instrument Incorporated | Trench pillar for wafer processing |
JPH04127148A (ja) | 1990-09-19 | 1992-04-28 | Hitachi Ltd | マスクおよびそれを用いた半導体装置の製造方法 |
JPH04264752A (ja) * | 1991-02-20 | 1992-09-21 | Fujitsu Ltd | フォトマスク及び半導体装置の製造方法 |
JPH04274344A (ja) * | 1991-03-01 | 1992-09-30 | Matsushita Electron Corp | 半導体装置の製造方法 |
JPH10308443A (ja) * | 1997-05-02 | 1998-11-17 | Nec Corp | 半導体集積回路装置 |
JP4127148B2 (ja) | 2003-07-14 | 2008-07-30 | 富士ゼロックス株式会社 | 画像読取装置 |
DE102005059034B4 (de) * | 2005-12-10 | 2007-10-11 | X-Fab Semiconductor Foundries Ag | SOI-Isolationsgrabenstrukturen |
DE102005059035B4 (de) * | 2005-12-10 | 2007-11-08 | X-Fab Semiconductor Foundries Ag | Isolationsgrabenstrukturen für hohe Spannungen |
JP2008130826A (ja) * | 2006-11-21 | 2008-06-05 | Rohm Co Ltd | 半導体装置および半導体装置の製造方法 |
DE102008029235B3 (de) * | 2008-06-19 | 2009-10-08 | X-Fab Semiconductor Foundries Ag | Kreuzungen von Isolationsgräben der SOI-Technologie |
-
2008
- 2008-12-15 JP JP2008318100A patent/JP5527964B2/ja not_active Expired - Fee Related
-
2009
- 2009-12-04 US US12/591,932 patent/US8377794B2/en not_active Expired - Fee Related
- 2009-12-09 CN CN2009102590341A patent/CN101794728B/zh not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6140207A (en) * | 1998-03-06 | 2000-10-31 | Lg Semicon Co., Ltd. | Method of isolating semiconductor devices |
CN1691305A (zh) * | 2004-04-19 | 2005-11-02 | 海力士半导体有限公司 | 半导体器件 |
Non-Patent Citations (1)
Title |
---|
JP平4-127148A 1992.04.28 |
Also Published As
Publication number | Publication date |
---|---|
JP5527964B2 (ja) | 2014-06-25 |
US20100148299A1 (en) | 2010-06-17 |
JP2010141231A (ja) | 2010-06-24 |
CN101794728A (zh) | 2010-08-04 |
US8377794B2 (en) | 2013-02-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7375029B2 (en) | Method for fabricating contact holes in a semiconductor body and a semiconductor structure | |
US8471305B2 (en) | Semiconductor device and method of manufacturing the same | |
CN101335231B (zh) | 半导体器件的制造方法 | |
CN100502012C (zh) | 具有欧米加栅的半导体器件及制造半导体器件的方法 | |
US11830911B2 (en) | Semiconductor device including isolation regions | |
CN101794728B (zh) | 制造半导体器件的方法和半导体器件 | |
KR101917605B1 (ko) | 반도체 장치 및 그 제조 방법 | |
KR101959388B1 (ko) | 반도체 소자 및 그 제조 방법 | |
CN111627820A (zh) | 屏蔽栅场效应晶体管及其制备方法 | |
CN103633094A (zh) | 存储器制造工艺及以其制造的存储器结构 | |
KR20060112853A (ko) | 반도체 소자의 형성방법 | |
US20090294893A1 (en) | Isolation trench intersection structure with reduced gap width | |
US8530999B2 (en) | Semiconductor component with isolation trench intersections | |
KR100281658B1 (ko) | 반도체 장치의 제조 방법 | |
JP2014056867A (ja) | 半導体装置の製造方法 | |
CN112309983A (zh) | 动态随机存取存储器及其制造方法 | |
KR20140141347A (ko) | 반도체 장치 및 그의 제조 방법 | |
CN101656228A (zh) | 半导体结构与绝缘结构的形成方法 | |
CN103579087B (zh) | 一种三维集成电路结构的制作方法和三维集成电路结构 | |
CN102222617B (zh) | 高密度沟槽式功率半导体结构的制造方法 | |
KR101097473B1 (ko) | 반도체 장치의 수직 채널 트랜지스터 형성 방법 | |
WO2021215503A1 (ja) | 半導体装置及び半導体装置の製造方法 | |
KR102547112B1 (ko) | 반도체 소자의 제조 방법 | |
TWI509368B (zh) | 於基底中形成圖案的方法 | |
KR100929643B1 (ko) | 반도체 소자 및 그의 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: RENESAS ELECTRONICS CORPORATION Free format text: FORMER OWNER: NEC CORP. Effective date: 20101110 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20101110 Address after: Kanagawa, Japan Applicant after: Renesas Electronics Corporation Address before: Kanagawa, Japan Applicant before: NEC Corp. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130508 Termination date: 20161209 |