CN101718931A - Pixel array - Google Patents
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- CN101718931A CN101718931A CN200910252933A CN200910252933A CN101718931A CN 101718931 A CN101718931 A CN 101718931A CN 200910252933 A CN200910252933 A CN 200910252933A CN 200910252933 A CN200910252933 A CN 200910252933A CN 101718931 A CN101718931 A CN 101718931A
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Abstract
The invention provides a pixel array comprising a plurality of pixel rows and a plurality of data wires, wherein each pixel row comprises a first scanning line, a second scanning line, a plurality of first sub-pixels and a plurality of second sub-pixels; the first sub-pixels and the second sub-pixels are alternately distributed between the first scanning line and the second scanning line; the data wires, the first scanning line and the second scanning line are arranged in a staggered manner; and part of the first sub-pixels and part of the second sub-pixels electrically connected with the same data wire are located on two opposite sides of the data wire respectively. In the nth pixel row, the sum of C1 and C2 is substantially equal to that of C1' and C2', wherein C1 represents the coupling capacitance of each first sub-pixel and the first scanning line, and C2 represents the coupling capacitance of each second sub-pixel and the second scanning line; and C1' represents the coupling capacitance of each second sub-pixel and the first scanning line in the (n+1)th pixel row, and C2' represents the coupling capacitance of each second sub-pixel and the second scanning line.
Description
Technical field
The present invention relates to a kind of pel array, and relate in particular to a kind of data driving chip reduce by half (HalfSource Driver, HSD) pel array of framework.
Background technology
Generally speaking, be made of a display panel and a plurality of chip for driving (DriverIC), wherein display panel has pel array, and the pixel of pel array is to drive by corresponding scanning line and corresponding data line.In order to make flat-panel screens more popular, dealer's operation that all reduces cost in high gear, a kind of in recent years data driving chip (Half Source Driver that reduces by half, HSD) architecture design is suggested, and it mainly is to utilize layout on the pel array to reduce the use amount of data driving chip.Specifically, in the pel array of HSD framework, two adjacent sub-pixels (sub-pixel) are to share same data line, thereby get so that the total number of data line reduces by half, but the total number of sweep trace then doubles.Because the HSD framework can be so that the total number of data line reduces by half, therefore, the quantity of required source electrode driver (source drivers) also reduces by half, but the quantity of required gate drivers (gate drivers) then doubles.Because the cost of gate drivers is lower than the cost of source electrode driver, therefore, generally speaking, the manufacturing cost of flat-panel screens still can be lowered effectively.In the design of HSD, because the total number of sweep trace can double, therefore, the duration of charging of each pixel reduces by half, the deficiency of time that causes data to write, and then cause the display quality of flat-panel screens to descend.In order to improve aforesaid problem, it is the practice that present prior art regular meeting adopts that sweep trace is carried out preliminary filling (pre-charge), yet this practice has still faced problems, and details are as follows now.
Figure 1A is the synoptic diagram of existing pel array, and Figure 1B is in order to drive the signal timing diagram of the pel array among Figure 1A.Please refer to Figure 1A, existing pel array 100 comprises a plurality of pixel column 100a, 100b and many data lines 110.Each pixel column 100a (or pixel column 100b) comprises one first sweep trace 120a, one second sweep trace 120b, a plurality of first sub-pixel 130a and a plurality of second sub-pixel 130b.Wherein, the data line 110 and the first sweep trace 120a and the second sweep trace 120b are staggered, the part first sub-pixel 130a that electrically connects with same data line 110 is positioned at the right side of data line 110, and is positioned at the left side of data line 110 with the part second sub-pixel 130b that same data line 110 electrically connects.In addition, the first sub-pixel 130a and the second sub-pixel 130b alternately are arranged between the first sweep trace 120a and the second sweep trace 120b, and the first sub-pixel 130a and the first sweep trace 120a electrically connect, and the second sub-pixel 130b and the second sweep trace 120b electrically connect.
Shown in Figure 1B, G1 is the sweep signal that inputs to the first sweep trace 120a of pixel column 100a, G2 is the sweep signal that inputs to the second sweep trace 120b of pixel column 100a, G3 is the sweep signal that inputs to the first sweep trace 120a of pixel column 100b, and D is the data-signal that inputs to data line 110, P1 is the signal of video signal that inputs to sub-pixel 130a, and P2 is the signal of video signal that inputs to sub-pixel 130b.When the first sweep trace 120a of pel array 100 and the second sweep trace 120b are adopted the type of drive of preliminary filling (pre-charge), the voltage of the first sub-pixel 130a can be subjected to the influence of feed-trough voltage (the feed through voltage) effect that the first sweep trace 120a and the second sweep trace 120b caused when closing, and the pressure drop that produces (2 * Δ H) please refer to the signal of video signal P1 among Figure 1B.The voltage of the second sub-pixel 130b but only can be subjected to the influence of the feed-trough voltage effect that the second sweep trace 120b caused when closing, and the pressure drop that produces a Δ H please refer to the signal of video signal P2 among Figure 1B.Wherein, the pressure drop of (2 * Δ H) obviously is not equal to the pressure drop of Δ H.Thus, the first sub-pixel 130a and the second sub-pixel 130b then the display defect that bright concealed wire replaces can occur when showing, and then influence the display quality of flat-panel screens.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of pel array, significantly to improve the display defect of bright concealed wire in the display frame.
The present invention proposes a kind of pel array, and it comprises a plurality of pixel columns and many data lines.Each pixel column comprises one first sweep trace, one second sweep trace, a plurality of first sub-pixel and a plurality of second sub-pixel.First sub-pixel and second sub-pixel alternately are arranged between first sweep trace and second sweep trace.First sub-pixel and first sweep trace electrically connect, and second sub-pixel and second sweep trace electrically connect.The data line and first sweep trace and second sweep trace are staggered, wherein part first sub-pixel that electrically connects with same data line and part second sub-pixel two offsides that lay respectively at this data line.In the n pixel column, the coupling capacitance of each first sub-pixel and first sweep trace is C1.The coupling capacitance of each first sub-pixel and second sweep trace is C2.The coupling capacitance of each second sub-pixel and second sweep trace is C2 '.The coupling capacitance of first sweep trace in each second sub-pixel and (n+1) pixel column is C1 ', and (C1+C2) equal in fact (C1 '+C2 ').
In one embodiment of this invention, first sweep trace and second sweep trace in the above-mentioned pixel column alternately arranged.
In one embodiment of this invention, each above-mentioned first sub-pixel comprises first pixel electrode that one first active member and one and first active member electrically connect.Each second sub-pixel comprises second pixel electrode that one second active member and one and second active member electrically connect.
In one embodiment of this invention, above-mentioned in the n pixel column, coupling capacitance C1 is formed by each first pixel electrode and first sweep trace.Coupling capacitance C2 is formed by each first pixel electrode and second sweep trace.Coupling capacitance C2 ' is formed by each second pixel electrode and second sweep trace.Coupling capacitance C1 ' is formed by first sweep trace in each second pixel electrode and (n+1) pixel column.
In one embodiment of this invention, above-mentioned in the n pixel column, the coupling area of each first pixel electrode and first sweep trace is A1.The coupling area of each first pixel electrode and second sweep trace is A2.The coupling area of each second pixel electrode and second sweep trace is A2 '.The coupling area of first sweep trace in each second pixel electrode and (n+1) pixel column is A1 ', and (A1+A2) equal in fact (A1 '+A2 ').
In one embodiment of this invention, above-mentioned in the n pixel column, wherein A1 ' is 0, and (A1+A2) equals A2 ' in fact.
In one embodiment of this invention, each above-mentioned first sub-pixel comprises first pixel electrode of one first active member, the electric connection of one and first active member and first coupling electrode that one and first pixel electrode electrically connects.Each second sub-pixel comprises second pixel electrode of one second active member, the electric connection of one and second active member and second coupling electrode that one and second pixel electrode electrically connects.
In one embodiment of this invention, above-mentioned in the n pixel column, coupling capacitance C1 is formed by each first coupling electrode and first sweep trace.Coupling capacitance C2 is formed by each first pixel electrode and second sweep trace.Coupling capacitance C2 ' is formed by each second coupling electrode and second sweep trace.Coupling capacitance C1 ' is formed by first sweep trace in each second coupling electrode and (n+1) pixel column.
In one embodiment of this invention, above-mentioned in the n pixel column, the coupling area of each first coupling electrode and first sweep trace is A1.The coupling area of each first pixel electrode and second sweep trace is A2.The coupling area of each second coupling electrode and second sweep trace is A2 '.The coupling area of first sweep trace in each second coupling electrode and (n+1) pixel column is A1 ', and (A1+A2) equal in fact (A1 '+A2 ').
In one embodiment of this invention, above-mentioned in the n pixel column, coupling capacitance C1 is formed by each first coupling electrode and first sweep trace.Coupling capacitance C2 is formed by each first coupling electrode and second sweep trace.Coupling capacitance C2 ' is formed by each second coupling electrode and second sweep trace.Coupling capacitance is formed by first sweep trace in each second coupling electrode and (n+1) pixel column by C1 '.
In one embodiment of this invention, above-mentioned first coupling electrode extends the below of first pixel electrode.
In one embodiment of this invention, first sub-pixel that above-mentioned and same data line electrically connects is in alignment with each other on line direction, and is in alignment with each other on line direction with second sub-pixel that same data line electrically connects.
In one embodiment of this invention, above-mentioned pel array also comprises many common lines.Each common line is disposed at respectively between first sweep trace and second sweep trace in each pixel column.
The present invention also proposes a kind of pel array, and it comprises a plurality of pixel columns and a plurality of data line.Each pixel column comprises one first sweep trace, one second sweep trace, a plurality of first sub-pixel and a plurality of second sub-pixel.First sub-pixel and second sub-pixel alternately are arranged between first sweep trace and second sweep trace.First sub-pixel and first sweep trace electrically connect, and second sub-pixel and second sweep trace electrically connect.The data line and first sweep trace and second sweep trace are staggered, wherein lay respectively at two offsides of bar data line with part second sub-pixel with part first sub-pixel of same data line electric connection.In the n pixel column, each first sub-pixel and first sweep trace and second sweep trace overlap (overlapped), and each second sub-pixel and second sweep trace overlap.
In one embodiment of this invention, each second sub-pixel in the above-mentioned n pixel column more with (n+1) pixel column in first sweep trace overlap.
Based on above-mentioned, the design of pel array of the present invention is to make in the n pixel column, and the coupling capacitance of first sub-pixel and first sweep trace and second sweep trace equals the coupling capacitance of first sweep trace in second sub-pixel and second sweep trace and (n+1) pixel column in fact.So, when sweep trace is adopted the type of drive of preliminary filling, it is identical that the voltage of first sub-pixel and the pressure drop that the voltage of second sub-pixel is produced under the influence of the feed-trough voltage effect that is subjected to come down to, and therefore can effectively improve the display defect of existing bright concealed wire.Therefore, when pel array of the present invention is applied to display, help to improve the display quality of display.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and cooperate appended graphic being described in detail below.
Description of drawings
Figure 1A is the synoptic diagram of existing pel array;
Figure 1B is in order to drive the signal timing diagram of the pel array among Figure 1A;
Fig. 2 A is the synoptic diagram of a kind of pel array of the first embodiment of the present invention;
Fig. 2 B is in order to drive the signal timing diagram of the pel array among Fig. 2 A;
Fig. 3 A is the synoptic diagram of a kind of pel array of the second embodiment of the present invention;
Fig. 3 B is in order to drive the signal timing diagram of the pel array among Fig. 3 A;
Fig. 4 is the synoptic diagram of a kind of pel array of the third embodiment of the present invention;
Fig. 5 is the synoptic diagram of a kind of pel array of the fourth embodiment of the present invention.
Wherein, Reference numeral:
100: pel array
100a, 100b: pixel column
110: data line
120a, 120b: sweep trace
130a, 130b: sub-pixel
200a～200d: pel array
300a, 300b: first pixel column
310: the first sweep traces
320: the second sweep traces
330a～300d: first sub-pixel
332: the first active members
334a～334d: first pixel electrode
336c, 336d: first coupling electrode
340a～340d: second sub-pixel
342: the second active members
344a～344d: second pixel electrode
346c, 346d: second coupling electrode
400: data line
500: common line
C1, C1 ', C2, C2 ': coupling capacitance
A1, A1 ', A2, A2 ': coupling area
G1, G1 ', G2, G2 ', G3, G3 ': sweep signal
D, D ': data-signal
P1, P1 ', P1 ", P2, P2 ', P2 ": signal of video signal
Embodiment
Fig. 2 A is the synoptic diagram of a kind of pel array of the first embodiment of the present invention.Please refer to Fig. 2 A, pel array 200a comprises a plurality of pixel column 300a, 300b and many data lines 400.Specifically, pixel column 300a (or pixel column 300b) comprises one first sweep trace 310, one second sweep trace 320, a plurality of first sub-pixel 330a and a plurality of second sub-pixel 340a.Wherein, first sweep trace 310 and second sweep trace 320 among first sweep trace 310 among the pixel column 330a and second sweep trace 320 and the pixel column 330b presents alternately arrangement.The first sub-pixel 330a and the second sub-pixel 340a alternately are arranged between first sweep trace 310 and second sweep trace 320, and wherein the first sub-pixel 330a and first sweep trace 310 electrically connect, and the second sub-pixel 340a and second sweep trace 320 electrically connect.
The data line 400 and first sweep trace 310 and second sweep trace 320 are staggered, wherein part first sub-pixel 330a that electrically connects with same data line 400 and the part second sub-pixel 340a two offsides that lay respectively at this data line 400.Particularly, the first sub-pixel 330a that electrically connects with data line 400 is in alignment with each other on line direction, and the second sub-pixel 340a of bar data line 400 electric connections is in alignment with each other on line direction therewith.From Fig. 2 A as can be known, the part first sub-pixel 330a that electrically connects with same data line 400 is positioned at the right side of data line 400, and the part second sub-pixel 340a that electrically connects with same data line 400 then is positioned at the left side of data line 400.In addition, the pel array 200a of present embodiment also comprises many common lines 500, wherein common line 500 is disposed at respectively between first sweep trace 310 and second sweep trace 320 among the pixel column 300a (or pixel column 300b), for example, many common line 500 cardinal principles are parallel with first sweep trace 310 or second sweep trace 320.
Shown in Fig. 2 A, in the n pixel column, each the first sub-pixel 330a and first sweep trace 310 and second sweep trace 320 overlap, and first sweep trace 310 in each second sub-pixel 340a and second sweep trace 320 and (n+1) pixel column overlaps.Specifically, in the n pixel column, the coupling capacitance of each the first sub-pixel 330a and first sweep trace 310 is C1, the coupling capacitance of each the first sub-pixel 330a and second sweep trace 320 is C2, the coupling capacitance of each the second sub-pixel 340a and second sweep trace 320 is C2 ', and the coupling capacitance of first sweep trace 310 in each second sub-pixel 340a and (n+1) pixel column is C1 ', and preferably, then (C1+C2) equals (C1 '+C2 ') in fact.
Specifically, the first sub-pixel 330a comprises the first pixel electrode 334a that one first active member 332 and one and first active member 332 electrically connect.The second sub-pixel 340a comprises the second pixel electrode 344a that one second active member 342 and one and second active member 342 electrically connect.In the n pixel column, for example be among the pixel column 300a, the coupling area of the first pixel electrode 334a and first sweep trace 310 is A1, the coupling area of the first pixel electrode 334a and second sweep trace 320 is A2, the coupling area of the second pixel electrode 344a and second sweep trace 320 is A2 ', and the coupling area of first sweep trace 310 among the second pixel electrode 344a and the pixel column 300b is A1 '.When the medium thickness (not illustrating) between the medium thickness (not illustrating) between the medium thickness (not illustrating) between the first pixel electrode 334a and first sweep trace 310, the first pixel electrode 334a and second sweep trace 320, the second pixel electrode 344a and second sweep trace 320 and the medium thickness (not illustrating) between first sweep trace 310 among the second pixel electrode 344a and the pixel column 300b when keeping certain value, preferably, then (A1+A2) equals (A1 '+A2 ') in fact.
On the other hand, in pixel column 300a, coupling capacitance C1 is formed by the first pixel electrode 334a and first sweep trace 310.Coupling capacitance C2 is formed by the first pixel electrode 334a and second sweep trace 320.Coupling capacitance C2 ' is formed by the second pixel electrode 344a and second sweep trace 320.Coupling capacitance C1 ' is formed by first sweep trace 310 among second pixel electrode 320 and the pixel column 300b.Owing to (C1+C2) equal in fact (C1 '+C2 '), promptly the first sub-pixel 330a is identical in fact with the second sub-pixel 340a gate-to-drain stray capacitance for meaning, therefore, help to improve the display defect of the bright concealed wire that is produced in the existing display frame, make the flat-panel screens of using pel array 200a have good display quality.
Further, Fig. 2 B is in order to the signal timing diagram of the pel array that drives Fig. 2 A, please also refer to Fig. 2 A and Fig. 2 B.In the present embodiment, G1 ' is for inputing to the sweep signal of first sweep trace 310 among the pixel column 300a, G2 ' is for inputing to the sweep signal of second sweep trace 320 among the pixel column 300a, G3 ' is for inputing to the sweep signal of first sweep trace 310 among the pixel column 300b, D ' is for inputing to the data-signal of data line 400, P1 ' is the signal of video signal that inputs to the first sub-pixel 330a among the pixel column 300a, and P2 ' is for inputing to the signal of video signal of the second sub-pixel 340a among the pixel column 300a.When first sweep trace 310 of pel array 200a and second sweep trace 320 are adopted the type of drive of preliminary fillings (pre-charge), please refer to signal of video signal P1 ' and signal of video signal P2 ' among Fig. 2 B, the voltage of the first sub-pixel 330a can be subjected to the influence of feed-trough voltage (the feed through voltage) effect that first sweep trace 310 among the pixel column 300a and second sweep trace 320 caused when closing, and the pressure drop that produces (2 * Δ H).The voltage of the second sub-pixel 340a can be subjected to the influence of the feed-trough voltage effect that second sweep trace 320 among the pixel column 300a and first sweep trace 310 among the pixel column 300b caused when closing, and the pressure drop that produces (2 * Δ H), wherein the suffered pressure drop of the first sub-pixel 330a and the second sub-pixel 340a is identical in fact.That is to say that the voltage of the voltage of the first sub-pixel 330a and the second sub-pixel 340a such as all is subjected at the influence of the feed-trough voltage effect of value, thereby under same share voltage, the first sub-pixel 330a has identical bias voltage with the second sub-pixel 340a.Thus, the first sub-pixel 330a and the second sub-pixel 340a just can not present the display defect of bright concealed wire when picture shows.In other words, the design of the pel array 200a of present embodiment can effectively improve the display defect of existing bright concealed wire.Therefore, when the pel array 200a of present embodiment is applied to display (not illustrating), help to improve the display quality of display.
Below the design of pel array 200b～200d will be described with a plurality of different embodiment.In this mandatory declaration is that following embodiment continues to use the element numbers and the partial content of previous embodiment, wherein adopts identical label to represent identical or approximate element, and has omitted the explanation of constructed content.Explanation about clipped can be with reference to previous embodiment, and following embodiment no longer repeats to give unnecessary details.
Fig. 3 A is the synoptic diagram of a kind of pel array of the second embodiment of the present invention, and Fig. 3 B is in order to drive the signal timing diagram of the pel array among Fig. 3 A.Please earlier simultaneously with reference to figure 2A and Fig. 3 A, the pel array 200b of present embodiment is similar to the pel array 200a of Fig. 2 A, so part is continued to use the label of Fig. 2 A and Fig. 2 B, but the two main difference part is: in the n pixel column, first sweep trace 310 in the second sub-pixel 340b and (n+1) pixel column does not overlap, meaning is that A1 ' is 0, therefore, (A1+A2) equals A2 ' in fact.
Shown in Fig. 3 A and Fig. 3 B, in the present embodiment, G1 ' is for inputing to the sweep signal of first sweep trace 310 among the pixel column 300a, G2 ' is for inputing to the sweep signal of second sweep trace 320 among the pixel column 300a, G3 ' is for inputing to the sweep signal of first sweep trace 310 among the pixel column 300b, D ' is for inputing to the data-signal of data line 400, P1 " for inputing to the signal of video signal of the first sub-pixel 330b among the pixel column 300a, and P2 " import the signal of video signal of the second sub-pixel 340b among the pixel column 300a most.When first sweep trace 310 of pel array 200b and second sweep trace 320 are adopted the type of drive of preliminary fillings, please refer to the signal of video signal P1 among Fig. 3 B " and signal of video signal P2 ", the voltage of the first sub-pixel 330b can be subjected to the influence of the feed-trough voltage effect that first sweep trace 310 among the pixel column 300a and second sweep trace 320 caused when closing, and the pressure drop that produces (2 * Δ H).The voltage of the second sub-pixel 340b can be subjected to the influence of the feed-trough voltage effect that second sweep trace 320 among the pixel column 300a caused when closing, and the pressure drop that produces a Δ H ', wherein the pressure drop of (2 * Δ H) in fact obviously equals the pressure drop of Δ H '.That is to say, though the voltage of the first sub-pixel 330b and the second sub-pixel 340b voltage are subjected to the influence of different feed-trough voltage effects, but the pressure drop that is produced equates in fact, thereby under same share voltage, the first sub-pixel 330b still has identical bias voltage with the second sub-pixel 340b.Thus, the first sub-pixel 330b and the second sub-pixel 340b just can not present the display defect of bright concealed wire when showing.In other words, the design of the pel array 200b of present embodiment also can effectively improve the display defect of existing bright concealed wire, and when being applied to display (not illustrating), helps to improve the display quality of display.
Fig. 4 is the synoptic diagram of a kind of pel array of the third embodiment of the present invention.Please earlier simultaneously with reference to figure 2A and Fig. 4, the pel array 200c of present embodiment is similar to the pel array 200a of Fig. 2 A, so part is continued to use the label of Fig. 2 A, both difference is: the first sub-pixel 330c also comprises one first coupling electrode 336c, and the second sub-pixel 340c also comprises one second coupling electrode 346c.Specifically, in the pel array 200c of present embodiment, the first sub-pixel 330c comprises first active member 332, the first pixel electrode 334c that electrically connects with first active member 332 and the first coupling electrode 336c that electrically connects with the first pixel electrode 334c.The second sub-pixel 340c comprises second active member 342, the second pixel electrode 344c that electrically connects with second active member 342 and the second coupling electrode 346c that electrically connects with the second pixel electrode 344c.
As shown in Figure 4, in pixel column 300a, coupling capacitance C1 is formed by the first coupling electrode 336c and first sweep trace 310, coupling capacitance C2 is formed by the first pixel electrode 334c and second sweep trace 320, coupling capacitance C2 ' is formed by the second coupling electrode 346c and second sweep trace 320, and coupling capacitance C1 ' is formed by first sweep trace 310 among the second coupling electrode 346c and the pixel column 300b, and preferably, then (C1+C2) equals (C1 '+C2 ') in fact.Owing to (C1+C2) equal in fact (C1 '+C2 '), promptly the first sub-pixel 330c is identical with the gate-to-drain stray capacitance of the second sub-pixel 340c for meaning, therefore, can help to improve the display defect of existing bright concealed wire, make pel array 200c in procedure for displaying, have good display quality.
On the other hand, in pixel column 300a, the coupling area of the first coupling electrode 336c and first sweep trace 310 is A1, the coupling area of the first pixel electrode 334c and second sweep trace 320 is A2, the coupling area of the second coupling electrode 346c and second sweep trace 320 is A2 ', and the coupling area of first sweep trace 310 among the second coupling electrode 346c and the pixel column 300b is A1 '.When the medium thickness (not illustrating) between the medium thickness (not illustrating) between the medium thickness (not illustrating) between the first coupling electrode 336c and first sweep trace 310, the first pixel electrode 334c and second sweep trace 320, the second coupling electrode 346c and second sweep trace 320 and the medium thickness (not illustrating) between first sweep trace 310 among the second coupling electrode 346c and the pixel column 300b when keeping certain value, preferably, then (A1+A2) equals (A1 '+A2 ') in fact.
In the present embodiment, the first coupling electrode 336c can be formed by different retes with the first pixel electrode 334c, the first coupling electrode 336c can form with identical rete with the drain electrode of first active member 332 for example, but because the first coupling electrode 336c and the first pixel electrode 334c electrically connect, meaning i.e. the first coupling electrode 336c and the first pixel electrode 334c equipotential, therefore the first coupling electrode 336c can be considered as the some of the first pixel electrode 334c.In like manner, though the second coupling electrode 346c can be formed by different retes with the second pixel electrode 344c, the second coupling electrode 346c can form with identical rete with the drain electrode of second active member 342 for example, but because the second coupling electrode 346c and the second pixel electrode 344c electrically connect, meaning i.e. the second coupling electrode 346c and the second pixel electrode 344c equipotential, therefore, the second coupling electrode 346c can be considered as the some of the second pixel electrode 344c.So, when first sweep trace 310 of pel array 200c and second sweep trace 320 are adopted the type of drive of preliminary fillings, the voltage of the first sub-pixel 330c can be subjected to the influence of the feed-trough voltage effect that first sweep trace 310 among the pixel column 300a and second sweep trace 320 caused when closing, and the voltage of the second sub-pixel 340c can be subjected to the influence of the feed-trough voltage effect that second sweep trace 320 among the pixel column 300a and first sweep trace 310 among the pixel column 300b caused when closing.Wherein, the influence of the feed-trough voltage effect of values such as the voltage of the voltage of the first sub-pixel 330c and the second sub-pixel 340c is all suffered, thereby under same share voltage, the first sub-pixel 330c has identical bias voltage with the second sub-pixel 340c, can effectively improve the display defect of existing bright concealed wire.
Fig. 5 is the synoptic diagram of a kind of pel array of the 4th enforcement of the present invention.Please earlier simultaneously with reference to figure 4 and Fig. 5, the pel array 200d of present embodiment is similar to the pel array 200c of Fig. 4, so part is continued to use the label of Fig. 4, both difference is: coupling capacitance C2 is that second sweep trace 320 by the first coupling electrode 336d and pixel column 300a is formed, and the first coupling electrode 336d extends the below of the first pixel electrode 334d, and the first coupling electrode 336d can form with identical rete with the drain electrode of first active member 332 for example.Specifically, in pixel column 300a, the coupling area of the first coupling electrode 336d and first sweep trace 310 is A1, the coupling area of the first coupling electrode 336d and second sweep trace 320 is A2, the coupling area of the second coupling electrode 346d and second sweep trace 320 is A2 ', and the coupling area of first sweep trace 310 among the second coupling electrode 346d and the pixel column 300b is A1 ', and preferably, then (A1+A2) equals (A1 '+A2 ') in fact.That is to say that the coupling area of the first coupling electrode 336d and first sweep trace 310 and second sweep trace 320 equals the coupling area of first sweep trace 310 in the second coupling electrode 346d and second sweep trace 320 and the next column pixel column in fact.
Certainly, above-mentioned described multiple pel array 200a～200d only is the usefulness that illustrates as an example, and those skilled in the art can select aforementioned components for use and variation voluntarily according to actual demand, to reach required technique effect with reference to the explanation of the foregoing description.If for example during above-mentioned medium thickness heterogeneity, those skilled in the art can be according to suitable each relative positions of adjustment of spirit of the present invention or area size or the like.So long as in the n pixel column; the coupling capacitance of first sub-pixel and first sweep trace and second sweep trace equals the coupling capacitance of first sweep trace in second sub-pixel and second sweep trace and (n+1) pixel column in fact; all belong to the adoptable technical scheme of the present invention, do not break away from the scope of institute of the present invention desire protection.
In sum, the design of pel array of the present invention is when sweep trace is adopted the type of drive of preliminary filling, the voltage of first sub-pixel is identical with the bias voltage that the voltage of second sub-pixel is produced under the influence of the feed-trough voltage effect that is subjected to, thereby under same share voltage, first sub-pixel is identical with the bias voltage of second sub-pixel.Thus, can effectively improve the display defect of existing bright concealed wire.Therefore, when pel array of the present invention is applied to display, help to improve the display quality of display.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (12)
1. a pel array is characterized in that, comprising:
A plurality of pixel columns, respectively this pixel column comprises:
One first sweep trace;
One second sweep trace;
A plurality of first sub-pixels; And
A plurality of second sub-pixels, those first sub-pixels and those second sub-pixels alternately are arranged between this first sweep trace and this second sweep trace, those first sub-pixels and this first sweep trace electrically connect, and those second sub-pixels and this second sweep trace electrically connect; And
Many data lines, staggered with those first sweep traces and those second sweep traces, those first sub-pixels of part that electrically connect with same data line and those second sub-pixels of part two offsides of laying respectively at this data line wherein; Wherein
In the n pixel column, respectively the coupling capacitance of this first sub-pixel and this first sweep trace is C1, respectively the coupling capacitance of this first sub-pixel and this second sweep trace is C2, respectively the coupling capacitance of this second sub-pixel and this second sweep trace is C2 ', respectively the coupling capacitance of this first sweep trace in this second sub-pixel and (n+1) pixel column is C1 ', and (C1+C2) equal (C1 '+C2 ').
2. pel array according to claim 1 is characterized in that, those first sweep traces and those second sweep traces in those pixel columns are alternately arranged.
3. pel array according to claim 1, it is characterized in that, respectively this first sub-pixel comprises one first active member and one and first pixel electrode that electrically connects of this first active member, respectively this second sub-pixel comprise one second active member and one with second pixel electrode of this second active member electric connection.
4. pel array according to claim 3, it is characterized in that, in this n pixel column, this coupling capacitance C1 is by respectively this first pixel electrode and this first sweep trace are formed, this coupling capacitance C2 is by respectively this first pixel electrode and this second sweep trace are formed, this coupling capacitance C2 ' is formed by respectively this second pixel electrode and this second sweep trace, and this coupling capacitance C1 ' is formed by this first sweep trace in respectively this second pixel electrode and this (n+1) pixel column.
5. pel array according to claim 3, it is characterized in that, in this n pixel column, respectively the coupling area of this first pixel electrode and this first sweep trace is A1, respectively the coupling area of this first pixel electrode and this second sweep trace is A2, respectively the coupling area of this second pixel electrode and this second sweep trace is A2 ', and respectively the coupling area of this first sweep trace in this second pixel electrode and this (n+1) pixel column is A1 ', and (A1+A2) equal (A1 '+A2 ').
6. pel array according to claim 5 is characterized in that, in this n pixel column, wherein A1 ' is 0, (A1+A2) equals A2 '.
7. pel array according to claim 1, it is characterized in that, respectively this first sub-pixel comprises one first active member, one and first coupling electrode that electrically connects with this first pixel electrode of first pixel electrode that electrically connects of this first active member and, respectively this second sub-pixel comprise one second active member, one with second pixel electrode of this second active member electric connection and one and second coupling electrode of this second pixel electrode electric connection.
8. pel array according to claim 7, it is characterized in that, in this n pixel column, this coupling capacitance C1 is by respectively this first coupling electrode and this first sweep trace are formed, this coupling capacitance C2 is by respectively this first pixel electrode and this second sweep trace are formed, this coupling capacitance C2 ' is formed by respectively this second coupling electrode and this second sweep trace, and this coupling capacitance C1 ' is formed by this first sweep trace in respectively this second coupling electrode and (n+1) pixel column.
9. pel array according to claim 7, it is characterized in that, in this n pixel column, respectively the coupling area of this first coupling electrode and this first sweep trace is A1, respectively the coupling area of this first pixel electrode and this second sweep trace is A2, respectively the coupling area of this second coupling electrode and this second sweep trace is A2 ', and respectively the coupling area of this first sweep trace in this second coupling electrode and this (n+1) pixel column is A1 ', and (A1+A2) equal (A1 '+A2 ').
10. pel array according to claim 7, it is characterized in that, in this n pixel column, this coupling capacitance C1 is by respectively this first coupling electrode and this first sweep trace are formed, this coupling capacitance C2 is by respectively this first coupling electrode and this second sweep trace are formed, this coupling capacitance C2 ' is by respectively this second coupling electrode and this second sweep trace are formed, this coupling capacitance is formed by this first sweep trace in respectively this second coupling electrode and (n+1) pixel column by C1 ', and wherein this first coupling electrode extends the below of this first pixel electrode.
11. pel array according to claim 1 is characterized in that, should be in alignment with each other on line direction with first sub-pixel that same data line electrically connects, second sub-pixel that electrically connects with same data line is in alignment with each other on line direction.
12. a pel array is characterized in that, comprising:
A plurality of pixel columns, respectively this pixel column comprises:
One first sweep trace;
One second sweep trace;
A plurality of first sub-pixels; And
A plurality of second sub-pixels, those first sub-pixels and those second sub-pixels alternately are arranged between this first sweep trace and this second sweep trace, those first sub-pixels and this first sweep trace electrically connect, and those second sub-pixels and this second sweep trace electrically connect; And
Many data lines interlock with those first sweep traces and those second sweep traces, wherein lay respectively at two offsides of this data line with those second sub-pixels of part with those first sub-pixels of part of same data line electric connection; Wherein
In the n pixel column, respectively this first sub-pixel and this first sweep trace and this second sweep trace overlap, respectively this second sub-pixel and this second sweep trace overlap, wherein respectively this second sub-pixel in this n pixel column more with (n+1) pixel column in this first sweep trace overlap.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2009102529339A CN101718931B (en) | 2009-12-04 | 2009-12-04 | Pixel array |
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| CN2009102529339A CN101718931B (en) | 2009-12-04 | 2009-12-04 | Pixel array |
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| CN101718931B CN101718931B (en) | 2011-06-15 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101963730A (en) * | 2010-08-17 | 2011-02-02 | 友达光电股份有限公司 | Liquid crystal display panel, pixel array substrate and pixel structure |
| US8916879B2 (en) | 2013-01-30 | 2014-12-23 | Au Optronics Corp. | Pixel unit and pixel array |
| CN105575322A (en) * | 2015-12-17 | 2016-05-11 | 深圳市华星光电技术有限公司 | Half-source driving display panel |
| CN105938283A (en) * | 2016-06-22 | 2016-09-14 | 深圳市华星光电技术有限公司 | Hsd liquid crystal display panel and liquid crystal display device |
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| KR20070074344A (en) * | 2006-01-09 | 2007-07-12 | 삼성전자주식회사 | Thin film transistor substrate and method for producing the same and liquid crystal display having the thin film transistor substrate |
| CN101169531B (en) * | 2006-10-23 | 2011-07-13 | 中华映管股份有限公司 | Pixel structure |
| CN100520550C (en) * | 2007-12-17 | 2009-07-29 | 友达光电股份有限公司 | Semi-penetrate through type liquid crystal display board and pixel structure thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101963730A (en) * | 2010-08-17 | 2011-02-02 | 友达光电股份有限公司 | Liquid crystal display panel, pixel array substrate and pixel structure |
| US8916879B2 (en) | 2013-01-30 | 2014-12-23 | Au Optronics Corp. | Pixel unit and pixel array |
| CN105575322A (en) * | 2015-12-17 | 2016-05-11 | 深圳市华星光电技术有限公司 | Half-source driving display panel |
| CN105575322B (en) * | 2015-12-17 | 2018-01-26 | 深圳市华星光电技术有限公司 | Half source drive display panel |
| CN105938283A (en) * | 2016-06-22 | 2016-09-14 | 深圳市华星光电技术有限公司 | Hsd liquid crystal display panel and liquid crystal display device |
| CN106773402A (en) * | 2016-12-29 | 2017-05-31 | 深圳市华星光电技术有限公司 | Array base palte and liquid crystal display panel |
| CN106773402B (en) * | 2016-12-29 | 2020-04-10 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| WO2019153400A1 (en) * | 2018-02-08 | 2019-08-15 | 武汉华星光电技术有限公司 | Common electrode of display panel, and display panel |
| US11315511B2 (en) | 2018-02-08 | 2022-04-26 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Display panel and common electrode of the same |
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| CN101718931B (en) | 2011-06-15 |
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