CN101576825B - Embedded integrated circuit programmer - Google Patents

Embedded integrated circuit programmer Download PDF

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Publication number
CN101576825B
CN101576825B CN 200910050811 CN200910050811A CN101576825B CN 101576825 B CN101576825 B CN 101576825B CN 200910050811 CN200910050811 CN 200910050811 CN 200910050811 A CN200910050811 A CN 200910050811A CN 101576825 B CN101576825 B CN 101576825B
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module
chip
integrated circuit
target
embedded
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CN 200910050811
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CN101576825A (en )
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夏恒超
汪建新
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上海耕研电子科技有限公司
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Abstract

The invention discloses an embedded integrated circuit programmer, which is characterized in that the embedded integrated circuit programmer comprises an LCD-Key module used for displaying the device state and information of each operation, inputting a corresponding command and browsing information stored in a system, an FPGA logical unit used for carrying out complex logic calculation on the system and temporarily storing necessary data, an embedded processor and basic storage module used for dispatching and controlling the completion of system functions, saving a user data file and temporarily storing a large quantity of middle data, a chip flexible driving tube which is used for connecting a target chip and controlling a logic interface and capable of self-adapting different voltage classes, and a stepless adjusting power supply used for providing a power supply consisting with the target chip for the target chip and flexible logic, and eight paths of independent adapters. By adopting the embedded type design, the embedded integrated circuit programmer enlarges the range of voltage stepless adjusting, is suitable for battery jars with multiple classes of logical voltages, and greatly increases the quantity of one-time programming chips.

Description

嵌入式集成电路编程器 Embedded integrated circuit programmer

技术领域 FIELD

[0001] 本发明涉及一种集成电路及其测试技术领域,特别涉及一种嵌入式集成电路编程技术领域。 [0001] The present invention relates to an integrated circuit and test technology, and particularly relates to an embedded integrated circuit programming art.

背景技术 Background technique

[0002] 具有一定智能功能的电子产品,比如手机、PDA、MP4、洗衣机、电冰箱、空调、高级音响等,都有处理器和存储器,而处理器和存储器中都会有具有相应功能的软件,这个软件需要用有相应的工具来把它写入到处理器或存储器中,这种工具就是编程器。 [0002] Electronic products have a certain intelligence capabilities, such as mobile phone, PDA, MP4, washing machines, refrigerators, air conditioners, Premium Sound, which have a processor and memory, and processor and memory, there will be software having the corresponding functions, the corresponding software tools needed to turn it into a processor or memory, which is a programming tool.

[0003] 现有技术的编程器提供的大多数为3. 3V、5V的定值电压,集成电路芯片在进行编程时,往往需要多种电压等级的电源,而且不同的集成电路所需要的电源电压也不尽相同, 由于不同的集成电路逻辑电平不一样,因此控制系统必须要适应并匹配众多的电压等级白勺逻辑电平,才能完成操作功能,现有技术的定值电压使现有编程器兼容性低;不同的集成电路,其编程模式也不尽相同,而且很多差异很大,因此控制逻辑必须能够进行灵活的配置,以适应不同的芯片编程,现有编程器由于兼容性低,一次编程芯片数量少。 [0003] The prior art for the programmer to provide the majority of 3. 3V, 5V voltage value, an integrated circuit chip during programming, often need to supply multiple voltage levels, and the different integrated circuits required for power supply voltage are not the same, due to the different logic levels of the integrated circuit is not the same, the control system must accommodate a large number of voltage levels and matched white spoon logic level, to complete the operation function, a voltage value existing prior art compatibility lower programmer; different integrated circuits, which are not the same programming model, but a great many differences, the control logic must be capable of flexible configuration, to accommodate different programming of the chip, since the conventional programmer low compatibility , a small number of chip programming.

[0004] 现有编程器在开始编程之前,不对集成电路的在线状态进行检测,所以无法确定芯片是否放置正确,以保证目标芯片的10管脚是否接触好,是否可以进行编程,易造成编程效率低。 [0004] existing programming Before you start programming, online integrated circuit does not detect, it is not possible to determine whether the chip is placed correctly, to ensure 10-pin target chip whether the contact is good, can be programmed easily lead to program efficiency low.

[0005] 当集成电路为大容量的集成电路时,往往需要更多的地址总线或数据总线,现有编程器的控制系统不能进行扩展。 [0005] The integrated circuit when the integrated circuit is a large capacity, often require more address bus or a data bus, a control system of the prior programmer can not be extended.

发明内容 SUMMARY

[0006] 为解决上述技术问题,本发明提供一种嵌入式集成电路编程器,提供多通道无极调压编程电源,自适应逻辑电平接口管道,灵活的逻辑配置,集成电路在线状态检测,总线扩展,使编程器兼容性大大提高,提高编程效率,一次性编程芯片数量提高到8个。 [0006] To solve the above problems, the present invention provides a programmer embedded integrated circuit, to provide multi-channel programming stepless power regulator, adaptive logic level interface conduit, flexible logic configuration, online detection integrated circuit, the bus expansion, so the programmer greatly improved compatibility, improved programming efficiency, increase the number of chips time programming to 8.

[0007] 本发明是通过以下的技术方案实现的: [0007] The present invention is achieved by the following technical solution is:

[0008] 一种嵌入式集成电路编程器,包括用于显示设备状态及每次操作的信息和输入相应的指令、浏览系统存储的信息的LCD-Key模块;用于进行系统复杂的逻辑运算、暂存必要的数据的FPGA逻辑单元;用于调度、控制系统功能的完成,保存用户数据文件,暂存大量中间数据嵌入式处理器和基本存储模块;用于连接目标芯片与控制逻辑接口,可自适应不同电压等级的芯片灵活驱动管;用于给目标芯片及灵活逻辑提供与目标芯片相一致的电源的无级调节电源和八路独立适 [0008] A programmer embedded integrated circuit, comprising a device status information and for displaying each operation and input a corresponding instruction stored browsing system LCD-Key module information; means for complex logic operations system, temporary data necessary FPGA logic unit; means for scheduling the control system functions to complete, save the user data files, temporarily storing the intermediate data embedded processors and a large number of basic storage module; for chip control logic connected to the target interface, adaptive different voltage levels of the chip flexible drive tubes; flexibility for the target chip and chip logic to provide consistent with the target power supply steplessly and eight independent adapter

[0009] 配器;其中:所述嵌入式处理器和基本存储模块分别连接所述IXD-Kcy模块、所述FPGA逻辑单元、所述芯片灵活驱动管与所述无级调节电源;所述FPGA逻辑单元连接所述LCD-Kcy模块与所述无级调节电源;所述芯片灵活驱动管连接所述无级调节电源与所述八路独立适配器。 [0009] The dispenser; wherein: the embedded processor and the basic storage module is connected to the IXD-Kcy module, the FPGA logic means, said chip with said flexible drive tube stepless adjustable power source; the FPGA logic means connecting the module and the LCD-Kcy stepless power; the chip is connected to the flexible drive tube stepless eight independent power supply and the adapter.

[0010] 所述无极调节电源进一步包括一主电源、一LDO模块、一D/A模块、一信号放大模块以及一电源合成模块;其中所述主电源的输出端连接所述LDO模块的输入端,所述D/A模块的输出端连接所述信号放大模块的输入端,所述LDO模块与所述信号放大模块的输出端连接所述电源合成模块的输入端。 [0010] stepless adjustment of the power supply further comprises a main power source, a LDO module, a D / A module, amplifying a signal synthesis module and a power module; wherein an output of the main power supply module is connected to the input of LDO , the output of the D / a module is connected to an input terminal of the signal amplification module, the output of the LDO module and the signal amplification module connected to the power input of the synthesis module.

[0011] 所述灵活驱动管采用双向驱动的电平传输芯片,在相应的端口上加载特定等级的电源电压,采用配置文件来设置目标芯片的电压。 [0011] The flexible drive tube drive level bidirectional transmission chip, a certain level of load power supply voltage on the corresponding port, using the configuration file to set the voltage target chip.

[0012] 所述FPGA逻辑单元配置寄存器,并可以进行目标芯片的侧总线的拓展。 [0012] The FPGA configuration register logic cells, and can be expanded side bus of the target chip.

[0013] 所述嵌入式处理器和基本存储模块进一步包括一目标芯片电源输出模块,一电流检测模块,一目标芯片,一接触检测电源模块,一电源分配逻辑模块,一综合检测单元以及一处理器;其中:所述目标芯片电源输出模块的输出端连接所述电流检测模块的输入端, 所述接触检测电源模块的输出端连接所述电源分配逻辑模块的输入端,所述电流检测模块与电流检测模块的输出端连接所述目标芯片的输入端,所述目标芯片的输出端连接所述综合检测单元的输入端,所述综合检测单元的输出端连接所述连接器的输入端。 [0013] The embedded processor and the basic storage module further comprises a power output target chip module, a current detection module, a target device, a contact detection power module, a power distribution logic module, a detecting unit and a synthesis process ; wherein: the target chip power output module connected to the output terminal of the input current detection module, the contact detection module power output terminal connected to the power allocation logic module inputs, and the current detection module output of the current detection module is connected to the input of the target chip, the target chip connected to the output of said detecting means input terminal of the integrated, the integrated detection means connected to the output terminal of the input connector.

[0014] 所述嵌入式集成电路编程器一次最多编程芯片数为8个。 [0014] The integrated circuit embedded programmer programming a maximum number of eight chips.

[0015] 本发明的有益效果为:本发明由于上述的模块组成,提供多通道无极调压编程电源,适应并匹配众多的电压等级的逻辑电平接口,大规模的FPGA,使其兼容性大大提高,可适应不同电压等级的多种芯片,灵活的逻辑配置功能,并具有集成电路在线检测功能,可检测目标芯片的在线状态,大大提高了编程效率,并且具有总线扩展功能,一次最多编程芯片数量可达8个。 [0015] Advantageous effects of the present invention are: the present invention, since the above-described modules, to provide multi-channel programming stepless power regulator, and adapted to match the number of voltage levels of the logic level of the interface, the FPGA large, so that compatibility is greatly increase, can be adapted to a variety of different voltage levels of the chip, the flexible configuration logic functions, and an integrated circuit having a detection line that detects the state of the target chip, greatly improving the efficiency of programming, and having a bus expansion function, a maximum programming chip number up to eight.

附图说明 BRIEF DESCRIPTION

[0016] 图1是嵌入式集成电路编程器的组成图 [0016] FIG. 1 is a schematic diagram showing an embedded integrated circuit programmer

[0017] 图2是集成电路在线检测功能的流程图 [0017] FIG 2 is a flowchart illustrating an integrated circuit line detection function

[0018] 图3是无极调节电源工作原理图 [0018] FIG. 3 is a schematic diagram of power supply stepless adjustment

具体实施方式 detailed description

[0019] 如图1所示,为嵌入式集成电路编程器的组成图,包括IXD-key模块101,IXD用于显示设备状态及每次操作的信息,key用于输入相应的指令,浏览系统存储的信息。 [0019] As shown in FIG. 1, the integrated circuit is embedded programmer FIG composition comprising IXD-key module 101, IXD and apparatus for displaying information about each operation status, key input for the corresponding instruction browsing system stored information.

[0020] FPGA逻辑单元102,用于进行系统复杂的逻辑运算、暂存必要的数据,FPGA逻辑单元通过采用配置寄存器的方式,实现灵活逻辑的配置,使每个10可以实现输入、输出双向等电气特性,FPGA还可以进行目标芯片侧总线扩展,总线包括:控制总线、地址总线和数据总线。 [0020] FPGA 102 logic unit for performing logical operation of complex systems, the necessary temporary data, FPGA logic cell by way of using the configuration registers, logic configuration flexible, so that each input 10 may be implemented, and the like output bidirectional electrical characteristics, FPGA chip can also be target-side expansion bus, the bus comprising: a control bus, an address bus and a data bus.

[0021] 嵌入式处理器和基本存储模块103,用于调度、控制系统功能的完成,保存用户数据丈件,暂存大量中间数据,其还有集成电路在线状态检测功能,如图2所示,目标芯片电源输出201即为无级调压电源,经过电流检测202的电路后输出给目标芯片203,当目标芯片203放入加电后,电流检测202的电路可以检测到目标芯片203消耗的电流,由此可以判定是否在装置上放置了芯片;接触检测电源204提供微安级的恒流源,此恒流源通过电源分配逻辑205处理后,施加给目标芯片203,通过目标芯片203后,综合检测单元206可以检测到目标芯片的10管脚是否接触好,最终触底给处理器207。 [0021] The basic storage module and the embedded processor 103, for scheduling, complete control functions, the user data storage member husband, a large number of temporary intermediate data, which is an integrated circuit as well as online detection function, shown in Figure 2 , target device 201 is the power output stepless voltage supply, the current through the target device 203 to output the detection circuit 202, when the target power into the chip 203, the current detection circuit 202 can detect the target chip consumption 203 current, whereby it is determined whether the device is placed on the chip; power supply 204 to provide a contact detecting microampere constant current source, the constant current source 205 after processing by this power allocation logic chip 203 is applied to the target, the target device 203 via comprehensive detection unit 206 can detect whether the pin 10 contacts a good target chip, a processor 207 to ultimately bottom.

[0022] 灵活驱动管,用于连接目标芯片与控制逻辑接口,可自适应不同电压等级的芯片,其采用双向驱动的电平传输芯片,在相应的端口上加载特定等级的电源电压,可实现任意电压等级的目标芯片与系统的兼容接入,对于特定的目标芯片的电压设置采用配置文件来完成设置传递。 [0022] flexible drive tube for connecting the chip and the target control logic interfaces, different voltage levels may be adaptively chip, which drives the two-way transmission chip level, a certain level of load power supply voltage on the corresponding port, can be achieved accessing the target system is compatible with any chip voltage level, the voltage profile using a specific set of target chip to complete the transfer set.

[0023] 无级调节电源,用于给目标芯片及灵活逻辑提供与目标芯片相一致的电源,主电源301将交流220V转变为MV,传递给LD0302,LD0为可调节的电源变换芯片,主处理器通过设置12位D/A305,D/A的输出经过信号放大306模块放大信号后,与LDO的输出在电源合成模块中进行最终电源合成303,形成0-15V的电源输出304,电源输出的步长为: [0023] stepless power supply for the chip and the target and the target to provide a flexible logic chip consistent power, the main power supply 301 into a 220V AC MV, passed to LD0302, LD0 to be regulated supply converter chip, the main processing , an output D / a of the amplified signal, the output of the LDO 12 is provided by D / A305 module 306 via the signal amplified in the power supply finally synthesized synthesis module 303, formed 0-15V output power 304, the power supply output steps of:

[0025] 本发明还包括八路独立适配器,由于电源输出为0-15V的范围,比现有编程器特定的电源输出值兼容性大大增强,每次编程芯片数量最多可达8个,从而大大提高了芯片编程的效率,并且本发明无需外置电源切具有USB接口。 [0025] The present invention further includes eight separate adapter, since the output power is in the range of 0-15V, power output than a certain value greatly enhanced compatibility with existing programming, each programming up to eight the number of chips, thus greatly improving chip programming efficiency, and the present invention does not need an external power supply cut has a USB interface.

Claims (6)

  1. 1. 一种嵌入式集成电路编程器,其特征在于包括:用于显示设备状态及每次操作的信息和输入相应的指令、浏览系统存储的信息的LCD-Kcy模块;用于进行系统复杂的逻辑运算、暂存必要的数据的FPGA逻辑单元;用于调度、控制系统功能的完成,保存用户数据文件,暂存大量中间数据嵌入式处理器和基本存储模块;用于连接目标芯片与控制逻辑接口, 可自适应不同电压等级的芯片灵活驱动管;用于给目标芯片及灵活逻辑提供与目标芯片相一致的电源的无级调节电源和八路独立适配器;其中:所述嵌入式处理器和基本存储模块分别连接所述LCD-Kcy模块、所述FPGA逻辑单元、所述芯片灵活驱动管与所述无级调节电源;所述FPGA逻辑单元连接所述LCD-Kcy模块与所述无级调节电源;所述芯片灵活驱动管连接所述无级调节电源与所述八路独立适配器。 A programmer embedded integrated circuit, comprising: a display device and status information and the input corresponding to each operation command, LCD-Kcy module information browsing system memory; a complex system logical operation, temporarily storing necessary data FPGA logic unit; means for scheduling the control system functions to complete, save the user data files, temporarily storing the intermediate data embedded processors and a large number of basic storage module; for chip control logic connected to the target interfaces, different voltage levels may be adaptively chip flexible drive tubes; flexibility for the target logic chip and provide consistent with the target chip stepless adjustment and eight independent power supply adapter; wherein: said base and embedded processor a storage module is connected to the LCD-Kcy module, the FPGA logic means, said chip with said flexible drive tube stepless adjustable power source; the FPGA logic unit is connected to the LCD-Kcy module and the stepless adjustment of the power supply ; flexible drive tube connecting the chip to the stepless adjustment of the eight independent power adapter.
  2. 2.如权利要求1所述的嵌入式集成电路编程器,其特征在于所述无极调节电源进一步包括一主电源、一LDO模块、一D/A模块、一信号放大模块以及一电源合成模块;其中所述主电源的输出端连接所述LDO模块的输入端,所述D/A模块的输出端连接所述信号放大模块的输入端,所述LDO模块与所述信号放大模块的输出端连接所述电源合成模块的输入端。 2. The programming of the embedded integrated circuit as claimed in claim 1, wherein said power supply further includes a stepless adjustment of the main power source, a LDO module, a D / A module, amplifying a signal synthesis module and a power module; wherein the connection module inputs the LDO output terminal of the main power supply, the output of the D / a module is connected to the signal input terminal of amplifier module, the module and the signal LDO amplification module connected to the output the input terminal of the power synthesizing module.
  3. 3.如权利要求1所述的嵌入式集成电路编程器,其特征在于所述灵活驱动管采用双向驱动的电平传输芯片,在相应的端口上加载特定等级的电源电压,采用配置丈件来设置目标芯片的电压。 3. programming of the embedded integrated circuit as claimed in claim 1, wherein said flexible drive tube drive level bidirectional transmission chip, a certain level of load power supply voltage on the corresponding port, using the member arranged to husband set target voltage chip.
  4. 4.如权利要求1所述的嵌入式集成电路编程器,其特征在于所述FPGA逻辑单元配置寄存器,并可以进行目标芯片的侧总线的拓展。 4. The programming of the embedded integrated circuit as claimed in claim 1, wherein the FPGA logic unit is configured to register, and can be expanded side bus of the target chip.
  5. 5.如权利要求1所述的嵌入式集成电路编程器,其特征在于所述嵌入式处理器和基本存储模块进一步包括一目标芯片电源输出模块,一电流检测模块,一目标芯片,一接触检测电源模块,一电源分配逻辑模块,一综合检测单元以及一处理器;其中:所述目标芯片电源输出模块的输出端连接所述电流检测模块的输入端,所述接触检测电源模块的输出端连接所述电源分配逻辑模块的输入端,所述电流检测模块与电流检测模块的输出端连接所述目标芯片的输入端,所述目标芯片的输出端连接所述综合检测单元的输入端,所述综合检测单元的输出端连接所述连接器的输入端。 Embedded integrated circuit as claimed in claim 1, a programmer contact detection claim, wherein the embedded processor and the basic storage module further comprises a power output target chip module, a current detection module, a target device, a power module, a power distribution logic module, a detecting unit, and an integrated processor; wherein: the target chip power input output module connected to the output of the current detection module, the contact detection power supply module connected to the output the power distribution logic module input, the current detection module and a current detecting module connected to the output terminal of the input target chip, the target output of the chip is connected to an input terminal of the integrated detection unit, the an output terminal connected to an integrated detector input of the connector.
  6. 6.如权利要求1所述的嵌入式集成电路编程器,其特征在于所述嵌入式集成电路编程器一次最多编程芯片数为8个。 Programmer according embedded integrated circuit as claimed in claim 1, wherein said integrated circuit embedded programmer programming a maximum number of eight chips.
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