CN101567557B - Power clamping static protection circuit - Google Patents

Power clamping static protection circuit Download PDF

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Publication number
CN101567557B
CN101567557B CN 200910052181 CN200910052181A CN101567557B CN 101567557 B CN101567557 B CN 101567557B CN 200910052181 CN200910052181 CN 200910052181 CN 200910052181 A CN200910052181 A CN 200910052181A CN 101567557 B CN101567557 B CN 101567557B
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CN
China
Prior art keywords
power
triode
input
weld pad
ground
Prior art date
Application number
CN 200910052181
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Chinese (zh)
Other versions
CN101567557A (en
Inventor
何军
单毅
Original Assignee
上海宏力半导体制造有限公司
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Priority to CN 200910052181 priority Critical patent/CN101567557B/en
Publication of CN101567557A publication Critical patent/CN101567557A/en
Application granted granted Critical
Publication of CN101567557B publication Critical patent/CN101567557B/en

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Abstract

The invention relates to a power clamping static protection circuit, which comprises a power weld pad, a ground weld pad and an input/output unit; the power weld pad is connected with a power bus, andthe ground weld pad is connected with a ground bus; the input/output unit comprises a first resistor, a capacitor, a first inverter, a PMOS triode, a NMOS triode, and an input/output weld pad; the power clamping static protection circuit also comprises a positive buffer and a second inverter used for controlling the PMOS triode and the NMOS triode to discharge static. The power clamping static protection circuit realizes partial static discharge route from the power to the ground by using the existing static protection apparatus inputted and outputted to the ground and the static protection apparatus inputted and outputted to the power of the input and output unit in the premise of not increasing the areas of the input and output unit, thereby releasing the areas of a power/ground unit for arranging a decoupling capacitor to achieve the effect of saving area.

Description

A kind of power clamping static protection circuit

Technical field

The present invention relates to the semiconductor integrated circuit field, relate in particular to a kind of power clamping static protection circuit.

Background technology

In the semiconductor integrated circuit ESD Circuits Design for High, the design of power clamping circuit is extremely important.Input-output unit is because area is limited, and the size of electrostatic protection device is not too large.And power subsystem is compared input-output unit and is had more space to be used for electrostatic protection; general all the power clamping size of devices is designed bigger; the also more complicated of circuits for triggering design triggers so that more sensitive static to be provided, and helps imput output circuit to carry out electrostatic induced current and discharges.

But this circuit of clamping down on public, that concentrate only is placed in the power subsystem.If the input-output unit number too much causes the distance of some unit and power subsystem too big, then this is clamped down on circuit and can't well help input-output unit to carry out electrostatic induced current to discharge.

Summary of the invention

In order to solve above-mentioned technical problem; a kind of power clamping static protection circuit is provided; its purpose is; under the prerequisite that does not increase the input-output unit area; utilize the existing input and output of input-output unit to ground and input and output to the electrostatic protection device of power supply, realize that the part power supply is to the static release way on ground.

The invention provides a kind of power clamping static protection circuit, comprise the power supply weld pad, weld pad and I/O unit; The power supply weld pad is connected with power bus, and the ground weld pad is connected with the ground bus; I/O unit comprises first resistance, electric capacity, first inverter, PMOS triode, NMOS triode and I/O weld pad; Also comprise forward buffer and second inverter, be used for control PMOS triode and NMOS triode release electrostatic.

The output of first inverter is connected with the input of forward buffer and the input of second inverter respectively, and the output of second inverter is connected with the grid of PMOS triode, and the output of forward buffer is connected with the grid of NMOS triode.

Be connected on after first resistance and the capacitances in series between power bus and the ground bus, the input of first inverter is connected between electric capacity and the resistance, the source electrode of PMOS triode is connected with power bus, the drain electrode of PMOS triode is connected with the source electrode of NMOS triode, the drain electrode of NMOS triode is connected with the ground bus, and the drain electrode of PMOS triode is connected with the I/O weld pad.

The invention provides a kind of novel distributed power clamping static protection circuit of imbedding input-output unit.Under the prerequisite that does not increase the input-output unit area, utilize the existing input and output of input-output unit to arrive the electrostatic protection device of power supply to ground and input and output, realized the static release way of part power supply to ground, thereby the area of power supply and unit, ground is discharged, be used for the placement of anti-coupling capacitance, reach the effect of saving area.And because the circuit of clamping down on that will concentrate is originally assigned in the input-output unit, the dead resistance that the distance of input-output unit and power subsystem produces no longer becomes the bottleneck that static discharges.Thereby in being arranged, realizes the chip of a large amount of input-output units electrostatic protection ability preferably.

Description of drawings

Fig. 1 is existing power clamping unit (VDD cell) circuit diagram;

Fig. 2 is source provided by the invention clamping static protection circuit schematic diagram.

Embodiment

Below in conjunction with accompanying drawing, the present invention is described in further detail.

Fig. 1 is a kind of previous power clamping element circuit schematic diagram.Circuit in the power clamping unit is independently the power supply electrostatic protection and clamps down on circuit.The curve that is made of phantom line segments among Fig. 1 has shown the path that electrostatic induced current discharged when static release test (ESD zapping) occurred between VDD Pad and the GND Pad; the power supply electrostatic protection that this moment, electric current was flowed through in the power clamping unit is fully clamped down on circuit, can not pass through the electrostatic discharge protective circuit in the I/O unit (I/O unit).

Fig. 2 is source of the present invention clamping static protection circuit schematic diagram.In the I/O unit, the circuits for triggering of original ESDNMOS are made amendment.The output (A point) that originally went out Power Generation Road is cushioned the grid that outputs to NMOS by forward, output to the grid of PMOS simultaneously by reverser.When VDD received that the static positive charge impacts, its current potential can increase sharply with respect to GND, and these circuits for triggering can be raised the NMOS grid potential very timely and effectively, and the PMOS grid potential is reduced, and carried out the release of electrostatic charge by the unlatching of these two series connection MOS.The curve that is made of phantom line segments among Fig. 2 has shown the path that electrostatic induced current discharged when ESDzapping occurred between VDD Pad and the GND Pad; clamp down on circuit though saved in the VDD unit independently the power supply electrostatic protection; but the ESD electric current still can carry out bleed off by ESD NMOS and the ESD PMOS of the series connection in each I/O unit, thereby reaches the purpose that identical power clamping static is protected.

Circuit among Fig. 2 comprise power supply weld pad (VDD Pad), weld pad (GND Pad) and I/O unit; VDD Pad is connected with power bus (VDD Power Bus), and GND Pad is connected with ground bus (GNDPower Bus); The I/O unit comprises resistance, electric capacity, first inverter, PMOS triode, NMOS triode and I/O weld pad (I/O Pad); Also comprise forward buffer and second inverter, be used for control PMOS triode and NMOS triode release electrostatic.The output of first inverter is connected with the input of forward buffer and the input of second inverter respectively, and the output of second inverter is connected with the grid of PMOS triode, and the output of forward buffer is connected with the grid of NMOS triode.

Those skilled in the art can also carry out various modifications to above content under the condition that does not break away from the definite the spirit and scope of the present invention of claims.Therefore scope of the present invention is not limited in above explanation, but determined by the scope of claims.

Claims (1)

1. power clamping static protection circuit, comprise the power supply weld pad, weld pad and I/O unit; The power supply weld pad is connected with power bus, and the ground weld pad is connected with the ground bus; I/O unit comprises first resistance, electric capacity, first inverter, PMOS triode, NMOS triode and I/O weld pad; It is characterized in that, also comprise forward buffer and second inverter, be used for control PMOS triode and NMOS triode release electrostatic, the output of first inverter is connected with the input of forward buffer and the input of second inverter respectively, the output of second inverter is connected with the grid of PMOS triode, the output of forward buffer is connected with the grid of NMOS triode, be connected on after first resistance and the capacitances in series between power bus and the ground bus, the input of first inverter is connected between electric capacity and the resistance, the source electrode of PMOS triode is connected with power bus, the drain electrode of PMOS triode is connected with the source electrode of NMOS triode, the drain electrode of NMOS triode is connected with the ground bus, and the drain electrode of PMOS triode is connected with the I/O weld pad.
CN 200910052181 2009-05-27 2009-05-27 Power clamping static protection circuit CN101567557B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200910052181 CN101567557B (en) 2009-05-27 2009-05-27 Power clamping static protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200910052181 CN101567557B (en) 2009-05-27 2009-05-27 Power clamping static protection circuit

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CN101567557A CN101567557A (en) 2009-10-28
CN101567557B true CN101567557B (en) 2013-09-04

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103986426A (en) * 2014-05-07 2014-08-13 京信通信系统(中国)有限公司 Power amplifier, loop control method and loop control device in power amplifier
CN104362605B (en) * 2014-11-06 2017-05-24 北京大学 Transient trigger static electricity discharge protection circuit
CN104601160B (en) * 2014-12-23 2017-12-19 灿芯半导体(上海)有限公司 The high speed output circuit of built-in electrostatic protection device
CN106532671A (en) * 2016-12-26 2017-03-22 杭州迦美信芯通讯技术有限公司 RC-type electrostatic clamping circuit for ESD circuit
CN106992511A (en) * 2017-05-30 2017-07-28 长沙方星腾电子科技有限公司 A kind of ESD protection circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1206731C (en) * 2002-02-10 2005-06-15 台湾积体电路制造股份有限公司 Electrostatic discharge circuit suitable to bearing high roltage in high frequeny and analogue
CN100389528C (en) * 2003-05-19 2008-05-21 矽统科技股份有限公司 Gate bias adjustable static discharge protective circuit
CN100390987C (en) * 2004-02-18 2008-05-28 富士通株式会社 Electrostatic discharge protection circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7656627B2 (en) * 2007-07-17 2010-02-02 Amazing Microelectronic Corp. ESD protection circuit with active triggering

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1206731C (en) * 2002-02-10 2005-06-15 台湾积体电路制造股份有限公司 Electrostatic discharge circuit suitable to bearing high roltage in high frequeny and analogue
CN100389528C (en) * 2003-05-19 2008-05-21 矽统科技股份有限公司 Gate bias adjustable static discharge protective circuit
CN100390987C (en) * 2004-02-18 2008-05-28 富士通株式会社 Electrostatic discharge protection circuit

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Effective date of registration: 20140520

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Patentee before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai

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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING

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