CN101494383A - Control method for parallel connection system of inverter - Google Patents
Control method for parallel connection system of inverter Download PDFInfo
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- CN101494383A CN101494383A CNA2008100051864A CN200810005186A CN101494383A CN 101494383 A CN101494383 A CN 101494383A CN A2008100051864 A CNA2008100051864 A CN A2008100051864A CN 200810005186 A CN200810005186 A CN 200810005186A CN 101494383 A CN101494383 A CN 101494383A
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Abstract
The invention discloses a method for controlling an inverter parallel system. The method includes the following steps: sequence numbers are set for each inverter; each inverter sends a serial discrete signal about whether a native machine owns the competing qualification for a host or not to a parallel operation signal wire; each inverter receives the serial discrete signal from the parallel operation signal wire to judge whether the sequence number is the minimum, if so, the inverter can determine the self as the host and sends a power frequency synchronizing signal to the parallel operation signal wire; if not, the inverter can determine the self as a slave and correspondingly adjusts the phase of the output voltage according to the power frequency synchronizing signal. The control method only conducts the competition for the host according to the sequence numbers of the inverters, consequently speeds up the competition for the host and achieves a simple determination way. By implementing the synchronization between the host and the slave through the power frequency synchronizing signal, the method can still realize the synchronized switching between the host and the slave when a bypass is abnormal, thus improving the loading capacity of the system and not needing to consider the capacity of the inverter at the same time.
Description
Technical field
The present invention relates to a kind of control method for parallel connection system of inverter.
Background technology
Along with developing rapidly of the information processing technology, more and more higher to the requirement of the capacity of power-supply system, reliability.Inverter parallel is a kind of important channel of improving the power-supply system reliability and enlarging power supply capacity.Than the big capacity inverter of separate unit, a plurality of inverter parallel systems that compose in parallel than the inverter of low capacity, not only cost is low, easy care, and it is more flexible, reliable, by changing the number of inverter in parallel, the inverter parallel system of different capabilities can be obtained, the reliability of system can be improved by the redundant parallel of inverter.But with respect to the parallel connection of DC converter, there is suitable difficulty in the inverter parallel connection.For example: for realizing inverter parallel, each inverter must satisfy following two conditions: (1) is in operation when certain inverter, the frequency of its sinusoidal output voltage, phase place and amplitude must be accurately consistent with other inverter, otherwise can cause existing between the inverter circulation, increase the burden of switching tube, even cause the collapse of inverter parallel system.(2) need between each inverter to realize load sharing, otherwise can cause part operational module overload, even damage power device.
At present the control method for parallel of inverter mainly contains: centralized control, principal and subordinate's control mode and do not have the interconnection line control mode.Compare with centralized control, no interconnection line control mode, the master slave control mode has certain advantage, and it is easy to the expansion capacity, and the control between inverter is not subjected to the influence of inverter outlet line impedance, the current-sharing effect of system is fine, can realize redundant parallel between slave.But principal and subordinate's control mode also has following deficiency: in case hostdown, need to select a slave as new main frame by certain logic rules, if logic rules are complicated, it is longer to cause redefining the main frame time, and the situation of cisco unity malfunction may appear in then whole parallel system.
For uninterrupted power supply (ups) Unity, normal working method is by inverter work, when inverter goes wrong, and can be by bypass work; Inverter will return inverter work by bypass after recovering operate as normal, and Here it is said " return and cut ".The existing inverter parallel system in bypass just often, main frame, slave are all followed the tracks of bypass, carry out uninterrupted switching synchronously.But when bypass is unusual, be interrupted to switch to the inversion side earlier by the main frame selected in advance, subordinate motors track main frame output then switches to inversion again, therefore to get as the inverter capacity of main frame big so that bigger load capacity is arranged.Described load capacity is meant that inverter can load-carrying maximum capacity.Every inverter all has its capacity, and when exceeding the certain value of its capacity (such as 150%), inverter just can not be worked, so inverter wants operate as normal, with load be conditional.
Owing to returning when cutting, main frame should have maximum load capacity, therefore the control method of existing inverter parallel system except considering the plane No. of this machine, will consider also whether the capacity of this machine is maximum in all inverters that can power when carrying out the competition of principal and subordinate's machine.Therefore its competitive Principle is: if each inverter capacity is identical, then the inverter of plane No. minimum is a main frame; If inverter capacity difference, then the inverter of power supply capacity maximum is a main frame, does not consider whether the plane No. of this inversion is minimum this moment.The logic rules more complicated of existing inverter control method for parallel connection system.
Summary of the invention
The present invention is exactly in order to overcome above deficiency, to have proposed the fairly simple control method for parallel connection system of inverter of a kind of logic rules.
Technical problem of the present invention is solved by following technical scheme: a kind of control method for parallel connection system of inverter comprises the steps: the first step: each inverter is provided with sequence number; Second step: each inverter sends to the serial discrete signal whether this machine has main frame competition qualification on the parallel operation holding wire; The 3rd goes on foot: each inverter receives the serial discrete signal from the parallel operation holding wire, judges whether the sequence number of oneself is minimum, if minimum, then determine certainly as main frame, and sends power frequency synchronizing signal to the parallel operation holding wire; If not minimum, then determine from as slave, and according to the phase place of the corresponding adjustment of power frequency synchronizing signal self output voltage.
Preferably, comprise the steps: that also inverter parallel system is in running after described the 3rd step, there is new inverter to join inverter parallel system, and has main frame competition qualification, then new inverter detects inverter parallel system and whether has main frame, if there is main frame, then new inverter is defaulted as slave; If there is no main frame, then each inverter judges whether own sequence number is minimum, if minimum, then determine from as main frame, and the transmission power frequency synchronizing signal is to the parallel operation holding wire; If not minimum, then determine from as slave, and according to the phase place of the corresponding adjustment of power frequency synchronizing signal self output voltage.
Described step the comprises the steps: that also inverter parallel system is in running after three steps, there is inverter from inverter parallel system, to withdraw from, then detect current inverter parallel system and whether also have main frame, if there is no main frame, then each inverter judges whether the sequence number of oneself is minimum, if minimum, then determine certainly as main frame, and send power frequency synchronizing signal to the parallel operation holding wire; If not minimum, then determine from as slave, and according to the phase place of the corresponding adjustment of power frequency synchronizing signal self output voltage.
Described step the second has main frame competition qualification and is meant in the step: described inverter soft start finish and the sequence number of the sequence number of described inverter and other inverters all inequality.
Described serial discrete signal comprises and is used to indicate whether inverter has the qualification flag bit section of competition qualification.Control method for parallel connection system of inverter, it is characterized in that: described serial discrete signal also comprises and is used to indicate whether inverter parallel system exists the main frame flag bit of main frame.
Whether described detection inverter parallel system exists the method for main frame as follows: detect the main frame flag bit of serial discrete signal, if this flag bit is " 1 ", then show to have main frame in the inverter parallel system; If this flag bit is " 0 ", then show not have main frame in the inverter parallel system.
The beneficial effect that the present invention is compared with the prior art is: control method of the present invention is only carried out the competition of main frame according to the sequence number of inverter, and the main frame competition is speeded up, and determines that mode is simple.And the present invention has utilized the serial discrete signal of parallel operation signal wire transmits cleverly, according to of the definition of serial discrete signal to qualification flag bit section, both can directly judge the sequence number size of the inverter that participates in the competition, and can directly judge inverter again with competition qualification.Control method of the present invention can be implemented in bypass just often, and main frame and slave are all followed the tracks of bypass, carries out uninterrupted switching synchronously.The present invention by power frequency synchronizing signal carry out between main frame and the slave synchronously, can realize bypass unusual (when bypass can not be followed the tracks of), main frame and slave still can switch synchronously, have improved the load capacity of system, need not the capacity of taking into account inverter simultaneously.
Description of drawings
Fig. 1 is the flow chart of the specific embodiment of the invention;
Fig. 2 is the structural representation of the serial discrete signal of the specific embodiment of the invention;
Fig. 3 is the structural representation of inverter parallel system used in the present invention.
Embodiment
Also in conjunction with the accompanying drawings the present invention is described in further details below by concrete execution mode.
As shown in Figure 1, a kind of control method for parallel connection system of inverter comprises the steps:
The first step: each inverter in the inverter parallel system is provided with sequence number.Be provided with sequence number method can for: the mode by outside dial-up is provided with this machine of inverter sequence number (ID) or is provided with daemon software.When each inverter is provided with sequence number, need to guarantee that the sequence number of each inverter is inequality.If it is identical that the sequence number of two inverters is arranged, system will point out mistake is set, and need reset, otherwise these two inverters does not have main frame competition qualification, thereby has prevented that two inverters from competing main frame simultaneously.
Second step: each inverter sends to the serial discrete signal whether this machine has main frame competition qualification on the parallel operation holding wire.Described have main frame competition qualification and comprise: the finish sequence number of the sequence number of (showing that this inverter has the inversion power supply capacity) and this inverter and other inverters of soft start is all inequality for inverter.As shown in Figure 2, the serial discrete signal comprises and is used to indicate whether inverter has the qualification flag bit section of competition qualification.The expression mode of qualification flag bit section is: if this inverter has main frame competition qualification, then can be set to " 1 " according to corresponding positions in the qualification flag bit section in the sequence number serial discrete signal of this inverter; If this inverter does not have main frame competition qualification, then can be set to " 0 " according to corresponding positions in the qualification flag bit section in the sequence number serial discrete signal of this inverter.The figure place of qualification flag bit section comprise at least inverter parallel system can be in parallel the figure place of maximum of inverter, can 7 inverters in parallel such as, parallel system maximum, then to have 7 positions to be used as qualification flag bit section in the serial discrete signal at least.
The 3rd step: each inverter receives the serial discrete signal from the parallel operation holding wire, judges whether the sequence number of oneself is minimum.If certain inverter is the sequence number minimum, determine that then this inverter is a main frame, send power frequency synchronizing signal to the parallel operation holding wire, and the main frame flag bit in the relative set serial discrete signal.If certain inverter is not the sequence number minimum, determine that then this inverter is a slave, slave will send the phase place of the corresponding adjustment of power frequency synchronizing signal self output voltage according to main frame.
If inverter parallel system in running, has new inverter to join inverter parallel system, and have main frame competition qualification, then new inverter detects inverter parallel system and whether has main frame; If have, then new inverter is defaulted as slave; If do not have each inverter whether judge own sequence number minimum, if then determine from as main frame, and the transmission power frequency synchronizing signal is to the parallel operation holding wire; If the sequence number of inverter is not minimum, then this inverter is a slave, slave will be according to the power frequency synchronizing signal that main frame sends the phase place of corresponding adjustment self output voltage.
If inverter parallel system is in running, there is inverter from inverter parallel system, to withdraw from, no matter withdraw from reason and be because normally withdraw from or since fault he withdraws from, then each inverter all detects current inverter parallel system and whether has main frame, if there is main frame, show that then the inverter that is withdrawed from is a slave, then keep existing main frame, each inverter operate as normal is not carried out the main frame competition; If there is no main frame, then each inverter is at war with.Concrete competitive way is as follows: each inverter judges whether the sequence number of oneself is minimum.If certain inverter is the sequence number minimum, determine that then this inverter is a main frame, send power frequency synchronizing signal to the parallel operation holding wire, and the main frame flag bit in the relative set serial discrete signal.If certain inverter is not the sequence number minimum, determine that then this inverter is a slave, slave will send the phase place of the corresponding adjustment of power frequency synchronizing signal self output voltage according to main frame.
Whether exist the method for main frame as follows: detect the main frame flag bit of serial discrete signal, if this flag bit is " 1 ", then show to have main frame in the inverter parallel system if detecting inverter parallel system; If this flag bit is " 0 ", then show not have main frame in the inverter parallel system.
As shown in Figure 3, inverter parallel system comprises inverter parallel with one another 1, inverter 2...... inverter n.Each inverter all comprises control unit and power output unit.The control unit of each inverter all links to each other by the parallel operation holding wire, and serial discrete signal and power frequency synchronizing signal all are to transmit by the parallel operation holding wire.Control unit can be accepted (when this inverter is slave) or send (when this inverter is main frame) power frequency synchronizing signal according to the situation of this machine (inverter) work, finishes the synchronous handoff procedure of inverter parallel system.The power output unit of each inverter is parallel with one another, is with to carry.
Control method of the present invention is only carried out the competition of main frame according to the sequence number of inverter, and the main frame competition is speeded up, and determines that mode is simple.And the present invention has utilized the transmission serial discrete signal of parallel operation holding wire cleverly, according to of the definition of serial discrete signal to qualification flag bit section, both can directly judge the sequence number size of the inverter that participates in the competition, and can directly judge inverter again with competition qualification.Control method of the present invention can be implemented in bypass just often, and main frame and slave are all followed the tracks of bypass, carries out uninterrupted switching synchronously.The present invention by power frequency synchronizing signal carry out between main frame and the slave synchronously, can realize bypass unusual (when bypass can not be followed the tracks of), main frame and slave still can switch synchronously, have improved the load capacity of system, need not the capacity of taking into account inverter simultaneously.
Above content be in conjunction with concrete preferred implementation to further describing that the present invention did, can not assert that concrete enforcement of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (7)
1. a control method for parallel connection system of inverter is characterized in that: comprise the steps:
The first step: each inverter is provided with sequence number;
Second step: each inverter sends to the serial discrete signal whether this machine has main frame competition qualification on the parallel operation holding wire;
The 3rd goes on foot: each inverter receives the serial discrete signal from the parallel operation holding wire, judges whether the sequence number of oneself is minimum, if minimum, then determine certainly as main frame, and sends power frequency synchronizing signal to the parallel operation holding wire; If not minimum, then determine from as slave, and according to the phase place of the corresponding adjustment of power frequency synchronizing signal self output voltage.
2. control method for parallel connection system of inverter according to claim 1, it is characterized in that: comprise the steps: that also inverter parallel system is in running after described the 3rd step, there is new inverter to join inverter parallel system, and has main frame competition qualification, then new inverter detects inverter parallel system and whether has main frame, if there is main frame, then new inverter is defaulted as slave; If there is no main frame, then each inverter judges whether own sequence number is minimum, if minimum, then determine from as main frame, and the transmission power frequency synchronizing signal is to the parallel operation holding wire; If not minimum, then determine from as slave, and according to the phase place of the corresponding adjustment of power frequency synchronizing signal self output voltage.
3. control method for parallel connection system of inverter according to claim 1, it is characterized in that: described step the comprises the steps: that also inverter parallel system is in running after three steps, there is inverter from inverter parallel system, to withdraw from, then detect current inverter parallel system and whether also have main frame, if there is no main frame, then each inverter judges whether own sequence number is minimum, if minimum, then determine certainly as main frame, and send power frequency synchronizing signal to the parallel operation holding wire; If not minimum, then determine from as slave, and according to the phase place of the corresponding adjustment of power frequency synchronizing signal self output voltage.
4. according to the arbitrary described control method for parallel connection system of inverter of claim 1-3, it is characterized in that: described step the second has main frame competition qualification and is meant in the step: described inverter soft start finish and the sequence number of the sequence number of described inverter and other inverters all inequality.
5. according to the arbitrary described control method for parallel connection system of inverter of claim 1-3, it is characterized in that: described serial discrete signal comprises and is used to indicate whether inverter has the qualification flag bit section of competition qualification.
6. according to claim 2 or 3 described control method for parallel connection system of inverter, it is characterized in that: described serial discrete signal also comprises and is used to indicate whether inverter parallel system exists the main frame flag bit of main frame.
7. control method for parallel connection system of inverter according to claim 6, it is characterized in that: whether described detection inverter parallel system exists the method for main frame as follows: the main frame flag bit that detects the serial discrete signal, if this flag bit is " 1 ", then show to have main frame in the inverter parallel system; If this flag bit is " 0 ", then show not have main frame in the inverter parallel system.
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