CN101465383A - Schottky diode and manufacturing method thereof, method for manufacturing electric resistance transition memory - Google Patents
Schottky diode and manufacturing method thereof, method for manufacturing electric resistance transition memory Download PDFInfo
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- CN101465383A CN101465383A CNA2008102050048A CN200810205004A CN101465383A CN 101465383 A CN101465383 A CN 101465383A CN A2008102050048 A CNA2008102050048 A CN A2008102050048A CN 200810205004 A CN200810205004 A CN 200810205004A CN 101465383 A CN101465383 A CN 101465383A
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Abstract
The invention discloses a polysilicon schottky diode, a manufacturing method thereof, and a manufacturing method for a resistance conversion memorizer. The polysilicon schottky diode comprises a polysilicon semiconductor layer and a metal layer which forms schottky contact with the polysilicon. The semiconductor layer is made of polysilicon material prepared through metal induction or thermal vapor condensation or excimer laser pulsing. Stable schottky contact is formed between the metal layer and the polysilicon layer; besides, the metal layer can be pure metal or alloy. The sediment of polysilicon is coupled with annealing treatment so as to enable the polysilicon to form schottky contact with special metal to manufacture the schottky diode. The polysilicon schottky diode is competitive in cost and is expected to be widely applied to three-dimensional resistance conversion storage circuits.
Description
Technical field
The invention belongs to technical field of semiconductors, relate to a kind of poly semiconductor Schottky diode, relate in particular to a kind of polysilicon Schottky diode; The invention still further relates to the manufacture method of above-mentioned polysilicon Schottky diode; In addition, the invention still further relates to manufacture method based on the electric resistance transition memory array of polysilicon Schottky diode.
Background technology
The principle of phase-change random access memory is based on the reversible transition of the resistance that the reversible transition of phase-change material causes in the device, utilize the transformation of phase-change material between high resistance and low resistance to realize the storage of data " 0 ", " 1 ", it is considered to the most promising candidate of semiconductor memory of future generation, be expected to substitute FLASH (flash memory) later on all sidedly at 32nm CMOS technology node, become a kind of general memory, thereby be widely used in daily life.Phase transition storage have high density, at a high speed, advantage such as low cost, it makes it be subjected to the favor of each side in the potential advantages aspect the multistage storage especially, each big semiconductor company of the whole world has all carried out deep R and D, and the phase transition storage product will be realized industrialization in the one or two years in future.
Except phase transition storage, another is based on the memory device of storage medium electric resistance changing---and resistance random access memory has also received a lot of concerns.In suchlike memory, the gating unit device is important part, diode (comprising PN diode and Schottky diode) is because less area, in the competition of high density memory chips, have more advantage than field-effect transistor, because under same technology node, the FET unit area is two to three times of diode, has limited the density of storage chip greatly.In two kinds of at present common diodes, Schottky diode not only has bigger electric current than PN type diode, and has the advantage on the cost, and manufacturing process is more simple, and development cost is relatively low.Therefore adopting Schottky diode is a kind of good selection as the gating unit of electric resistance transition memory, at Chinese patent: in " autoregistration Schottky diode and corresponding resistor conversion memory production method " (application number 200810207298.8), just selected Schottky diode that electric resistance transition memory is carried out gating.
In report in the past, Schottky diode all is based on monocrystalline silicon and contacts with metal-semiconductor between the metal, comprise that above-mentioned patent also is like this, therefore limited the application of Schottky diode in the 3 D stereo circuit,, can only adopt the epitaxy of high temperature because will obtain high-quality monocrystalline silicon, cost is quite expensive, in addition, high temperature epitaxy has very big destructiveness to suprabasil available circuit, has greatly limited its application.
Summary of the invention
Technical problem to be solved by this invention is: a kind of polysilicon Schottky diode is provided, can reduces the manufacturing cost of Schottky diode, make it be fit to three-dimensionally stacked integrated circuit and use.
The present invention also provides the manufacture method of above-mentioned polysilicon Schottky diode.
In addition, the present invention also provides the manufacture method based on the electric resistance transition memory array of polysilicon Schottky diode.
For solving the problems of the technologies described above, the present invention adopts following technical scheme:
A kind of polysilicon Schottky diode, it comprise polysilicon semiconductor layer, and with the metal level of polysilicon formation Schottky contacts.
As a preferred embodiment of the present invention, the polycrystalline silicon material of described semiconductor layer for preparing by metal inducement method or vapour deposition process or quasi-molecule laser pulse method.
As a preferred embodiment of the present invention, form stable Schottky contacts between described metal level and the light polysilicon layer, described metal level is a metal simple-substance or for alloy or be silicide.
Should be appreciated that at this polysilicon semiconductor layer can substitute by the polycrystalline germanium semiconductor layer or by other polycrystalline III-V family semiconductor.
A kind of method of making the polysilicon schottky diode array, this method comprises the steps:
A1, have in the substrate of peripheral circuit, make first kind conductive layer in manufacturing;
A2, above the first kind conductive layer deposit spathic silicon, and realize the heavy doping of polysilicon is handled, make between heavily doped polysilicon and the first kind conductive layer and form ohmic contact;
A3, above heavily doped polysilicon deposition light dope polysilicon;
A4, annealing in process;
Form the second types of metals material that reliable metal-semiconductor contacts between A5, deposition and the light dope polysilicon layer;
A6, form schottky diode array by photoetching process.
As a preferred embodiment of the present invention, in the described steps A 1, conductive layer is a conducting metal or for the heavy doping low resistivity semiconductor or for the low-resistivity silicide.
As a preferred embodiment of the present invention, the reliable metal-semiconductor of formation contacts between the metal needs that the second types of metals layer adopts and the light dope polysilicon; Described metal is a metal simple-substance or for alloy or for silicide.
As a preferred embodiment of the present invention, in the described method, the two-layer heavy doping of steps A 2 and A3 preparation and lightly doped polysilicon can be substituted by the polysilicon layer that one deck doping content presents graded, higher in a side doping content near substrate, and lower away from substrate one side doping content.
As a preferred embodiment of the present invention, in the described method, the method for preparing polysilicon is a metal inducement method or for vapour deposition process or for the excimer laser impulse method.
As a preferred embodiment of the present invention, in the described method,, can be in the process of deposit film, to introduce doped source to mix in the doping that polysilicon is carried out, also can be to have prepared to carry out ion behind the polysilicon of intrinsic and inject to form and mix.
As changing the direction of Schottky diode, then will be with the transposing of the position of heavy doping and lightly-doped silicon, and the metal that will contact with lightly-doped silicon is chosen as the material with its formation Schottky contacts.
Should be appreciated that at this polysilicon semiconductor layer can substitute by the polycrystalline germanium semiconductor layer or by other polycrystalline III-V family semiconductor.
A kind of method of making based on the electric resistance transition memory array of polysilicon Schottky diode comprises the steps:
B1, in substrate (peripheral circuit can be arranged), produce shallow trench, deposition first kind electric conducting material in shallow trench, the first kind electric conducting material lines of formation are as word line;
B2, deposition of heavily doped polysilicon are avoided forming metal-semiconductor between polysilicon and the first kind conductive word lines and are contacted;
B3, deposition light dope polysilicon are as the semiconductor layer of Schottky diode;
B4, annealing in process are to promote the quality of polysilicon;
B5, deposition and light dope polysilicon form second types of metals that metal-semiconductor contacts, and form Schottky contacts between the second types of metals layer and the light dope polysilicon, and in addition, the second types of metals layer is also as the electrode of electric resistance transition memory;
B6, the deposition of passing through sacrificial layer material and time carving technology produce side wall on the metal level in shallow trench;
B7, deposition resistance conversion storage medium material adopt CMP (Chemical Mechanical Polishing) process to carry out planarization after deposition finishes; Owing to the isolation of side wall, reduced the contact area of the storage medium material and the second types of metals layer effectively;
B8, deposition the 3rd type electrode material, produce bit line by photoetching process, etching depth in the manufacturing bit line process is up to the top of first kind electric conducting material, polysilicon, second types of metals and storage medium material are separated into discrete unit, form Schottky diode unit and memory cell;
B9, filling and flatening process by dielectric material finally obtain the electric resistance transition memory array based on the polysilicon Schottky diode.
As a preferred embodiment of the present invention, in the described method, adopt the gating device of polysilicon Schottky diode as resistor conversion memory unit.
As a preferred embodiment of the present invention, by making side wall on the metal level in shallow trench, the contact area between the limiting resistance conversion storage material and the second types of metals electrode.
As a preferred embodiment of the present invention, storage medium material is under signal of telecommunication programming, and electric resistance transition memory carries out reversible transition between high resistance, low resistance.
As a preferred embodiment of the present invention, described electric resistance transition memory is the twin-stage storage, or is multistage storage.
As a preferred embodiment of the present invention, described second types of metals is a metal simple-substance, or is alloy.
As a preferred embodiment of the present invention, in the described method, the two-layer heavy doping of step B2 and B3 preparation and lightly doped polysilicon can be substituted by the polysilicon layer that one deck doping content presents graded, higher in a side doping content near substrate, and lower away from substrate one side doping content.
As a preferred embodiment of the present invention, in the described method, the method for preparing polysilicon is a metal inducement method or for vapour deposition process or for the excimer laser impulse method.
As a preferred embodiment of the present invention, in the described method,, can be in the process of deposit film, to introduce doped source to mix in the doping that polysilicon is carried out, also can be to have prepared to carry out ion behind the polysilicon of intrinsic and inject to form and mix.
As changing the direction of Schottky diode, then will be with the transposing of the position of heavy doping and lightly-doped silicon, and the metal that will contact with lightly-doped silicon is chosen as the material with its formation Schottky contacts.
Should be appreciated that at this polysilicon semiconductor layer can substitute by the polycrystalline germanium semiconductor layer or by other polycrystalline III-V family semiconductor.
The another kind of method of making based on the electric resistance transition memory array of polysilicon Schottky diode comprises the steps:
C1, in substrate (peripheral circuit can be arranged), produce shallow trench, deposition of heavily doped polysilicon in shallow trench, the polysilicon lines that adopts low-resistivity is as word line;
C2, deposition light dope polysilicon are as the semiconductor layer in the Schottky diode;
C3, annealing steps, the quality of lifting polysilicon;
C4, deposition and light dope polysilicon form the first kind metal that metal-semiconductor contacts, and form Schottky contacts between first kind metal level and the light dope polysilicon, and in addition, first kind metal is also as the electrode of resistor conversion memory unit;
C5, the deposition of passing through sacrificial layer material and time carving technology produce side wall above first kind metal level;
C6, deposition resistance conversion storage medium material, the deposition back adopts CMP (Chemical Mechanical Polishing) process to carry out planarization; Owing to the isolation of side wall, reduced the contact area of storage medium material and first kind metal level effectively;
C7, the deposition second types of metals material produce bit line by photoetching process, and the etching depth in the manufacturing bit line process is up to the top of low-resistivity heavily doped polysilicon line;
C8, filling and flatening process by dielectric material obtain the electric resistance transition memory array of basic polysilicon Schottky diode gating.
As a preferred embodiment of the present invention, among the present invention, adopt the gating device of polysilicon Schottky diode as resistor conversion memory unit.
As a preferred embodiment of the present invention, above first kind metal level, produce side wall, with the contact area between limiting resistance conversion storage material and the electrode.
As a preferred embodiment of the present invention, storage medium material is under signal of telecommunication programming, and electric resistance transition memory carries out reversible transition between high resistance, low resistance.
As a preferred embodiment of the present invention, described electric resistance transition memory is the twin-stage storage, or is multistage storage.
As a preferred embodiment of the present invention, described first kind metal is a metal simple-substance, or is alloy.
As a preferred embodiment of the present invention, the method for preparing polysilicon is a metal inducement method or for vapour deposition process or for the excimer laser impulse method.
As a preferred embodiment of the present invention, in the described method,, can be in the process of deposit film, to introduce doped source to mix in the doping that polysilicon is carried out, also can be to have prepared to carry out ion behind the polysilicon of intrinsic and inject to form and mix.
Should be appreciated that at this polysilicon semiconductor layer can substitute by the polycrystalline germanium semiconductor layer or by other polycrystalline III-V family semiconductor.
The method that another is made based on the electric resistance transition memory array of polysilicon Schottky diode comprises the steps:
D1, have in the substrate of peripheral circuit, deposit first kind metal, heavily doped polysilicon, light dope polysilicon, second types of metals successively, and carry out annealing in process in manufacturing;
D2, by photoetching process, in above-mentioned substrate, make the shallow trench of first degree of depth, the degree of depth is up to separating first kind metal mutually, the first kind metal wire that is separated into lines has just become word line;
D3, produce the second depth as shallow groove by photoetching process again, the shallow trench trend of second degree of depth is vertical mutually with the shallow trench trend of first degree of depth, heavily doped polysilicon, light dope polysilicon and second types of metals of same word line top are separated, promptly, etching depth is separated into discrete unit up to first kind metal level top with the polysilicon and second types of metals;
D4, filling dielectric adopt the chemico-mechanical polishing planarization, will expose second types of metals behind the unnecessary material removal medium; Form Schottky contacts between the light dope polysilicon of the second types of metals unit and below, form Schottky diode;
D5, deposit resistance transition material and the 3rd types of metals successively, by photoetching, form the 3rd types of metals bit line, the conversion of resistance can be realized in the contact area unit of the resistance transition material and second metal under the programming of the signal of telecommunication.
As a preferred embodiment of the present invention, in the described method, adopt the gating device of polysilicon Schottky diode as resistor conversion memory unit.
As a preferred embodiment of the present invention, storage medium material is under signal of telecommunication programming, and electric resistance transition memory carries out reversible transition between high resistance, low resistance.
As a preferred embodiment of the present invention, described electric resistance transition memory is the twin-stage storage, or is multistage storage.
As a preferred embodiment of the present invention, described second types of metals is a metal simple-substance, or is alloy.
As a preferred embodiment of the present invention, in the described method, the two-layer heavy doping of step D1 preparation and lightly doped polysilicon can be substituted by the polysilicon layer that one deck doping content presents graded, and be higher in the side doping content near substrate, and lower away from substrate one side doping content.
As a preferred embodiment of the present invention, in the described method, the method for preparing polysilicon is a metal inducement method or for vapour deposition process or for the excimer laser impulse method.
As a preferred embodiment of the present invention, in the described method,, can be in the process of deposit film, to introduce doped source to mix in the doping that polysilicon is carried out, also can be to have prepared to carry out ion behind the polysilicon of intrinsic and inject to form and mix.
As changing the direction of Schottky diode, then will be with the position transposing of heavy doping and lightly-doped silicon, the position light dope polysilicon layer of i.e. close substrate, and away from the position heavily doped polysilicon layer of substrate, the metal that needs in addition to contact with lightly-doped silicon is chosen as the material with its formation Schottky contacts.
Should be appreciated that at this polysilicon semiconductor layer can substitute by the polycrystalline germanium semiconductor layer or by other polycrystalline III-V family semiconductor.
Beneficial effect of the present invention is: the present invention proposes a kind of Schottky diode based on polysilicon, the deposition under lower temperature conditions by polycrystalline silicon material and metal material, auxiliary annealing with low temperature, form high-quality metal-semiconductor contact, produce practical Schottky diode.Propose the application of this kind Schottky diode in electric resistance transition memory again, proposed the method for multiple manufacturing polysilicon Schottky diode gating electric resistance transition memory; This method is expected to obtain greater advantage in obtaining three-dimensional high-density, the competition of solid-state memory cheaply.
Description of drawings
Figure 1A-Fig. 1 I makes the process flow diagram of schottky diode array for adopting polysilicon.
Fig. 2 A-Fig. 2 J is for making the schematic diagram based on the phase change memory array of polysilicon Schottky diode, the contact area that has wherein adopted side wall technology to dwindle resistance transition material and metal electrode.
Fig. 3 A-Fig. 3 I is for making the process flow diagram based on the electric resistance transition memory array of polysilicon Schottky diode.
Fig. 4 A-Fig. 4 H wherein adopts heavily doped polysilicon as conductive word lines for making the process flow diagram based on the electric resistance transition memory array of polysilicon Schottky diode.
Fig. 5 A-Fig. 5 F is the process flow diagram of manufacturing based on the electric resistance transition memory array of the polysilicon Schottky diode of dual shallow groove isolation.
Embodiment
Describe the preferred embodiments of the present invention in detail below in conjunction with accompanying drawing.
Embodiment one
Present embodiment is intended to introduce polysilicon schottky diode array and manufacture method thereof among the present invention.
In the present embodiment, the polysilicon Schottky diode comprise polysilicon semiconductor layer, and with the metal level of polysilicon formation Schottky contacts.Wherein, the polycrystalline silicon material of described semiconductor layer for preparing by metal inducement method or vapour deposition process or quasi-molecule laser pulse method; Form stable Schottky contacts between described metal level and the polysilicon layer, described metal level is metal simple-substance or is alloy.With the zone of metal layer contacting be light dope, otherwise can not form Schottky contacts.
Below introduce the method for making above-mentioned polysilicon schottky diode array, comprise the steps:
A1, have in the substrate of peripheral circuit, make conductive layer in manufacturing; Conductive layer is a conducting metal or for the heavy doping low resistivity semiconductor or for the low-resistivity silicide;
A2, above conductive layer deposit spathic silicon, and realize the heavy doping of polysilicon is handled, make between heavily doped polysilicon and the above-mentioned conductive layer and form ohmic contact;
A3, above heavily doped polysilicon deposition light dope polysilicon;
A4, annealing in process;
Form the metal material that reliable metal-semiconductor contacts between A5, deposition and the light dope polysilicon layer;
A6, form schottky diode array by photoetching process.
See also Figure 1A-Fig. 1 I, above-mentioned manufacture method is specially: on dielectric base 1, etch shallow trench array 2 by photoetching process,, forming discrete line array, its sectional view is shown in Figure 1B.Adopt the bottom deposit metallic nickel 3 of sputtering method, in order to obtain the structure shown in Fig. 1 C, after having deposited the nickel film at shallow trench 2, adopt back carving technology, only keep the nickel material 3 of shallow trench bottom, the nickel wire bar exists as conductive word lines, simultaneously also as inducing the induced material that forms polysilicon.Same deposition and time carving technology of adopting, is to adopt nickel to induce the polysilicon membrane 4 and the lightly doped silicon thin film 5 of deposition of heavily doped successively under 250 conditions of spending with plasma reinforced chemical vapour deposition method (PECVD) at underlayer temperature, shown in Fig. 1 D and 1E, the atom of doping is boron.The deposits tungsten metal 7 subsequently, produce the bit line array by photoetching process, to form Schottky contacts between tungsten metal and the light dope polysilicon simultaneously, shown in Fig. 1 F, among the figure along the projection of A-A direction shown in Fig. 1 G, in etching bit line array, the etching depth of shallow trench 7 is up to the top of nickel metal 3.Fill silicon nitride dielectric material 8, the sectional view after the chemico-mechanical polishing planarization is shown in Fig. 1 H.Annealing is 5 hours under the condition of 450 degree, makes the polysilicon that obtains have better quality, and the protective gas in the time of annealing is a high-purity argon gas, because the induction of nickel material in the word line, the silicon thin film crystallization of silicon thin film 4,5 changes the polycrystalline attitude into.Among the figure, 9 and 10 is heavy doping and the light dope polysilicons that pass through polycrystallization respectively.Form Schottky contacts between light dope polysilicon 10 and the tungsten 6, just so produced schottky transistor array of the present invention (as Fig. 1 I).
Because the present invention is auxiliary with annealing in process by the deposition of polysilicon, make itself and special metal form Schottky contacts, on cost, have competitiveness, more be expected in the three-dimensional resistance conversion memory circuit of three-dimensional, be used widely.
Embodiment two
The method based on the electric resistance transition memory array of polysilicon Schottky diode is made in the present embodiment introduction, comprises the steps:
B1, have in the substrate of circuit in manufacturing, produce shallow trench, deposition first kind electric conducting material in shallow trench, the first kind electric conducting material lines of formation be not only as word line, also as the metal level of Schottky diode;
Form metal-semiconductor between B2, the deposition light dope polysilicon, light dope polysilicon and first kind conductive word lines and contact, as the semiconductor layer of Schottky diode;
B3, deposition of heavily doped polysilicon, the Schottky contacts of elimination opposite side;
B4, annealing in process are to promote the quality of polysilicon;
B5, deposition second types of metals form ohmic contact between the second types of metals layer and the heavily doped polysilicon, and in addition, the second types of metals layer is also as the electrode of electric resistance transition memory;
B6, the deposition of passing through sacrificial layer material and time carving technology produce side wall on the metal level in shallow trench;
B7, deposition resistance conversion storage medium material adopt CMP (Chemical Mechanical Polishing) process to carry out planarization after deposition finishes; Owing to the isolation of side wall, reduced the contact area of the storage medium material and the second types of metals layer effectively;
B8, deposition the 3rd type electrode material, produce bit line by photoetching process, etching depth in the manufacturing bit line process is up to the top of first kind electric conducting material, polysilicon, second types of metals and storage medium material are separated into discrete unit, form Schottky diode unit and memory cell;
B9, filling and flatening process by dielectric material finally obtain the electric resistance transition memory array based on the polysilicon Schottky diode.
In this method, adopt the gating device of polysilicon Schottky diode as resistor conversion memory unit; Storage medium material is under signal of telecommunication programming, and electric resistance transition memory carries out reversible transition between high resistance, low resistance: described electric resistance transition memory is the twin-stage storage, or is multistage storage.
Embodiment three
Present embodiment is introduced the another kind of method of making based on the electric resistance transition memory array of polysilicon Schottky diode, comprises the steps:
C1, in substrate (can comprise peripheral circuit), produce shallow trench, deposition of heavily doped polysilicon in shallow trench, the polysilicon lines that adopts low-resistivity is as word line;
C2, deposition light dope polysilicon are as the semiconductor layer in the Schottky diode;
C3, annealing steps, the quality of lifting polysilicon;
C4, deposition and light dope polysilicon form the first kind metal that the half of metal conductor contacts, and form Schottky contacts between first kind metal level and the light dope polysilicon, and in addition, first kind metal is also as the electrode of resistor conversion memory unit;
C5, the deposition of passing through sacrificial layer material and time carving technology produce side wall above first kind metal level;
C6, deposition resistance conversion storage medium material, the deposition back adopts CMP (Chemical Mechanical Polishing) process to carry out planarization; Owing to the isolation of side wall, reduced the contact area of storage medium material and first kind metal level effectively;
C7, the deposition second types of metals material produce bit line by photoetching process, and the etching depth in the manufacturing bit line process is up to the top of low-resistivity heavily doped polysilicon line;
C8, filling and flatening process by dielectric material obtain the electric resistance transition memory array of basic polysilicon Schottky diode gating.
Embodiment four
Present embodiment has disclosed the method for another manufacturing based on the electric resistance transition memory array of polysilicon Schottky diode, comprises the steps:
D1, in substrate, deposit first kind metal successively, doping content presents polysilicon, second types of metals of graded, and carry out annealing in process;
D2, by photoetching process, in above-mentioned substrate, make the shallow trench of first degree of depth, the degree of depth is up to separating first kind metal mutually, the first kind metal wire that is separated into lines has just become word line;
D3, produce the second depth as shallow groove by photoetching process again, the shallow trench trend of second degree of depth is vertical mutually with the shallow trench trend of first degree of depth, heavily doped polysilicon, light dope polysilicon and second types of metals of same word line top are separated, promptly, etching depth is separated into discrete unit up to first kind metal level top with the polysilicon and second types of metals;
D4, filling dielectric adopt the chemico-mechanical polishing planarization, will expose second types of metals behind the unnecessary material removal medium; Form Schottky contacts between first kind metal (or second types of metals) the unit light dope polysilicon, form Schottky diode;
D5, deposit resistance transition material and the 3rd types of metals successively, by photoetching, form the 3rd types of metals bit line, the conversion of resistance can be realized in the contact area unit of the resistance transition material and second metal under the programming of the signal of telecommunication.
In this method, doping content presents in the polysilicon layer of graded, and a side has heavy doping, and opposite side has light dope, and doping content changes continuously along with the varied in thickness of polysilicon membrane.
Embodiment five
Introduce the technological process of making in the present embodiment based on the phase change memory array of polysilicon Schottky diode below in conjunction with Fig. 2 A-2J.
In semiconductor silicon substrate 11, the oxide layer 12 that obtains insulating by means of wet thermal oxidation is shown in Fig. 2 A.On silica, form shallow trench array 13 (shown in Fig. 2 B) by photoetching, and form tungsten metal level 14 in the bottom of shallow trench, shown in Fig. 2 C, the tungsten metal is as conductive word lines.By inductively coupled plasma chemical vapour deposition technique (ICP-CVD) deposition of heavily doped polysilicon 15 and light dope polysilicon 16 successively under the substrate temperature conditions of 350 degree, shown in Fig. 2 D and 2E, in deposition, by mix in the silicon materials that are introduced in preparation of source of the gas an amount of nickel and phosphorus atoms, in deposition process, by inducing of nickle atom, at high temperature form polysilicon; And the n type of polysilicon to mix also be to rely on to feed phosphorous impurity gas in the source of the gas of ICP-CVD and realize, realize phosphorus doping to polysilicon.After passing through back carving technology, by the deposition of Sb electrode 17, obtain the structure shown in Fig. 2 F, formed Schottky contacts between Sb and the phosphorus light dope polysilicon.Cvd nitride sacrificial silicon layer in substrate, obtain sidewall structure shown in Fig. 2 G by side wall technology, the contact area that the existence of side wall will be dwindled phase-change material and heating electrode on the one hand, reduce power consumption, promote the programming reliability, on the other hand, the existence of side wall can also improve the filling effect of phase-change material.Adopt sputtering method to fill GeSbTe phase-change material 19 subsequently, only keep the interior phase-change material of side wall through chemico-mechanical polishing, obtain the structural representation shown in Fig. 2 H after the planarization, the sectional area of the bottom of phase-change material 19 is much smaller than the sectional area at top, so, the power consumption of device in programming process just reduces under the condition on year-on-year basis greatly.Deposition by electrode material, and photoetching process subsequently produces bit line array 20, and in the process of etching bit line, etching depth is up to the top of metal W word line, and purpose is that the Schottky diode and the phase-change memory cell of tungsten word line top are separated.Pass through the deposition and the CMP (Chemical Mechanical Polishing) process of dielectric material cryogenic oxidation silicon at last, obtain the phase change memory structure shown in Fig. 2 I based on Schottky diode, among the figure, along the projection of B-B direction shown in Fig. 2 J.
Embodiment six
Present embodiment discloses another kind of technological process of making based on the electric resistance changing memory array of polysilicon Schottky diode, as Fig. 3 A to shown in the 3I.
Form insulating barrier 27 above substrate 26, the cross section of substrate as shown in Figure 3A; In substrate, form shallow trench 28 subsequently, shown in Fig. 3 B by photoetching; Then deposit metallic material 29, and obtain structure shown in Fig. 3 C by returning carving technology, and metal wire 29 is a word line.Adopt catalyst chemical vapour deposition technique (Cat-CVD) and return the carving technology polysilicon 30 and the lightly doped polysilicon layer 31 of deposition of heavily doped successively, impurity is a phosphorus, shown in Fig. 3 D and 3E, the advantage of Cat-CVD is to prepare high-quality polysilicon membrane under lower underlayer temperature, and lower underlayer temperature does not influence suprabasil other circuit and device.Continue the metal level 32 that deposition and light dope polysilicon 31 have stable Schottky contacts, and form Schottky diode structure between the lightly doped polysilicon 31, shown in Fig. 3 F, another purposes of metal level 32 is exactly the bottom electrode as resistor conversion memory unit.Deposition resistance conversion storage material 33, process chemico-mechanical polishing planarization obtains the structure shown in Fig. 3 G, the outer unnecessary resistance conversion storage material of groove is all removed, only the material in the reserved slit.Deposit upper electrode material subsequently, produce bit line 34 by photoetching process, shown in Fig. 3 H, in the etching process of making bit line 34, the shallow trench degree of depth that etches is up to the top of metal level 29, purpose is the polysilicon and the memory cell of same word line top can be separated, and forms discrete Schottky diode and memory cell structure.The filling and the planarization of the edge dielectric material 35 behind over etching, the sectional view that obtains are still shown in Fig. 3 H; Among this moment figure along the projection of C-C direction shown in Fig. 3 I.
Embodiment seven
See also Fig. 4 A-4H, introduce the technological process of making in the present embodiment below in conjunction with Fig. 4 A-4H based on the electric resistance changing memory array of polysilicon Schottky diode.
In substrate, form shallow channel 43, shown in Fig. 4 B.Prepare the heavily doped polysilicon 44 of As by the ICP-CVD method, have lower resistivity, after returning carving technology, obtain the structure shown in Fig. 4 C, low-resistance polysilicon lines 44 exists as word line.Adopt the lightly doped polysilicon 45 of preparation As above heavily doped polysilicon that uses the same method, shown in Fig. 2 D; Deposition and light dope polysilicon form the metal 46 of reliable Schottky contacts subsequently, return and carve structure afterwards shown in Fig. 4 E, and another function of metal 46 is exactly the bottom electrode as resistor conversion memory unit.Deposition resistance conversion storage material 47 by the CMP (Chemical Mechanical Polishing) process planarization, obtains the structure shown in Fig. 4 F.Deposition by the isolation of the degree of depth up to the shallow channel of heavily doped polysilicon top, produces metal bit line array 48, as the metal of bit line material shown in Fig. 4 G.In the etching process that forms bit line 48, etching depth is up to the heavily doped polysilicon word line of low resistance 44 tops, and purpose is that the Schottky diode and the memory cell of polysilicon word line top are separated.Subsequently, fill low-temperature nitride 50, among Fig. 4 G along the projection of D-D direction shown in Fig. 4 H, there are a plurality of Schottky diodes and memory cell in same word line top.
Embodiment eight
Present embodiment discloses another kind of electric resistance changing memory array technological process of making based on the polysilicon Schottky diode, as Fig. 5 A to shown in the 5F.
E1, above substrate 51, deposits tungsten metal material 52, and nickel deposited is induced thin layer above the tungsten material, subsequently by vapour deposition process deposition of heavily doped and lightly doped amorphous silicon membrane successively, after deposition finishes, annealed in a vacuum 10 hours under the annealing conditions of 500 degree, because the induction of nickle atom, the amorphous silicon that deposition is obtained changes high-quality polysilicon into.Remove the oxide of silicon face with HF after, continuation deposition above above-mentioned polysilicon has the metal material that reliable metal-semiconductor contacts with low-doped polysilicon.The structure that finally obtains is shown in Fig. 5 A, and among the figure, 51 are substrate, and 52 is tungsten layer, and 53 is heavily doped polysilicon, and 54 is the light dope polysilicon, and 55 is metal material.
E2, pass through photoetching process, etch discrete shallow trench array 56, the degree of depth of shallow trench 56 is up to the top of substrate 51, be about to the tungsten material and be separated into independently word line, after Fig. 5 A makes through shallow trench 56 along the projection of E-E direction shown in Fig. 5 B, at this moment, among the figure along the projection of F-F direction shown in Fig. 5 A.
E3, utilize photoetching process to make another shallow trench 57 again, the trend of this shallow trench is perpendicular to shallow trench 56, the degree of depth is slightly shallow, the degree of depth of shallow trench 57 is up to the top of conducting metal tungsten word line 52, shown in Fig. 5 C, purpose is that the metal of polysilicon and its top is separated effectively, forms a plurality of discrete Schottky diodes above same word line, by the separation of shallow trench 56 and 57, formed Schottky diode structure between lightly doped polysilicon and the metal level.
E4, the deposition by dielectric material silica 58 are filled shallow trench 56 and 57, obtain structure shown in Fig. 5 D, electricity mutually insulated between the Schottky diode through the chemico-mechanical polishing planarization.
E5, the deposition by resistance conversion storage material 59 and electrode of metal 60 (as bit line) have formed structure as Fig. 5 E through photoetching again, among the figure along the projection of G-G direction shown in Fig. 5 F.
Here description of the invention and application is illustrative, is not to want with scope restriction of the present invention in the above-described embodiments.Here the distortion of disclosed embodiment and change are possible, and the various parts of the replacement of embodiment and equivalence are known for those those of ordinary skill in the art.Those skilled in the art are noted that under the situation that does not break away from spirit of the present invention or substantive characteristics, and the present invention can be with other forms, structure, layout, ratio, and realize with other elements, material and parts.Under the situation that does not break away from the scope of the invention and spirit, can carry out other distortion and change here to disclosed embodiment.
As, polysilicon semiconductor layer can substitute by the polycrystalline germanium semiconductor layer or by other polycrystalline III-V family semiconductor.
Claims (36)
1, a kind of polysilicon Schottky diode is characterized in that it comprises:
Polysilicon semiconductor layer;
Metal level with polysilicon formation Schottky contacts.
2, polysilicon Schottky diode according to claim 1 is characterized in that:
The polycrystalline silicon material of described semiconductor layer for preparing by metal inducement method or vapour deposition process or quasi-molecule laser pulse method.
3, polysilicon Schottky diode according to claim 1 is characterized in that:
Form stable Schottky contacts between described metal level and the polysilicon layer, described metal level is a metal simple-substance or for alloy or be silicide.
4, a kind of method of making the polysilicon schottky diode array is characterized in that, this method comprises the steps:
A1, have in the substrate of peripheral circuit, make first kind conductive layer in manufacturing;
A2, above the first kind conductive layer deposit spathic silicon, and realize the heavy doping of polysilicon is handled, make between heavily doped polysilicon and the first kind conductive layer and form ohmic contact;
A3, above heavily doped polysilicon deposition light dope polysilicon;
A4, annealing in process;
Form the second types of metals material that reliable metal-semiconductor contacts between A5, deposition and the light dope polysilicon layer;
A6, form schottky diode array by photoetching process.
5, the method for manufacturing polysilicon schottky diode array according to claim 4 is characterized in that: in the described steps A 1, first kind conductive layer is a conducting metal or for the heavy doping low resistivity semiconductor or for the low-resistivity silicide.
6, the method for manufacturing polysilicon schottky diode array according to claim 4 is characterized in that:
Reliable metal-the semiconductor of formation contacts between the metal needs that the described second types of metals layer adopts and the light dope polysilicon; Described metal is a metal simple-substance or for alloy or for silicide.
7, the method for manufacturing polysilicon schottky diode array according to claim 4 is characterized in that:
Two-layer heavy doping that described steps A 2 and A3 are prepared and lightly doped polysilicon layer are replaced by one deck doping content continually varying polysilicon layer, and be higher in the end doping content near substrate, and lower in the end doping content away from substrate.
8, according to the method for claim 4 or 7 described manufacturing polysilicon schottky diode array, it is characterized in that:
In the described method, the method for preparing polysilicon is a metal inducement method or for vapour deposition process or for the excimer laser impulse method.
9, a kind of method of making the polysilicon schottky diode array is characterized in that, this method comprises the steps:
B1, have in the substrate of peripheral circuit, make first kind conductive layer in manufacturing;
B2, above the first kind conductive layer deposit spathic silicon, and realize the light dope of polysilicon is handled, make between light dope polysilicon and the first kind conductive layer and form Schottky contacts;
B3, above lightly doped polysilicon the deposition of heavily doped polysilicon;
B4, annealing in process;
Form the second types of metals material of reliable ohmic contact between B5, deposition and the heavily doped polysilicon layer;
B6, form schottky diode array by photoetching process.
10, the method for manufacturing polysilicon schottky diode array according to claim 9 is characterized in that:
Among the described step B1, first kind conductive layer is conducting metal or alloy or is silicide, and forms Schottky contacts between the light dope polysilicon.
11, the method for manufacturing polysilicon schottky diode array according to claim 9 is characterized in that: form reliable ohmic contact between metal needs that the second types of metals layer adopts and the heavily doped polysilicon; Described metal is metal simple-substance or is alloy.
12, the method for manufacturing polysilicon schottky diode array according to claim 9, it is characterized in that: two-layer heavy doping that described step B2 and B3 are prepared and lightly doped polysilicon layer are replaced by one deck doping content continually varying polysilicon layer, lower in an end doping content near substrate, and higher in an end doping content away from substrate.
13, according to the method for claim 9 or 12 described manufacturing polysilicon schottky diode array, it is characterized in that: in the described method, the method for preparing polysilicon is a metal inducement method or for vapour deposition process or for the excimer laser impulse method.
14, a kind of method of making based on the electric resistance transition memory array of polysilicon Schottky diode is characterized in that it comprises the steps:
C1, in substrate, produce the shallow trench array, deposition first kind electric conducting material in shallow trench, the first kind electric conducting material lines of formation are as word line;
C2, deposition of heavily doped polysilicon are avoided forming between polysilicon and the first kind conductive word lines half of metal conductor and are contacted;
C3, deposition light dope polysilicon are as the semiconductor layer of Schottky diode;
C4, annealing in process;
C5, deposition and light dope polysilicon form second types of metals that metal-semiconductor contacts, and form Schottky contacts between the second types of metals layer and the light dope polysilicon, and in addition, the second types of metals layer is also as the electrode of electric resistance transition memory;
C6, the deposition of passing through sacrificial layer material and time carving technology produce side wall on the metal level in shallow trench;
C7, deposition resistance conversion storage medium material adopt CMP (Chemical Mechanical Polishing) process to carry out planarization after deposition finishes, and only keep the storage medium in the side wall;
C8, deposition the 3rd type electrode material, produce bit line by photoetching process, etching depth in the manufacturing bit line process is up to the top of first kind electric conducting material, polysilicon, second types of metals and storage medium material are separated into discrete unit, form Schottky diode unit and memory cell;
C9, filling and flatening process by dielectric material finally obtain the electric resistance transition memory array based on the polysilicon Schottky diode.
15, manufacturing according to claim 14 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
In the described method, adopt the gating device of polysilicon Schottky diode as resistor conversion memory unit.
16, manufacturing according to claim 14 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
By making side wall on the metal level in shallow trench, the contact area between the limiting resistance conversion storage material and the second types of metals electrode.
17, manufacturing according to claim 14 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Storage medium material is under signal of telecommunication programming, and electric resistance transition memory carries out reversible transition between high resistance, low resistance.
18, manufacturing according to claim 14 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Described electric resistance transition memory is the twin-stage storage, or is multistage storage.
19, manufacturing according to claim 14 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Described second types of metals is a metal simple-substance, or is alloy, or is silicide.
20, manufacturing according to claim 14 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Two-layer heavy doping that described step C2 and C3 are prepared and lightly doped polysilicon layer are replaced by one deck doping content continually varying polysilicon layer, higher in an end doping content near first kind conductive word lines, and lower in an end doping content away from first kind conductive word lines.
21, according to claim 14 or 20 described manufacturings based on the method for the electric resistance transition memory array of polysilicon Schottky diode, it is characterized in that:
In the described method, the method for preparing polysilicon is a metal inducement method or for vapour deposition process or for the excimer laser impulse method.
22, a kind of method of making based on the electric resistance transition memory array of polysilicon Schottky diode is characterized in that it comprises the steps:
D1, in substrate, produce shallow trench, deposition of heavily doped polysilicon in shallow trench, the polysilicon lines that adopts low-resistivity is as word line;
D2, deposition light dope polysilicon are as the semiconductor layer in the Schottky diode;
D3, annealing in process step;
D4, deposition and light dope polysilicon form the first kind metal that metal-semiconductor contacts, and form Schottky contacts between first kind metal level and the light dope polysilicon, and in addition, first kind metal is also as the bottom electrode of resistor conversion memory unit;
D5, the deposition of passing through sacrificial layer material and time carving technology produce side wall above first kind metal level;
D6, deposition resistance conversion storage medium material, the deposition back adopts CMP (Chemical Mechanical Polishing) process to carry out planarization, only keeps the storage medium in the side wall;
D7, the deposition second types of metals material produce bit line by photoetching process, and the etching depth in the manufacturing bit line process is up to the top of low-resistivity heavily doped polysilicon line;
D8, filling and flatening process by dielectric material obtain the electric resistance transition memory array of basic polysilicon Schottky diode gating.
23, manufacturing according to claim 22 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Among the present invention, adopt the gating device of polysilicon Schottky diode as resistor conversion memory unit.
24, manufacturing according to claim 22 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Above first kind metal level, produce side wall, with the contact area between limiting resistance conversion storage material and the electrode.
25, manufacturing according to claim 22 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Storage medium material is under signal of telecommunication programming, and electric resistance transition memory carries out reversible transition between high resistance, low resistance.
26, manufacturing according to claim 22 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Described electric resistance transition memory is the twin-stage storage, or is multistage storage.
27, manufacturing according to claim 22 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Described first kind metal is a metal simple-substance, or is alloy.
28, manufacturing according to claim 22 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
The method for preparing polysilicon is a metal inducement method or for vapour deposition process or for the excimer laser impulse method.
29, a kind of method of making based on the electric resistance transition memory array of polysilicon Schottky diode is characterized in that it comprises the steps:
E1, have in the substrate of peripheral circuit, deposit first kind metal, heavily doped polysilicon, light dope polysilicon, second types of metals successively, and carry out annealing in process in manufacturing;
E2, by photoetching process, in above-mentioned substrate, make the shallow trench of first degree of depth, the degree of depth is up to separating first kind metal mutually, the first kind metal wire that is separated into lines has just become word line;
E3, produce the second depth as shallow groove by photoetching process again, the shallow trench trend of second degree of depth is vertical mutually with the shallow trench trend of first degree of depth, heavily doped polysilicon, light dope polysilicon and second types of metals of same word line top are separated, promptly, etching depth is separated into discrete unit up to first kind metal level top with the polysilicon and second types of metals;
E4, filling dielectric adopt the chemico-mechanical polishing planarization, will expose second types of metals behind the unnecessary material removal medium; Form Schottky contacts between the light dope polysilicon of the second types of metals unit and below, form Schottky diode;
E5, deposit resistance transition material and the 3rd types of metals successively, by photoetching, form the 3rd types of metals bit line, the conversion of resistance can be realized in the contact area unit of the resistance transition material and second metal under the programming of the signal of telecommunication.
30, manufacturing according to claim 29 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
In the described method, adopt the gating device of polysilicon Schottky diode as resistor conversion memory unit.
31, manufacturing according to claim 29 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Storage medium material is under signal of telecommunication programming, and electric resistance transition memory carries out reversible transition between high resistance, low resistance.
32, manufacturing according to claim 29 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Described electric resistance transition memory is the twin-stage storage, or is multistage storage.
33, manufacturing according to claim 29 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Described second types of metals is a metal simple-substance, or is alloy.
34, manufacturing according to claim 29 is characterized in that based on the method for the electric resistance transition memory array of polysilicon Schottky diode:
Described step e 1 prepared two-layer heavy doping and lightly doped polysilicon layer replaced by one deck doping content continually varying polysilicon layer, higher in an end doping content near first kind metal, and lower in an end doping content near second types of metals.
35, according to claim 29 or 34 described manufacturings based on the method for the electric resistance transition memory array of polysilicon Schottky diode, it is characterized in that:
In the described method, the method for preparing polysilicon is a metal inducement method or for vapour deposition process or for the excimer laser impulse method.
36, a kind of Schottky diode is characterized in that, it comprises:
Polycrystalline III-V family's semiconductor layer or polycrystalline germanium semiconductor layer;
Metal level with semiconductor layer formation Schottky contacts.
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