CN101458659A - Flash memory system and method thereof - Google Patents
Flash memory system and method thereof Download PDFInfo
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- CN101458659A CN101458659A CNA2007101723737A CN200710172373A CN101458659A CN 101458659 A CN101458659 A CN 101458659A CN A2007101723737 A CNA2007101723737 A CN A2007101723737A CN 200710172373 A CN200710172373 A CN 200710172373A CN 101458659 A CN101458659 A CN 101458659A
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Abstract
The invention discloses a flash memory storing system and method thereof, the system comprises a flash memory, a control unit and a temporary storing memory, the method is suitable for the flash memory comprising a data storing area and a comparison table storing area, the comparison table storing area is used for storing the comparison table, the comparison table records an entity address of entity memory block of a data storing area and a logical address of logical memory block corresponding to the entity address, the entity address and the logical address can be included in the flash memory for judging whether the comparison table needs to be generated or not, when the flash memory is started, if yes, the comparison table can be generated and be stored into the comparison table storing are and the temporary storing memory; if not, the comparison table stored in the storing area can be copied into the memory of the buffer. According to the accessing operation of an input instruction for the flash memory, the comparison table stored in the temporary storing memory can be modified. The flash memory storing system and method of the invention can improve the starting speed of the flash memory and the speed of the data access.
Description
[technical field]
The invention relates to a kind of flash memory system and method thereof, particularly relevant for a kind of flash memory system that can produce the table of comparisons of record physical address and logical address fast.
[background technology]
Flash memory (flash) is different with the alter mode of the region of data storage of common memory, and flash memory can only be that unit makes amendment with an entity memory region (block), and the region of data storage of common memory is made amendment in the mode of a byte and a sector.Mean in flash memory, after the necessary monoblock deletion in the sector in each entity memory region, just can write the action of data, and the action of write-once can only be done in each sector.The entity memory region has a physical address representing the spatial order of flash memory, and each physical address is corresponding with the Shu logical address of host side operating system.If want the physical sector on the flash memory corresponding one by one with the logic sector of upper strata archives economy, then the operation of a sector content of each similar modification all must copy to whole block outside random access memory (RAM) earlier, then behind the content update of corresponding that sector among the RAM, the original block of then erasing, again the data in the RAM all one by one sectors write again in the original block.This measure causes the memory source waste and dodges the memory chip lost of life outward.
Therefore, set up the address translation table of a logic memory block and entity memory region, it is necessary making reference numeral between logical address and the physical address dynamically corresponding mutually.At present, the data access method of main flash memory has two kinds, one is for to be stored in the external access device with the table of comparisons, lose the table of comparisons to prevent that outage from causing, and concentrate all contrast relationship of preserving physical address and logical address, to reach the function of the quick acquisition table of comparisons, but the method must read a specific memory block in advance when contrast relationship changes, to safeguard this table of comparisons, the reading speed of external access device is not good again, so cause the performance of real time access of flash memory not good.Another kind method is stored in the reference numeral of physical address and logical address in the memory block, forms the table of comparisons when starting again, and the method causes the zone that need read too many when flash memory is excessive, then influences toggle speed.
[summary of the invention]
In view of this, purpose of the present invention is providing a kind of flash memory system and method thereof exactly, with the toggle speed of raising flash memory and the speed of data access.
According to purpose of the present invention, a kind of flash memory system is proposed, it comprises a flash memory, a control module and a scratch-pad memory.Flash memory comprises a region of data storage and comparison list storage area, the physical address of the entity memory region of table of comparisons record region of data storage and the logical address of logic memory block corresponding with it.Control module selectivity when flash memory is activated produces the table of comparisons, and the table of comparisons is stored in scratch-pad memory and table of comparisons storage area, and control module carries out access action according to an input instruction to flash memory, and revise the table of comparisons that is stored in scratch-pad memory according to this access action, and whether control module detecting is stored in the table of comparisons of table of comparisons storage area and is stored between the table of comparisons of scratch-pad memory variant, if be replicated in table of comparisons storage area just will be stored in the table of comparisons of scratch-pad memory.
In addition, the present invention reintroduces a kind of flash memory stores method, be applicable to that one comprises the flash memory of a region of data storage and comparison list storage area, table of comparisons storage area is in order to store comparison list, the logical address of the physical address of the entity memory region of table of comparisons record data storage area and logic memory block corresponding with it, it is contained in and judges whether to need to produce the table of comparisons when flash memory is activated, if, then produce the table of comparisons and the table of comparisons is stored in a table of comparisons storage area and a scratch-pad memory, if not, the table of comparisons that then will be stored in table of comparisons storage area is copied to the buffer internal memory.According to an input instruction flash memory is carried out access action, and revise the table of comparisons that is stored in the scratch-pad memory according to this access action.Detecting be stored in the table of comparisons of table of comparisons storage area and be stored between the table of comparisons of scratch-pad memory whether variant, if be replicated in table of comparisons storage area just will be stored in the table of comparisons of scratch-pad memory.
Compared to prior art, utilize flash memory system of the present invention and method thereof, improved the toggle speed of flash memory and the speed of data access.
For purpose of the present invention, structural attitude and function thereof are had further understanding, conjunction with figs. is described in detail as follows now:
[description of drawings]
Fig. 1 is the block schematic diagram of flash memory system of the present invention.
Fig. 2 is the flow chart of steps of flash memory stores method of the present invention.
Fig. 3 is the flow chart of steps of capacity of the calculating table of comparisons of flash memory stores method of the present invention.
Fig. 4 is the table of comparisons processing flow chart of flash memory stores method of the present invention.
Fig. 5 is the process flow diagram of the answer table of comparisons of flash memory stores method of the present invention.
[embodiment]
Hereinafter with reference to relevant indicators, flash memory system and method thereof according to preferred embodiment of the present invention are described, to be convenient to understand for making, the same components among the following embodiment illustrates with identical symbology.
See also Fig. 1, it is the block schematic diagram of flash memory system of the present invention.Among the figure, flash memory system 1 comprises a flash memory 11, a scratch-pad memory 12 and a control module 13.Flash memory 11 comprises a region of data storage 111 and comparison list storage area 112, and selectivity produced comparison list 115 when control module 13 was activated at flash memory 11.For example in flash memory 11, set up a synchronous parameter, control module 13 judges whether to produce the table of comparisons according to this synchronization parameter, as synchronous parameter setting is a nonsynchronous numerical value, and then the control module 13 generation tables of comparisons 115 are stored in table of comparisons storage area 112 and the scratch-pad memory 12.The physical address 113 of the entity memory region of the table of comparisons 115 record region of data storages 111 and the logical address 114 of logic memory block corresponding with it, scratch-pad memory 12 is a random access memory (RAM), and control module 13 is one can carry out the microprocessor of several threads (thread).
Wherein, it is the one-dimension array of unit that the table of comparisons 115 can be exchanged into a capacity block, that is is divided into many sub-tables of comparisons, 128K byte for example, and total sector number is 409600 entity memory region, but keeping records 42K table of comparisons data.Because of between the sector being read-write continuously, so only need interpretation to begin to read and write data by which sector, the sub-table of comparisons that storage can use is to scratch-pad memory 12, to reduce the capacity consumption of scratch-pad memory 12, and the entire scope that the entire scope that control module 13 reads the sub-table of comparisons reads the table of comparisons is little, so can increase the reading speed of the table of comparisons.
See also Fig. 2, it is the flow chart of steps of flash memory stores method of the present invention.The method is suitable for the flash memory system shown in first figure, and its step comprises:
Step S21: control module 13 produces the table of comparisons 115 according to the setting of synchronization parameter to judge whether needs, if, then carry out step S22, if not, then carry out step S211;
Step S211: the table of comparisons 115 that duplicates in the table of comparisons storage area 112 arrives in the scratch-pad memory 12 (RAM), has duplicated and has carried out step S23;
Step S22: control module 13 detecting synchronization parameters are nonsynchronous numerical value, then produce the table of comparisons 115 and the table of comparisons 115 is stored in table of comparisons storage area 112 and the scratch-pad memory 12;
Step S23: 13 pairs of flash memories of control module 11 carry out access action (access);
Step S24: according to access action to revise the table of comparisons 115 in the scratch-pad memory 12 to produce the table of comparisons of having revised;
Step S25: whether the table of comparisons that contrast is stored in scratch-pad memory 12 and the table of comparisons storage area 112 is identical, if, then carry out step S26, if not, then carry out step S251;
Step S251: duplicate the table of comparisons of having revised in the scratch-pad memory 12 to table of comparisons storage area 112 to replace the table of comparisons 115 in the table of comparisons storage area 112, duplicated and carried out step S26; And
Step S26: the synchronization parameter in the flash memory is set at a synchronous numerical value.
See also Fig. 3, it is the flow chart of steps of the calculating table of comparisons capacity of flash memory stores method of the present invention.Among the figure, this calculation process comprises the following step:
Step S31: the driver that loads flash memory is to drive flash memory;
Step S32: the total entity memory region that calculates flash memory is counted the big or small C of S and each entity memory region;
Step S33: the total block counts S that is calculated according to step S32 and indicate the required byte L that expends of each block, calculating the table of comparisons can consumable max cap. L*S=V;
Step S34: according to the size of max cap. V and each entity memory region C of the step table of comparisons that S33 calculates, how many entity memory regions can calculate this table of comparisons needs count V/C=N;
Step S35: the required block counts N of the table of comparisons that step S34 is calculated gained multiply by a number percent, counts N*%=B to obtain needing to reserve in order to the entity memory region of replacing bad piece;
Step S36: the notice flash memory system is reserved block counts B that replaces bad piece and the block counts N that the table of comparisons need expend, and recomputates available entity memory region quantity S-(the B+N)=M of flash memory; And
Step S37: available entity memory region M is carried out a numbering action.
See also Fig. 4, it is the process flow diagram of the embodiment of flash memory stores method of the present invention, this embodiment realizes with the system that can carry out multithreading, wherein, thread (thread) is that an operating system is distributed the central processing unit basic fundamental in (CPU) processing time, and in a pipeline (Pipeline), having a plurality of threads, pipeline can be according to the processed data of working between each thread.Multithreading can increase the response speed of system, and owing to during each thread execution, not influenced by other thread of carrying out simultaneously, for example: program makes mistakes, when machine etc.. the required data of work so each thread can be finished dealing with simultaneously.Among the figure, this flash memory stores method comprises the following step:
Step S41: the driver that loads flash memory is to drive flash memory;
Step S42: set the worker thread of the table of comparisons and determine the priority processing order of at least one thread, these threads comprise an access processing threads, a monitor thread and comparison list and duplicate thread;
Step S43: carry out the thread of access and deletion sector data, this thread carries out the sector data of region of data storage in access and the deletion flash memory according to input instruction;
Step S44: regularly monitor and reclaim the thread that used the sector, clear data with sector of having read and write and the system one that produces in the action that is collected in access (Access), in this thread,, change the content of the table of comparisons in the scratch-pad memory in the process of collecting the sector of having read and write;
Step S45: the synchronization parameter in the flash memory is made as a nonsynchronous numerical value;
Step S46: the table of comparisons is duplicated thread is set at lowest priority, in other thread all move finish and idle flash memory system after, the beginning carries out this table of comparisons and duplicates thread to carry out step S48;
Step S47: workflow finishes, the flash memory system that whether leaves unused, if, then carry out step S48, if not, then get back to step S46;
Step S48: control module detects nonsynchronous numerical value that step S45 sets, and the table of comparisons in the scratch-pad memory is copied to table of comparisons storage area; And
Step S49: after the synchronization parameter in the flash memory is made as a synchronous numerical value, get back to step S43.
See also Fig. 5, it is the process flow diagram of the answer table of comparisons of flash memory stores method of the present invention.The method is applicable to flash memory system again behind the power supply, and in order to reply the table of comparisons, its step comprises:
Step S51: the driver that loads flash memory is to drive flash memory;
Step S52: flash memory system reads the synchronization parameter in the flash memory, judges whether this synchronization parameter has been set at a synchronous numerical value, if, then carry out step S53, if not, then carry out step S521;
Step S521: produce the table of comparisons again according to the corresponding relation of entity memory region and logic memory block and be stored to scratch-pad memory and table of comparisons storage area, stored and carried out step S53;
Step S53: directly use the table of comparisons that is stored in table of comparisons storage area; And
Step S54: normally carry out flash memory system.
Claims (12)
1, a kind of flash memory system is characterized in that, this system comprises:
One flash memory comprises a region of data storage and comparison list storage area, and this table of comparisons writes down the logical address of the physical address of entity memory region and the logic memory block corresponding with it of this region of data storage;
One scratch-pad memory;
One control module, selectivity produces this table of comparisons when this flash memory is activated, and this table of comparisons is stored in this scratch-pad memory and this table of comparisons storage area, and this control module carries out an access action according to an input instruction to this flash memory, and revise the table of comparisons that is stored in this scratch-pad memory according to this access action, and whether this detecting of this control module is stored in the table of comparisons of this table of comparisons storage area and is stored between the table of comparisons of this scratch-pad memory variant, if be replicated in this table of comparisons storage area just will be stored in the table of comparisons of this scratch-pad memory.
2, flash memory system as claimed in claim 1 is characterized in that, this scratch-pad memory is a random access memory.
3, flash memory system as claimed in claim 1 is characterized in that, this control module is one can carry out the microprocessor of several threads.
4, flash memory system as claimed in claim 3, wherein those threads comprise an access processing threads, a monitor thread and comparison list and duplicate thread.
5, flash memory system as claimed in claim 1 is characterized in that, this flash memory more comprises a synchronous parameter, and this control module produces this table of comparisons according to this synchronization parameter to judge whether palpus.
6, flash memory system as claimed in claim 5 is characterized in that, after the table of comparisons that this control module will be stored in this scratch-pad memory is replicated in this table of comparisons storage area, just this synchronization parameter is set at the synchronous numerical value of an expression.
7, a kind of flash memory stores method, be applicable to that one comprises the flash memory of a region of data storage and comparison list storage area, this table of comparisons storage area is in order to store comparison list, this table of comparisons writes down the logical address of the physical address of entity memory region and the logic memory block corresponding with it of this region of data storage, it is characterized in that this method comprises the following step:
When being activated, this flash memory judges whether to need to produce this table of comparisons, if, then produce this table of comparisons and this table of comparisons is stored in this a table of comparisons storage area and a scratch-pad memory, if not, the table of comparisons that then will be stored in this table of comparisons storage area is copied to this scratch-pad memory;
According to an input instruction this flash memory is carried out access action, and revise the table of comparisons that is stored in this scratch-pad memory according to this access action;
Detecting be stored in the table of comparisons of this table of comparisons storage area and be stored between the table of comparisons of this scratch-pad memory whether variant, if be replicated in this table of comparisons storage area just will be stored in the table of comparisons of this scratch-pad memory.
8, flash memory stores method as claimed in claim 7 is characterized in that, this scratch-pad memory is a RAM.
9, flash memory system as claimed in claim 7 is characterized in that, this determining step is realized by the microprocessor that can carry out several threads.
10, flash memory stores method as claimed in claim 9 is characterized in that, those threads comprise an access processing threads, a monitor thread and comparison list and duplicate thread.
11, flash memory stores method as claimed in claim 7 is characterized in that, this flash memory more comprises a synchronous parameter, and this synchronization parameter is in order to judge whether producing this table of comparisons.
12, flash memory stores method as claimed in claim 11 is characterized in that, after the table of comparisons that is stored in this scratch-pad memory was replicated in this table of comparisons storage area, this synchronization parameter was set at the synchronous numerical value of an expression.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CNA2007101723737A CN101458659A (en) | 2007-12-14 | 2007-12-14 | Flash memory system and method thereof |
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| CNA2007101723737A CN101458659A (en) | 2007-12-14 | 2007-12-14 | Flash memory system and method thereof |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101930404A (en) * | 2010-08-27 | 2010-12-29 | 威盛电子股份有限公司 | Memory device and operation method thereof |
| CN102156731A (en) * | 2011-04-08 | 2011-08-17 | 传聚互动(北京)科技有限公司 | Data storage method and device for flash memory |
| CN106339334A (en) * | 2015-07-07 | 2017-01-18 | 钰群科技股份有限公司 | Starting method of universal serial bus compatible flash memory device and related flash memory device |
| CN108073359A (en) * | 2016-11-15 | 2018-05-25 | 慧荣科技股份有限公司 | Operation method of data storage device |
| WO2019148791A1 (en) * | 2018-01-30 | 2019-08-08 | 江苏华存电子科技有限公司 | Method for fast activation of firmware of flash memory, and short structure stored in flash memory |
| TWI670640B (en) * | 2016-11-25 | 2019-09-01 | 慧榮科技股份有限公司 | Data storage method and data recovery method for data storage device, and data storage device using the same methods |
| US10579483B2 (en) | 2016-11-25 | 2020-03-03 | Silicon Motion, Inc. | Storing a compact flash physical-to-host logical address mapping table on power loss |
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2007
- 2007-12-14 CN CNA2007101723737A patent/CN101458659A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101930404A (en) * | 2010-08-27 | 2010-12-29 | 威盛电子股份有限公司 | Memory device and operation method thereof |
| CN101930404B (en) * | 2010-08-27 | 2012-11-21 | 威盛电子股份有限公司 | Memory device and operation method thereof |
| CN102156731A (en) * | 2011-04-08 | 2011-08-17 | 传聚互动(北京)科技有限公司 | Data storage method and device for flash memory |
| CN102156731B (en) * | 2011-04-08 | 2013-06-05 | 传聚互动(北京)科技有限公司 | Data storage method and device for flash memory |
| CN106339334A (en) * | 2015-07-07 | 2017-01-18 | 钰群科技股份有限公司 | Starting method of universal serial bus compatible flash memory device and related flash memory device |
| CN108073359A (en) * | 2016-11-15 | 2018-05-25 | 慧荣科技股份有限公司 | Operation method of data storage device |
| CN108073359B (en) * | 2016-11-15 | 2021-01-08 | 慧荣科技股份有限公司 | Operation method of data storage device |
| TWI670640B (en) * | 2016-11-25 | 2019-09-01 | 慧榮科技股份有限公司 | Data storage method and data recovery method for data storage device, and data storage device using the same methods |
| US10579483B2 (en) | 2016-11-25 | 2020-03-03 | Silicon Motion, Inc. | Storing a compact flash physical-to-host logical address mapping table on power loss |
| WO2019148791A1 (en) * | 2018-01-30 | 2019-08-08 | 江苏华存电子科技有限公司 | Method for fast activation of firmware of flash memory, and short structure stored in flash memory |
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Open date: 20090617 |