CN101447177A - Display capable of actively regulating drive voltage, voltage compensation circuit and driving method - Google Patents

Display capable of actively regulating drive voltage, voltage compensation circuit and driving method Download PDF

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Publication number
CN101447177A
CN101447177A CNA2009100016028A CN200910001602A CN101447177A CN 101447177 A CN101447177 A CN 101447177A CN A2009100016028 A CNA2009100016028 A CN A2009100016028A CN 200910001602 A CN200910001602 A CN 200910001602A CN 101447177 A CN101447177 A CN 101447177A
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China
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voltage
output
positive gate
common
count value
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CNA2009100016028A
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Chinese (zh)
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CN101447177B (en
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李国贤
郑国兴
谢曜任
陈耿铭
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友达光电股份有限公司
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Abstract

The invention provides a display capable of actively regulating drive voltage, a voltage compensation circuit and a driving method. The display comprises a display panel, a gate drive circuit and a voltage selector. The display panel starts pixels and displays an image according to a plurality of groups of gate output voltages and a common voltage. The gate drive circuit provides the gate output voltages according to a gate input signal. The voltage selector provides a plurality of dissimilar positive gate voltages and a plurality of dissimilar common voltages, outputs a corresponding positive gate voltage from the positive gate voltages and outputs a corresponding common voltage from the dissimilar common voltages according to the relationship between a reference voltage and an nth grade gate output voltage. Therefore, the drive voltage can be actively regulated.

Description

Can initiatively adjust display, voltage compensating circuit and the driving method of driving voltage

Technical field

The present invention refers to a kind of display, voltage compensating circuit and the driving method that can initiatively adjust driving voltage especially about a kind of display, voltage compensating circuit and driving method.

Background technology

Because LCD (liquid crystal display) has low radiation, volume is little and advantage such as low power consuming, replace traditional cathode-ray tube display (cathode ray tube display) gradually, thereby be widely used in notebook computer, personal digital assistant (personal digital assistant, PDA), flat-surface television, or on the information products such as mobile phone.The mode of conventional liquid crystal is to utilize the external drive wafer to drive pixel on the panel with display image, but in order to reduce component number and to reduce manufacturing cost, developing into gradually in recent years directly is made in driving circuit structure on the display panel, for example gate driver circuit (gate driver) is integrated in liquid crystal panel (Gate on Array, technology GOA).

Please refer to Fig. 1, Fig. 1 is the synoptic diagram of a LCD 100 in the known technology.As shown in Figure 1, LCD 100 comprises a display panels 110, one source pole driving circuit 120, and a gate driver circuit 130.The display panels 110 of LCD 100 is provided with a plurality of pixel PX that are in array-like arrangement, a plurality of data line D 1~D m, and a plurality of gate lines G 1~G nSource electrode drive circuit 120 is used for driving data lines D 1~D m, and gate driver circuit 130 can provide output voltage V 1~V nWith difference driving grid line G 1~G n

Please refer to Fig. 2.Fig. 2 is for describing the synoptic diagram of LCD operating characteristic.In Fig. 2, but the longitudinal axis is represented the minimum output voltage (volt) of gate driver circuit normal running panel, transverse axis represent service time (hour), the operation of LCD temperature be Celsius 85 the degree, curve A is represented positive gate voltage V Gh=11V and negative-gate voltage V G1Family curve during=-11V, curve B are represented positive gate voltage V Gh=20V and negative-gate voltage V G1Family curve during=-11V.Because the minimum output voltage of normal running gate driver circuit can and become big gradually with the running time increase, referring to the curve A of Fig. 2, at positive gate voltage V GhUnder the operating conditions of=11V, LCD is after use surpassing about 250 hours, and minimum output voltage that can the normal running gate driver circuit can exceed the ideal grid voltage (V of this condition Gh=11V), cause operation exception easily; Shown in the curve B of Fig. 2, at positive gate voltage V GhUnder the operating conditions of=20V, though LCD after using about 800 hours, minimum output voltage still maintains in the desirable voltage range.Therefore, improve positive gate voltage V GhCan elongate the service time of panel effectively.

Please refer to Fig. 3, the caption of Fig. 3 the power consumption of LCD under the different operating condition.In Fig. 3, T _ stressRepresentative applies the time length of bias voltage, and the unstress representative does not apply bias voltage as yet.V GhAnd V G1Represent positive gate voltage and negative-gate voltage (V) respectively, I hAnd I 1Representative applies positive gate voltage V respectively GhWith apply negative-gate voltage V gThe time electric current (mA), P hAnd P 1Representative applies positive gate voltage V respectively GhWith apply negative-gate voltage V gThe time power consumption (mW), and P _ sumRepresent total power consumption (mW).At T _ stressCompare total power consumption P under the identical condition _ sum, that is comparison condition one and condition two or comparison condition three and condition four, can learn total power consumption P _ sumWith positive gate voltage V GhBe directly proportional.Therefore, improve positive gate voltage V GhThough can elongate service time, increase the power consumption of panel simultaneously.

Summary of the invention

The invention provides a kind of display that can initiatively adjust driving voltage, comprise a display panel, be used for coming on-pixel with display image according to many group grid output voltages and a common voltage; One gate driver circuit is used for providing described many group grid output voltages according to a grid input signal; One voltage selector, be coupled to described gate driver circuit to receive the n level grid output voltage in described many group grid output voltages, described voltage selector can provide a plurality of different positive gate voltage and a plurality of different common voltage, and can be according to the relation between a reference voltage and the described n level grid output voltage, from described a plurality of positive gate voltage, choose a corresponding positive gate voltage with as an output positive gate voltage, and from the different common voltage of described many groups, choose a corresponding common voltage with as described common voltage; Time schedule controller is used for producing a clock pulse signal; And a voltage generator, be used for producing a negative-gate voltage.

The present invention provides a kind of voltage compensating circuit that is applied to display panel in addition, comprises a gate driver circuit, in order to produce many group grid output voltage to pel arrays; One voltage selector, be coupled to described gate driver circuit to receive the n level grid output voltage in many group grid output voltages, described voltage selector can provide different positive gate voltage of many groups and the different common voltage of many groups, and can be according to the relation between a reference voltage and the described n level grid output voltage, from described many group positive gate voltage, choose a corresponding positive gate voltage with as an output positive gate voltage, and from the different common voltage of described many groups, choose a corresponding common voltage with as described common voltage; Time schedule controller is used for producing a clock pulse signal; And a voltage generator, be used for producing a negative-gate voltage.

The present invention provides a kind of method that drives display panel in addition, and a n level grid output voltage that provides in a plurality of grid output voltages is provided; Relatively the current potential between a reference voltage and the described n level grid output voltage just; When described n level grid output voltage during greater than described reference voltage, choose in many group positive gate voltage corresponding first positive gate voltage with as an output positive gate voltage, and choose in the different common voltage of many groups corresponding first common voltage with as an output common voltage; And when described n level grid output voltage is not more than described reference voltage, choose in described a plurality of positive gate voltage greater than one second positive gate voltage of described first positive gate voltage with as described output positive gate voltage, and choose in described a plurality of common voltage less than one second common voltage of described first common voltage with as described output common voltage.

Utilize technical scheme provided by the invention, can promote the serviceable life of display panel, can significantly not increase power consumption simultaneously.

Description of drawings

Fig. 1 is the synoptic diagram of a LCD in the known technology.

Fig. 2 is the synoptic diagram of LCD operating characteristic.

Fig. 3 is the chart of explanation LCD institute's consumed power under the different operating condition.

Fig. 4 applies the chart of the size and the corresponding time relationship of bias voltage for the explanation LCD.

Fig. 5 is the synoptic diagram of a LCD among the present invention.

Fig. 6 is the functional block diagram of grid compensating circuit of the present invention.

Fig. 7 is the functional block diagram of voltage selector in the first embodiment of the invention.

Fig. 8 is the sequential chart in voltage selector when running of first embodiment of the invention.

Fig. 9 is the functional block diagram of voltage selector in the second embodiment of the invention.

Figure 10 is the sequential chart in voltage selector when running of second embodiment of the invention.

Process flow diagram when Figure 11 operates for voltage selector of the present invention.

Figure 12 is the synoptic diagram of a LCD in another embodiment of the present invention.

Drawing reference numeral

50 voltage selectors, 52 time schedule controllers

54 voltage generators, 56 voltage quasi position translators

58 comparer 60ADC

62 counters, 64 voltage follower circuits

66 control circuits, 540 grid compensating circuits

D 1~D mData line G 1~G nGate line

PX pixel MUX1, MUX2 multiplexer

100,500 LCD, 110,510 display panels

120,520 source electrode drive circuits, 130,530~532 gate driver circuits

Embodiment

Please refer again to Fig. 3, under the identical condition of bias voltage, compare total power consumption P _ sum, that is comparison condition one and condition three or comparison condition two and condition four, can learn total power consumption P _ sumWith the time T that applies bias voltage _ stressBe inversely proportional to.Work as T _ stressAfter surpassing a particular value (for example 500 hours), under the condition of identical bias, total power consumption P _ sumWhen reducing to unstress approximately half (for example reduce to 46.2mV or reduce to 111.7mV) from 202.9mV from 115mV.The present invention promptly utilizes this panel characteristics, when initial with low positive gate voltage V GhDrive panel, to save power consumption; When surpass a predetermined value service time, again with higher positive gate voltage V GhDrive panel, promote the serviceable life of panel, also can significantly not increase power consumption simultaneously.

Since the effect of feedthrough penetration effect (feed-through), the common voltage of display panel (commonvoltage) V ComAlso can be along with positive gate voltage V GhValue and change.Please refer to Fig. 4, Fig. 4 has illustrated common voltage, positive gate voltage V GhWith the time T that applies bias voltage _ stressBetween relation.As shown in Figure 4, V ComThe common voltage of representative when unstress, common voltage V ComWith positive gate voltage V GhBe inversely proportional to; V Com 'T is worked as in representative _ stressCommon voltage during greater than a particular value (for example 500 hours), common voltage V Com 'With positive gate voltage V GhAlso be inversely proportional to.Simultaneously, work as T _ stressWhen surpassing a particular value (for example 500 hours), positive gate voltage V GhNeed greater than a particular value (for example 15V) operation display panel normally.At positive gate voltage V GhCompare the value of common voltage under the identical condition, that is compare V ComAnd V Com ', can learn V ComAnd V Com 'Between difference little.In other words, apply the time T of bias voltage _ stressTo common voltage influence and little, so the present invention only need consider positive gate voltage V GhInfluence to common voltage: when initial with low positive gate voltage V GhWith higher common voltage V ComDrive panel, to save power consumption; When surpass a predetermined value service time, again with higher positive gate voltage V GhWith low common voltage V ComDrive panel, promote the serviceable life of panel, also can significantly not increase power consumption simultaneously, or change the characteristic of display panel.

Please refer to Fig. 5, Fig. 5 is the synoptic diagram of LCD 500 among the present invention.LCD 500 comprises display panels 510, source electrode drive circuit 520, gate driver circuit 530, and grid compensating circuit 540.Display panels 510 is provided with a plurality of pixel PX that are in array-like arrangement, a plurality of data line D 1~D m, and a plurality of gate lines G 1~G nThe source electrode drive circuit 520 of LCD 500.Gate driver circuit 530 operates according to the grid input signal Si, and the grid input signal Si comprises voltage signal V Ss, initial pulse (startpulse) signal V St, clock signal V Ck, and reverse clock signal V XckDeng.According to the grid input signal Si, gate driver circuit 530 can be with corresponding positive gate voltage V GhWith negative-gate voltage V G1Come driving grid line G 1~G n, the output voltage of gate driver circuit 530 is respectively by V at this moment 1~V nRepresent.Grid compensating circuit 540 can provide the grid input signal Si to gate driver circuit 530 and grid common voltage V is provided ComTo display panels 510, and revise grid input signal Si and common voltage V according to the output voltage of gate driver circuit 530 ComValue, therefore can drive display panels 510 with optimal bias.

When LCD 500 had just come into operation, gate driver circuit 530 was with predetermined positive gate voltage V Gh1With predetermined negative grid voltage V G1Come driving grid line G 1~G nBecause the output of the n level of gate driver circuit 530 is positioned at the end of signaling path, the common early start of its output voltage does not meet operating conditions, so the present invention can be according to the n level output voltage V of gate driver circuit 530 nJudge whether LCD 500 can normal operation under this kind bias condition.For instance, if under the condition of LCD 500 normal operations, each grade output voltage of gate driver circuit 530 all needs greater than reference voltage V Ref, grid compensating circuit 540 of the present invention can judge that whether n level output voltage V n is greater than reference voltage V Ref: if n level output voltage V nGreater than reference voltage V Ref, the output voltage of other grade of gate driver circuit 530 also can be greater than reference voltage V under the situation of the overwhelming majority Ref, this moment can be with the positive gate voltage V under the predetermined bias condition Gh1, negative-gate voltage V G1With common voltage V Com1Drive display panels 510.Use above behind the certain hour when LCD 500, its characteristic may fail, and then possibly can't reach predetermined display quality if continue to drive display panels 510 with the predetermined bias condition this moment.Therefore, if n level output voltage V nBe not more than reference voltage V Ref, grid compensating circuit 540 can provide corresponding grid input signal Si, so could be with the positive gate voltage V under the preferable bias condition Gh2, negative-gate voltage V G1With common voltage V Com2Drive display panels 510.In other words, grid compensating circuit 540 can come Active Compensation gate input voltage Si according to the output voltage of gate driver circuit 530, and so gate driver circuit 530 can be with corresponding positive gate voltage V GhCome driving grid line G 1~G n, and corresponding common voltage V is provided ComTo display panels 510.

As Fig. 2~shown in Figure 4, V in the previous embodiment Gh2V Gh1And V Com2<V Com1That is not reaching predetermined standard time when the display quality of LCD 500, the present invention is with higher positive gate voltage V GhWith low common voltage V ComDrive panel to promote the serviceable life of panel, also can significantly not increase power consumption simultaneously.

Please refer to Fig. 6, Fig. 6 is the functional block diagram of grid compensating circuit 540.Grid compensating circuit 540 comprises voltage selector (voltage selector) 50, time schedule controller (timing controller) 52, voltage generator (voltage generator) 54, and voltage quasi position translator (level shifter) 56.Voltage selector 50 is coupled to gate driver circuit 530 and display panels 510, can be according to the output voltage V of gate driver circuit 530 nCorresponding positive gate voltage V is provided GhWith common voltage V ComTime schedule controller 52 can provide gate driver circuit 530 runnings required logical signal Sc, and voltage generator 54 can provide negative-gate voltage V G1Voltage quasi position translator 56 is coupled to voltage selector 50, time schedule controller 52, voltage generator 54 and gate driver circuit 530, can be according to logical signal Sc, positive gate voltage V Gh, and negative-gate voltage V G1The grid input signal Si is provided, makes that gate driver circuit 530 can be according to the voltage signal V that comprises in the grid input signal Si Ss, initial pulse signal V St, clock signal V Ck, and reverse clock signal V XckWait and operate.

Please refer to Fig. 7, Fig. 7 is the functional block diagram of voltage selector 50 in the first embodiment of the invention.The voltage selector 50 of first embodiment comprise comparer 58, analog-digital converter (Analog to DigitalConverter, ADC) 60, counter 62, voltage follower circuit 64.Comparer 58 is coupled to gate driver circuit 530, is used for comparison reference voltage V RefAnd output voltage V nCurrent potential height: if output voltage V nGreater than reference voltage V Ref, comparer 58 can output noble potential simulating signal V aIf output voltage V nBe not more than reference voltage V Ref, comparer 58 can output electronegative potential simulating signal V aAnalog-digital converter 60 is coupled to comparer 58, can be with simulating signal V aBe converted to digital signal V d: if receive noble potential simulating signal V a, the digital signal V of analog-digital converter 60 meeting output device logical one current potentials dIf receive electronegative potential simulating signal V a, the digital signal V of analog-digital converter 60 meeting output device logical zero current potentials dCounter 62 is coupled to analog-digital converter 60, can be according to digital signal V dProduce output count value C oVoltage follower circuit 64 comprises control circuit 66 and multiplexer MUX1, MUX2, and control circuit 66 is coupled to counter 62, can relatively export count value C oWith reference count value C tSize and export corresponding control signal V t, multiplexer MUX1 and MUX2 then can be according to control signal V tExport corresponding positive gate voltage and output common voltage.For instance, if output count value C oGreater than reference count value C t, multiplexer MUX1 can export positive gate voltage V Gh1(for example 11V) is to voltage quasi position translator 56, and output common voltage V Com1(for example 3.89V) is to display panels 510; If output count value C oBe not more than reference count value C t, multiplexer MUX1 can export positive gate voltage V Gh2(for example 20V) is to voltage quasi position translator 56, and output common voltage V Com2(for example 3.29V) is to display panels 510.

Please refer to Fig. 8, Fig. 8 is the sequential chart of voltage selector 50 when running of first embodiment of the invention.Fig. 8 has shown output voltage V n, digital signal V d, positive gate voltage V GhWith common voltage V ComWaveform.Work as output voltage V nValue greater than reference voltage V RefThe time, counter 62 begins counting, up to output voltage V nValue be lower than reference voltage V RefTill, the output count value that calculates is respectively by C O1, C O2, C O3... wait and represent.In the embodiment of Fig. 8, first three output voltage V N1~V N3Be higher than reference voltage V RefTime correspond respectively to output count value C O1~C O3, wherein export count value C O1And C O3Greater than reference count value C t, and output count value C O2Less than reference count value C tBecause C O1C t, this moment still can be with corresponding to output voltage V N1Positive gate voltage V Gh1With common voltage V Com1Drive LCD.Afterwards, output voltage V N2Waveform depart from ideal value, make C O2<C t, the present invention's this moment can select preferable positive gate voltage V Gh2With common voltage V Com2Drive LCD.After using preferred drive voltage, output voltage V N3Waveform reply normal, so C O3C t, the present invention's this moment can continue to use positive gate voltage V Gh2With common voltage V Com2Drive LCD.

Please refer to Fig. 9, Fig. 9 is the functional block diagram of voltage selector 50 in the second embodiment of the invention.Second embodiment and first embodiment are similar, and difference is that first embodiment among Fig. 7 can provide V Gh1/ V G1/ V Com1And V Gh2/ V G1/ V Com2Two groups of different bias condition, second embodiment among Fig. 9 then can provide V Gh1/ V G1/ V Com1~V Ghn/ V G1/ V ComnOrganize different bias condition Deng n.In a second embodiment, the control circuit 66 of voltage follower circuit 64 will be exported count value C equally oWith reference count value C tCompare, and export corresponding control signal V t, multiplexer MUX1 and MUX2 then can be according to control signal V tExport corresponding positive gate voltage and output common voltage.For instance, if output count value C oGreater than reference count value C t, multiplexer MUX1 can export positive gate voltage V Gh1(for example 11V) is to voltage quasi position translator 56, and output common voltage V Com1(for example 3.89V) is to display panels 510; When output count value Co began to be not more than reference count value Ct, multiplexer MUX1 at first can export positive gate voltage V Gh2(for example 13V) is to voltage quasi position translator 56, and multiplexer MUX2 at first can export common voltage V Com2(for example 3.72V) judges to display panels 510 whether this drive condition is enough again.If with positive gate voltage V Gh2With output common voltage V Com2Drive and still can't allow output voltage V nGreater than reference voltage V Ref, output count value C oStill be not more than reference count value C tThe time, this moment, multiplexer MUX1 can export positive gate voltage V Gh3(for example 15V) is to voltage quasi position translator 56, and multiplexer MUX2 can export common voltage V Com3(for example 3.53V) is to display panels 510; If with positive gate voltage V Gh2With output common voltage V Com2Output voltage V when driving nGreater than reference voltage V Ref, this moment, voltage selector 50 can continue this bias condition is provided, and regularly carried out aforementioned determining step.With positive gate voltage V Gh3With output common voltage V Com3Under the situation that drives, if output voltage V nBe lower than reference voltage V once again Ref, can change bias condition this moment once more, multiplexer MUX1 output positive gate voltage V Gh4(for example 20V) is to voltage quasi position translator 56, and multiplexer MUX2 output common voltage V Com4(for example 3.29V) is to display panels 510.In other words, second embodiment of the invention can be according to output voltage V nValue progressively change the value of bias voltage, and non-once significantly changes bias value.

Please refer to Figure 10, Figure 10 is the sequential chart of voltage selector 50 when running of second embodiment of the invention.Figure 10 has shown output voltage V n, digital signal V d, positive gate voltage V GhWith common voltage V ComWaveform.Work as output voltage V nValue greater than reference voltage V RefThe time, counter 62 begins counting, up to output voltage V nValue be lower than reference voltage V RefTill, the output count value that calculates is respectively by C O1, C O2, C O3, C O4... wait and represent.In the embodiment of Figure 10, preceding four output voltage V N1~V N4Be higher than reference voltage V RefTime correspond respectively to output count value C O1~C O4, wherein export count value C O1And C O4Greater than reference count value C t, and output count value C O2And C O3Less than reference count value C tBecause C O1C t, this moment still can be with corresponding to output voltage V N1Positive gate voltage V Gh1With common voltage V Com1Drive LCD.Afterwards, output voltage V N2Waveform depart from ideal value, make C O2<C t, the present invention's this moment can select preferable positive gate voltage V Gh2With common voltage V Com2Drive LCD.Using positive gate voltage V Gh2With common voltage V Com2After, output voltage V N3Waveform still depart from ideal value, so C O3<C t, the present invention's this moment can select preferable positive gate voltage V once more Gh3With common voltage V Com3Drive LCD.Using positive gate voltage V Gh3With common voltage V Com3After, output voltage V N4Waveform reply normal, so C O4C t, the present invention's this moment can continue to use positive gate voltage V Gh3With common voltage V Com3Drive LCD.

Please refer to Figure 11, the process flow diagram when Figure 11 operates for voltage selector 50 of the present invention.The process flow diagram of Figure 11 comprises the following steps:

Step 910: provide many group positive gate voltage to organize in the common voltages with more;

Step 920: a predetermined common voltage in a predetermined positive gate voltage and more than the one group common voltages in the many groups of the output positive gate voltage;

Step 930: receive a grid output voltage V n

Step 940: judge the grid output voltage V nWhether greater than a reference voltage V RefIf grid output voltage V nGreater than reference voltage V Ref, execution in step 960; If grid output voltage V nBe not more than reference voltage V Ref, execution in step 950;

Step 950: another corresponding common voltage in another corresponding positive gate voltage and more than the one group common voltages in the many groups of the output positive gate voltage; Execution in step 930;

Step 960: output is corresponding to the grid output voltage V nPositive gate voltage and common voltage; Execution in step 930.

Please refer to Figure 12, Figure 12 is the synoptic diagram of LCD 550 in another embodiment of the present invention.LCD 550 comprises display panels 510, source electrode drive circuit 520, two gate driver circuits 531 and 532, and grid compensating circuit 540.LCD 550 and LCD 500 are similar, and difference is that LCD 550 adopts the framework of bilateral driving, also is about to the both sides that gate driver circuit 531 and 532 is arranged at display panels 510 respectively.Gate driver circuit 531 and 532 all operates according to the grid input signal Si, and its output voltage is respectively by Vl 1~Vl nAnd Vr 1~Vr nRepresent.550 whiles of LCD of the present invention are according to the n level output voltage V l of gate driver circuit 531 and 532 nAnd Vr nWhether judge can normal operation under the predetermined bias condition.For instance, if n level output voltage V l nAnd Vr nOne of them is not more than reference voltage V Ref, grid compensating circuit 540 can provide corresponding grid input signal Si to change the drive condition of gate driver circuit 531 and 532 simultaneously.

As previously mentioned, the present invention can select to be positioned at the n level output voltage V of the end of signaling path nBe used as Rule of judgment, also can judge whether LCD can normal operation simultaneously according to other grade output voltage.The structure of voltage selector 50 only is embodiments of the invention among Fig. 7 and Fig. 8, does not limit category of the present invention.

The above only is preferred embodiment of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.

Claims (23)

1. the display that can initiatively adjust driving voltage is characterized in that, the described display that can initiatively adjust driving voltage comprises:
One display panel is used for coming on-pixel with display image according to many group grid output voltages and a common voltage;
One gate driver circuit is used for providing described many group grid output voltages according to a grid input signal;
One voltage selector, be coupled to described gate driver circuit to receive the n level grid output voltage in described many group grid output voltages, described voltage selector can provide a plurality of different positive gate voltage and a plurality of different common voltage, and can be according to the relation between a reference voltage and the described n level grid output voltage, from described a plurality of positive gate voltage, choose a corresponding positive gate voltage with as an output positive gate voltage, and from the different common voltage of described many groups, choose a corresponding common voltage with as described common voltage;
Time schedule controller is used for producing a clock pulse signal; And
One voltage generator is used for producing a negative-gate voltage.
2. display as claimed in claim 1 is characterized in that, described voltage selector comprises:
One comparer is coupled to described gate driver circuit, is used for the current potential height of more described reference voltage and described n level grid output voltage, and produces a simulating signal according to comparative result;
One analog-digital converter is coupled to described comparer, and being used for described analog signal conversion is a digital signal;
One counter is coupled to described analog-digital converter, is used for producing an output count value according to described digital signal; And
One voltage follower circuit is coupled to described counter, is used for the size of a more described output count value and a reference count value, and produces described output positive gate voltage and described common voltage according to comparative result.
3. display as claimed in claim 2 is characterized in that, when the current potential of described n level grid output voltage during greater than described reference voltage, described comparer is exported a noble potential simulating signal; And
When the current potential of described n level grid output voltage was not more than described reference voltage, described comparer was exported an electronegative potential simulating signal.
4. display as claimed in claim 2 is characterized in that, when receiving a noble potential simulating signal, described analog-digital converter is a logical one digital signal with described noble potential analog signal conversion; And
When receiving an electronegative potential simulating signal, described analog-digital converter is a logical zero digital signal with described electronegative potential analog signal conversion.
5. display as claimed in claim 2, it is characterized in that, when described output count value during greater than described reference count value, described voltage follower circuit is chosen in described many group positive gate voltage an original positive gate voltage with as described output positive gate voltage, and chooses in the different common voltage of described many groups an original common voltage with as described common voltage; And
When described output count value during less than described reference count value, described voltage follower circuit choose in described many group positive gate voltage one greater than the positive gate voltage of described original positive gate voltage with as described output positive gate voltage, and choose in the different common voltage of described many groups one less than the common voltage of described original common voltage with as described common voltage.
6. display as claimed in claim 2 is characterized in that, described voltage follower circuit comprises:
One controller is coupled to described counter, is used for the size of more described output count value and described reference count value, and produces a control signal according to comparative result;
One first multiplexer is coupled to described controller, is used for choosing described output positive gate voltage according to described control signal from a plurality of positive gate voltage; And
One second multiplexer is coupled to described controller, is used for choosing described common voltage according to described control signal from a plurality of different common voltages.
7. display as claimed in claim 1 is characterized in that described gate driver circuit is integrated in described liquid crystal panel.
8. display as claimed in claim 1 is characterized in that, described display comprises in addition:
One voltage quasi position translator is coupled to described voltage selector, described time schedule controller and described voltage generator, be used for according to described clock signal, described negative-gate voltage, and described output positive gate voltage produces described grid input signal.
9. a voltage compensating circuit that is applied to display panel is characterized in that, described voltage compensating circuit comprises:
One gate driver circuit is in order to produce many group grid output voltage to pel arrays;
One voltage selector, be coupled to described gate driver circuit to receive the n level grid output voltage in many group grid output voltages, described voltage selector can provide different positive gate voltage of many groups and the different common voltage of many groups, and can be according to the relation between a reference voltage and the described n level grid output voltage, from described many group positive gate voltage, choose a corresponding positive gate voltage with as an output positive gate voltage, and from the different common voltage of described many groups, choose a corresponding common voltage with as described common voltage;
Time schedule controller is used for producing a clock pulse signal; And
One voltage generator is used for producing a negative-gate voltage.
10. voltage compensating circuit as claimed in claim 9 is characterized in that, described voltage selector comprises:
One comparer is coupled to described gate driver circuit, is used for the current potential height of more described reference voltage and described n level grid output voltage, and produces a simulating signal according to comparative result;
One analog-digital converter is coupled to described comparer, and being used for described analog signal conversion is a digital signal;
One counter is coupled to described analog-digital converter, is used for producing an output count value according to described digital signal; And
One voltage follower circuit is coupled to described counter, is used for the size of a more described output count value and a reference count value, and produces described output positive gate voltage and described common voltage according to comparative result.
11. voltage compensating circuit as claimed in claim 10 is characterized in that, when the current potential of described n level grid output voltage during greater than described reference voltage, described comparer is exported a noble potential simulating signal; And
When the current potential of described n level grid output voltage was not more than described reference voltage, described comparer was exported an electronegative potential simulating signal.
12. voltage compensating circuit as claimed in claim 10 is characterized in that, when receiving a noble potential simulating signal, described analog-digital converter is a logical one digital signal with described noble potential analog signal conversion; And
When receiving an electronegative potential simulating signal, described analog-digital converter is a logical zero digital signal with described electronegative potential analog signal conversion.
13. voltage compensating circuit as claimed in claim 10 is characterized in that, described counter produces described output count value according to the width of described digital signal.
14. voltage compensating circuit as claimed in claim 10, it is characterized in that, when described output count value during greater than described reference count value, described voltage follower circuit is chosen in described many group positive gate voltage an original positive gate voltage with as described output positive gate voltage, and chooses in described many group common voltages an original common voltage with as described common voltage; And
When described output count value during less than described reference count value, described voltage follower circuit choose in described many group positive gate voltage one greater than the positive gate voltage of described original positive gate voltage with as described output positive gate voltage, and choose in described many group common voltages one less than the common voltage of described original common voltage with as described common voltage.
15. voltage compensating circuit as claimed in claim 10 is characterized in that, described voltage follower circuit comprises:
One controller is coupled to described counter, is used for the size of more described output count value and described reference count value, and produces a control signal according to comparative result;
One first multiplexer is coupled to described controller, is used for from a plurality of positive gate voltage, choosing described output positive gate voltage according to described control signal, and
One second multiplexer is coupled to described controller, is used for choosing described common voltage according to described control signal from a plurality of common voltages.
16. voltage compensating circuit as claimed in claim 9, it is characterized in that, described voltage compensating circuit comprises a voltage quasi position translator in addition, be coupled to described voltage selector, described time schedule controller and described voltage generator, be used for according to described clock signal, described negative-gate voltage, and described output positive gate voltage produces the required grid input signal of the described gate driver circuit of driving.
17. a method that drives display panel is characterized in that, described method comprises:
N level grid output voltage in a plurality of grid output voltages is provided;
Relatively the current potential between a reference voltage and the described n level grid output voltage just;
When described n level grid output voltage during greater than described reference voltage, choose in many group positive gate voltage corresponding first positive gate voltage with as an output positive gate voltage, and choose in the different common voltage of many groups corresponding first common voltage with as an output common voltage; And
When described n level grid output voltage is not more than described reference voltage, choose in described a plurality of positive gate voltage greater than one second positive gate voltage of described first positive gate voltage with as described output positive gate voltage, and choose in described a plurality of common voltage less than one second common voltage of described first common voltage with as described output common voltage.
18. method as claimed in claim 17 is characterized in that, described method comprises in addition:
One simulating signal is provided;
With described analog signal conversion is a logic digital signal;
Width according to described logic digital signal produces an output count value; And
The size of a more described output count value and a reference count value.
19. method as claimed in claim 17 is characterized in that, described method comprises the size of more described n level grid output voltage and described reference voltage in addition.
20. method as claimed in claim 17 is characterized in that, provides a n level grid output voltage in a plurality of grid output voltages that afterbody grid output voltage in described a plurality of grid output voltage is provided.
21. method as claimed in claim 17 is characterized in that, described method comprises in addition provides described a plurality of positive gate voltage and described a plurality of common voltage.
22. method as claimed in claim 17 is characterized in that, described method comprises that in addition described output positive gate voltage of foundation and described output common voltage drive a display panel.
23. method as claimed in claim 17 is characterized in that, described method comprises in addition according to the characteristic of a display panel sets described reference voltage.
CN2009100016028A 2009-01-05 2009-01-05 Display capable of actively regulating drive voltage, voltage compensation circuit and driving method CN101447177B (en)

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