CN101414638A - 显示装置和显示装置的制造方法 - Google Patents

显示装置和显示装置的制造方法 Download PDF

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CN101414638A
CN101414638A CNA2008101499098A CN200810149909A CN101414638A CN 101414638 A CN101414638 A CN 101414638A CN A2008101499098 A CNA2008101499098 A CN A2008101499098A CN 200810149909 A CN200810149909 A CN 200810149909A CN 101414638 A CN101414638 A CN 101414638A
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三宅秀和
海东拓生
栗谷川武
宫泽敏夫
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Panasonic Intellectual Property Corp of America
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Abstract

本发明提供一种显示装置及显示装置的制造方法,该显示装置具有用极简单的结构、仅进一步增加一些工序数就实现了降低截止电流的多晶硅薄膜晶体管。该显示装置具有绝缘基板、和形成在上述绝缘基板上的薄膜晶体管,上述薄膜晶体管的半导体层具有多晶硅层、形成在上述多晶硅层上层的第一非晶硅层、形成在上述第一非晶硅层上层的第二非晶硅层。

Description

显示装置和显示装置的制造方法
技术领域
本发明涉及显示装置,尤其涉及具有薄膜晶体管的显示装置。
背景技术
这种显示装置在其显示部具有矩阵状配置的多个像素,通过经栅极信号线供给的扫描信号使其各像素具有的薄膜晶体管导通来依次选择其各像素列,与该选择定时相应地经漏极信号线向该像素列的各像素供给图像信号,其中该漏极信号线与其他像素列相对的像素共用连接。
有时在由上述各像素的集合体构成的显示区域的周边形成有用于驱动显示装置的驱动电路,该驱动电路也具有薄膜晶体管。
作为上述薄膜晶体管,以往使用由非晶硅形成半导体层的薄膜晶体管。从移动度高度方面考虑,也使用由多晶硅形成半导体层的薄膜晶体管。尤其在驱动电路中,使用多晶硅薄膜晶体管。
这些薄膜晶体管例如包括:与上述栅极信号线连接的栅电极、隔着绝缘膜跨过上述栅电极形成的半导体层、与上述漏极信号线连接且形成在上述半导体层上的漏电极、与上述像素电极连接且与上述漏电极相对地形成在上述半导体层上的源电极。
上述漏电极与源电极之间的半导体层起到沟道区域的作用,相应于对上述栅电极的施加电压,经上述沟道区域在上述漏电极与源电极之间流过电流。
上述薄膜晶体管通常在上述沟道区域与漏电极之间以及上述沟道区域与源电极之间分别设有电场缓和区域。该电场缓和区域用由较高电阻构成的半导体层构成,利用该电场缓和区域,避免在上述沟道区域与漏电极之间以及上述沟道区域与源电极之间产生电场集中,由此谋求缓和截止电流。
公知这样的电场缓和区域的构造如下:平面地配置在半导体层的沟道区域与漏极区域之间及沟道区域与源极区域之间,并且,与漏电极和源电极重叠地垂直配置。后者的构造例如由下述专利文献1所详细公开。
专利文献1:日本特开2001-102584号公报
在底栅构造多晶硅薄膜晶体管中,为了缓和漏极端的电场而应用LDD构造。若应用LDD构造,则需要光掩模、杂质注入工序,这会导致生产率变差。而且,由于LDD构造需要面积,因此存在开口率变低等缺点。因此,在上述专利文献1中,不是在平面而是在垂直方向形成电场缓和区域。具体而言,半导体层起到电场缓和的作用。在半导体层较薄时,沿纵向增加n-层来进行电场缓和。
但是,在垂直形成电场缓和区域时,需要形成与起到沟道区域作用的半导体层不同的、起到电场缓和区域作用的半导体层。因此,具有结构变得复杂、从而导致增大制造工时这样的问题。仅靠由半导体层来缓和垂直方向的电场,降低截止电流的效果并不充分。
发明内容
本发明的目的在于提供一种具有用极简单的结构、仅进一步增加一些工序数就实现了降低截止电流的多晶硅薄膜晶体管的显示装置。
简要说明本申请公开的发明中的代表性技术方案如下。
(1)一种显示装置,具有绝缘基板和形成在上述绝缘基板上的薄膜晶体管,其中,上述薄膜晶体管的半导体层具有多晶硅层、形成在上述多晶硅层上层的第一非晶硅层、形成在上述第一非晶硅层上层的第二非晶硅层。
(2)一种显示装置,具有绝缘基板和形成在上述绝缘基板上的多个薄膜晶体管,其中,上述绝缘基板具有像素区域和包围上述像素区域的周边区域,上述多个薄膜晶体管具有多个第一薄膜晶体管和多个第二薄膜晶体管,上述多个第一薄膜晶体管形成在上述像素区域,上述多个第二薄膜晶体管形成在上述周边区域,上述多个第一薄膜晶体管的半导体层具有第一非晶硅层、和形成在上述第一非晶硅层上层的第二非晶硅层,上述多个第二薄膜晶体管的半导体层具有多晶硅层,在上述多晶硅层的上层形成有上述第一非晶硅层和上述第二非晶硅层。
(3)在(1)或(2)中,上述第一非晶硅层和上述第二非晶硅层的氢浓度不同。
(4)在(1)~(3)任一项中,上述第二非晶硅层的氢浓度小于上述第一非晶硅层的氢浓度。
(5)在(1)~(4)任一项中,上述第一非晶硅层的层厚是10nm~100nm。
(6)在(1)~(5)任一项中,上述第二非晶硅层的层厚是50nm~100nm。
(7)一种显示装置的制造方法,该显示装置具有绝缘基板、和形成在上述绝缘基板上的薄膜晶体管,上述薄膜晶体管具有半导体层,该显示装置的制造方法包括如下工序:第一工序,对非晶硅层,进行成膜进行了脱氢处理之后,对上述非晶硅层照射激光来使其结晶化而形成多晶硅层;第二工序,在上述多晶硅层的上层形成第一非晶硅层;第三工序,在上述第一非晶硅层的上层形成第二非晶硅层。
简要说明本申请公开的发明中的代表性技术方案所得到的效果如下。
能够形成用极简单的结构、仅进一步增加一些工序数就实现了降低截止电流的多晶硅薄膜晶体管。
不会有损非晶硅薄膜晶体管的特性,就可降低多晶硅薄膜晶体管的截止电流。可以在同一基板上同时形成具有优良特性的非晶硅薄膜晶体管和多晶硅薄膜晶体管。
因此,可以以低成本制造将非晶硅薄膜晶体管应用于像素用晶体管、将多晶硅薄膜晶体管应用于周边部驱动电路部分的显示装置。
附图说明
图1是表示本发明的显示装置中的形成了薄膜晶体管的绝缘基板的图。
图2是表示以往的多晶硅薄膜晶体管的截面构造的图。
图3是表示本发明的多晶硅薄膜晶体管的截面构造的图。
图4是表示本发明的形成在显示区域的非晶硅薄膜晶体管的截面构造的图。
图5是表示以往构造与本发明的多晶硅薄膜晶体管的动态特性的比较的图。
图6是表示以往构造与本发明的非晶硅薄膜晶体管的动态特性的比较的图。
图7A、7B是表示本发明的多晶硅薄膜晶体管和非晶硅薄膜晶体管的制造工艺的图。
图8A、8B是接着图7表示本发明的多晶硅薄膜晶体管和非晶硅薄膜晶体管的制造工艺的图。
图9A、9B是接着图8表示本发明的多晶硅薄膜晶体管和非晶硅薄膜晶体管的制造工艺的图。
图10A、10B是接着图9表示本发明的多晶硅薄膜晶体管和非晶硅薄膜晶体管的制造工艺的图。
图11A、11B是接着图10表示本发明的多晶硅薄膜晶体管和非晶硅薄膜晶体管的制造工艺的图。
具体实施方式
以下,参照附图详细说明本发明的显示装置。
在用于说明实施例的所有附图中,对具有相同功能的部件标注相同的附图标记,省略其详细说明。
图1是表示构成本发明显示装置的、形成有薄膜晶体管的绝缘基板的图。绝缘基板1由例如将玻璃用作材料的玻璃基板构成。
绝缘基板1上形成有显示区域101。在显示区域形成有多个像素。在显示区域外侧的周边区域形成有RGB切换开关102、移位寄存器103等的驱动电路。这些驱动电路内置于绝缘基板1上。
显示区域101的像素使用非晶硅薄膜晶体管,周边区域的驱动电路使用多晶硅薄膜晶体管。即,在同一绝缘基板1上同时形成非晶硅薄膜晶体管和多晶硅薄膜晶体管。
图2是表示在同一基板上同时形成非晶硅薄膜晶体管和多晶硅薄膜晶体管时的、以往的多晶硅薄膜晶体管的截面构造的图。在作为绝缘基板的玻璃基板201上形成栅电极202,在其上层形成栅极绝缘膜203。进而,在栅极绝缘膜203上层形成多晶硅层204和非晶硅层205作为沟道层。206是n+非晶硅层,207是源电极·漏电极。
图3表示本发明的多晶硅薄膜晶体管的截面构造的图。与图2相比不同之处在于,沟道层是多晶硅层204、第一非晶硅层301、第二非晶硅层302这三层构造。第一非晶硅层301和第二非晶硅层302由氢化非晶硅形成。对于氢化非晶硅的氢浓度,第二非晶硅层302的氢浓度小于第一非晶硅层301的氢浓度。
图4表示本发明的非晶硅薄膜晶体管的截面构造的图。在未图示的以往的非晶硅薄膜晶体管中,作为沟道层的非晶硅层是1层。与此不同,如图4所示,在本发明的非晶硅薄膜晶体管中,沟道层是第一非晶硅层301、第二非晶硅层302这两层构造。这是由于在同一基板上同时形成图3所示的多晶硅薄膜晶体管和非晶硅薄膜晶体管。
图5表示以往构造与本发明的多晶硅薄膜晶体管的动态特性的比较。横轴是栅极电压Vg(V),纵轴是漏极电流Id(A)。
在图5中,(A)曲线是以往构造的特性,(B)曲线是本发明的特性。在以往构造中,截止电流不会降低到零,会流过10nA以上的电流,与此相对,本发明中,可将截止电流降低到10pA以下。这是由于减小后沟道侧的非晶硅层(第二非晶硅层302)的氢浓度而使其具有难以流过电流的性质。
图6表示以往构造与本发明的非晶硅薄膜晶体管的动态特性的比较。横轴是栅极电压Vg(V),纵轴是漏极电流Id(A)。
在图6中,(A)曲线是以往构造的特性,(B)曲线是本发明的特性。如图6所示,在非晶硅薄膜晶体管中也可降低截止电流。
图7A~图11B表示本发明的多晶硅薄膜晶体管和非晶硅薄膜晶体管的制造工艺。
在图7A~图11B中,A表示形成在周边区域的多晶硅薄膜晶体管的制造工艺,B表示形成在显示区域的非晶硅薄膜晶体管的制造工艺。
如图7A、7B所示,在玻璃基板201上通过溅镀形成Mo等高熔点金属或其合金的膜,厚度为50~150nm左右。接着,通过光刻、蚀刻对成膜后的膜形成图案,加工成栅电极202。其后,将由SiO或SiN等形成的绝缘膜成膜为100~300nm左右的厚度,做成栅极绝缘膜203。
然后,在栅极绝缘膜203上使用CVD形成50~300nm左右厚度的非晶硅膜701,形成半导体层。进而,进行了脱氢处理后,通过脉冲或连续振荡激光702等使非晶硅结晶化,形成多晶硅层204。此时,在图7B所示的显示区域的薄膜晶体管中,未进行结晶,但也可以使其结晶。
接着,如图8A、8B所示,通过光刻、蚀刻仅将周边区域的多晶硅层204加工成岛状,通过蚀刻除去显示区域的多晶硅层。
接着,如图9A、9B所示,使用CVD分别形成10~100nm左右厚度的第一非晶硅层301、50~100nm左右厚度的第二非晶硅层302、10~50nm左右厚度的n+非晶硅层206,并通过光刻、蚀刻加工成岛状。此时,第二非晶硅层302的氢浓度小于第一非晶硅层301的氢浓度。
接着,如图10A、10B所示,为了形成源电极、漏电极,通过溅镀形成Al等金属或其合金的膜,厚度为300~500nm左右。此时,为了防止Al膜扩散、减少连接电阻,可以将Ti或Mo等高熔点金属或其合金作为屏蔽金属层,形成在Al层的上下。该屏蔽金属层的厚度可以是30~100nm左右。其后,通过光刻、蚀刻形成源电极·漏电极207。此外,为了形成半导体层的沟道,此时也对n+非晶硅层206进行蚀刻。此外,也对第二非晶硅层302的一部分进行蚀刻。
接着,如图11A、11B所示,作为保护绝缘膜1101,通过CVD形成例如SiN的膜,厚度为100~200nm左右。接着,涂敷平坦化有机膜1102。该平坦化有机膜1102使用感光性树脂,能够通过光刻来形成连接孔。将其作为掩模在保护绝缘膜1101上形成连接孔后,通过溅镀形成作为像素电极1103的透明导电膜、例如ITO,厚度为30~100nm左右。
通过以上的制造工艺,能够同时在同一基板上形成降低了截止电流的具有优良特性的多晶硅薄膜晶体管和非晶硅薄膜晶体管。
因此,可以以低成本制造将非晶硅薄膜晶体管应用于像素用晶体管、将多晶硅薄膜晶体管应用于周边部驱动电路部分的显示装置。
以上,基于上述实施例具体说明了本发明人作出的发明,但本发明不限于上述实施例,在不脱离其要旨的范围内,当然可以进行各种变更。

Claims (11)

1.一种显示装置,具有绝缘基板和形成在上述绝缘基板上的薄膜晶体管,其特征在于:
上述薄膜晶体管的半导体层具有多晶硅层、形成在上述多晶硅层上层的第一非晶硅层、形成在上述第一非晶硅层的上层的第二非晶硅层。
2.一种显示装置,具有绝缘基板和形成在上述绝缘基板上的多个薄膜晶体管,其特征在于:
上述绝缘基板具有像素区域和包围上述像素区域的周边区域,
上述多个薄膜晶体管具有多个第一薄膜晶体管和多个第二薄膜晶体管,
上述多个第一薄膜晶体管形成在上述像素区域,
上述多个第二薄膜晶体管形成在上述周边区域,
上述多个第一薄膜晶体管的半导体层具有第一非晶硅层和形成在上述第一非晶硅层的上层的第二非晶硅层,
上述多个第二薄膜晶体管的半导体层具有多晶硅层,并在上述多晶硅层的上层形成有上述第一非晶硅层和上述第二非晶硅层。
3.根据权利要求1所述的显示装置,其特征在于:
上述第一非晶硅层和上述第二非晶硅层的氢浓度不同。
4.根据权利要求2所述的显示装置,其特征在于:
上述第一非晶硅层和上述第二非晶硅层的氢浓度不同。
5.根据权利要求1所述的显示装置,其特征在于:
上述第二非晶硅层的氢浓度小于上述第一非晶硅层的氢浓度。
6.根据权利要求2所述的显示装置,其特征在于:
上述第二非晶硅层的氢浓度小于上述第一非晶硅层的氢浓度。
7.根据权利要求1所述的显示装置,其特征在于:
上述第一非晶硅层的层厚是10nm~100nm。
8.根据权利要求1所述的显示装置,其特征在于:
上述第二非晶硅层的层厚是50nm~100nm。
9.一种显示装置的制造方法,该显示装置具有绝缘基板和形成在上述绝缘基板上的薄膜晶体管,
上述显示装置的制造方法的特征在于:
上述薄膜晶体管具有半导体层,
该显示装置的制造方法包括如下工序:
第一工序,对非晶硅层进行成膜,且在进行了脱氢处理之后,对上述非晶硅层照射激光来使其结晶化而形成多晶硅层;
第二工序,在上述多晶硅层的上层形成第一非晶硅层;以及
第三工序,在上述第一非晶硅层的上层形成第二非晶硅层。
10.根据权利要求9所述的显示装置的制造方法,其特征在于:
上述第一非晶硅层和上述第二非晶硅层的氢浓度不同。
11.根据权利要求9所述的显示装置的制造方法,其特征在于:
上述第二非晶硅层的氢浓度小于上述第一非晶硅层的氢浓度。
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