CN101309064B - Step motor driving circuit - Google Patents
Step motor driving circuit Download PDFInfo
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- CN101309064B CN101309064B CN2007101070641A CN200710107064A CN101309064B CN 101309064 B CN101309064 B CN 101309064B CN 2007101070641 A CN2007101070641 A CN 2007101070641A CN 200710107064 A CN200710107064 A CN 200710107064A CN 101309064 B CN101309064 B CN 101309064B
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Abstract
The invention discloses a stepping motor driving circuit which includes an input voltage source group which is used to provides the input voltage source group, a reference voltage source which is used to provides a reference voltage, a voltage level shift unit which is used to increase the level of one of the input voltage source group to the level of the reference voltage, an operation unit which is used to receive the reference voltage and the input voltage source and to selectively output a control voltage, a reset voltage source which is used to output a reset voltage to control the operation unit to perform the reset action, and a voltage output terminal which is used to receive the control voltage and to output an output voltage. The stepping motor driving circuit of the invention avoids the current leakage and level instability when the circuit is electrified.
Description
Technical field
The present invention is relevant to a kind of step motor driving circuit, refers to a kind of step motor driving circuit that is used for stablizing the control step motor especially.
Background technology
Generally when driving stepper motor, typically use the H bridge circuit and make stepper motor carry out the rotation of different directions and stop, as shown in Figure 1, H bridge circuit 1 is by four metal-oxide semiconductor (MOS) (MOS; Metal oxide semiconductor) constitutes, by the conducting of first metal-oxide semiconductor (MOS) 11 and the 3rd metal-oxide semiconductor (MOS) 13, or the rotation direction of motor 15 is controlled in the conducting of second metal-oxide semiconductor (MOS) 12 and the 4th metal-oxide semiconductor (MOS) 14.When the conducting of control metal-oxide semiconductor (MOS), need come control switch by input voltage to the grid of metal-oxide semiconductor (MOS), because different metal-oxide semiconductor (MOS)s is opened needed voltage difference, therefore need different output voltage circuit to control, therefore the grid of each metal-oxide semiconductor (MOS) all can be connected to an output voltage circuit, the voltage of being exported by the output voltage circuit is controlled the running of whole H bridge circuit, makes revolution.
And in the output voltage circuit, usually has an input voltage, if directly open metal-oxide semiconductor (MOS) with the voltage of this input voltage, must consume very big power, in efficient and improper, therefore need input voltage be risen to the degree that is fit to open metal-oxide semiconductor (MOS) by this output voltage circuit, so that the running of H bridge.
Because the H bridge has comprised four metal-oxide semiconductor (MOS)s, the grid of each metal-oxide semiconductor (MOS) all is connected to an output voltage circuit, and the high voltage that sees through the output of output voltage circuit is opened metal-oxide semiconductor (MOS), makes motor operation.When wherein two metal-oxide semiconductor (MOS)s are opened, two other metal-oxide semiconductor (MOS) then will be closed, if when the metal-oxide semiconductor (MOS) that need close is not closed, or because leak electricity when understanding the output of spread of voltage, then the running of the mistake of H bridge then might make the anisotropy of revolution, even cause the infringement of motor, therefore, designing a good output voltage circuit becomes an important problem.
Summary of the invention
Therefore, one of purpose of the present invention is to provide a kind of step motor driving circuit, and it comprises: an input voltage source group, in order to an input voltage group to be provided; One reference voltage source is in order to provide a reference voltage; One voltage level shifting unit is in order to be promoted to one of them level of this input voltage group the level of this reference voltage with an ad hoc fashion; One arithmetic element in order to accepting this reference voltage and this input voltage group, and is selected output one control voltage; One reset voltage source is carried out a replacement action in order to export a reset voltage to control this arithmetic element; And an output voltage terminal, in order to receive this control voltage and to export an output voltage.
Step motor driving circuit of the present invention more comprises a voltage regulation unit, leaks electricity in order to prevent this step motor driving circuit, and this voltage regulation unit comprises a plurality of resistance, is coupled between this reference voltage source and this voltage level shifting unit.
Step motor driving circuit of the present invention, this input voltage group comprises one first input voltage source, one second input voltage source, the 3rd input voltage source and the 4th input voltage source, respectively in order to import one first input voltage, one second input voltage, one the 3rd input voltage and one the 4th input voltage, wherein this first and the level of this second input voltage anti-phase each other, the level of the 3rd and the 4th input voltage is anti-phase each other.
Step motor driving circuit of the present invention, the level of the level of the level of the level of this first input voltage, this second input voltage, the 3rd input voltage and the 4th input voltage is 0V or 5V, when the level of this first input voltage is 5V, the level of this second input voltage is 0V, otherwise when the level of this first input voltage was 0V, the level of this second input voltage was 5V; When the 3rd input voltage level was 5V, the level of the 4th input voltage was 0V, and when the 3rd input voltage level was 0V, the level of the 4th input voltage was 5V.
Step motor driving circuit of the present invention, this voltage level shifting unit comprise eight P-type mos and four N type metal oxide semiconductors.
Step motor driving circuit of the present invention, this arithmetic element comprise a NOR-logic door, a NAND Logic door and a plurality of inverter.
Step motor driving circuit of the present invention, this reset voltage source is coupled to the control end of this NOR-logic door, this NAND Logic door and these a plurality of inverters.
Step motor driving circuit of the present invention prevents the electric leakage of circuit generation when energising or the situation of current potential shakiness.
Description of drawings
Fig. 1 is the known H bridge circuit figure of preferred embodiment of the present invention.
Fig. 2 is the motor drive circuit circuit diagram of preferred embodiment of the present invention.
Embodiment
Please refer to Fig. 2, Fig. 2 is the motor drive circuit circuit diagram of preferred embodiment of the present invention, as shown in Figure 2, step motor driving circuit 2 comprises input voltage source group 21, reset voltage source 22, reference voltage source 23, first voltage level shifting unit 24, second voltage level shifting unit 25, arithmetic element 26, output voltage source 27, voltage regulation unit 28 and earth terminal 29.
Input voltage source group 21 comprises first input voltage source 211, second input voltage source 212, the 3rd input voltage source 213 and the 4th input voltage source 214, in order to import first input voltage, second input voltage, the 3rd input voltage and the 4th input voltage, be collectively referred to as the input voltage group respectively.Wherein input voltage group voltage level is 0V or 5V, and the level of first input voltage and second input voltage is anti-phase each other, and the level of the 3rd input voltage and the 4th input voltage is anti-phase each other.When the level of first input voltage was 5V, the level of second input voltage was 0V, otherwise when the level of first input voltage was 0V, the level of second input voltage was 5V; When the 3rd input voltage level was 5V, the level of the 4th input voltage was 0V, and when the 3rd input voltage level was 0V, the level of the 4th input voltage was 5V.
Reference voltage source 23 is in order to import a reference voltage, the level of reference voltage is 24V, reference voltage source 23 is coupled to an end of first voltage level shifting unit 24 and second voltage level shifting unit 25, and the other end of first voltage level shifting unit 24 and second voltage level shifting unit 25 is coupled to input voltage source group 21.
First voltage level shifting unit 24 comprises a PMOS (Metal-OxideSemiconductor; Metal-oxide semiconductor (MOS)) the 241, the 2nd PMOS242, a NMOS243, the 3rd PMOS244, the 4th PMOS245 and the 2nd NMOS246.The second voltage level shifting unit bag 25 contains the 5th PMOS251, the 6th PMOS252, the 3rd NMOS253, the 7th PMOS254, the 8th PMOS255 and the 4th NMOS256.And first voltage level shifting unit 24 and second voltage level shifting unit 25 synthesize voltage level shifting unit.The source electrode of the one PMOS241 is coupled to reference voltage source 23, drain electrode is coupled to the drain electrode of the 2nd PMOS242, the source electrode of the 2nd PMOS242 couples the drain electrode of putting a NMOS243, and the source electrode of a NMOS243 is coupled to earth terminal 29, and grid is coupled to first input voltage source 211; The source electrode of the 3rd PMOS244 is coupled to reference voltage source 23, drain electrode is coupled to the drain electrode of the 4th PMOS245, the source electrode of the 4th PMOS245 is coupled to the drain electrode of the 2nd NMOS246, and the source electrode of the 2nd NMOS246 is coupled to earth terminal 29, and grid is coupled to second input voltage source 212; The source electrode of the 5th PMOS251 is coupled to reference voltage source 23, drain electrode is coupled to the drain electrode of the 6th PMOS252, the source electrode of the 6th PMOS252 is coupled to the drain electrode of the 3rd NMOS253, and the source electrode of the 3rd NMOS253 is coupled to earth terminal 29, and grid is coupled to the 3rd input voltage source 213; The source electrode of the 7th PMOS254 is coupled to reference voltage source 23, drain electrode is coupled to the drain electrode of the 8th PMOS255, the source electrode of the 8th PMOS255 is coupled to the drain electrode of the 4th NMOS256, and the source electrode of the 4th NMOS256 is coupled to earth terminal 29, and grid is coupled to the 4th input voltage source 214.
See through the effect of each MOS in first voltage level shifting unit 24 and second voltage level shifting unit 25, first voltage level shifting unit 24 can be with input voltage source group 21 first input voltage source 211 or one of them level of second input voltage source 212 level that is promoted to reference voltage source 23 wherein; Second voltage level shifting unit 25 can be with input voltage source group 21 the 3rd input voltage source 213 or one of them level of the 4th input voltage source 214 level that is promoted to reference voltage source 23 wherein.
Reset voltage source 22 is coupled to the grid of the 2nd PMOS242, the 4th PMOS245, the 6th PMOS252, the 8th PMOS255 and the 9th PMOS221, and the source electrode of the 9th PMOS is coupled to earth terminal 29, and drain electrode is coupled to the control end of arithmetic element 26.When the 22 output reset voltages of reset voltage source, can open the 9th PMOS221, the conducting that makes voltage in the arithmetic element 26 see through the 9th PMOS221 enters earth terminal 29 and finishes replacement, and open the 2nd PMOS242, the 4th PMOS245 simultaneously, the 6th PMOS252, the 8th PMOS255 promote action to carry out new voltage level once.
Arithmetic element 26 comprises NOR-logic door 261, NAND Logic door 262, first inverter 263, second inverter 264, the 3rd inverter 265, the 4th inverter 266, the 5th NMOS267 and the tenth PMOS268, the input of NOR-logic door 261 is coupled to the drain electrode of a PMOS241, the drain electrode of the 2nd PMOS242 and the drain electrode of the 5th PMOS251, the drain electrode of the 6th PMOS252, and output is coupled to the input of first inverter 263; The input of NAND Logic door 262 is coupled to the drain electrode of the 3rd PMOS244, the drain electrode of the 4th PMOS245 and the drain electrode of the 5th PMOS251, the drain electrode of the 6th PMOS252, output is coupled to the input of second inverter 264, the output of first inverter 263 is coupled to the input of the 3rd inverter 265, the output of the 3rd inverter 265 is coupled to the grid of the 5th NMOS267, the output of second inverter 264 is coupled to the input of the 4th inverter 266, and the output of the 4th inverter 266 is coupled to the grid of the tenth PMOS268.Arithmetic element 26 is in order to select output control voltage from the voltage that is received.
Output voltage terminal 27 is coupled to the drain electrode of the tenth PMOS268 and the 5th NMOS267, in order to receive control voltage and to export output voltage, opens or closes with the metal-oxide semiconductor (MOS) in the H bridge circuit in the control chart 1.
Under general situation, when step motor driving circuit 2 energisings, the voltage of arithmetic element 26 inputs can be because unexpected energising and instability, if unsettled voltage is excessive, may make non-default magnitude of voltage pass through arithmetic element, cause whole voltage level shift circuit to export abnormal voltage, make System Operation unusual.Voltage regulation unit 28 comprises first resistance 281, second resistance 282, the 3rd resistance 283 and the 4th resistance 284, first resistance 281 is coupled between the grid of a reference voltage source 23 and a PMOS241, second resistance 282 is coupled between the grid of reference voltage source 23 and the 3rd PMOS244, the 3rd resistance 283 is coupled between the grid of reference voltage source 23 and the 5th PMOS251, and the 4th resistance 284 is coupled between the grid of reference voltage source 23 and the 7th PMOS254.Wherein voltage regulation unit 28 can be when motor drive circuit 2 energising, and the magnitude of voltage of arithmetic element 26 inputs is fixed on the level identical with reference voltage level, reaches the system exception that electric leakage causes unusually to prevent voltage level.
As mentioned above, motor drive circuit of the present invention can effectively be reached the effect of CD-ROM drive motor, the running that sees through first input voltage source 211 and second input voltage source, 212 decision drive circuits whether, utilize first voltage level shifting unit 24 again, second voltage level shifting unit 25 is promoted to input voltage the level of reference voltage, and has voltage regulation unit to prevent the electric leakage that circuit produced in when energising or the situation of current potential shakiness, also comprising reset voltage source 22 makes the voltage that stays in the arithmetic element 26 can not cause system exception, can effectively solve contingent situation in known technology, so the present invention is valuable.
The above only is preferred embodiment of the present invention; so it is not in order to limit scope of the present invention; any personnel that are familiar with this technology; without departing from the spirit and scope of the present invention; can do further improvement and variation on this basis, so the scope that claims were defined that protection scope of the present invention is worked as with the application is as the criterion.
Being simply described as follows of accompanying drawing Zhong symbol:
The 1:H bridge circuit
11: the first metal-oxide semiconductor (MOS)s
12: the second metal-oxide semiconductor (MOS)s
13: the three metal-oxide semiconductor (MOS)s
14: the four metal-oxide semiconductor (MOS)s
15: motor
2: motor drive circuit
21: the input voltage source group
211: the first input voltage sources
212: the second input voltage sources
22: the reset voltage source
213: the three input voltage sources
214: the four input voltage sources
23: reference voltage source
24: the first voltage level shifting units
241: the one PMOS
242: the two PMOS
243: the one NMOS
244: the three PMOS
245: the four PMOS
246: the two NMOS
25: the second voltage level shifting units
251: the five PMOS
252: the six PMOS
253: the three NMOS
254: the seven PMOS
255: the eight PMOS
256: the four NMOS
26: arithmetic element
261: the NOR-logic door
262: the NAND Logic door
263: the first inverters
264: the second inverters
265: the three inverters
266: the four inverters
267: the five NMOS
268: the ten PNMOS
27: output voltage terminal
28: voltage regulation unit
281: the first resistance
282: the second resistance
283: the three resistance
284: the four resistance
29: earth terminal
221: the nine PMOS
Claims (7)
1. a step motor driving circuit is characterized in that, this step motor driving circuit comprises:
One input voltage source group is in order to provide an input voltage group;
One reference voltage source is in order to provide a reference voltage;
One voltage level shifting unit is in order to be promoted to one of them level of this input voltage group the level of this reference voltage;
One arithmetic element is in order to accept this reference voltage and this input voltage group, output one control voltage behind the union;
One reset voltage source is carried out a replacement action in order to export a reset voltage to control this arithmetic element; And
One output voltage terminal is in order to receive this control voltage and to export an output voltage.
2. step motor driving circuit according to claim 1, it is characterized in that, more comprise a voltage regulation unit, leak electricity in order to prevent this step motor driving circuit, this voltage regulation unit comprises a plurality of resistance, is coupled between this reference voltage source and this voltage level shifting unit.
3. step motor driving circuit according to claim 1, it is characterized in that, this input voltage group comprises one first input voltage source, one second input voltage source, the 3rd input voltage source and the 4th input voltage source, respectively in order to import one first input voltage, one second input voltage, one the 3rd input voltage and one the 4th input voltage, wherein the level of the level of this first input voltage and this second input voltage is anti-phase each other, and the level of the level of the 3rd input voltage and the 4th input voltage is anti-phase each other.
4. step motor driving circuit according to claim 3, it is characterized in that, the level of the level of the level of the level of this first input voltage, this second input voltage, the 3rd input voltage and the 4th input voltage is 0V or 5V, when the level of this first input voltage is 5V, the level of this second input voltage is 0V, otherwise when the level of this first input voltage was 0V, the level of this second input voltage was 5V; When the 3rd input voltage level was 5V, the level of the 4th input voltage was 0V, and when the 3rd input voltage level was 0V, the level of the 4th input voltage was 5V.
5. step motor driving circuit according to claim 1 is characterized in that, this voltage level shifting unit comprises:
One first P-type mos, its source electrode is coupled to this reference voltage source;
One second P-type mos, its drain electrode is coupled to the drain electrode of this first P-type mos;
One the 3rd P-type mos, its source electrode is coupled to this reference voltage source;
One the 4th P-type mos, its drain electrode is coupled to the drain electrode of the 3rd P-type mos;
One the one N type metal oxide semiconductor, its drain electrode is coupled to the source electrode of this second P-type mos, and its source electrode is coupled to an earth terminal, and its grid is coupled to this input voltage source group;
One the 2nd N type metal oxide semiconductor, its drain electrode is coupled to the source electrode of the 4th P-type mos, and its source electrode is coupled to this earth terminal, and its grid is coupled to this input voltage source group;
One the 5th P-type mos, its source electrode is coupled to this reference voltage source;
One the 6th P-type mos, its drain electrode is coupled to the drain electrode of the 5th P-type mos;
One the 7th P-type mos, its source electrode is coupled to this reference voltage source;
One the 8th P-type mos, its drain electrode is coupled to the drain electrode of the 7th P-type mos;
One the 3rd N type metal oxide semiconductor, its drain electrode is coupled to the source electrode of the 6th P-type mos, and its source electrode is coupled to this earth terminal, and its grid is coupled to this input voltage source group; And
One the 4th N type metal oxide semiconductor, its drain electrode is coupled to the source electrode of the 8th P-type mos, and its source electrode is coupled to this earth terminal, and its grid is coupled to this input voltage source group.
6. step motor driving circuit according to claim 1 is characterized in that, this arithmetic element comprises:
One NOR-logic door, its input is coupled to this voltage level shifting unit;
One NAND Logic door, its input is coupled to this voltage level shifting unit;
One first inverter, its input is coupled to the output of this NOR-logic door;
One second inverter, its input is coupled to the output of this NAND Logic door;
One the 3rd inverter, its input is coupled to the output of this first inverter;
One the 4th inverter, its input is coupled to the output of this second inverter;
One the one N type metal oxide semiconductor, its grid is coupled to the output of the 3rd inverter, and its drain electrode is coupled to this output voltage terminal; And
One first P-type mos, its grid is coupled to the output of the 4th inverter, and its drain electrode is coupled to this output voltage terminal.
7. step motor driving circuit according to claim 6, it is characterized in that, also comprise one second P-type mos, its grid is coupled to this reset voltage source, its source electrode is coupled to an earth terminal, and its drain electrode is coupled to the control end of this NOR-logic door, this NAND Logic door, this first inverter, this second inverter, the 3rd inverter and the 4th inverter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007101070641A CN101309064B (en) | 2007-05-18 | 2007-05-18 | Step motor driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007101070641A CN101309064B (en) | 2007-05-18 | 2007-05-18 | Step motor driving circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101309064A CN101309064A (en) | 2008-11-19 |
| CN101309064B true CN101309064B (en) | 2011-06-15 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007101070641A Expired - Fee Related CN101309064B (en) | 2007-05-18 | 2007-05-18 | Step motor driving circuit |
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| Country | Link |
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| CN (1) | CN101309064B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6107832A (en) * | 1999-02-05 | 2000-08-22 | Mitsubishi Denki Kabushiki Kaisha | Input/output circuit |
| CN1434565A (en) * | 2002-01-24 | 2003-08-06 | 力捷电脑股份有限公司 | Controller for step motor and conrol method thereof |
| US7061299B2 (en) * | 2004-02-06 | 2006-06-13 | Freescale Semiconductor, Inc | Bidirectional level shifter |
| US7068091B1 (en) * | 2003-02-27 | 2006-06-27 | Cypress Semiconductor Corporation | Voltage translator circuit formed using low voltage transistors |
-
2007
- 2007-05-18 CN CN2007101070641A patent/CN101309064B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6107832A (en) * | 1999-02-05 | 2000-08-22 | Mitsubishi Denki Kabushiki Kaisha | Input/output circuit |
| CN1434565A (en) * | 2002-01-24 | 2003-08-06 | 力捷电脑股份有限公司 | Controller for step motor and conrol method thereof |
| US7068091B1 (en) * | 2003-02-27 | 2006-06-27 | Cypress Semiconductor Corporation | Voltage translator circuit formed using low voltage transistors |
| US7061299B2 (en) * | 2004-02-06 | 2006-06-13 | Freescale Semiconductor, Inc | Bidirectional level shifter |
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| Publication number | Publication date |
|---|---|
| CN101309064A (en) | 2008-11-19 |
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