CN101192373B - Organic light emitting display and voltage compensation technology organic light emitting pixel - Google Patents

Organic light emitting display and voltage compensation technology organic light emitting pixel Download PDF

Info

Publication number
CN101192373B
CN101192373B CN 200610163953 CN200610163953A CN101192373B CN 101192373 B CN101192373 B CN 101192373B CN 200610163953 CN200610163953 CN 200610163953 CN 200610163953 A CN200610163953 A CN 200610163953A CN 101192373 B CN101192373 B CN 101192373B
Authority
CN
China
Prior art keywords
thin film
film transistor
terminal
voltage
capacitor
Prior art date
Application number
CN 200610163953
Other languages
Chinese (zh)
Other versions
CN101192373A (en
Inventor
曾名骏
郭鸿儒
黄建翔
Original Assignee
奇晶光电股份有限公司
奇美电子股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 奇晶光电股份有限公司, 奇美电子股份有限公司 filed Critical 奇晶光电股份有限公司
Priority to CN 200610163953 priority Critical patent/CN101192373B/en
Publication of CN101192373A publication Critical patent/CN101192373A/en
Application granted granted Critical
Publication of CN101192373B publication Critical patent/CN101192373B/en

Links

Abstract

The invention discloses an organic light emitting display and an organic light emitting pixel with the voltage compensation technology, which comprise a first capacitor, a first thin film transistor, a second thin film transistor, a third thin film transistor, a reset circuit and an organic light emitting diode. The first thin film transistor receives a first voltage and the second terminal of the first thin film transistor is coupled to the grid and the first terminal of the first capacitor. The second thin film transistor receives a second voltage and the grid of the second thin film transistor is coupled to the grid of the first thin film transistor. The third thin film transistor is coupled to the first capacitor and receives a pixel voltage and a scanning signal. The reset circuit sets the first terminal of the first capacitor to be a first voltage level. The anode of the organic light emitting diode is coupled to the second terminal of the second thin film transistor and the cathode of the organic light emitting diode receives a third voltage. The invention can improve the speed of the critical voltage compensation, and can make up for the deficiency that the picture is not uniformly displayed on the prior organic light emitting display.

Description

有机发光显示器及其具有电压补偿技术的有机发光像素 The organic light emitting display and an organic light emitting pixel has a voltage compensation technique

技术领域 FIELD

[0001] 本发明是有关于一种有机发光显示器,且特别是有关于有机发光显示器及其具有电压补偿技术的有机发光像素。 [0001] The present invention relates to an organic light emitting display, and more particularly to an organic light emitting display and an organic light emitting pixels on having voltage compensation technique.

背景技术 Background technique

[0002] 有机发光显示器(Organic Light Emitting Display)的像素一般以一薄膜晶体管(Thin Film Transistor, TFT)搭配电容来储存信号,以控制有机发光二极管(Organic Light Emitting Diode, OLED)的亮度表现。 [0002] The organic light emitting display (Organic Light Emitting Display) is generally a pixel TFT (Thin Film Transistor, TFT) with a capacitor to store the signal, to control the organic light emitting diode (Organic Light Emitting Diode, OLED) brightness performance. 然而,上述薄膜晶体管在长时间使用后,会产生临界电压(Threshold Voltage,Vth)的偏移(shift)。 However, the thin film transistor after prolonged use, will produce a threshold voltage (Threshold Voltage, Vth) deviation (shift). 此偏移量与薄膜晶体管操作时间及所流过的电流大小有关。 This offset operation time and a thin film transistor and the current flowing through the relevant magnitude.

[0003] 在显示过程中,由于每个像素中用来驱动有机发光二极管的薄膜晶体管,其导通时的电流都不尽相同。 [0003] In the display process, since each pixel thin film transistor for driving the organic light emitting diode, the current conduction are different. 所以便会造成这些驱动用的薄膜晶体管彼此间的临界电压偏移量都不相同。 Therefore, these will result in a thin film transistor for driving the threshold voltage offset between each other are not the same. 因此,使得每个像素的发光亮度与所接收到的像素数据并未维持相同的对应关系。 Thus, the light emitting luminance of each pixel so that the pixel data received not maintain the same correspondence. 如此便会造显示画面不均勻的现象。 So will make the display screen of the phenomenon of uneven.

[0004] 为了解决上述问题,传统有机发光像素应用了一种电压补偿技术。 [0004] In order to solve the above problems, the conventional organic light emitting pixel applied a voltage compensation technique. 请参照图1,其为传统有机发光像素的电路图。 Referring to FIG 1, which is a circuit diagram of a conventional organic light emitting pixels. 有机发光像素100包括薄膜晶体管MPl、MP2、MP3、MP4、MP5、 储存电容Cst以及有机发光二极管0LED。 The organic light emitting pixel 100 includes a thin film transistor MPl, MP2, MP3, MP4, MP5, the storage capacitor Cst and an organic light emitting diode 0LED. 薄膜晶体管MP3受控于扫描信号^^11。 The thin film transistor MP3 is controlled by the scanning signal 11 ^^. 薄膜晶体管MPl桥接于薄膜晶体管MP3与储存电容Cst间。 The thin film transistor MPl is bridged between the thin film transistor MP3 and the storage capacitor Cst. 薄膜晶体管MP2依据储存电容Cst的电容电压于薄膜晶体管MP4导通时驱动有机发光二极管OLED发亮。 The thin film transistor driving the organic light emitting diode OLED MP2 lights up when the storage capacitor Cst according to a voltage of the capacitor to the thin film transistor MP4 is turned on. 薄膜晶体管MP5受控于重置信号Rst。 The thin film transistor MP5 is controlled by the reset signal Rst. 薄膜晶体管MP4受控于致能信号Enb。 The thin film transistor MP4 is controlled by the enable signal Enb.

[0005] 传统有机发光像素100在写入像素数据Data时,利用和薄膜晶体管MP2元件特性相同的薄膜晶体管MPl抵销薄膜晶体管MP2的临界电压Vth2。 [0005] In the conventional organic light emitting pixel 100 when writing pixel data Data, using the same film and element characteristics MP2 offset thin film transistor MPl transistor MP2 threshold voltage Vth2. 进一步来说,当扫描信号kan致能时薄膜晶体管MP3导通,使得像素数据Data经由薄膜晶体管MP3与MPl对储存电容Cst充电。 Further, when the scan enable signal kan thin film transistor MP3 is turned on, so that the pixel data Data storage capacitor Cst is charged via the thin film transistor MP3 and MPl. 同时薄膜晶体管MPl利用本身的电压补偿特性使X点电位(即薄膜晶体管MP2 的栅极电位)较Y点电位低一电压位准(即薄膜晶体管MPl的临界电压Vthl),进而使薄膜晶体管MP2的源极和栅极端电压差增加Vthl。 While using a thin film transistor MPl voltage compensation characteristic itself of the X-point potential (i.e., the gate potential of the thin film transistor MP2) lower than the potential at the point Y to a voltage level (i.e., threshold voltage of the thin film transistor MPl Vthl), thereby enabling the thin film transistor MP2 The source and the gate terminal of the voltage difference increases Vthl. 相应于临界电压Vth2,临界电压Vthl (其大小实质上相等于临界电压Vth2)使得薄膜晶体管MP2的源极和栅极间的电压差恰相等于Vdd和像素电压Vdata电压差。 Corresponding to the threshold voltage Vth2, the threshold voltage VthL (whose size is substantially equal to the threshold voltage Vth2 is) such that the voltage difference between the source and gate of the thin film transistor MP2 is exactly equal to Vdd and the voltage difference between the pixel voltage Vdata. 进一步地,使通过有机发光二极管OLED的电流Ι。 Further, current Ι an organic light emitting diode OLED. ίΕΙ)准确地相关于像素电压Vdata。 ίΕΙ) precisely in relation to the pixel voltage Vdata.

[0006] 在上述补偿技术中,是在数据写入阶段做电压补偿的动作以去除临界电压Vth2 所产生的误差。 [0006] In the above-described compensation technique, the error in the operation of the data writing phase voltage compensation made to remove the generated threshold voltage Vth2. 然而,在现今OLED面板朝高解析度及大尺寸的应用发展的时代,数据写入时间将会大幅的缩减。 However, in today's era of high-resolution OLED panel towards the application and development of the large size of the data write time will be significantly reduced. 但薄膜晶体管MPl导通时其电流不大故需要较长的补偿时间,如此将会使得薄膜晶体管MPl可能无法正常地运作而导致补偿机制失效。 However, when MPl is turned on so that the thin film transistor whose current is not required to compensate for long time, so that the thin film transistor MPl would not be normally functioning and may cause failure compensation mechanism. 从另一方面来说,在传统补偿电压技术其电路设计中,节点X、Y的电位必预保证在“数据写入”的阶段均达到稳定状态,否则在画面显示阶段时会有电荷分享的问题(charges haring issue)。 On the other hand, in the conventional circuit design techniques compensation voltage in the node X, Y of the potential will ensure pre "data writing" stage have reached a steady state, or when the screen display will charge sharing stage problems (charges haring issue). 但传统电压补偿技术可能由于时间不足而导致了节点X没有到达稳定抵消Vth2的状态。 However, conventional voltage compensation may be due to lack of time led to the node X does not reach a stable state of offset Vth2. 在此状态下,薄膜晶体管MPl仍然是导通的情形,因此发生了电荷分享而使显示亮度无法达到像素电压Vdata所预期的显示亮度。 In this state, the thin film transistor MPl situation is still conducting, so the charge sharing occurs display luminance pixel voltage Vdata can not reach the intended display luminance.

发明内容 SUMMARY

[0007] 有鉴于此,本发明的目的就是在于提供一种有机发光显示器及其具有电压补偿技术的有机发光像素,用以改善临电压补偿速度。 [0007] In view of this, an object of the present invention is to provide an organic light emitting display and an organic light emitting pixel has a voltage compensation technique, temporary voltage compensation to improve speed.

[0008] 根据本发明的目的,提出一种像素的驱动方法,其特点是,该像素具有一第一电容、一第一薄膜晶体管、一第二薄膜晶体管与一有机发光二极管,该第一电容的一第一端耦接该第二膜晶体管的栅极,该第一薄膜晶体管的一第一端接收一第一电压,该第一薄膜晶体管的一第二端耦接至该第一薄膜晶体管的栅极及该第一电容的该第一端,该第二薄膜晶体管的一第一端接收一第二电压,该第二薄膜晶体管的一第二端用以输出一像素电流至该有机发光二极管的阳极,该有机发光二极管的阴极接收一第三电压。 [0008] The object of the present invention, provides a method for driving the pixel, characterized in that the pixel having a first capacitor, a first thin film transistor, a second thin film transistor and an organic light emitting diode, the first capacitor a first terminal coupled to the gate of the second film of the transistor, a first terminal of the first thin film transistor receives a first voltage, a second terminal coupled to the first thin film transistor is coupled to the first thin film transistor the gate electrode and the first terminal of the first capacitor, a first terminal of the second thin film transistor receives a second voltage, a second terminal of the second thin film transistor for outputting a current to the organic light emitting pixel anode of the diode, the cathode of the organic light emitting diode receiving a third voltage. 该驱动方法包括:截止该有机发光二极管;于该有机发光二极管截止期间,提供一第四电压于该第一电容的该第一端,以及提供一第五电压于该第一电容的一第二端,该第四电压与该第一电压间的电压差使该第一薄膜晶体管导通;于该有机发光二极管截止期间且该第一电容的该第二端的电压位准保持在该第五电压时,移除该第四电压以使该第一电容的该第一端的电压位准因该第二薄膜晶体管的作用改变为一第一电压位准;于该有机发光二极管截止期间且于该第一电容的该第一端的电压位准上升到该第一电压位准后,改提供一像素电压至该第一电容的该第二端;以及导通该有机发光二极管以使该第三薄膜晶体管依据该第一电容的该第一端的电压位准输出该像素电流至该有机发光二极管。 The driving method comprising: turn off the organic light emitting diode; organic light emitting diode during the off, providing a fourth voltage to the first terminal of the first capacitor, and providing a fifth voltage to the first capacitor a second when the organic light emitting diode during the off voltage of the first capacitor and the second end bit is held in the quasi fifth voltage; terminal, the voltage between the first voltage and the fourth voltage errand the first thin film transistor is turned on removing the fourth capacitor voltage so that the first end of the first voltage level by the action of the second thin film transistor is changed to a first voltage level; organic light emitting diode during the off and on the second a capacitor after the voltage level of the first end of the first quasi rises to voltage level, providing a change of the pixel voltage to the second end of the first capacitor; and the organic light emitting diode is turned on so that the third film the pixel reference output transistor current to the organic light emitting diode according to the voltage level of the first capacitor to the first end.

[0009] 根据本发明的目的,提出一种具有电压补偿技术的有机发光显示器的有机发光像素,包括第一电容、第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、重置电路以及有机发光二极管。 [0009] The object of the present invention, a pixel having an organic light-emitting organic light emitting display voltage compensation, comprising a first capacitor, a first TFT, a second TFT, a third TFT, a reset circuit and an organic led. 第一薄膜晶体管接收第一电压,第一薄膜晶体管的第二端耦接至本身的栅极及第一电容的第一端。 A first thin film transistor receiving a first voltage, a second terminal of the first thin film transistor to the gate itself and the first terminal of the first capacitor. 第二薄膜晶体管接收第二电压,第二薄膜晶体管的栅极耦接至第一薄膜晶体管的栅极。 A second thin film transistor receives a second voltage, the gate of the second thin film transistor coupled to the gate of the first thin film transistor. 第三薄膜晶体管耦接至第一电容,且接收一像素电压及一扫描信号。 The third thin film transistor coupled to the first capacitor, and receives a pixel voltage and a scan signal. 重置电路设定第一电容的第一端为第一电压位准。 A first reset circuit is set to a first end of a first capacitor voltage level. 有机发光二极管的阳极偶接至第二薄膜晶体管的第二端,有机发光二极管的阴极接收第三电压。 An anode even organic light emitting diode is coupled to a second end of the second thin film transistor, organic light emitting diode and the cathode receives the third voltage. 其中,第一电压位准低于第一电压的电压位准。 Wherein the first voltage level is lower than the voltage level of the first voltage.

[0010] 根据本发明的目的,还提供一种有机发光显示器,其特点是,包括:至少一像素,包括:一第一电容;一第一薄膜晶体管,该第一薄膜晶体管的一第一端接收一第一电压,该第一薄膜晶体管的一第二端耦接至该第一薄膜晶体管的栅极及该第一电容的一第一端;一第二薄膜晶体管,该第二薄膜晶体管的一第一端接收一第二电压,该第二薄膜晶体管的栅极耦接至该第一薄膜晶体管的栅极;一第三薄膜晶体管,该第三薄膜晶体管的一第一端接收一像素电压,该第三薄膜晶体管的一第二端耦接至该第一电容的一第二端,该第三薄膜晶体管的栅极用以接收一扫描信号;一重置电路,用以设定该第一电容的该第一端为一第一电压位准;以及一有机发光二极管,该有机发光二极管的阳极偶接至该第二薄膜晶体管的一第二端,该有机发光二极管的阴极接收一第 [0010] The object of the present invention there is also provided an organic light emitting display, characterized by comprising: at least one pixel, comprising: a first capacitor; a first thin film transistor, a first terminal of the first thin film transistor receiving a first voltage, a second terminal coupled to the first thin film transistor to the gate of the first thin film transistor and a first terminal of the first capacitor; a second thin film transistor, the second thin film transistor a first terminal for receiving a second voltage, the gate of the second thin film transistor coupled to the gate of the first thin film transistor; a third thin film transistor, a first terminal of the third thin film transistor to receive a pixel voltage , a second terminal coupled to the third thin film transistor is coupled to a second terminal of the first capacitor, the gate electrode of the third thin film transistor for receiving a scan signal; a reset circuit for setting the first the first end of a capacitor is a first voltage level; and an organic light emitting diode, the anode of the organic light emitting diode coupling is coupled to a second terminal of the second thin film transistor, the cathode of the organic light emitting diode receiving a first 三电压;以及一驱动单元,用以驱动该像素, 该驱动单元包括:一数据驱动电路,用以输出该像素电压;一扫描驱动电路,用以输出该扫描信号;及一时序控制电路,用以控制该重置电路设定该第一电容的该第一端为该第一电压位准;其中,该第一电压位准低于该第一电压的电压位准,该驱动电路更用以提供该第一电压、该第二电压与该第三电压。 Three voltage; and a driving unit for driving the pixel, the driving unit comprising: a data driving circuit, for outputting the pixel voltage; a scan driving circuit for outputting the scanning signal; and a timing control circuit for controlling the reset circuit is set to the first capacitor for the first end of a first voltage level; wherein the first voltage level is lower than the voltage level of the first voltage, the driving circuit is further configured to providing the first voltage, the second voltage and the third voltage.

[0011] 为让本发明的上述目的、特征、和优点能更明显易懂,下面特举一较佳实施例,并配合所附图式,作详细说明。 [0011] In order to make the above-described object of the present invention, features, and advantages will become apparent from the following a preferred embodiment cited Patent, and accompanied with figures are described in detail.

附图说明 BRIEF DESCRIPTION

[0012] 图1绘示是一种具有传统电压补偿技术的有机发光像素的内部电路图。 [0012] FIG. 1 is a schematic diagram of an internal circuit diagram of a pixel having an organic light emitting conventional voltage compensation technique.

[0013] 图2绘示是依照本发明第一实施例的具有电压补偿技术的有机发光像素的内部电路图。 [0013] FIG. 2 shows an internal circuit diagram of a pixel having an organic light emitting voltage compensation technique of the first embodiment of the present invention.

[0014] 图3绘示是依据本发明第一实施例的有机发光像素的时序图。 [0014] FIG. 3 shows a timing diagram of an organic light emitting pixels is according to the first embodiment of the present invention.

[0015] 图4是图2中重置电路的一种实施例。 [0015] FIG. 4 is a reset circuit in FIG. 2 embodiment.

[0016] 图5是图2中重置电路的另一种实施例。 [0016] FIG. 5 is a reset circuit in FIG. 2 another embodiment.

[0017] 图6绘示是依照本发明第一实施例,具有第二储存电容的有机发光像素的内部电路图。 [0017] FIG 6 illustrates an internal circuit diagram of a first embodiment of the organic light emitting pixel of the present invention, having a second storage capacitance.

[0018] 图7是图2中第五薄膜晶体管的一种实施例。 [0018] FIG. 7 is a fifth thin film transistor in FIG. 2 embodiment.

[0019] 图8是图2中第五薄膜晶体管的另一种实施例。 [0019] FIG. 8 in FIG. 2 is another embodiment of the fifth thin film transistor.

[0020] 图9是图2中第五薄膜晶体管的又一种实施例。 [0020] FIG. 9 is a view of the fifth thin film transistor 2 of yet another embodiment.

[0021] 图10绘示是依照本发明第二实施例的具有电压补偿技术的有机发光像素的内部电路图。 [0021] FIG. 10 shows an internal circuit diagram of a pixel having an organic light emitting voltage compensation technique of the second embodiment of the present invention.

[0022] 图11绘示是依据本发明第二实施例的有机发光像素的时序图。 [0022] FIG. 11 is a timing chart shows the organic light emitting pixel according to the second embodiment of the present invention.

[0023] 图12是图10中重置电路的一种实施例例。 [0023] FIG. 12 is a reset circuit 10 in FIG Example embodiment.

[0024] 图13是图10中重置电路的另一种实施例例。 [0024] FIG 13 FIG 10 is another embodiment of the reset circuit of embodiment.

[0025] 图14绘示是依照本发明第二实施例,具有第二储存电容的有机发光像素的内部电路图。 [0025] FIG. 14 shows an internal circuit diagram of a second embodiment of the organic light emitting pixel having a second storage capacitor of the present invention.

[0026] 图15是图10中第五薄膜晶体管的一种实施例。 [0026] FIG 15 FIG 10 is a fifth embodiment of a thin film transistor.

[0027] 图16是图10中第五薄膜晶体管的另一种实施例。 [0027] FIG 16 FIG 10 is another embodiment of the fifth thin film transistor.

[0028] 图17是图10中第五薄膜晶体管的又一种实施例。 [0028] FIG. 17 is a fifth thin film transistor 10 in yet another embodiment of FIG.

[0029] 图中主要元件符号说明如下: [0029] FIG main element numbers as follows:

[0030] 100、202、702、802、902、1020、1402、1502、1602、1702 :有机发光像素; [0030] 100,202,702,802,902,1020,1402,1502,1602,1702: an organic light emitting pixels;

[0031] 200、700、800、900、1000、1400、1500、1600、1700 :有机发光显示器; [0031] 200,700,800,900,1000,1400,1500,1600,1700: an organic light emitting display;

[0032] 201、701、801、901、1001、1401、1501、1601、1701 :驱动单元; [0032] 201,701,801,901,1001,1401,1501,1601,1701: a driving unit;

[0033] 204、704、804、904、1004、1404、1504、1604、1704 :数据驱动电路; [0033] 204,704,804,904,1004,1404,1504,1604,1704: data driving circuit;

[0034] 206、706、806、906、1006、1406、1506、1606、1706 :扫描驱动电路 [0034] 206,706,806,906,1006,1406,1506,1606,1706: scan driving circuit

[0035] 208、708、808、908、1008、1408、1508、1608、1708 :时序控制电路; [0035] 208,708,808,908,1008,1408,1508,1608,1708: the timing control circuit;

[0036] 210、710、810、910、1010、1410、1510、1610、1710 :重置电路; [0036] 210,710,810,910,1010,1410,1510,1610,1710: a reset circuit;

[0037] MP1、MP2、MP3、MP4、MP5 :薄膜晶体管; [0037] MP1, MP2, MP3, MP4, MP5: a thin film transistor;

[0038] Tl、T2、T3、T4、T5 :薄膜晶体管; [0038] Tl, T2, T3, T4, T5: the thin film transistor;

[0039] Cst、Cl、C2 :储存电容; [0039] Cst, Cl, C2: a storage capacitor;

[0040] OLED :有机发光二极管。 [0040] OLED: Organic Light Emitting Diode. 具体实施方式 Detailed ways

[0041] 本发明提出一种有机发光显示器及其具有电压补偿技术的有机发光像素,用以改善临电压补偿速度。 [0041] The present invention provides an organic light emitting display and an organic light emitting pixel has a voltage compensation technique, temporary voltage compensation to improve speed.

[0042] 第一实施例 [0042] First embodiment

[0043] 请参照图2,其为本发明第一实施例的有机发光显示器的示意图。 [0043] Referring to FIG 2, a schematic view of an organic light emitting display according to a first embodiment of the present invention which. 有机发光显示器200包括驱动单元201与有机发光像素202。 The organic light emitting display 200 includes a driving unit 201 of the organic light emitting pixel 202. 驱动单元201用以驱动像素202,其包括数据驱动电路204、扫描驱动电路206与时序控制电路208。 A driving unit 201 for driving the pixel 202, which includes a data driving circuit 204, a scan driving circuit 206 and the timing control circuit 208. 数据驱动电路204依据影像数据以输出第五电压至有机发光像素202,其中,第五电压为像素电压Vdata或低准位电压ft~eset。 The data driving circuit 204 according to the image data to output the fifth voltage to the organic light emitting pixel 202, wherein the fifth voltage is a pixel voltage Vdata or the low level voltage ft ~ eset. 扫描驱动电路206用以输出扫描信号kan。 The scan driving circuit 206 for outputting a scanning signal kan. 时序控制电路208用以输出第一控制信号Enb 至第四薄膜晶体管T4,还用以输出第二控制信号Rst至重置电路210。 The timing control circuit 208 for outputting a first control signal to Enb fourth thin film transistor T4, is further configured to output a second control circuit 210 to the reset signal Rst. 驱动单元201亦提供第一电压Lock、第二电压Vdd、第三电压Vss以及第四电压INI。 The drive unit 201 also provides a first voltage Lock, the second voltage Vdd, a third and a fourth voltage Vss voltage INI. 有机发光像素202包括第一电容Cl、第一薄膜晶体管Tl、第二薄膜晶体管T2、第三薄膜晶体管T3、第四薄膜晶体管T4、重置电路210与有机发光二极管0LED。 The organic light emitting pixel 202 includes a first capacitor Cl, a first thin film transistor Tl, a second thin film transistor T2, the third thin film transistor T3, the fourth thin film transistor T4, the reset circuit 210 of the organic light emitting diode 0LED. 薄膜晶体管T1、T2、T3与Τ4以PMOS为例,绘制于图2中。 The thin film transistor T1, T2, T3 and PMOS Τ4 In an example, plotted in FIG.

[0044] 第三薄膜晶体管Τ3的第一端接收像素电压Vdata或低准位电压ft~eset,其第二端耦接至第一电容Cl的第二端(即图2中所标示的节点Yl),其栅极用以接收扫描信号Scan。 [0044] terminal for receiving a first pixel voltage Vdata Τ3 third thin film transistor or a low-level voltage ft ~ eset, a second terminal coupled to the node marked 2 Yl first capacitor Cl, a second end (i.e., FIG. ), having a gate receiving the scan signal scan. 第一薄膜晶体管Tl的一第一端接收第一电压Lock,其一第二端与栅极耦接并耦接至第一电容Cl的一第一端(即图2中所标示的节点XI)。 A first end of the first thin film transistor Tl receives a first voltage Lock, one gate coupled to a second end and coupled to (XI node that is indicated in FIG. 2) a first terminal of the first capacitor Cl . 第二薄膜晶体管T2的一第一端接收第二电压Vdd。 A second thin film transistor T2, a first terminal for receiving a second voltage Vdd. 第二薄膜晶体管T2的栅极耦接至第一薄膜晶体管Tl的栅极。 Gate of the second thin film transistor T2 is coupled to the gate of the first thin film transistor Tl. 第四薄膜晶体管T4的一第一端耦接第二薄膜晶体管T2的一第二端,而第四薄膜晶体管T4的一第二端耦接至有机发光二极管OLED的阳极。 A first end of a fourth thin film transistor T4 is coupled to a second terminal of the second thin film transistor T2, and a second end of the fourth thin film transistor T4 is coupled to the anode of the organic light emitting diode OLED. 第四薄膜晶体管T4的栅极接收第一控制信号Enb。 A gate receiving a fourth thin film transistor T4, the first control signal Enb.

[0045] 有机发光二极管OLED的阴极接收第三电压Vss。 [0045] The cathode of the organic light emitting diode OLED receives a third voltage Vss. 重置电路210用以设定第一电容Cl的第一端(即节点XI)为第一电压位准VI,其由第五薄膜晶体管T5构成。 The reset circuit 210 for setting a first terminal of the first capacitor Cl (i.e., node XI) to a first voltage level VI, which is composed of a fifth thin film transistor T5. 第五薄膜晶体管T5例如为PM0S,其第一端耦接至第一电容Cl的第一端XI,而第二端接收第四电压INI且其栅极接收第二控制信号Rst。 The fifth TFT T5, for example, PMOS, having a first terminal coupled to a first terminal of the first capacitor Cl, XI, and the second terminal of the fourth voltage INI and a gate receiving the second control signal Rst. 其中,需特别注意的是上述第一电压位准Vl低于第一电压Lock的电压位准。 Wherein Note especially that the first voltage Vl is lower than the voltage level of the first voltage level of Lock.

[0046] 请参照图3,其为本发明第一实施例的有机发光像素的时序图。 [0046] Referring to FIG 3, a timing diagram of the organic light emitting pixel according to the first embodiment of the present invention which. 在第零阶段OStage (即显示前一画面)时,扫描信号kan的电压位准使第三薄膜晶体管T3截止,第二控制信号Rst的电压位准使得第五薄膜晶体管T5截止,而第一控制信号Enb的电压位准使第四薄膜晶体管T4导通。 When the zeroth stage OStage (i.e. previous screen display), kan scanning signal voltage level of the third thin film transistor T3 is turned off, the second control signal Rst voltage level such that the fifth thin film transistor T5 is turned off, and the first control Enb quasi voltage signal of the fourth thin film transistor T4 is turned on. 故节点Yl的电压为前一画面的像素电压Vdata',而节点Xl的电压为前一画面的电压X'。 Therefore, the voltage of the node Yl previous frame pixel voltage Vdata ', and the voltage of the node Xl previous screen voltage X'. 节点Xl的电压X'大于第一电压。 Xl voltage node X 'greater than the first voltage. 第一电压Lock使得第一薄膜晶体管Tl截止,同时电压X'也使第二薄膜晶体管T2导通而产生电流IMD。 Lock first voltage such that the first thin film transistor Tl is turned off, while the voltage X 'of the second thin film transistor T2 is also turned on to generate a current IMD. 电流Imd为Kp*(Vsg-Vtp2)2。 Current Imd is Kp * (Vsg-Vtp2) 2. Vsg为第二薄膜晶体管T2栅极与源极间的电压差,其为Vdd-X'。 Vsg is a voltage difference between the electrodes of the second thin film transistor T2 gate and the source, that is Vdd-X '. Vtp2为第二薄膜晶体管T2的临界电压(Threshold Voltage) 0电流Imd透过第四薄膜晶体管抖驱动有机发光二极管OLED发亮。 Threshold voltage (Threshold Voltage) Vtp2 a second thin film transistor T2 0 shake driving current Imd lights transmitted through the organic light emitting diode OLED fourth thin film transistor.

[0047] 接着,在第一阶段I Stage时,第二控制信号Rst的电压位准转变为使第五薄膜晶体管T5导通,扫描信号kan的电压位准转变为使第三薄膜晶体管T3导通,而第一控制信号Enb转变为使第四薄膜晶体管T4截止。 [0047] Next, when the first stage I Stage, the voltage level of the second control signal Rst quasi into a thin film of the fifth transistor T5 is turned on, the scanning signal voltage level kan into the third thin film transistor T3 is turned on and the first control signal into Enb of the fourth TFT T4 is turned off. 此时,数据驱动电路204提供一低准位电压I^reset。 At this time, the data driving circuit 204 provides a low voltage level I ^ reset. 低准位电压ft~eset透过导通的第三薄膜晶体管T3使节点Yl的电压为预设的低准位电压I^reset,例如_1〜0伏特,而节点Xl的电压因第五薄膜晶体管T5导通为第四电压INI。 Low-level voltage ft ~ eset through the third thin film transistor is turned on so that the voltage at node T3 Yl for a preset low voltage level I ^ reset, e.g. _1~0 volts, and the voltage due to the node Xl fifth thin film a fourth transistor T5 is turned on voltage INI. 在此阶段,藉由低准位电压I^reset与第四电压INI重置第一电容Cl。 At this stage, by a low level voltage and the fourth voltage I ^ reset INI reset the first capacitor Cl.

[0048] 在第二阶段II Stage时,第二控制信号Rst的电压位准转变为使第五薄膜晶体管T5截止,而扫描信号kan与第一控制信号Enb仍维持前一阶段的电压位准。 [0048] II Stage In the second stage, the second control signal Rst is converted into a voltage level of the fifth thin film transistor T5 is turned off, while the scanning signal and the first control signal Enb kan remains voltage level of the previous stage. 故第三薄膜晶体管T3仍然为导通状态,第四薄膜晶体管T4仍然为截止。 Therefore, the third thin film transistor T3 remains in a conducting state, the fourth thin film transistor T4 remains off. 此时,节点Yl的电压仍为低准位电压I^reset,而节点Xl的电压因为第五薄膜晶体管T5截止与第一薄膜晶体管Tl的作用而上升到为第二电压位准V2。 At this time, the voltage at node Yl is still at low voltage level I ^ reset, and the voltage of the node Xl fifth thin film transistor T5 is turned off because the effect of the first thin film transistor Tl rises to the second voltage level V2. 第二电压位准V2为第一电压Lock减去第一薄膜晶体管Tl 的临界电压Vtp 1。 A second voltage level V2 to the first voltage minus the first thin film transistor Tl Lock threshold voltage Vtp 1.

[0049] 第三阶段III Stage时(即数据写入阶段),第一控制信号Enb的电压位准转变为使第四薄膜晶体管"Γ4导通,第二控制信号Rst与扫描信号kan的电压位准仍维持与第二阶段相同。此时数据驱动电路204改输出像素电压Vdata。像素电压Vdata透过导通的第三薄膜晶体管T3使节点Yl的电压为像素电压Vdata。而节点Xl的电压经由第一电容Cl 的作用亦提高到了Lock-VtpΙ+Vdata-Preset,因而使得第一薄膜晶体管Tl截止。此时,在第二薄膜晶体管T2的栅极与源极间的电压差Vsg为第二电压Vdd减去节点Xl的电位,即Vdd- (Lock-VtpΙ+Vdata-Preset)。此阶段重点在于,因第四薄膜晶体管T4导通使得第二薄膜晶体管T2对应于栅极与源极间的电压差Vsg产生对应的导通电流1_。导通电流 [0049] Third Stage III Stage time (i.e., the data writing stage), the voltage level transition of the first control signal Enb fourth thin film transistor such that the voltage level "Γ4 turned on, the second control signal Rst the scanning signal kan remains quasi-identical to the second stage. At this time, the data driving circuit 204 changes the output pixel voltage Vdata. pixel voltage Vdata is the voltage of the node Yl pixel voltage Vdata through the third thin film transistor is turned on T3. the voltage of the node via the Xl also the role of the first capacitor Cl to increase the Lock-VtpΙ + Vdata-Preset, thus making the first thin film transistor Tl is turned off. at this time, the voltage Vsg difference between the gate and the source of the second thin film transistor T2 is a second voltage subtracting the potential of the node Xl Vdd, i.e. Vdd- (Lock-VtpΙ + Vdata-Preset). this stage focus, because the fourth transistor T4 is turned on so that the thin film of the second thin film transistor T2 corresponds to the gate-source voltage generating a difference Vsg corresponding conduction current 1_. conduction current

=Kp*(Vsg_Vtp2)2。 = Kp * (Vsg_Vtp2) 2. 栅极与源极间的电压差Vsg 为Vdd-(Lock-VtpΙ+Vdata-Preset。故电流Ioled = Kp* (Vdd-(Lock-Vtp 1+Vdata-Preset) -Vtp2)2„ 然,又因Vtpl 近似于Vtp2。故, 电流Imd可以视为KpMVdd-Lock-Vdata+Preset)2。有机发光二极管对应于此电流I。·产生对应的亮度。 Vsg is a voltage difference between the gate and the source of Vdd- (Lock-VtpΙ + Vdata-Preset. Therefore, the current Ioled = Kp * (Vdd- (Lock-Vtp 1 + Vdata-Preset) -Vtp2) 2 "However, because Vtpl Vtp2 similar. therefore, the current can be regarded as Imd KpMVdd-Lock-Vdata + Preset) 2. the organic light emitting diode corresponding to this electric current I. · generate a corresponding luminance.

[0050] 第四阶段IV Stage时(即显示现行画面阶段),此时除了扫描信号^^11的电压位准转变为使第三薄膜晶体管T3截止而不再传入像素电位,其他各元件运作情形及节点电压均同于第三阶段IllStage。 [0050] When the fourth stage IV Stage (i.e., the current display screen stages), except that this time the scan signal voltage level 11 ^^ quasi into the third thin film transistor T3 is turned off and no incoming pixel potential, each of the other elements into the operating situation and node voltages are the same in the third stage IllStage.

[0051 ] 由上述可知,在第二阶段II Stage时,像素电路202已完成了临界电压Vtp2补偿的动作,从而避免了旧有技术的中,原负责临界电压补偿动作的薄膜晶体管,即图1中的薄膜晶体管MP1,因为导通电流微弱而使得补偿机制的速度较慢,造成在数据写入阶段仍未稳定完成电压补偿而导致了电荷分享。 [0051] From the foregoing, in the second phase II Stage, the pixel circuit 202 has completed the operation of the threshold voltage of Vtp2 compensation, thereby avoiding the old art, the threshold voltage of the thin film transistor of the original charge of the compensation operation, i.e., FIG. 1 the thin film transistor MP1, because weak current conduction so that the slower speed compensation mechanism, resulting in the completion of the data writing stage has not yet stabilized voltage compensation leads to charge sharing. 进而使数据电压与画面亮度有一定程度的误差的窘境。 Thereby enabling the data voltage and the screen brightness of a degree of error predicament. 另一方面,藉由第一电压Lock大小的控制,也可以加速补偿机制的运作,改善补偿的时间。 On the other hand, by controlling the size of the first voltage Lock, it can also speed up the operation of the compensation mechanism, improve the compensation of time. 而由于本实例所包含的元件较少,所以较适合小尺寸面板的应用,如手持设备等。 And because fewer components contained in the present example, it is more suitable for a small size panel applications, such as handheld devices.

[0052] 此外,上述重置电路210亦可由不同的电路结构实现。 [0052] Further, the reset circuit 210 may also be realized by different circuit structures. 如图4所示,其为重置电路的一例的电路图。 As shown in FIG. 4, which is an example of a circuit diagram of a reset circuit. 重置电路210'由第五薄膜晶体管T5所构成,其中第五薄膜晶体管T5的第一端耦接至第一电容Cl的第一端(即节点XI),其第二端耦接至第五薄膜晶体管T5的栅极并接收第二控制信号Rst。 The reset circuit 210 'is constituted by the fifth TFT T5, wherein a first terminal of the fifth thin film transistor T5 is coupled to a first terminal of the first capacitor Cl (i.e., node XI), a second terminal coupled to the fifth gate thin film transistor T5 and receives a second control signal Rst. 或者,亦可如图5所示,其为重置电路的另一例的电路图。 Alternatively, also shown in FIG. 5, which is a circuit diagram showing another example of the reset circuit. 重置电路210”亦由第五薄膜晶体管T5所构成。然,第五薄膜晶体管T5的第一端耦接至第一电容Cl的第一端(即节点XI),其第二端耦接至第一电容Cl的另一端,其栅极则接收第二控制信号Rst。 Reset circuit 210 "increased from a fifth TFT T5 formed. Then, a first end of the fifth thin film transistor T5 is coupled to a first terminal of the first capacitor Cl (i.e., node XI), a second terminal coupled to the other end of the first capacitor Cl, and a gate receiving the second control signal Rst.

[0053] 而有机发光像素202亦可多耦接一第二电容C2,如图6所示,有机发光像素202 中,第二电容C2的第一端耦接至节点Yl,第二电容C2的另一端接收第二电压Vdd。 [0053] The organic light emitting pixel 202 may be coupled to a plurality of the second capacitor C2, as shown in FIG. 6, the organic light emitting pixel 202, a first terminal of the second capacitor C2 is coupled to the node Yl, the second capacitor C2 the other terminal receiving the second voltage Vdd. 第二电容C2可用来帮助维持节点Xl与节点Yl间电压差的稳定。 The second capacitor C2 may be used to help maintain the voltage difference between the node and the node Xl Yl stability.

[0054] 除此的外,上述第四薄膜晶体管T4用以控制电流Imd是否流向有机发光二极管0LED,其配置位置除了如图2所示外,第四薄膜晶体管T4的配置位置亦可如图7所示。 [0054] In addition to, the above-described fourth TFT T4 for controlling the current flowing to the organic light emitting diode Imd 0LED whether, in addition to the arrangement position thereof shown in FIG. 2, the arrangement position of the fourth thin film transistor T4 also FIG. 7 Fig. 图7 为本实施例的第二例有机发光显示器的示意图。 Figure 7 a schematic view of a second embodiment of the organic light emitting display of the present embodiment. 有机发光像素702中,第四薄膜晶体管T4 可配置于第二电压Vdd与第二薄膜晶体管T2间,即第四薄膜晶体管T4的第一端接收第二电压Vdd,第四薄膜晶体管T4的第二端耦接至第二薄膜晶体管T2的第一端(即源极),第四薄膜晶体管"Γ4的栅极接收第一控制信号Enb。 The organic light emitting pixel 702, the fourth thin film transistor T2 to T4 may be disposed between the second voltage Vdd and the second thin film transistor, i.e., a first end of the fourth thin film transistor T4 receives the second voltage Vdd, second and fourth thin film transistor T4 terminal coupled to a first end of the second thin film transistor T2 (i.e., a source), the fourth thin film transistor "gate receiving the first control signal Enb Γ4.

[0055] 或者,第四薄膜晶体管T4亦可桥接在有机发光像素的外以控制电流Imd是否流向有机发光二极管0LED。 [0055] Alternatively, the fourth thin film transistor T4 is also bridged to the organic light emitting pixel to control the current flowing to the organic light emitting diode Imd whether 0LED. 如图8所示,其为本实施例的第三例有机发光显示器的示意图。 8, a schematic view of a third embodiment of the organic light emitting display according to present embodiment. 第四薄膜晶体管"Γ4桥接在有机发光像素802外部,即第四薄膜晶体管T4的第一端耦接至有机发光二极管OLED的阴极,第四薄膜晶体管T4的第二端耦接至第三电压Vss,第四薄膜晶体管"Γ4的栅极接收第一控制信号Enb。 Fourth thin film transistor "Γ4 bridge 802 outside of the organic light emitting pixels, i.e., a first terminal of the fourth thin film transistor T4 is coupled to the cathode of the organic light emitting diode OLED, a second end of the fourth thin film transistor T4 is coupled to the third voltage Vss , the fourth thin film transistor "gate receiving a first control signal Γ4 Enb.

[0056] 第四薄膜晶体管T4桥接在有机发光像素的外的位置亦可于第二电压Vdd与第二薄膜晶体管T2间。 [0056] The fourth thin film transistor T4 bridging position outside the organic light emitting pixel may Vdd and a second voltage between the second thin film transistor T2. 如图9所示,其为本实施例的第四例有机发光显示器的示意图。 9, a schematic view of a fourth embodiment of the organic light emitting display according to present embodiment. 第四薄膜晶体管T4桥接在有机发光像素902外部,第四薄膜晶体管T4的第一端耦接至第二薄膜晶体管T2的第一端,第四薄膜晶体管T4的第二端耦接至第一电压Vdd,第四薄膜晶体管T4 的栅极接收第一控制信号Enb。 Fourth thin film transistor T4 bridge 902 outside of the organic light emitting pixel, a first end of the fourth thin film transistor T4 is coupled to the first end of the second thin film transistor T2, a second end of the fourth thin film transistor T4 is coupled to the first voltage Vdd, the fourth thin film transistor T4, a gate receiving a first control signal Enb.

[0057] 第二实施例 [0057] Second Embodiment

[0058] 本实施不同于第一实施例的地方在于重置电路的结构。 Where [0058] The present embodiment differs from the first embodiment in the structure of the reset circuit. 重置电路改由两个薄膜晶体管所组成并分别电性连接于第一电容的两端,以用来重置第一电容与设定节点Xi上的电位。 Replaced by reset circuit composed of two thin film transistor and electrically connected to the ends of the first capacitor, to be used to reset the first capacitor and the potential at the node set Xi.

[0059] 请参照图10,其为本发明第二实施例的有机发光显示器的示意图。 [0059] Referring to FIG 10, an organic light emitting display which is a schematic view of a second embodiment of the present invention. 有机发光显示器1000亦包括驱动单元1001与有机发光像素1002。 The organic light emitting display 1000 also includes a driving unit 1001 and the organic light emitting pixel 1002. 驱动单元1001则包括数据驱动电路1004、扫描驱动电路1006与时序控制器1008。 The drive unit 1001 includes a data driving circuit 1004, a scan driving circuit 1006 and the timing controller 1008. 而有机发光像素1002亦包括第一电容Cl、 第一薄膜晶体管Tl、第二薄膜晶体管T2、第三薄膜晶体管T3、第四薄膜晶体管T4、重置电路1010与有机发光二极管0LED。 The organic light emitting pixel 1002 also includes a first capacitor Cl, a first thin film transistor Tl, a second thin film transistor T2, the third thin film transistor T3, the fourth thin film transistor T4, a reset circuit 1010 and the organic light emitting diode 0LED. 薄膜晶体管Tl、T2、T3以及T4以PMOS为例,绘制于图10 中。 The thin film transistor Tl, T2, T3 and T4, PMOS, for example, plotted in FIG. 10. 有机发光显示器1000的结构如同第一实施例所示的结构,于此便不再多述。 The organic light emitting display 1000 as shown in the structure of the first embodiment, which will not repeat.

[0060] 然需特别注意的是,重置电路1010由一个第五薄膜晶体管T5及一个第六薄膜晶体管T6构成。 [0060] However, special attention is required, the reset circuit 1010 is constituted by a fifth thin film transistor T5 and a sixth thin film transistor T6. 第五薄膜晶体管T5与第六薄膜晶体管T6例如为PM0S。 A fifth thin film transistor T5 and the sixth transistor T6 is, for example PM0S. 第五薄膜晶体管T5 的第一端耦接至第一电容Cl的一第一端(即节点XI),而第二端接收第四电压INI且其栅极接收第二控制信号Rstl ;第六薄膜晶体管的第一端耦接至第一电容Cl的一第二端(即节点Yl),而第二端亦接收第四电压INI且其栅极接收第三控制信号Rst2。 A first end of the fifth thin film transistor T5 is coupled to a first terminal of the first capacitor Cl (i.e., node XI), and the second terminal of the fourth voltage and INI gate receiving a second control signal RSTL; sixth thin film a first terminal of the transistor is coupled to a second terminal of the first capacitor Cl (i.e., node Yl), and a second end INI and also receives a fourth voltage having a gate receiving the third control signal Rst2. 其中,第一电压位准Vl低于第一电压Lock的电压位准。 Wherein the first voltage Vl is lower than the voltage level of the first voltage level of Lock.

[0061] 请参照图11,其为本发明第二实施例的有机发光像素的时序图。 [0061] Referring to Figure 11, a timing chart of the organic light emitting pixel of the second embodiment of the present invention. 在第零阶段OStage'(显示前一画面)时,扫描信号kan的输出电压位准使第三薄膜晶体管T3截止, 而第二控制信号Rstl及第三控制信号Rst2的电压位准使第五薄膜晶体管T5及第六薄膜晶体管T6均截止。 When the zeroth stage OStage '(previous screen is displayed), the scanning signal kan output voltage level of the third thin film transistor T3 is turned off, and the second control signal and a third control signal Rst2 Rstl voltage level of the fifth film a thin film transistor T5 and the sixth transistor T6 are turned off. 故节点Yl的电压为前一画面的像素电压Vdata',而节点Xl的电压为前一像素的电压X'。 Therefore, the voltage of the node Yl previous frame pixel voltage Vdata ', the voltage at node Xl is the previous pixel voltage X'. 节点Xl的电压X'大于第一电压Lock使得第一薄膜晶体管Tl截止,同时电压X'也使第二薄膜晶体管T2导通而产生电流IMD。 Xl voltage node X 'that is greater than the first voltage Lock first thin film transistor Tl is turned off, while the voltage X' of the second thin film transistor T2 is also turned on to generate a current IMD. 电流为Kp*(Vdd-Y'-Vtp2)2。 Current is Kp * (Vdd-Y'-Vtp2) 2. Vsg为第二薄膜晶体管T2栅极与源极间的电压差,其为Vdd-Y'。 Vsg is a voltage difference between the electrodes of the second thin film transistor T2 gate and the source, that is Vdd-Y '. Vtp2为第二薄膜晶体管T2的临界电压(Threshold Voltage) 0电流透过第四薄膜晶体管抖驱动有机发光二极管OLED发亮。 Threshold voltage (Threshold Voltage) Vtp2 a second thin film transistor T2 0 shake driving current organic light emitting diode OLED through the fourth thin film transistor lights up.

[0062] 接着,在第一阶段IStage'时,扫描信号kan的电压位准转变为使第三薄膜晶体管T3截止,而第二控制信号Rstl及第三控制信号Rst2的电压位准转变为使第五薄膜晶体管T5及第六薄膜晶体管T6均导通。 [0062] Next, in the first stage IStage ', the scan signal voltage level kan into the third thin film transistor T3 is turned off, and the second control signal and a third control signal Rst2 Rstl voltage level into the first five thin film transistor T5 and the sixth transistor T6 are turned on. 所以此时节点Xl及节点Yl的电压均为第四电压INI, 例如为-2V〜-IV。 Therefore, when the voltage of the node Xl and Yl are the fourth node voltage INI, for example -2V~-IV. 在此阶段,藉由第四电压INI重置第一电容Cl。 At this stage, the fourth voltage by a first capacitor INI reset Cl.

[0063] 在第二阶段II Mage'时,第二控制信号Rstl的电压位准转为使第五薄膜晶体管T5截止,而第一控制信号Enb、扫描信号kan及第三控制信号Rst2的电压位准仍维持与第一阶段IStage'相同。 [0063] In the second stage II Mage ', the second control signal into Rstl voltage level of the fifth thin film transistor T5 is turned off, and the first control signal Enb, kan scan signal and the third control signal of the voltage level of Rst2 quasi remains the first stage IStage 'same. 所以此时节点Yl的电压仍为INI,而节点Xl的电压因为第五薄膜晶体管T5截止与第一薄膜晶体管Tl的作用而上升到了第二电压位准V2。 Therefore, when the voltage of the node Yl still INI, and the voltage of the node Xl fifth thin film transistor T5 is turned off because the effect of the first thin film transistor Tl rises to the second voltage level V2. 第二电压位准V2 为第一电压Lock减去第一薄膜晶体管Tl的临界电压Vtpl。 A second voltage level V2 to the first voltage minus the first thin film transistor Tl Lock threshold voltage Vtpl. 换句话说,此阶段用以使第一电容Cl的第一端Xl的电压位准为Lock-Vtpl。 In other words, the voltage level at this stage for the first terminal Xl of the first capacitor Cl is quasi Lock-Vtpl.

[0064] 第三阶段III Stage'时(即数据写入阶段),第一控制信号Enb的电压位准转变为使第四薄膜晶体管"Γ4导通,第三控制信号Rst2的电压位准转变为使第六薄膜晶体管T6 截止,扫描信号kan电压位准转变为使第三薄膜晶体管T3导通,而第二控制信号Rstl仍维持原本的电压位准。此时数据驱动电路1004改输出像素电压Vdata。像素电压Vdata透过导通的第三薄膜晶体管T3使节点Yl的电压为像素电压Vdata。而节点Xl的电压经由第一电容Cl的作用亦提高到了Lock-Vtpl+Vdata-INI,因而使得第一薄膜晶体管Tl截止。 此时,在第二薄膜晶体管T2的栅极与源极间的电压差Vsg为第二电压Vdd减去节点Xl的电位,即Vdd-(Lock-Vtpl+Vdata-ΙΝΙ)。上,Vsg-Vtp = Vdd-(Lock-Vtp+Vdata-INI) -Vtp = Vdd-Lock-Vdata+INI,故电流Ioled = Kp* (Vdd-(Lock-Vtpl+Vdata-INI) _Vtp2)2。然,又因Vtpl近似于Vtp2。故,电流Imd可以视为Kp* (Vdd-Lock-Vdata+INI) When [0064] the third phase III Stage '(i.e., the data writing stage), a first control signal Enb voltage level of the fourth thin film transistor into "Γ4 turned on, the voltage level transition of the third control signal Rst2 T6 is turned off so that the scanning signal kan voltage level transition of the sixth thin film transistor of the third thin film transistor T3 is turned on, and the second control signal remains Rstl original voltage level. At this time, the data driving circuit 1004 changes the pixel output voltage Vdata the pixel voltage Vdata transmitted through the third thin film transistor T3 is turned on the voltage of the node voltage Vdata Yl of the pixel. Xl and also increase the voltage at node via the action of the first capacitor Cl to the Lock-Vtpl + Vdata-INI, so that the first a thin film transistor Tl is turned off. at this time, the voltage Vsg difference between the gate and the source of the second thin film transistor T2 is a second voltage Vdd minus the potential of the node Xl, i.e. Vdd- (Lock-Vtpl + Vdata-ΙΝΙ) the upper, Vsg-Vtp = Vdd- (Lock-Vtp + Vdata-INI) -Vtp = Vdd-Lock-Vdata + INI, so that the current Ioled = Kp * (Vdd- (Lock-Vtpl + Vdata-INI) _Vtp2) 2 . However, because Vtpl Vtp2 similar. therefore, the current can be regarded as Imd Kp * (Vdd-Lock-Vdata + INI) 2。有机发光二极管对应于此电流产生对应的亮度。 2. The organic light emitting diode corresponding to this current generates a corresponding luminance.

[0065] 第四阶段IV Stage'时(即画面显示阶段),此时除了扫描信号kan的电压位准转变为使第三薄膜晶体管T3截止而不再传入像素电位,其他各元件运作情形及节点电压均同于第三阶段III Stage,。 When [0065] Fourth Stage IV Stage '(i.e., phase screen display), except that this time the voltage level transition of the scanning signal kan the third thin film transistor T3 is turned off and no incoming pixel potential, respective components and other operating circumstances node voltage are the same in the third phase III stage ,.

[0066] 由上述可知,在第二阶段II Mage'时,像素电路1002已完成了临界电压Vtp2补偿的动作,从而避免了旧有技术的中,原负责临界电压补偿动作的薄膜晶体管,即图1中的薄膜晶体管MP1,因为导通电流微弱而使得补偿机制的速度较慢,造成在数据写入阶段仍未稳定完成电压补偿而导致了电荷分享。 [0066] From the foregoing, in the second stage II Mage ', the pixel circuit 1002 has completed the operation of the threshold voltage of Vtp2 compensation, thereby avoiding the old art, the threshold voltage of the thin film transistor of the original charge of the compensation operation, i.e., FIG. a thin film transistor MP1, because weak current conduction so that the slower speed compensation mechanism, resulting in the completion of the data writing stage has not yet stabilized voltage compensation leads to charge sharing. 进而使数据电压与画面亮度有一定程度的误差的窘境。 Thereby enabling the data voltage and the screen brightness of a degree of error predicament. 另一方面,藉由第一电压Lock大小的控制,也可以加速补偿机制的运作,改善补偿的时间。 On the other hand, by controlling the size of the first voltage Lock, it can also speed up the operation of the compensation mechanism, improve the compensation of time. 而由于本实例所包含的元件较多,所以较适合大尺寸面板的应用,如显示设备等。 And because more elements included in the present example, more suited for large-size panel display device and the like.

[0067] 此外,上述重置电路1010亦可由不同的电路实现。 [0067] Further, the reset circuit 1010 may also be implemented by a different circuit. 如图12所示,其为重置电路的一例的电路图。 12, which is a circuit diagram showing an example of the reset circuit. 重置电路1010'由第五薄膜晶体管T5以及第六薄膜晶体管T6所构成,其中第五薄膜晶体管T5的第一端耦接至第一电容Cl的第一端(即节点XI),其第二端接收第四电压INI,第五薄膜晶体管T5的栅极接收第二控制信号Rstl,第六薄膜晶体管T6的第一端耦接至第一电容Cl的第二端(即节点Yl),其第二端耦接至第五薄膜晶体管T5的第二端,第六薄膜晶体管T6的栅极接收第三控制信号Rst2。 Reset circuit 1010 'is constituted by a fifth transistor T5 and the sixth thin film transistor T6, wherein the first end of the fifth thin film transistor T5 is coupled to a first terminal of the first capacitor Cl (i.e., node XI), a second a fourth terminal receiving a voltage INI, the fifth thin film transistor T5, a gate receiving the second control signal Rstl, a first end of the sixth thin film transistor T6 is coupled to the second terminal of the first capacitor Cl (i.e., node Yl), its two terminal coupled to a second terminal of the fifth thin film transistor T5, a sixth thin film transistor gate receiving the third control signal Rst2 T6. 或者,亦可如图13所示,其为重置电路的另一例的电路图。 Alternatively, also shown in FIG. 13, which is a circuit diagram showing another example of the reset circuit. 重置电路1010”亦由第五薄膜晶体管T5以及第六薄膜晶体管T6 所构成。然,第五薄膜晶体管T5的第一端耦接至第一电容Cl的第一端(即节点XI),其第二端耦接至第五薄膜晶体管T5的栅极并接收第二控制信号Rstl,第六薄膜晶体管T6的第一端耦接至第一电容Cl的第二端(即节点Yl),其第二端耦接至第六薄膜晶体管T6的栅极并接收第三控制信号Rst2。 Reset circuit 1010 "increased from the fifth transistor T5 and the sixth thin film transistor T6 formed. Then, a first end of the fifth thin film transistor T5 is coupled to a first terminal of the first capacitor Cl (i.e., node XI), which a second terminal coupled to the gate of the fifth thin film transistor T5 and receives a second control signal Rstl, a first end of the sixth thin film transistor T6 is coupled to the second terminal of the first capacitor Cl (i.e., node Yl), its two terminal coupled to the gate of the sixth thin film transistor T6 and to receive a third control signal Rst2.

[0068] 而有机发光像素1002亦可多耦接一第二电容C2,如图14所示,有机发光像素1402中,第二电容C2的第一端耦接至节点Y1,第二电容C2的另一端接收第二电压Vdd。 [0068] The organic light emitting pixels and 1002 may also be coupled to a plurality of the second capacitor C2, as shown in FIG. 14, in the organic light emitting pixel 1402, a first terminal of the second capacitor C2 is coupled to node Y1, the second capacitor C2 the other terminal receiving the second voltage Vdd. 第二电容C2可用来帮助维持节点Xl与节点Yl间电压差的稳定。 The second capacitor C2 may be used to help maintain the voltage difference between the node and the node Xl Yl stability.

[0069] 除此之外,上述第四薄膜晶体管T4用以控制电流Imd是否流向有机发光二极管0LED,其配置位置除了如图10所示外,第四薄膜晶体管T4的配置位置亦可如图15所示。 [0069] In addition, the fourth thin film transistor T4 to control the current flowing to the organic light emitting diode Imd 0LED whether, in addition to the arrangement position thereof shown in FIG. 10, a fourth TFT T4 is also disposed a position 15 Fig. 图15为本实施例的第二例有机发光显示器的示意图。 A schematic view of a second embodiment of the organic light emitting display 15 of the present embodiment of FIG. 有机发光像素1502中,第四薄膜晶体管T4的第一端接收第二电压Vdd,第四薄膜晶体管T4的第二端耦接至第二薄膜晶体管T2的第一端,第四薄膜晶体管"Γ4的栅极亦接收第一控制信号Enb。 The organic light emitting pixel 1502, the fourth thin film transistor T4 receives a first end of a second voltage Vdd, a second terminal of the fourth thin film transistor T4 is coupled to a first end of the second thin film transistor T2, the fourth thin film transistor "Γ4 of The gate also receives a first control signal Enb.

[0070] 第四薄膜晶体管T4亦可桥接在有机发光像素的外以控制电流Imd是否流向有机发光二极管0LED。 [0070] The fourth thin film transistor T4 is also bridged to the organic light emitting pixel to control the current flowing to the organic light emitting diode Imd whether 0LED. 如图16所示,为本实施例的第三例有机发光显示器的示意图。 16, a schematic view of a third embodiment of the organic light emitting display of the present embodiment. 第四薄膜晶体管T4桥接在有机发光像素1602外部,第四薄膜晶体管T4的第一端耦接至有机发光二极管OLED的阴极,第四薄膜晶体管T4的第二端耦接至第三电压Vss,第四薄膜晶体管T4 的栅极接收第一控制信号Enb。 Fourth thin film transistor T4 bridge 1602 outside of the organic light emitting pixel, a first end of the fourth thin film transistor T4 is coupled to the cathode of the organic light emitting diode OLED, a second end of the fourth thin film transistor T4 is coupled to the third voltage Vss, the first four gate receiving a first thin-film transistor T4 control signal Enb.

[0071] 第四薄膜晶体管T4桥接在有机发光像素的外的位置亦可于第二电压Vdd与第二薄膜晶体管T2间。 [0071] The fourth thin film transistor T4 bridging position outside the organic light emitting pixel may Vdd and a second voltage between the second thin film transistor T2. 如图17所示,其为本实施例的第四例有机发光显示器的示意图。 As shown in FIG. 17, a schematic view of a fourth embodiment of the organic light emitting display according to present embodiment. 第四薄膜晶体管"Γ4桥接在有机发光像素1702外部,第四薄膜晶体管T4的第一端耦接至第二薄膜晶体管T2的第一端,第四薄膜晶体管T4的第二端耦接至第一电压Vdd,第四薄膜晶体管T4的栅极接收第一控制信号Enb。 Fourth thin film transistor "Γ4 bridge 1702 outside of the organic light emitting pixel, a first end of the fourth thin film transistor T4 is coupled to a first end of the second thin film transistor T2, the second end of the fourth thin film transistor T4 is coupled to the first gate receiving the voltage Vdd, the fourth thin film transistor T4 a first control signal Enb.

[0072] 本发明上述实施例所揭露的具有电压补偿技术的有机发光显示器的有机发光像素,能够使补偿机制速度改善,且由于更快速的补偿机制,将可以弥补现行低温多晶硅(LTPS)技术造成主动式有机发光显示器(AMOLED)画面显示不均(Mura)的缺点。 The organic light emitting pixel of the organic light emitting display having a voltage compensation technique [0072] The present invention, the above disclosed embodiments, it is possible to make compensation mechanism speed improvement, and due to the more rapid compensation mechanism to compensate the existing low-temperature polysilicon (LTPS) technology resulting active matrix organic light emitting display (AMOLED) display screen disadvantages unevenness (Mura) a.

[0073] 综上所述,虽然本发明已以较佳实施例揭露如上,然其并非用以限定本发明,任何熟悉此技术的人员,在不脱离本发明的精神和范围内,当可作各种的更动与润饰,因此本发明的保护范围当以权利要求书所界定的为准。 [0073] Although the present invention has been described by reference to preferred embodiments, they are not intended to limit the invention, to any person skilled in the art, without departing from the spirit and scope of the present disclosure, may make various modifications and variations, and the scope of the invention as defined in the appended claims and their equivalents.

Claims (24)

1. 一种像素的驱动方法,其特征在于,该像素具有一第一电容、一第一薄膜晶体管、一第二薄膜晶体管与一有机发光二极管,该第一电容的一第一端耦接该第二膜晶体管的栅极,该第一薄膜晶体管的一第一端接收一第一电压,该第一薄膜晶体管的一第二端耦接至该第一薄膜晶体管的栅极及该第电容的该第一端,该第二薄膜晶体管的一第一端接收一第二电压,该第二薄膜晶体管的一第二端用以输出一像素电流至该有机发光二极管的阳极, 该有机发光二极管的阴极接收一第三电压,该驱动方法包括:截止该有机发光二极管;于该有机发光二极管截止期间,提供一第四电压于该第一电容的该第一端,以及提供一第五电压于该第一电容的一第二端,该第四电压与该第一电压间的电压差使该第一薄膜晶体管导通;于该有机发光二极管截止期间且该第一电容的 1. A driving method of a pixel, wherein the pixel has a first capacitor, a first thin film transistor, a second thin film transistor and an organic light emitting diode, the first capacitor coupled to a first end of the film gate of the second transistor, a first terminal of the first thin film transistor receives a first voltage, a second terminal coupled to the first thin film transistor connected to the gate of the first thin film transistor and said second capacitor the first end, the first end of a second thin film transistor receives a second voltage, a second terminal of the second thin film transistor for outputting a pixel current to the anode of the organic light emitting diode, the organic light emitting diode the cathode receives a third voltage, the driving method comprising: turn off the organic light emitting diode; organic light emitting diode during the off, providing a fourth voltage to the first terminal of the first capacitor, and providing a fifth voltage to the a second terminal of the first capacitor, the fourth voltage errand the first thin film transistor is turned on and the voltage between the first voltage; period to the organic light emitting diode is turned off and the first capacitor 该第二端的电压位准保持在该第五电压时,移除该第四电压以使该第一电容的该第一端的电压位准因该第二薄膜晶体管的作用改变为一第一电压位准;于该有机发光二极管截止期间且于该第一电容的该第一端的电压位准上升到该第一电压位准后,改提供一像素电压至该第一电容的该第二端;以及导通该有机发光二极管以使该第三薄膜晶体管依据该第一电容的该第一端的电压位准输出该像素电流至该有机发光二极管。 When the second end of the voltage level held at the fifth voltage, the fourth voltage is removed so that the first end of the first capacitor voltage level by the action of the second thin film transistor is changed to a first voltage level; organic light emitting diode during the off and to the first terminal of the first capacitor voltage level rises to the first voltage level after a change to provide the pixel voltage to the second end of the first capacitor ; and the organic light emitting diode is turned on so that the reference output of the third thin film transistor of the pixel current to the organic light emitting diode according to the voltage level of the first capacitor to the first end.
2.如权利要求1所述的驱动方法,其特征在于,提供该第五电压的步骤由一数据驱动电路与一第三薄膜晶体管执行,该第三薄膜晶体管的一第一端接收该数据驱动电路所输出的该第五电压,该第三薄膜晶体管的一第二端耦接至该第一电容的该第二端,该第三薄膜晶体管的栅极用以接收一扫描信号,当该扫描信号的电压位准使该第三薄膜晶体管导通时,该第三薄膜晶体管提供该第五电压至该第一电容的该第二端。 2. The driving method according to claim 1, wherein the step of the fifth voltage is provided by a data driving circuit and a third thin film transistor is executed, a first terminal for receiving the data driver third thin film transistor the fifth circuit output voltage, a second terminal of the third thin film transistor coupled to the second terminal of the first capacitor, the gate electrode of the third thin film transistor for receiving a scanning signal, when the scanning when the voltage signal so that the quasi-third thin film transistor is turned on, the third thin film transistor supplies the fifth voltage to the second terminal of the first capacitor.
3.如权利要求1所述的驱动方法,其特征在于,截止该有机发光二极管的步骤由一第四薄膜晶体管实现,该第四薄膜晶体管的一第一端与一第二端串联于该像素电流所流过的路径上,该第一端为源极或漏极,该第二端为漏极或源极。 The driving method according to claim 1, wherein the organic light emitting diode off step is realized by a fourth thin film transistor, a first terminal of the fourth thin film transistor and a second end connected in series to the pixel on a path of current flowing through the first terminal is a source or drain, the second terminal is a drain or source.
4.如权利要求1所述的驱动方法,其特征在于,该第五电压的电压位准实质上等于该第四电压的电压位准。 4. The driving method according to claim 1, wherein the voltage level of the fifth voltage is substantially equal to the voltage level of the fourth voltage.
5. 一种有机发光像素,其特征在于,包括:一第一电容;一第一薄膜晶体管,该第一薄膜晶体管的一第一端接收一第一电压,该第一薄膜晶体管的一第二端耦接至该第一薄膜晶体管的栅极及该第一电容的一第一端;一第二薄膜晶体管,该第二薄膜晶体管的一第一端接收一第二电压,该第二薄膜晶体管的栅极耦接至该第一薄膜晶体管的栅极;一第三薄膜晶体管,该第三薄膜晶体管的一第一端接收一像素电压,该第三薄膜晶体管的一第二端耦接至该第一电容的一第二端,该第三薄膜晶体管的栅极用以接收一扫描信号;一重置电路,用以设定该第一电容的该第一端为一第一电压位准;以及一有机发光二极管,该有机发光二极管的阳极偶接至该第二薄膜晶体管的一第二端, 该有机发光二极管的阴极接收一第三电压;其中,该第一电压位准低于该第一电压的 An organic light emitting pixels, wherein, comprising: a first capacitor; a first thin film transistor, a first terminal of the first thin film transistor receives a first voltage, the first transistor, a second thin film terminal coupled to the gate of the first thin film transistor and a first terminal of the first capacitor; a second thin film transistor, a first terminal of the second thin film transistor receives a second voltage, the second thin film transistor a gate coupled to the gate of the first thin film transistor; a third thin film transistor, a first terminal of the third thin film transistor to receive a pixel voltage, a second terminal of the third thin film transistor coupled to the a second terminal of the first capacitor, the gate electrode of the third thin film transistor for receiving a scan signal; a reset circuit for setting the first end of the first capacitor to a first voltage level; and an organic light emitting diode, the anode of the organic light emitting diode coupling is coupled to a second terminal of the second thin film transistor, the cathode of the organic light emitting diode receiving a third voltage; wherein the first voltage level is lower than the first a voltage 电压位准。 Voltage level.
6.如权利要求5所述的有机发光像素,其特征在于,该有机发光像素还包括:一第四薄膜晶体管,该第四薄膜晶体管的一第一端耦接至该第二薄膜晶体管的该第二端,该第四薄膜晶体管的一第二端耦接至该有机发光二极管的阳极,该第四薄膜晶体管的栅极接收一第一控制信号。 The organic light emitting pixel according to claim 5, wherein the organic light emitting pixel further comprising: a fourth thin film transistor, a first terminal of the fourth thin film transistor is coupled to the second thin film transistor that a second end, a second end coupled to the fourth thin film transistor is connected to the anode of the organic light emitting diode, the gate electrode of the fourth thin film transistor receiving a first control signal.
7.如权利要求5所述的有机发光像素,其特征在于,该有机发光像素还包括:一第四薄膜晶体管,该第四薄膜晶体管的一第一端接收该第二电压,该第四薄膜晶体管的一第二端耦接至该第二薄膜晶体管的该第一端,该第四薄膜晶体管的栅极接收一第一控制信号。 The organic light emitting pixel according to claim 5, wherein the organic light emitting pixel further comprising: a fourth thin film transistor, a first terminal receiving the second voltage of the fourth thin film transistor, the fourth film the first end of a second terminal of the transistor is coupled to the second thin film transistor, a gate of the fourth thin film transistor receiving a first control signal.
8.如权利要求5所述的有机发光像素,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端接收一第四电压,该第五薄膜晶体管的栅极接收一第二控制信号。 The organic light emitting pixel according to claim 5, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal of the fifth thin film transistor receives a fourth voltage, the gate of the fifth thin film transistor receives a second control signal.
9.如权利要求5所述的有机发光像素,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端耦接该第五薄膜晶体管的栅极并接收一第二控制信号。 Eleven fifth thin film transistor, the fifth thin film transistor: 9. The organic light emitting pixel according to claim 5, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising a first terminal coupled to the first terminal of the first capacitor, a second terminal of the fifth thin film transistor is coupled to the gate of the fifth thin film transistor and receiving a second control signal.
10.如权利要求5所述的有机发光像素,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端耦接至该第一电容的该第二端,该第五薄膜晶体管的栅极接收一第二控制信号。 10. The organic light emitting pixel according to claim 5, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal coupled to the fifth thin film transistor is connected to the second terminal of the first capacitor, the gate electrode of the fifth thin film transistor receives a first second control signal.
11.如权利要求5所述的有机发光像素,其特征在于,该有机发光像素还包括:一第二电容,该第二电容的一第一端耦接至该第一电容的该第二端,该第二电容的一第二端接收该第二电压。 11. The organic light emitting pixel according to claim 5, wherein the organic light emitting pixel further comprises: a second capacitor, a first terminal coupled to the second capacitor is coupled to the second terminal of the first capacitor , a second end of the second capacitor receives the second voltage.
12.如权利要求5所述的有机发光像素,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端接收一第四电压,该第五薄膜晶体管的栅极接收一第二控制信号;一第六薄膜晶体管,该第六薄膜晶体管的一第一端耦接至该第一电容的该第二端,该第六薄膜晶体管的一第二端接收该第四电压,该第六薄膜晶体管的栅极接收一第三控制信号。 12. The organic light emitting pixel according to claim 5, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal of the fifth thin film transistor receives a fourth voltage, the gate of the fifth thin film transistor receives a second control signal; a sixth a thin film transistor, a first terminal of the sixth thin film transistor is connected to the second terminal of the first capacitor, a second terminal of the sixth thin film transistor receives the fourth voltage, the gate electrode of the sixth thin film transistor receiving a third control signal.
13.如权利要求5所述的有机发光像素,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端接收一第四电压,该第五薄膜晶体管的栅极接收一第二控制信号;一第六薄膜晶体管,该第六薄膜晶体管的一第一端耦接至该第一电容的该第二端,该第六薄膜晶体管的一第二端耦接至该第五薄膜晶体管的该第二端,该第六薄膜晶体管的栅极接收一第三控制信号。 13. The organic light emitting pixel according to claim 5, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal of the fifth thin film transistor receives a fourth voltage, the gate of the fifth thin film transistor receives a second control signal; a sixth a thin film transistor, a first terminal of the sixth thin film transistor is connected to the second terminal of the first capacitor, a second terminal coupled to the sixth thin film transistor is coupled to the second terminal of the fifth thin film transistor, the gate electrode of the sixth thin film transistor receiving a third control signal.
14.如权利要求5所述的有机发光像素,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端耦接该第五薄膜晶体管的栅极并接收一第二控制信号;一第六薄膜晶体管,该第六薄膜晶体管的一第一端耦接至该第一电容的该第二端,该第六薄膜晶体管的一第二端耦接该第六薄膜晶体管的栅极并接收一第三控制信号。 14. The organic light emitting pixel according to claim 5, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal of the fifth thin film transistor is coupled to the gate of the fifth thin film transistor and receiving a second control signal; a sixth thin film transistor, a first terminal of the sixth thin film transistor is connected to the second terminal of the first capacitor, a second terminal coupled to the sixth thin film transistor of the gate of the sixth thin film transistor and receiving a third control signal .
15. 一种有机发光显示器,其特征在于,包括: 至少一像素,包括:一第一电容;一第一薄膜晶体管,该第一薄膜晶体管的一第一端接收一第一电压,该第一薄膜晶体管的一第二端耦接至该第一薄膜晶体管的栅极及该第一电容的一第一端;一第二薄膜晶体管,该第二薄膜晶体管的一第一端接收一第二电压,该第二薄膜晶体管的栅极耦接至该第一薄膜晶体管的栅极;一第三薄膜晶体管,该第三薄膜晶体管的一第一端接收一像素电压,该第三薄膜晶体管的一第二端耦接至该第一电容的一第二端,该第三薄膜晶体管的栅极用以接收一扫描信号;一重置电路,用以设定该第一电容的该第一端为一第一电压位准;以及一有机发光二极管,该有机发光二极管的阳极偶接至该第二薄膜晶体管的一第二端, 该有机发光二极管的阴极接收一第三电压;以及一驱动单元 An organic light emitting display, comprising: at least one pixel, comprising: a first capacitor; a first thin film transistor, a first terminal of the first thin film transistor receives a first voltage, the first a second terminal of the thin film transistor is coupled to the gate of the first thin film transistor and a first terminal of the first capacitor; a second thin film transistor, a first terminal of the second thin film transistor receives a second voltage the gate of the second thin film transistor is coupled to the gate of the first thin film transistor; a third thin film transistor, a first terminal of the third thin film transistor to receive a pixel voltage, a first of the third thin film transistor two terminal coupled to a second terminal of the first capacitor, the gate electrode of the third thin film transistor for receiving a scan signal; a reset circuit for setting the first end of the first capacitor is a a first voltage level; and an organic light emitting diode, the anode of the organic light emitting diode coupling is coupled to a second terminal of the second thin film transistor, the cathode of the organic light emitting diode receiving a third voltage; and a driving unit 用以驱动该像素,该驱动单元包括: 一数据驱动电路,用以输出该像素电压; 一扫描驱动电路,用以输出该扫描信号;及一时序控制电路,用以控制该重置电路设定该第一电容的该第一端为该第一电压位准;其中,该第一电压位准低于该第一电压的电压位准,该驱动电路更用以提供该第一电压、该第二电压与该第三电压。 For driving the pixel, the driving unit comprising: a data driving circuit, for outputting the pixel voltage; a scan driving circuit for outputting the scanning signal; and a timing control circuit for controlling the reset circuit is set the first end of the first capacitor for the first voltage level; wherein the first voltage level is lower than the voltage level of the first voltage, the driving circuit further configured to provide the first voltage, the second second voltage and the third voltage.
16.如权利要求15所述的有机发光显示器,其特征在于,该像素还包括:一第四薄膜晶体管,该第四薄膜晶体管的一第一端耦接至该第二薄膜晶体管的该第二端,该第四薄膜晶体管的一第二端耦接至该有机发光二极管的阳极,该第四薄膜晶体管的栅极接收由该时序控制电路输出的一第一控制信号。 The second one fourth thin film transistor, a first terminal of the fourth thin film transistor is coupled to the second thin film transistor: 16. The organic light emitting display according to claim 15, wherein the pixel further comprises a first control signal coupled to a second terminal end, the fourth thin film transistor is connected to the anode of the organic light emitting diode, a gate for receiving the fourth thin film transistor circuit is outputted from the timing control.
17.如权利要求15所述的有机发光显示器,其特征在于,该像素还包括:一第四薄膜晶体管,该第四薄膜晶体管的一第一端接收该第二电压,该第四薄膜晶体管的一第二端耦接至该第二薄膜晶体管的该第一端,该第四薄膜晶体管的栅极接收由该时序控制电路输出的一第一控制信号。 17. The organic light emitting display according to claim 15, wherein the pixel further comprises: a fourth thin film transistor, a first terminal receiving the second voltage of the fourth thin film transistor, the fourth thin film transistor a first control signal and a second terminal coupled to the second end of the first thin film transistor, a gate for receiving the fourth thin film transistor is controlled by the output of the timing circuit.
18.如权利要求15所述的有机发光显示器,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端接收一第四电压,该第五薄膜晶体管的栅极接收一第二控制信号,该时序控制电路输出该第二控制信号,该驱动单元用以提供该第四电压。 18. The organic light emitting display according to claim 15, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal of the fifth thin film transistor receives a fourth voltage, the gate of the fifth thin film transistor receives a second control signal, the timing control the circuit outputs a second control signal, the driving unit for providing the fourth voltage.
19.如权利要求15所述的有机发光显示器,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端耦接该第五薄膜晶体管的栅极,该第五薄膜晶体管的栅极接收一第二控制信号,该时序控制电路输出该第二控制信号。 19. The organic light emitting display according to claim 15, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal coupled to the fifth thin film transistor, the gate of the fifth thin film transistor, a gate receiving the fifth thin film transistor of the second control signal, the timing control circuit outputs the second control signal.
20.如权利要求15所述的有机发光显示器,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端耦接至该第一电容的该第二端,该第五薄膜晶体管的栅极接收一第二控制信号,该时序控制电路输出该第二控制信号。 20. The organic light emitting display according to claim 15, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal coupled to the fifth thin film transistor is connected to the second terminal of the first capacitor, the gate electrode of the fifth thin film transistor receives a first second control signal, the second control signal to the timing control circuit outputs.
21.如权利要求15所述的有机发光显示器,其特征在于,该像素还包括:一第二电容,该第二电容的一第一端耦接至该第一电容的该第二端,该第二电容的一第二端接收该第二电压。 21. The organic light emitting display according to claim 15, wherein the pixel further comprises: a second capacitor, a first terminal coupled to the second capacitor is coupled to the second terminal of the first capacitor, the a second terminal receiving the second voltage of the second capacitor.
22.如权利要求15所述的有机发光显示器,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端接收一第四电压,该第五薄膜晶体管的栅极接收一第二控制信号;一第六薄膜晶体管,该第六薄膜晶体管的一第一端耦接至该第一电容的该第二端,该第六薄膜晶体管的一第二端接收该第四电压,该第六薄膜晶体管的栅极接收一第三控制信号,该时序控制电路输出该第二控制信号与该第三控制信号,该驱动电路更用以提供该第四电压。 22. The organic light emitting display according to claim 15, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal of the fifth thin film transistor receives a fourth voltage, the gate of the fifth thin film transistor receives a second control signal; a sixth a thin film transistor, a first terminal of the sixth thin film transistor is connected to the second terminal of the first capacitor, a second terminal of the sixth thin film transistor receives the fourth voltage, the gate electrode of the sixth thin film transistor receiving a third control signal, the timing control circuit outputs the second control signal and the third control signal, the driving circuit further configured to provide the fourth voltage.
23.如权利要求15所述的有机发光显示器,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端接收一第四电压,该第五薄膜晶体管的栅极接收一第二控制信号;一第六薄膜晶体管,该第六薄膜晶体管的一第一端耦接至该第一电容的该第二端,该第六薄膜晶体管的一第二端耦接至该第五薄膜晶体管的该第端,该第六薄膜晶体管的栅极接收一第三控制信号,该时序控制电路输出该第二控制信号与该第三控制信号,该驱动电路更用以提供该第四电压。 23. The organic light emitting display according to claim 15, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal of the fifth thin film transistor receives a fourth voltage, the gate of the fifth thin film transistor receives a second control signal; a sixth a thin film transistor, a first terminal of the sixth thin film transistor is connected to the second terminal of the first capacitor, a second terminal coupled to the sixth thin film transistor is coupled to the second terminal of the fifth thin film transistor, the gate of the sixth thin film transistor receiving a third control signal, the second control signal and the third control signal to the timing control circuit outputs the driving circuit further configured to provide the fourth voltage.
24.如权利要求15所述的有机发光显示器,其特征在于,该重置电路还用以重置该第一电容,该重置电路包括:一第五薄膜晶体管,该第五薄膜晶体管的一第一端耦接至该第一电容的该第一端,该第五薄膜晶体管的一第二端耦接该第五薄膜晶体管的栅极,该第五薄膜晶体管的栅极接收一第二控制信号;一第六薄膜晶体管,该第六薄膜晶体管的一第一端耦接至该第一电容的该第二端,该第六薄膜晶体管的一第二端耦接该第六薄膜晶体管的栅极,该第六薄膜晶体管的栅极接收一第三控制信号,该时序控制电路输出该第二控制信号与该第三控制信号。 24. The organic light emitting display according to claim 15, wherein the reset circuit is further configured to reset the first capacitor, the reset circuit comprising: a fifth thin film transistor, a thin film transistor of the fifth a first terminal coupled to the first terminal of the first capacitor, a second terminal coupled to the fifth thin film transistor, the gate of the fifth thin film transistor, a gate receiving the fifth thin film transistor of the second control signal; a sixth thin film transistor, a first terminal of the sixth thin film transistor is connected to the second terminal of the first capacitor, a second terminal coupled to the sixth thin film transistor is connected to the gate of the sixth thin film transistor , a gate of the sixth thin film transistor receiving a third control signal, the second control signal to the timing control circuit outputs the third control signal.
CN 200610163953 2006-11-27 2006-11-27 Organic light emitting display and voltage compensation technology organic light emitting pixel CN101192373B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200610163953 CN101192373B (en) 2006-11-27 2006-11-27 Organic light emitting display and voltage compensation technology organic light emitting pixel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200610163953 CN101192373B (en) 2006-11-27 2006-11-27 Organic light emitting display and voltage compensation technology organic light emitting pixel

Publications (2)

Publication Number Publication Date
CN101192373A CN101192373A (en) 2008-06-04
CN101192373B true CN101192373B (en) 2012-01-18

Family

ID=39487329

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200610163953 CN101192373B (en) 2006-11-27 2006-11-27 Organic light emitting display and voltage compensation technology organic light emitting pixel

Country Status (1)

Country Link
CN (1) CN101192373B (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101872581B (en) * 2010-05-25 2011-08-10 友达光电股份有限公司 Display device, display method thereof and drive circuit of current drive element
CN102280085B (en) * 2010-06-10 2013-09-11 元太科技工业股份有限公司 Pixel drive circuit and method and light-emitting display device
TWI493524B (en) 2010-06-10 2015-07-21 Prime View Int Co Ltd Pixel driver of light emitting display and associated method and apparatus
CN102760404B (en) * 2011-04-28 2015-01-28 瀚宇彩晶股份有限公司 Pixel circuit of light-emitting diode display and drive method of pixel circuit
CN102708785B (en) * 2011-05-18 2015-06-24 京东方科技集团股份有限公司 Pixel unit circuit, working method therefore and organic light emitting diode (OLED) display device
CN102622962A (en) * 2012-04-12 2012-08-01 四川虹视显示技术有限公司 Pixel circuit structure of active matrix-organic light-emitting diode (AMOLED)
CN103578404B (en) * 2012-07-18 2016-05-04 群康科技(深圳)有限公司 Organic light-emitting diode pixel circuit and display
CN103021328B (en) * 2012-11-23 2015-02-04 京东方科技集团股份有限公司 Pixel circuit for driving light emitting device to emit light and display device
CN103035201B (en) * 2012-12-19 2015-08-26 昆山工研院新型平板显示技术中心有限公司 Organic light-emitting diode pixel circuit, driving method and display panel thereof
CN104167173B (en) * 2014-08-01 2017-05-17 上海和辉光电有限公司 Pixel circuit for active organic light-emitting diode displayer
TWI539422B (en) * 2014-09-15 2016-06-21 友達光電股份有限公司 Pixel architechture and driving method thereof
WO2016065508A1 (en) * 2014-10-27 2016-05-06 上海和辉光电有限公司 Pixel circuit and light-emitting display device
CN104485074B (en) * 2014-12-30 2017-05-31 合肥鑫晟光电科技有限公司 Pixel-driving circuit, method and display device
CN104658485B (en) * 2015-03-24 2017-03-29 京东方科技集团股份有限公司 OLED drives compensation circuit and its driving method
EP3098804A3 (en) * 2015-05-28 2016-12-21 LG Display Co., Ltd. Organic light emitting display
CN105280140B (en) * 2015-11-24 2018-02-16 深圳市华星光电技术有限公司 Sensing circuit and corresponding OLED display devices
CN109036284A (en) * 2017-06-12 2018-12-18 上海和辉光电有限公司 Pixel compensation circuit and display device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1551084A (en) 2003-05-16 2004-12-01 京瓷株式会社 Image display device
US20050057456A1 (en) 2003-09-12 2005-03-17 Jen-Yi Hu Light emitting device and method of driving thereof
CN1677468A (en) 2004-03-31 2005-10-05 东北先锋电子股份有限公司 Drive device and drive method of light emitting display panel
US7046240B2 (en) 2001-08-29 2006-05-16 Semiconductor Energy Laboratory Co., Ltd. Light emitting device, method of driving a light emitting device, element substrate, and electronic equipment
CN1862643A (en) 2005-05-12 2006-11-15 索尼株式会社 Pixel circuit, display device method for controlling pixel circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7046240B2 (en) 2001-08-29 2006-05-16 Semiconductor Energy Laboratory Co., Ltd. Light emitting device, method of driving a light emitting device, element substrate, and electronic equipment
CN1551084A (en) 2003-05-16 2004-12-01 京瓷株式会社 Image display device
US20050057456A1 (en) 2003-09-12 2005-03-17 Jen-Yi Hu Light emitting device and method of driving thereof
CN1677468A (en) 2004-03-31 2005-10-05 东北先锋电子股份有限公司 Drive device and drive method of light emitting display panel
CN1862643A (en) 2005-05-12 2006-11-15 索尼株式会社 Pixel circuit, display device method for controlling pixel circuit

Also Published As

Publication number Publication date
CN101192373A (en) 2008-06-04

Similar Documents

Publication Publication Date Title
JP4170384B2 (en) Self-luminous display device
CN100463020C (en) Electrooptical device and its drive device
US8723763B2 (en) Threshold voltage correction for organic light emitting display device and driving method thereof
CN101563720B (en) Light-emitting display device
CN101127189B (en) Electro-optical device, method of driving electro-optical device, and electronic apparatus
CN1312651C (en) Luminous display, driving method and its picture element circuit and display device
US8144081B2 (en) Electronic circuit, electronic device, method of driving electronic device, electro-optical device, and electronic apparatus
US7071932B2 (en) Data voltage current drive amoled pixel circuit
TWI228696B (en) Pixel circuit for active matrix OLED and driving method
CN101345024B (en) Active matrix type display apparatus and driving method thereof
JP6453926B2 (en) Organic light emitting display device and driving method thereof
JP4657580B2 (en) Display device and driving method thereof
KR100476368B1 (en) Data driving apparatus and method of organic electro-luminescence display panel
US8018404B2 (en) Image display device and method of controlling the same
CN100468500C (en) Active matrix light emitting diode pixel structure and its driving method
JP2007506144A (en) Pixel driver circuit
CN101093639B (en) Organic light-emitting diode display device and driving method thereof
CN100570689C (en) Organic LED display device and driving method thereof
JP2004295131A (en) Drive circuit for display device
DE60306107T2 (en) Light-emitting display, display panel and method of their control
DE102006057537B9 (en) OLED display device and driving method
JP2005300897A (en) Method for driving pixel circuit, pixel circuit, electro-optical device, and electronic equipment
CN100405436C (en) Electronic circuit, electrooptical equipment, driving method for electrooptical equipment and electronic instrument
JP5414724B2 (en) Image display device and driving method thereof
CN101251978B (en) Display device and driving method thereof

Legal Events

Date Code Title Description
C06 Publication
C10 Entry into substantive examination
C53 Correction of patent for invention or patent application
C14 Grant of patent or utility model