CN101187817A - DSP and CPLD based cascade eleven level dynamic voltage restorer control system - Google Patents
DSP and CPLD based cascade eleven level dynamic voltage restorer control system Download PDFInfo
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Abstract
The invention relates to a cascade eleven-electrical level dynamic voltage restorer control system which is based on DSP and CPLD, which is characterized in that the invention comprises a signal reshaping transformation conditioning circuit, a central data processing circuit, a CPLD extend circuit, a photoelectric ionization and power drive circuit and a gate electrode turn-off cascade H-bridge circuit. The invention has the advantages that first, the invention utilizes a high-performance digit signal processing chip to achieve the controlling of a cascade multilevel dynamic voltage restorer, and the speed and precision of controlling are improved, which leads the whole control system to have excellent adjusting performance and reliability, second, a hardware circuit is simple, output driving pulse is safe and reliable, real-time control precision is high, third, the invention improves the capacity of the device and bucking voltage, enhances the stability of electrified wire netting, and avoids the happening of accidents such as production interruption and the like which are caused by the falling of the voltage, fourth, the invention has an closed-loop control to electronic switches which are constituted by IGBT and the like, and the system gives full play of high speed data calculating capability of DSP and pinpoint accuracy data processing capability.
Description
(1) technical field:
The invention belongs to electric system cascade connection multi-level dynamic electric voltage recovery device (DVR) control technology field, be a kind of based on the cascade eleven level dynamic voltage restorer control system of DSP (digital signal processor) with CPLD (CPLD), it comprises that the cascade eleven level dynamic voltage restorer control device based on DSP and CPLD reaches the wherein method of work of central data treatment circuit.
(2) background technology:
(Cascaded Multilevel DynamicVoltage Restorer is a kind of voltage source type electric power electronic compensation device CMDVR) to the cascade connection multi-level dynamic electric voltage recovery device, is serially connected with between power supply and the important load.It has good dynamic property and harmonic characteristic, when system's generation electric voltage dropping or voltage jump, can in the very short time (several millisecond) fault place voltage be returned to normal value, and the assurance important load is not subjected to the influence of voltage fluctuation.CMDVR is made of energy storage device, Cascade H bridge inverter, filter, coupling capacitance and sample circuit and control circuit usually, its control circuit is many to be made up of analog modulation circuit and single-chip microcomputer thereof, and control device exists hardware circuit complexity, debug difficulties, poor anti jamming capability mostly and has shortcoming such as temperature drift.Because it is very high that high-power circuit requires trigger pulse, traditional control device all is difficult to satisfy the requirement of modern high-power circuit on control accuracy still is control rate.Along with the fast development and the power industry of digital Control Technology are more and more higher to quality of power supply requirement, the capacity and the scale of distribution system increase day by day, requirement to control device also improves constantly, and traditional control device has been difficult to satisfy the performance requirement of modern industry.
(3) summary of the invention
The object of the present invention is to provide a kind of cascade eleven level dynamic voltage restorer control system based on DSP and CPLD, it is in conjunction with DSP signal processor with high performance and CPLD CPLD, can overcome the shortcoming of above-mentioned traditional control system preferably, be a kind of fast speed, high-precision control device.
Detailed technology scheme of the present invention: a kind of cascade eleven level dynamic voltage restorer control system based on DSP and CPLD is characterized in that it is made up of signal shaping conversion modulate circuit, central data treatment circuit, CPLD expanded circuit, photoelectricity isolation and power driving circuit and gate electrode capable of switching off Cascade H bridge circuit; The input end of said signal shaping conversion modulate circuit connects the voltage transformer (VT) summation current transformer of outside transmission of electricity circuit, its output terminal connects the input end of central data treatment circuit, and the central data treatment circuit connects the CPLD expanded circuit that can alleviate the data processing amount of DSP and improve output pwm signal quantity according to dsp bus; The multi-channel PWM signal of CPLD expanded circuit output connects photoelectricity and isolates and power driving circuit, and the output terminal of power driving circuit connects the IGBT gate pole input end in each IPM power model of cascade connection multi-level topological circuit.
Above-mentioned said signal shaping conversion modulate circuit is made of voltage, electric current AC sampling front-end circuit and frequency square wave translation circuit; After handling voltage, the current signal gathered, the AC sampling front-end circuit sends into the A/D module input in the central data treatment circuit; Frequency square wave translation circuit is transformed to square-wave signal with voltage signal and is input to trapping module input end in the central data treatment circuit.
Voltage, electric current AC sampling front-end circuit in the above-mentioned said signal shaping conversion modulate circuit are to be made of limiter protection circuit, mutual inductor phase shift compensation and rc filter circuit; Limiter protection circuit is to be made of diode, and mutual inductor phase shift compensation and rc filter circuit are to be made of resistance and electric capacity.
Be to constitute with sending into the frequency square wave translation circuit that the trapping module in the central data treatment circuit samples after the signal Processing of gathering in the above-mentioned said signal shaping conversion modulate circuit by hysteresis voltage comparer and bleeder circuit; The hysteresis voltage comparer is to be made of resistance and comparer, and bleeder circuit is to be made of divider resistance.
Above-mentioned said central data treatment circuit is to be made of dsp chip, CPLD extended chip, power management module, crystal oscillating circuit and dsp bus driving circuit; Be responsible for providing the output terminal of the power management module of electric energy to connect the power interface of dsp chip, the output terminal of crystal oscillating circuit connects the clock signal input pin of dsp chip.
The job step of above-mentioned said central data treatment circuit is:
(1) sampling: TMS320F2812 samples to modulating wave by a slice;
(2) calculate: sampling is calculated in real time to modulating wave;
(3) data transmit: will calculate good dutycycle numerical value and send CPLD to;
(4) data are relatively: design a plurality of counters by CPLD and realize the multiple row carrier waves, and and the dutycycle data that send of DSP compare;
(5) signal output: thus corresponding multi-channel PWM signal exported, not only alleviated the data processing amount of DSP, and the output level number is improved greatly.
Dsp chip in the above-mentioned said central data treatment circuit comprises high capacity flash memory, a plurality of 32 bit timing devices, 2 task managers and SPI, SCI, CAN multiple interfaces; Power management module is made of the dual power supply device; Crystal oscillating circuit is made of the crystal oscillator body that clock signal is provided to dsp chip; The data bus driving circuit is made of the data bus transceiver.
CPLD extended chip in the above-mentioned said central data treatment circuit is by the data latch unit that is used to receive data-signal that the dsp chip bus transmits and control signal, is used to prevent the bridge arm direct pass of IPM module, produced the PWM generator that the dead band generator module of the interlocking signal of same brachium pontis IGBT, the signal that is used to produce the carrier phase shift generator of many group carrier phase shifts and is used to receive dead band generator and carrier phase shift generator produce the multi-channel PWM trigger pip by the signal from data latch unit and constitutes.
Above-mentioned said photoelectricity is isolated and power driving circuit is to be made of photoelectric isolating circuit and power amplification circuit, is made up of photoelectrical coupler and power amplifier respectively; Power drive pipe circuit amplifies the input pulse signal through photoelectricity isolation, triode, offer the gate level turn-off thyristor circuit in the IPM module, and the cascade connection multi-level dynamic electric voltage recovery device is controlled; One of said three-phase pulse amplifying circuit comprise mutually amplification "+A1 ", " A1 " ,+A2 ", the driving circuit of " A2 " pulse, be respectively to constitute by optocoupler, diode, resistance and triode, in like manner other four modules totally 20 pulse driving circuits.
Above-mentioned said gate electrode capable of switching off Cascade H bridge circuit comprises 4 IGBT unit of single module, and five modules amount to 20 IGBT unit; Their control signal is from power driving circuit.
Principle of work of the present invention is: control module is monitored the amplitude and the phase place of system voltage.Signal shaping conversion modulate circuit is transformed to transmission line of electricity voltage transformer secondary side voltage and current sensors secondary side current than the low amplitude value alternating voltage, and being sent to after the processing with DSP is in the central data treatment circuit of core.During operate as normal, the by-pass switch closure, DVR is in short-circuit condition, and system is had no effect.When detecting the voltage instantaneous mutation, according to system voltage instantaneous value, phase place, reference voltage and DC bus-bar voltage, the central data treatment circuit calculates the trigger angle of power circuit according to the control algolithm of setting, provide inverter control pwm signal, after amplifying, triggers by the pulse amplifying circuit relevant IGBT unit, open by-pass switch simultaneously, the output bucking voltage, suppression system electric voltage dropping and voltage rise.
Superiority of the present invention is: 1, utilize the high performance digital signal process chip to realize the control of cascade connection multi-level dynamic electric voltage recovery device, improve the speed and the precision of control to a great extent, the control hysteresis and the precision defective that reduce the restriction of common simulation modulation system and single-chip microcomputer processing speed and cause make The whole control system have good adjusting function and reliability; 2, adopt DSP and CPLD forming control system, hardware circuit is simple, export that trigger pulse is safe and reliable, precision of real time control is high, stability and reliability that can bigger raising device; 3, adopt the main circuit topological structure of Cascade H bridge circuit, improved installed capacity and bucking voltage greatly, strengthened the stability of electrical network, avoid the generation of the accidents such as production interruption brought because of electric voltage dropping as DVR; 4, DSP and CPLD technology are applied in the cascade connection multi-level dynamic electric voltage recovery device, the electronic switch of compositions such as IGBT is carried out closed-loop control, given full play to high-speed data computing power and the pinpoint accuracy data-handling capacity of DSP; 5, has wide market application prospect.
(4) description of drawings:
Accompanying drawing 1 is the one-piece construction block diagram of the related a kind of cascade eleven level dynamic voltage restorer control system based on DSP and CPLD of the present invention.
Accompanying drawing 2 is related a kind of based on the signal shaping conversion modulate circuit structural drawing in the cascade eleven level dynamic voltage restorer control system of DSP and CPLD for the present invention.
Accompanying drawing 3 is related a kind of based on the central data treatment circuit structural drawing in the cascade eleven level dynamic voltage restorer control system of DSP and CPLD for the present invention.
Accompanying drawing 4 is related a kind of based on isolation of the photoelectricity in the cascade eleven level dynamic voltage restorer control system of DSP and CPLD and power driving circuit structural drawing for the present invention.
Accompanying drawing 5 is the related a kind of single-phase circuit structural drawing based on 11 level of the cascade in the cascade eleven level dynamic voltage restorer control system of DSP and CPLD of the present invention.
(5) embodiment:
Embodiment: a kind of cascade eleven level dynamic voltage restorer control system (see figure 1) based on DSP and CPLD is characterized in that it is with signal shaping conversion modulate circuit, central data treatment circuit, CPLD expanded circuit, photoelectricity isolation and power driving circuit and gate electrode capable of switching off Cascade H bridge circuit composition; The input end of said signal shaping conversion modulate circuit connects the voltage transformer (VT) summation current transformer of external circuit, its output terminal connects the input end of central data treatment circuit, the CPLD expanded circuit of central data treatment circuit is in order to alleviating the data processing amount of DSP, and improves the quantity of the pwm signal of output; The multi-channel PWM signal of CPLD output connects photoelectricity and isolates and power driving circuit, and the output terminal of power driving circuit connects the IGBT gate pole input end in each IPM power model of cascade connection multi-level topological circuit.
Above-mentioned said signal shaping conversion modulate circuit (see figure 2) is made of voltage, electric current AC sampling front-end circuit and frequency square wave translation circuit; After handling voltage, the current signal gathered, the AC sampling front-end circuit sends into the A/D module input in the central data treatment circuit; Frequency square wave translation circuit is transformed to square-wave signal with voltage signal and is input to trapping module input end in the central data treatment circuit.
Voltage in the above-mentioned said signal shaping conversion modulate circuit (see figure 2), electric current AC sampling front-end circuit constitute the input saturation protection with D11, D12, D21, D22, constitute mutual inductor phase shift compensation and rc filter circuit with R24, R25, R26, R34, R35, R36, C11, C12, C16, C17.
Frequency square wave translation circuit in the above-mentioned said signal shaping conversion modulate circuit (see figure 2) constitutes the hysteresis voltage comparer with R1, R2, R4, R5 and comparer LM339, constitute bleeder circuit with R7, R8, the trapping module of sending in the central data treatment circuit after the signal Processing of gathering is sampled.
Above-mentioned said central data treatment circuit (see figure 3) is to be made of dsp chip, CPLD extended chip, power management module, crystal oscillating circuit and dsp bus driving circuit; Be responsible for providing the output terminal of the power management module of electric energy to connect the power interface of dsp chip, the output terminal of crystal oscillating circuit connects the clock signal input pin of dsp chip; The software program of compiling is set various executive conditions control dsp chips the input signal of data bus driving circuits is carried out identification, handles and send relevant steering order; Power management module is responsible for providing electric energy; Crystal oscillating circuit provides clock signal to dsp chip; The data bus driving circuit mainly is responsible for data buffering and level conversion.
Dsp chip in the above-mentioned said central data treatment circuit (see figure 3) comprises high capacity flash memory, a plurality of 32 bit timing devices, 2 task managers and SPI, SCI, CAN multiple interfaces; Power management module is made of dual power supply device TPS73HD301; Crystal oscillating circuit is made of the crystal oscillator body that clock signal is provided to dsp chip; The data bus driving circuit is made up of data bus transceiver 74LVC16245; This circuit working process is: after the digital quantity that A/D is transformed gained receives DSP, to data compensate, behind the digital filtering, corresponding corresponding standard value is converted into per unit value, computing draws pilot angle, and transforms count value, exports to CPLD.
CPLD extended chip in the above-mentioned said central data treatment circuit (see figure 3) comprises: data latch unit, dead band generator module and carrier phase shift generator and PWM generator; Data latch unit mainly is to receive data-signal and the control signal that the dsp chip bus transmits, the dead band generator mainly is in order to prevent the bridge arm direct pass of IPM module, produce the interlocking signal of same brachium pontis IGBT by signal from data latches, the carrier phase shift generator is used for producing many group carrier phase shifts, and the signal that PWM generator receives dead band generator and carrier phase shift generator produces the multi-channel PWM trigger pip.
Above-mentioned said photoelectricity is isolated and the power driving circuit (see figure 4) is to be made of photoelectric isolating circuit and power amplification circuit, is made up of photoelectrical coupler and power amplifier respectively; Power drive pipe circuit amplifies the input pulse signal through photoelectricity isolation, triode, offer the gate level turn-off thyristor circuit in the IPM module, and the cascade connection multi-level dynamic electric voltage recovery device is controlled; One of said three-phase pulse amplifying circuit comprises the driving circuit of amplification "+A1 " pulse mutually, contains optocoupler U9, diode D1, resistance and triode N1; Amplify the driving circuit of " A1 " pulse, contain optocoupler U10, diode D2, resistance and triode N2; Amplify the driving circuit of "+A2 " pulse, contain optocoupler U11, diode D3, resistance and triode N3; Amplify the driving circuit of " A2 " pulse, contain optocoupler U12, diode D4, resistance and triode N4; In like manner other four modules are totally 20 pulse driving circuits; This circuit working process is: 4 (five modules amount to 20) gating pulse that this circuit is exported CPLD (+A1 ,-A1 ,+A2 ,-A2) amplify, reliably trigger the IGBT unit of back.The effect of diode D1, D2, D3 and D4 is to prevent the pulse reverse input, avoids interference the operate as normal of dsp chip.
Above-mentioned said gate electrode capable of switching off Cascade H bridge circuit (see figure 5) comprises: 4 IGBT unit of single module, and five modules amount to 20 IGBT unit; Their control signal is from power driving circuit; This circuit working process is: gating pulse is from through the signal after the power driving circuit processing and amplifying, and 20 IGBT unit in the circuit are triggered according to the signal that certain time sequence receives from power driving circuit.During operate as normal, dynamic electric voltage recovery device is in short-circuit condition, and relative system does not have pressure drop; When generation electric voltage dropping or voltage jump, regulate the trigger angle of relevant IGBT, make DVR output disappearance voltage, make to get the variation of important load impression in the system, be in normal operating conditions all the time less than voltage.
A kind of above-mentioned method of work based on the central data treatment circuit in the cascade eleven level dynamic voltage restorer control system (see figure 1) of DSP and CPLD is characterized in that it may further comprise the steps:
(1) sampling: TMS320F2812 samples to modulating wave by a slice;
(2) calculate: sampling is calculated in real time to modulating wave;
(3) data transmit: will calculate good dutycycle numerical value and send CPLD to;
(4) data are relatively: design a plurality of counters by CPLD and realize the multiple row carrier waves, and and the dutycycle data that send of DSP compare;
(5) signal output: thus corresponding multi-channel PWM signal exported, not only alleviated the data processing amount of DSP, and the output level number is improved greatly.
Claims (10)
1. cascade eleven level dynamic voltage restorer control system based on DSP and CPLD is characterized in that it is made up of signal shaping conversion modulate circuit, central data treatment circuit, CPLD expanded circuit, photoelectricity isolation and power driving circuit and gate electrode capable of switching off Cascade H bridge circuit; The input end of said signal shaping conversion modulate circuit connects the voltage transformer (VT) summation current transformer of outside transmission of electricity circuit, its output terminal connects the input end of central data treatment circuit, and the central data treatment circuit connects the CPLD expanded circuit that can alleviate the data processing amount of DSP and improve output pwm signal quantity according to dsp bus; The multi-channel PWM signal of CPLD expanded circuit output connects photoelectricity and isolates and power driving circuit, and the output terminal of power driving circuit connects the IGBT gate pole input end in each IPM power model of cascade connection multi-level topological circuit.
2. according to the said a kind of cascade eleven level dynamic voltage restorer control system of claim 1, it is characterized in that said signal shaping conversion modulate circuit is made of voltage, electric current AC sampling front-end circuit and frequency square wave translation circuit based on DSP and CPLD; After handling voltage, the current signal gathered, the AC sampling front-end circuit sends into the A/D module input in the central data treatment circuit; Frequency square wave translation circuit is transformed to square-wave signal with voltage signal and is input to trapping module input end in the central data treatment circuit.
3. according to the said a kind of cascade eleven level dynamic voltage restorer control system of claim 2, it is characterized in that voltage, the electric current AC sampling front-end circuit in the said signal shaping conversion modulate circuit is to be made of limiter protection circuit, mutual inductor phase shift compensation and rc filter circuit based on DSP and CPLD; Limiter protection circuit is to be made of diode, and mutual inductor phase shift compensation and rc filter circuit are to be made of resistance and electric capacity.
4. according to the said a kind of cascade eleven level dynamic voltage restorer control system of claim 2, it is characterized in that in the said signal shaping conversion modulate circuit that with sending into the frequency square wave translation circuit that the trapping module in the central data treatment circuit samples after the signal Processing of gathering be to be made of hysteresis voltage comparer and bleeder circuit based on DSP and CPLD; The hysteresis voltage comparer is to be made of resistance and comparer, and bleeder circuit is to be made of divider resistance.
5. according to the said a kind of cascade eleven level dynamic voltage restorer control system of claim 1, it is characterized in that said central data treatment circuit is to be made of dsp chip, CPLD extended chip, power management module, crystal oscillating circuit and dsp bus driving circuit based on DSP and CPLD; Be responsible for providing the output terminal of the power management module of electric energy to connect the power interface of dsp chip, the output terminal of crystal oscillating circuit connects the clock signal input pin of dsp chip.
6. according to the said a kind of cascade eleven level dynamic voltage restorer control system of claim 5, it is characterized in that the job step of said central data treatment circuit is based on DSP and CPLD:
(1) sampling: TMS320F2812 samples to modulating wave by a slice;
(2) calculate: sampling is calculated in real time to modulating wave;
(3) data transmit: will calculate good dutycycle numerical value and send CPLD to;
(4) data are relatively: design a plurality of counters by CPLD and realize the multiple row carrier waves, and and the dutycycle data that send of DSP compare;
(5) signal output: thus corresponding multi-channel PWM signal exported, not only alleviated the data processing amount of DSP, and the output level number is improved greatly.
7. according to the said a kind of cascade eleven level dynamic voltage restorer control system of claim 5 based on DSP and CPLD, it is characterized in that the dsp chip in the said central data treatment circuit, comprise high capacity flash memory, a plurality of 32 bit timing devices, 2 task managers and SPI, SCI, CAN multiple interfaces; Power management module is made of the dual power supply device; Crystal oscillating circuit is made of the crystal oscillator body that clock signal is provided to dsp chip; The data bus driving circuit is made of the data bus transceiver.
8. according to the said a kind of cascade eleven level dynamic voltage restorer control system of claim 5 based on DSP and CPLD, it is characterized in that CPLD extended chip in the said central data treatment circuit is by being used to receive the data-signal that the dsp chip bus transmits and the data latch unit of control signal, be used to prevent the bridge arm direct pass of IPM module, produce the dead band generator module of the interlocking signal of same brachium pontis IGBT by signal from data latch unit, the PWM generator that the signal that is used to produce the carrier phase shift generator of many group carrier phase shifts and is used to receive dead band generator and carrier phase shift generator produces the multi-channel PWM trigger pip constitutes.
9. according to the said a kind of cascade eleven level dynamic voltage restorer control system of claim 1 based on DSP and CPLD, it is characterized in that said photoelectricity is isolated and power driving circuit is to be made of photoelectric isolating circuit and power amplification circuit, form by photoelectrical coupler and power amplifier respectively; Power drive pipe circuit amplifies the input pulse signal through photoelectricity isolation, triode, offer the gate level turn-off thyristor circuit in the IPM module, and the cascade connection multi-level dynamic electric voltage recovery device is controlled; One of said three-phase pulse amplifying circuit comprise mutually amplification "+A1 ", " A1 " ,+A2 ", the driving circuit of " A2 " pulse; be respectively to be made of optocoupler, diode, resistance and triode, in like manner other four modules totally 20 pulse driving circuits.
10. according to the said a kind of cascade eleven level dynamic voltage restorer control system of claim 1 based on DSP and CPLD, it is characterized in that said gate electrode capable of switching off Cascade H bridge circuit comprises 4 IGBT unit of single module, five modules amount to 20 IGBT unit; Their control signal is from power driving circuit.
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| CN101964529A (en) * | 2010-09-14 | 2011-02-02 | 天津理工大学 | DSP (Digital Signal Processor) based improved instantaneous detection and control system of cascaded active power filter |
| CN102130590A (en) * | 2011-02-28 | 2011-07-20 | 徐工集团工程机械股份有限公司江苏徐州工程机械研究院 | Proportional valve output compensation circuit and control method |
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| CN101459335B (en) * | 2008-11-03 | 2012-07-04 | 天津理工大学 | Control apparatus for three level dynamic voltage recovery device |
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| CN108270227A (en) * | 2018-02-27 | 2018-07-10 | 浙江群力电气有限公司 | The ameliorative way and dynamic electric voltage recovery device of a kind of power quality |
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| CN101814765A (en) * | 2010-04-06 | 2010-08-25 | 中国电力科学研究院 | Power supply control system of bidirectional electric automobile charger |
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| CN102130590A (en) * | 2011-02-28 | 2011-07-20 | 徐工集团工程机械股份有限公司江苏徐州工程机械研究院 | Proportional valve output compensation circuit and control method |
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| CN102230374B (en) * | 2011-06-13 | 2013-06-05 | 电子科技大学 | Underground program remote update device based on 485 bus |
| CN102230374A (en) * | 2011-06-13 | 2011-11-02 | 电子科技大学 | Underground program remote update device based on 485 bus |
| CN105652691A (en) * | 2016-02-24 | 2016-06-08 | 中国地质大学（武汉） | Power electronic control simulation system |
| CN108270227A (en) * | 2018-02-27 | 2018-07-10 | 浙江群力电气有限公司 | The ameliorative way and dynamic electric voltage recovery device of a kind of power quality |
| CN111525916A (en) * | 2020-06-04 | 2020-08-11 | 中国工程物理研究院总体工程研究所 | Pulse control switch assembly suitable for underwater unmanned underwater vehicle and control method thereof |
| CN112491005A (en) * | 2020-11-05 | 2021-03-12 | 中国航空工业集团公司西安航空计算技术研究所 | Recoverable quick protection circuit of 28V/on output interface circuit |
| CN112491005B (en) * | 2020-11-05 | 2023-07-21 | 中国航空工业集团公司西安航空计算技术研究所 | Recoverable quick protection circuit of 28V/on output interface circuit |
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