CN101090033B - Symmetric differential inductance structure - Google Patents
Symmetric differential inductance structure Download PDFInfo
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- CN101090033B CN101090033B CN2007101039865A CN200710103986A CN101090033B CN 101090033 B CN101090033 B CN 101090033B CN 2007101039865 A CN2007101039865 A CN 2007101039865A CN 200710103986 A CN200710103986 A CN 200710103986A CN 101090033 B CN101090033 B CN 101090033B
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Abstract
This invention discloses a symmetric differential inductor structure including a winding layer and a shading layer, in which, the winding layer is set on the base and includes a first screw lead and asecond screw lead with a first and a second end, which is screwed into the inside of the first lead, the second lead is symmetric to a symmetric plane and winded with the first lead and includes a third and a fourth end, which is screwed into the inside of the second lead and connected to it to form a winding layer with multiple coils, the shading layer corresponding to the projection of the inside coil of the winding layer is matched between the winding layer and the base, and the projection of the part of the winding layer excepting the inside one falls on the shading layer coupled to the inside coil of the winding layer in parallel.
Description
Technical field
The invention relates to a kind of induction structure, and particularly relevant for a kind of symmetrical expression differential inductance structure.
Background technology
Generally speaking, because inductance is the mutual conversion via electromagnetism, have the function that stores and release energy, so inductance can be used as the element of stabling current.In addition, the range of application of inductance is considerably extensive, and for example inductance often is applied to less radio-frequency (radio frequency, RF) circuit.In integrated circuit, but inductance but has a challenging passive component for very important.With regard to the usefulness of inductance, the quality of inductance is high more, promptly represents inductance to have higher quality factor (quality factor), with the Q value representation.The Q value is defined as follows:
Q＝ω×L/R
Wherein, ω is angular frequency (angular frequency), and L is the inductance value (inductance) of coil, and R is for listing the inductance loss in the resistance (resistance) of consideration under characteristic frequency.
With regard to development now, inductance is combined existing the whole bag of tricks and technology with integrated circuit technology.Yet in integrated circuit, the restriction of inductance metal thickness and silicon base all can cause the bad of inductance to the interference of inductance.Known technology reduces conductor losses (conductor loss) by will thicker metal being configured in the superiors of inductance, to improve the Q value of inductance.Yet after metal thickness was increased to certain degree, it is not obvious that the improvement of Q value just becomes.Because the position of inductance configuration is mostly very near silicon base, therefore silicon base can increase with the parasitic capacitance (parasitic capacitance) that produces between the inductance, cause the resistance value of inductance to increase, thereby cause consuming lot of energy, make the quality of inductance reduce.So, how to solve the variety of problems that can meet with in the above-mentioned technology, and promote the Q value of inductance and reduce conductor losses, be the emphasis of present industry develop actively.
Summary of the invention
The invention provides a kind of symmetrical expression differential inductance structure, can reduce the parasitic capacitance that is produced between substrate and the inductance, and improve the conductor losses (conductor loss) of inductance, to promote the Q value of inductance.
The present invention proposes a kind of symmetrical expression differential inductance structure, and it comprises wire winding layer and shielding layer.Wire winding layer is disposed in the substrate.Wire winding layer comprises the first helical form lead and the second helical form lead.The first helical form lead has first end and second end, and wherein second end can screw in the inboard of the first helical form lead.And the second helical form lead is symmetrical in a symmetrical plane and the first helical form lead twines mutually.The second helical form lead has the 3rd end and the 4th end, and wherein the 4th end screws in the inboard of the second helical form lead and is connected with second end of the first helical form lead, has the wire winding layer of multi-turn coiling with formation.Shielding layer is corresponding to the orthographic projection of the inner ring of wire winding layer, is disposed between wire winding layer and the substrate, and the part wire winding layer beyond the inner ring of wire winding layer, its orthographic projection drops on the shielding layer.Shielding layer is coupled to the inner ring of wire winding layer in parallel.
In symmetrical expression differential inductance structure proposed by the invention, utilize shielding layer to intercept between wire winding layer and the substrate, can reduce the parasitic capacitance that produces between substrate and the metal, reduce energy consumption, improve the quality of symmetrical expression difference induction.
For above-mentioned feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Figure 1A is the schematic top plan view according to the symmetrical expression differential inductance structure of one embodiment of the invention.
Figure 1B is the schematic top plan view according to the shielding layer of one embodiment of the invention.
Fig. 1 C is the generalized section of the I-I ' hatching in Figure 1A.
Fig. 1 D is the generalized section according to the I-I ' hatching in Figure 1A in another embodiment of the present invention.
Fig. 1 E is the schematic top plan view according to the symmetrical expression differential inductance structure of further embodiment of this invention.
Fig. 1 F is the schematic top plan view according to the shielding layer of further embodiment of this invention.
Fig. 2 A to Fig. 2 C is respectively the generalized section according to the I-I ' hatching in Figure 1A in the other embodiments of the invention.
Fig. 3 is the Q value comparative graph of symmetrical expression differential inductance structure of the present invention and known induction structure.
[main element symbol description]
100,200: symmetrical expression differential inductance structure
102: substrate
104: dielectric layer
106: wire winding layer
108: shielding layer
108a, 108b, 130,132: end
109: cover pattern
110,112: the helical form lead
110a, 112a: outer conductor
110b, 112b: inside conductor
110c, 112c: connect lead
111a: first end
111b: second end
113a: the 3rd end
113b: the 4th end
114,122a, 122b, 126a, 126b: interlayer hole
116: the gain lead
120: symmetrical plane
124a, 124b, 128a, 128b: wire bonds
Embodiment
Figure 1A is the schematic top plan view according to the symmetrical expression differential inductance structure of one embodiment of the invention.Figure 1B is the schematic top plan view according to the shielding layer of one embodiment of the invention.Fig. 1 C is the generalized section of the I-I ' hatching in Figure 1A.Fig. 1 D is the generalized section according to the I-I ' hatching in Figure 1A in another embodiment of the present invention.
Please be simultaneously with reference to Figure 1A, Figure 1B and Fig. 1 C, symmetrical expression differential inductance structure 100 comprises wire winding layer 106 and shielding layer 108.Wire winding layer 106 is disposed in the dielectric layer 104 in the substrate 102.108 of shielding layers are disposed in the dielectric layer 104 between wire winding layer 106 and the substrate 102.Because symmetrical expression differential inductance structure 100 can realize that substrate 102 can be a silicon substrate by semiconductor technology.The material of dielectric layer 104 for example is silica or other dielectric materials.The material of wire winding layer 106 can be a metal, and it for example is materials such as copper, aluminium copper.And the material of shielding layer 108 can be an electric conducting material, and it for example is materials such as polysilicon or metal.In addition, in the present embodiment, symmetrical expression differential inductance structure 100 be configured to octagon (shown in Figure 1A), yet the configuration mode that symmetrical expression differential inductance structure of the present invention is not limited among the embodiment to be illustrated.
Shown in Figure 1A, in the present embodiment, the wire winding layer 106 of symmetrical expression differential inductance structure 100 for example is the winding structure of three circles, and therefore, helical form lead 110 can also comprise respectively with helical form lead 112 and be connected lead 110c and be connected lead 112c.Outer conductor 110a for example is by being connected lead 110c outer conductor 110a to be connected with inside conductor 110b with the connected mode of inside conductor 110b.Between outer conductor 112a and the inside conductor 112b then for example is to connect by being connected lead 112c.Yet, three circles that the number of turns of wire winding layer 106 is not limited among the embodiment to be illustrated, above-mentioned connected mode is not in order to restriction the present invention.
Structure at wire winding layer 106 is that outer conductor 110a can directly connect with inside conductor 110b under the situation of two circle coilings, and outer conductor 112a and inside conductor 112b also are like this.Certainly, wire winding layer 106 can also be in configuration multi-turn between outer conductor 110a and the inside conductor 110b be connected lead 110c, and be connected lead 112c in configuration multi-turn between outer conductor 112a and the inside conductor 112b accordingly, make wire winding layer 106 be the structure greater than three circle coilings, visual its demand of one skilled in the relevant art is adjusted.
Please continue with reference to Figure 1A, the mode that helical form lead 110 and helical form lead 112 twine mutually for example is that helical form lead 110 and helical form lead 112 are crisscrossed on the symmetrical plane 120.And helical form lead 110 and helical form lead 112 do not contact mutually in intervening portion, take place with the situation of avoiding short circuit.For instance, in helical form lead 112, outer conductor 112a is connected to wire bonds 124a downwards by interlayer hole 122a, be connected to by interlayer hole 122b again and connect lead 112c, make helical form lead 112 below helical form lead 110, passing through on the intervening portion, avoid helical form lead 110 and 112 contacts.As for outer conductor 110a be connected lead 110c and then connect by the wire bonds 124b that is positioned at the equal height plane.On the other hand, in helical form lead 110, connecting between lead 110c and the inside conductor 110b for example is to be connected by interlayer hole 126a, 126b and wire bonds 128a, and helical form lead 110 is being passed through below helical form lead 112 on the intervening portion.Then be connected with inside conductor 112b as for connecting lead 112c by the wire bonds 128b that is positioned at the equal height plane.
Hold above-mentionedly, operation for example is to apply operating voltage simultaneously in the first end 111a and the 3rd end 113a during symmetrical expression differential inductance structure 100.Because the voltage that puts on the first end 111a is that absolute value equates and electrical opposite voltage with voltage on putting on the 3rd end 113a, therefore from the first end 111a and the 3rd end 113a, the inside of past more helical form lead 110 and helical form lead 112, the absolute value of voltage can successively decrease gradually.Magnitude of voltage in the intersection junction of the 4th end 113b of the second end 111b of inside conductor 110b and inside conductor 112b can be 0, and the situation of virtual ground just can take place at the inner ring of wire winding layer 106.
Please continue with reference to Figure 1A, Figure 1B and Fig. 1 C, 108 orthographic projections of shielding layer corresponding to the inner ring of wire winding layer 106, be disposed between wire winding layer 106 and the substrate 102, in the present embodiment, the orthographic projection meeting of inside conductor 110b and inside conductor 112b drops on the shielding layer 108.Shielding layer 108 for example is to have a breach, but not complete circulus.Shielding layer 108 has terminal 108a and terminal 108b in indentation, there.In addition, the inner ring electric property coupling of shielding layer 108 and wire winding layer 106, and the mode of electric property coupling for example is in parallel.In the present embodiment, for example be to dispose at least two interlayer holes 114 between wire winding layer 106 and shielding layer 108, end 130 that the terminal 108a and the terminal 108b of shielding layer 108 is coupled to inside conductor 110b respectively and the end 132 of inside conductor 112b.So, shielding layer 108 can be used as the self-masking structure of symmetrical expression differential inductance structure 100.
Hold above-mentioned, please be simultaneously with reference to Fig. 1 C and Fig. 1 D, except the orthographic projection (orthographic projection of inside conductor 110b and inside conductor 112b) of inner ring dropped on the shielding layer 108, the orthographic projection of other wire winding layer 106 its at least one parts also can drop on the shielding layer 108.That is to say that the orthographic projection of whole wire winding layer 106 can drop on (shown in Fig. 1 C) on the shielding layer 108 fully; Or the orthographic projection meeting of the most inboard two circles of wire winding layer 106 drops on (shown in Fig. 1 D) on the shielding layer 108.Further,, can reduce the parasitic capacitance that produces between substrate 102 and the wire winding layer 106, improve the quality of symmetrical expression difference induction as long as shielding layer 108 can cover partly wire winding layer 106.Shown in Fig. 1 C, under the orthographic projection of wire winding layer 106 dropped on situation on the shielding layer 108 fully, shielding layer 108 can produce better screening effect between symmetrical expression differential inductance structure 100 and substrate 102.
Fig. 1 E is the schematic top plan view according to the symmetrical expression differential inductance structure of further embodiment of this invention.Fig. 1 F is the schematic top plan view according to the shielding layer of further embodiment of this invention.In Fig. 1 E to Fig. 1 F, the member identical with Figure 1A to Figure 1B then uses identical label and omits its explanation.
Please be simultaneously with reference to Fig. 1 E and Fig. 1 F, shielding layer 108 is made of the plural pattern 109 that covers.Shown in Fig. 1 F, shielding layer 108 comprises that four cover pattern 109, and the configuration mode that covers pattern 109 for example is to be mirror configuration in the both sides of symmetrical plane 120.In addition, it is can be individually in parallel with the inner ring of wire winding layer 106 that each covers pattern 109, mode in parallel for example be by at least two interlayer holes 114 with each two ends that cover pattern 109, be connected to lead 110b or inside conductor 112b within the opposite position respectively.The foregoing description is to be that example describes to have four shielding layers 108 that cover pattern 109, yet the invention is not restricted to this.In other embodiments, shielding layer 108 can comprise more than one pattern 109 balanced configurations of covering, and is in parallel with the inner ring of wire winding layer 106 respectively as long as each covers pattern 109.
What specify is, in wire winding layer 106, and the inside of past more wire winding layer 106, the absolute value of its voltage can successively decrease gradually.That is to say that the inner ring of wire winding layer 106 has less electric field.Because shielding layer 108 is in parallel with the inner ring of wire winding layer 106, so shielding layer 108 can have the similar Electric Field Characteristics of inner ring to wire winding layer 106.So the parasitic capacitance that is produced between shielding layer 108 and the substrate 102 is enough to be left in the basket.And have big voltage thereby produce the outmost turns of the wire winding layer 106 of electric field greatly, the shielding layer 108 that promptly can be set between wire winding layer 106 and the substrate 102 intercepts, and reduces the loss of energy.Therefore, the parasitic capacitance that the present invention can reduce between substrate 102 and the symmetrical expression differential inductance structure 100 takes place, and reducing the resistance value that is caused by substrate 102, and then promotes the Q value of symmetrical expression differential inductance structure 100.
Fig. 2 A to Fig. 2 C is respectively the generalized section according to the I-I ' hatching in Figure 1A in the other embodiments of the invention.In Fig. 2 A to Fig. 2 C, the member identical with Figure 1A to Fig. 1 C then uses identical label and omits its explanation.
The present invention reintroduces a kind of symmetrical expression differential inductance structure.Please refer to Fig. 2 A, symmetrical expression differential inductance structure 200 for example is to be disposed in the dielectric layer 104 of substrate 102 tops.In other embodiments, the member of forming symmetrical expression differential inductance structure 200 is roughly the same with the member of forming symmetrical expression differential inductance structure 100, and wherein main difference is: symmetrical expression differential inductance structure 200 further comprises at least one gain lead 116.Gain lead 116 for example is that the interior figure corresponding to wire winding layer 106 is disposed between wire winding layer 106 and the shielding layer 108.
Hold above-mentionedly, gain lead 116 for example is to couple with inner ring, the shielding layer 108 of wire winding layer 106 respectively.Coupling mode for example is to be connected in parallel to the end 130 of inside conductor 110b and the end 132 of inside conductor 112b respectively by will gain two ends of lead 116 of at least two interlayer holes 114; And be connected in parallel to the terminal 108a and the terminal 108b of shielding layer 108 by will gain two ends of lead of at least two interlayer holes 114.In addition, under the situation with many gain leads 116 (illustrated as Fig. 2 A three), neighbouring gain lead 116 for example is to carry out parallel connection by a plurality of interlayer holes 114 each other.The material of gain lead 116 can be a metal, and it for example is materials such as copper, aluminium copper.
Please be simultaneously with reference to Fig. 2 B and Fig. 2 C, above-mentioned gain lead 116 can also be that the inner ring corresponding to wire winding layer 106 is disposed at (shown in Fig. 2 B) between shielding layer 108 and the substrate 102, or gain lead 116 can be disposed between wire winding layer 106 and the shielding layer 108 simultaneously and between shielding layer 108 and the substrate 102 (shown in Fig. 2 C).
This explanation be, configuration gain lead 116 between wire winding layer 106 and substrate 102, the cross section metal that can increase by the gain lead 116 that piles up in the symmetrical expression differential inductance structure 200 is long-pending, improves the problem of conductor losses effectively.In addition, because gain lead 116 is in parallel with the inner ring of wire winding layer 106, gain lead 116 can have the Electric Field Characteristics of the inner ring of similar shielding layer 106.That is to say that the electric field of gain lead 116 is very little, can improve cross section metal long-pending in, and can not make the parasitic capacitance that is produced between metal and the metal increase.Therefore, symmetrical expression differential inductance structure 200 can have preferred quality.
Fig. 3 is the Q value comparative graph of symmetrical expression differential inductance structure of the present invention and known induction structure.
Please refer to Fig. 3, by practical test result as can be known: in 0 to 20GHz scope, symmetrical expression difference induction of the present invention all has higher Q value than known symmetrical expression difference induction in frequency.Therefore, no matter in the frequency range of low frequency or high frequency, the present invention can promote the quality of symmetrical expression difference induction really significantly, and further enlarges the frequency range of using.
In sum, in symmetrical expression differential inductance structure proposed by the invention, utilize shielding layer to intercept between wire winding layer and the substrate, can reduce the parasitic capacitance that produces between substrate and the metal, reduce energy consumption, improve the quality of symmetrical expression difference induction.In addition, because shielding layer is connected in parallel to the inner ring that has low electric field in the wire winding layer, so the ghost effect that is produced between shielding layer and the substrate can also be left in the basket.
Moreover, if symmetrical expression differential inductance structure of the present invention disposes the gain lead between wire winding layer and substrate, then can reduce the conductor losses of symmetrical expression difference induction by the long-pending increase of cross section metal, the usefulness of symmetrical expression difference induction is promoted.And, in parallel by the inner ring of gain lead and wire winding layer, can also avoid producing between metal and the metal parasitic capacitance, and then the Q value of lifting inductance
On the other hand, the applicable frequency range of symmetrical expression differential inductance structure of the present invention can remain in the employed scope of wireless radio frequency circuit, and the manufacture process of inductance can be integrated in the existing technology, can help to reduce the required cost of technology.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; have in the technical field under any and know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the claim person of defining.
Claims (11)
1. symmetrical expression differential inductance structure comprises:
One wire winding layer is disposed in the substrate, comprising:
One first helical form lead, this first helical form lead has one first end and one second end, and this second end screws in the inboard of this first helical form lead; And
One second helical form lead, twine and be symmetrical in a symmetrical planar configuration mutually with this first helical form lead, this second helical form lead has one the 3rd end and one the 4th end, the 4th end screws in the inboard of this second helical form lead and is connected with this second end of this first helical form lead, has this wire winding layer of multi-turn coiling with formation; And
One shielding layer, orthographic projection corresponding to the inner ring of this wire winding layer is disposed between this wire winding layer and this substrate, and this wire winding layer of part beyond the inner ring of this wire winding layer, its orthographic projection drops on this shielding layer, and this shielding layer is coupled to the inner ring of this wire winding layer with parallel way.
2. symmetrical expression differential inductance structure as claimed in claim 1, wherein the orthographic projection of this wire winding layer drops on this shielding layer fully.
3. symmetrical expression differential inductance structure as claimed in claim 1, also comprise at least one gain lead, orthographic projection corresponding to the inner ring of this wire winding layer is disposed between this wire winding layer and this shielding layer, and should gain lead in parallel with the inner ring of this shielding layer, this wire winding layer.
4. symmetrical expression differential inductance structure as claimed in claim 1 also comprises at least one gain lead, corresponding to the orthographic projection of the inner ring of this wire winding layer, be disposed between this shielding layer and this substrate, and the lead that should gain is in parallel with this shielding layer.
5. symmetrical expression differential inductance structure as claimed in claim 1, wherein when this shielding layer by a plurality of when covering pattern and being constituted, each this cover pattern and be symmetrical in this symmetrical plane configuration.
6. symmetrical expression differential inductance structure as claimed in claim 1, wherein:
This first helical form lead comprises one first outer conductor and one first inside conductor at least, and wherein this first outer conductor is connected with this first inside conductor, and this first inside conductor screws in the inboard of this first helical form lead;
This second helical form lead comprises one second outer conductor and one second inside conductor at least, wherein this second outer conductor is connected with this second inside conductor, this second inside conductor screws in the inboard of this second helical form lead and is connected with this first inside conductor, has a symmetrical spiral loop structure of multi-turn coiling with formation;
This shielding layer is corresponding to the orthographic projection of the inner ring of this symmetry spiral loop structure, be disposed between this symmetry spiral loop structure and this substrate, and the part beyond the inner ring that should symmetry spiral loop structure should symmetry spiral loop structure, its orthographic projection drops on this shielding layer, and this shielding layer is in parallel with the inner ring of this symmetry spiral loop structure.
7. symmetrical expression differential inductance structure as claimed in claim 6, comprise that also at least one first connection lead is connected lead with at least one second, this first connection lead connects this first outer conductor and this first inside conductor, this second connects lead and connects this second outer conductor and this second inside conductor, and wherein this first connection lead second is connected lead and is symmetrical on this symmetrical plane with this.
8. symmetrical expression differential inductance structure as claimed in claim 6, also comprise at least one first gain lead, corresponding to the orthographic projection of this first inside conductor, be disposed between first inside conductor and this shielding layer, and this first gain lead and this first inside conductor, this shielding layer are in parallel.
9. symmetrical expression differential inductance structure as claimed in claim 8, also comprise at least one second gain lead, corresponding to the orthographic projection of this second inside conductor, be disposed between second inside conductor and this shielding layer, and this second gain lead and this second inside conductor, this shielding layer are in parallel.
10. symmetrical expression differential inductance structure as claimed in claim 6 also comprises at least one first gain lead, corresponding to the orthographic projection of this first inside conductor, be disposed between this shielding layer and this substrate, and this first gain lead is in parallel with this shielding layer.
11. symmetrical expression differential inductance structure as claimed in claim 10 also comprises at least one second gain lead, corresponding to the orthographic projection of this second inside conductor, be disposed between this shielding layer and this substrate, and this second gain lead is in parallel with this shielding layer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2007101039865A CN101090033B (en) | 2007-05-17 | 2007-05-17 | Symmetric differential inductance structure |
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| CN2007101039865A CN101090033B (en) | 2007-05-17 | 2007-05-17 | Symmetric differential inductance structure |
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| CN101090033B true CN101090033B (en) | 2010-06-02 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5831331A (en) * | 1996-11-22 | 1998-11-03 | Philips Electronics North America Corporation | Self-shielding inductor for multi-layer semiconductor integrated circuits |
| CN1241794A (en) * | 1998-07-06 | 2000-01-19 | Tdk株式会社 | Inductor device and process of production thereof |
| CN1405801A (en) * | 2002-10-30 | 2003-03-26 | 威盛电子股份有限公司 | Multilayer balanced inductor |
| US6867677B2 (en) * | 2001-05-24 | 2005-03-15 | Nokia Corporation | On-chip inductive structure |
| US6972658B1 (en) * | 2003-11-10 | 2005-12-06 | Rf Micro Devices, Inc. | Differential inductor design for high self-resonance frequency |
-
2007
- 2007-05-17 CN CN2007101039865A patent/CN101090033B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5831331A (en) * | 1996-11-22 | 1998-11-03 | Philips Electronics North America Corporation | Self-shielding inductor for multi-layer semiconductor integrated circuits |
| CN1241794A (en) * | 1998-07-06 | 2000-01-19 | Tdk株式会社 | Inductor device and process of production thereof |
| US6867677B2 (en) * | 2001-05-24 | 2005-03-15 | Nokia Corporation | On-chip inductive structure |
| CN1405801A (en) * | 2002-10-30 | 2003-03-26 | 威盛电子股份有限公司 | Multilayer balanced inductor |
| US6972658B1 (en) * | 2003-11-10 | 2005-12-06 | Rf Micro Devices, Inc. | Differential inductor design for high self-resonance frequency |
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| CN101090033A (en) | 2007-12-19 |
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