CN101064316A - Flattening active driving TFT matrix structure and method of manufacture - Google Patents
Flattening active driving TFT matrix structure and method of manufacture Download PDFInfo
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- CN101064316A CN101064316A CN 200610076552 CN200610076552A CN101064316A CN 101064316 A CN101064316 A CN 101064316A CN 200610076552 CN200610076552 CN 200610076552 CN 200610076552 A CN200610076552 A CN 200610076552A CN 101064316 A CN101064316 A CN 101064316A
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Abstract
The invention discloses a flat active drive TFT matrix configuration that comprises: base board, grating line, and gate electrode and gate insulation layer, it characterized in that: said grating line and gate electrode are covered onto the base board by the gate insulation layer, the upper surface of the gate insulation layer is flat, semiconductor layer, source electrode and drain electrode and pixel electrode are all formed on the gate insulation layer. The invention also discloses method of producing the flat active drive TFT matrix configuration. The flat insulation surface formed in the invention is propitious to aggradation of later active layer, source and drain metal layer, passivation layer and pixel electrode layer, and reduces the generation of metal fault line. At the same time, flat gate electrode insulation surface can reduce the form of inner stress of the gate insulation layer, and increase the ratio of the finished product.
Description
Technical field
The present invention relates to a kind of active drive thin film transistors (TFT) matrix structure and manufacture method thereof, particularly a kind of flattening active driving TFT matrix structure and manufacture method thereof.
Background technology
Along with the continuous increase of LCD Panel, the continuous increase of display pixel, the metal material of high resistivity can't satisfy the requirement that TFT matrix gate signal postpones.Therefore, have the metal of low resistivity such as the first-selection that Al, Cu etc. become TFT grid metal electrode material.But also there are many shortcomings in pure Al and pure Cu as electrode material, the one, and poor heat stability is easy to generate serious hillock phenomenon as Al film its surface after high-temperature process; The 2nd, poor chemical stability, the surface is oxidation or corrosion easily.In order to overcome these shortcomings, using more electrode material in large-screen, high-resolution liquid crystal display screen is bilayer or the sandwich construction of Al and refractory metal Cr, Mo etc., but this bilayer or sandwich construction have increased the thickness of grid metal electrodes greatly, make and have formed obvious step on the transparent base surface.This step will bring two problems: the one, and the deposition of leaking metal level, passivation layer and pixel electrode layer to subsequent gate insulating barrier, active layer, source is brought difficulty, and metal wire is broken easily, causes many bad appearance.The 2nd, this step will make inevitably and produce a large amount of stress in follow-up each rete, be unfavorable for the raising of TFT matrix rate of finished products.In order to eliminate the unfavorable factor that step brings, various process is used in the preparation of TFT matrix as two step wet etching methods etc., but these methods are the gradient that reduces step, can not eliminate step fully.
Summary of the invention
The objective of the invention is in order to overcome the defective of prior art, on the basis of traditional semiconductor fabrication process, proposed a kind of active driving TFT matrix construction and manufacture method thereof of planarization gate electrode insulation surface.
To achieve these goals, the invention provides a kind of flattening active driving TFT matrix structure, comprise: substrate, grid line, gate electrode and gate insulation layer, it is characterized in that: described grid line and gate electrode are coated on the substrate by gate insulation layer, the gate insulation layer upper surface is horizontal, and semiconductor layer, source-drain electrode and pixel electrode all are formed on the gate insulation layer.
Wherein, described grid line and gate electrode are the individual layer that metal or its alloy constituted, bilayer or sandwich constructions such as Cr, W, Ti, Ta, Mo, Al or Cu.Described gate insulation layer is oxide, nitride or oxynitrides.
To achieve these goals, the invention provides a kind of preparation method of flattening active driving TFT matrix structure, comprising:
Step 1, deposition grid metal level by mask and etching technics, forms grid line and gate electrode on substrate, and keeps the photoresist on grid line and the gate electrode;
Step 2, the ground floor gate insulation layer that deposit thickness is suitable with the grid metal layer thickness on the substrate of completing steps one is wherein above the deposition of the ground floor gate insulation layer on grid line and the gate electrode photoresist thereon;
Step 3 adopts photoresist stripping process to remove photoresist, and the ground floor gate insulation layer on the photoresist is also peeled off thereupon;
Step 4, deposition second layer gate insulation layer on the substrate of completing steps three;
Step 5 is finished the preparation of other parts of active driving TFT matrix construction on the substrate of completing steps four.
To achieve these goals, the present invention also provides the preparation method of another flattening active driving TFT matrix structure, comprising:
Step 1, successive sedimentation grid metal level and ground floor gate insulation layer on substrate by mask and etching technics, form grid line and gate electrode, and keep the photoresist on grid line and the gate electrode;
Step 2, the total suitable second layer gate insulation layer of thickness of deposit thickness and grid metal level and ground floor gate insulation layer on the substrate of completing steps one is wherein above the deposition of the second layer gate insulation layer on grid line and the gate electrode photoresist thereon;
Step 3 on the substrate of completing steps two, adopts photoresist stripping process to remove photoresist, and the second layer gate insulation layer on the photoresist is also peeled off thereupon;
Step 4 is finished the preparation of other parts of active driving TFT matrix on the substrate of completing steps three.
Compare with the preparation method with traditional TFT matrix structure, the present invention has two tangible advantages: the one, formed flat gate electrode insulation surface, help the deposition that follow-up active layer, source leak metal level, passivation layer (this layer in the TFT matrix structure that has shouldn't) and pixel electrode layer, reduced the generation that various metal wires break; The 2nd, the stress that flat gate electrode insulation surface can reduce in the gate insulation layer forms, and helps the raising of rate of finished products.
Below in conjunction with Figure of description and specific embodiment, technical scheme of the present invention is described in further detail.
Description of drawings
Figure 1A is the sectional view after depositing the grid metal level on the transparent base and forming the photoresist figure;
Figure 1B forms the sectional view of grid metal electrode for grid metal level corrosion back;
Fig. 1 C is the post-depositional sectional view of ground floor gate insulation layer;
Fig. 1 D is the sectional view after the photoresist lift off;
Fig. 1 E is the post-depositional sectional view of second layer gate insulation layer;
Fig. 2 A is at successive sedimentation grid metal level on the transparent base and ground floor gate insulation layer and the sectional view after forming the photoresist figure;
Fig. 2 B is a grid metal level and ground floor gate insulation layer corrosion back sectional view of the present invention;
Fig. 2 C is the post-depositional sectional view of second layer gate insulation layer;
Fig. 2 D is the sectional view after the photoresist lift off.
Mark among the figure: 11, transparent glass substrate or quartz; 12, grid metal level; 13, photoresist; 14, ground floor gate insulation layer; 15, second layer gate insulation layer; 16, grid line and gate electrode.
Embodiment
The invention provides a kind of flattening active driving TFT matrix structure, comprise: parts such as substrate, semiconductor layer, former drain electrode, pixel electrode, these parts and other various forms of active driving TFT matrix constructions are as broad as long, do not mark in the accompanying drawings, the present invention and prior art major different are characterised in that: grid line of the present invention and gate electrode are coated on the substrate by gate insulation layer, it is horizontal that the upper surface of gate insulation layer is layer, and other parts of matrix structure are formed on the smooth gate insulation layer.
Shown in Fig. 1 E, above grid line and the gate electrode 16, second layer gate insulation layer 15 is arranged, and in the zone that does not have grid line and gate electrode 16, ground floor gate insulation layer 14 and second layer gate insulation layer 15 are arranged, and grid line and gate electrode 16 just are coated on the glass substrate by gate insulation layer like this.Because the thickness of grid line and gate electrode 16 is suitable with the thickness of ground floor gate insulation layer 14, the surface of second layer gate insulation layer 15 is horizontal substantially like this.Such gate electrode insulation surface, because it is comparatively smooth, do not have step,, reduced the generation that various metal wires break so help the deposition that follow-up active layer, source leak metal level, passivation layer (this layer in the TFT matrix structure that has shouldn't) and pixel electrode layer.In addition, flat gate electrode insulation surface can reduce the stress formation in the gate insulation layer like this, helps the raising of rate of finished products.
Equally, shown in Fig. 2 D, above grid line and the gate electrode 16, ground floor gate insulation layer 14 is only arranged, and, second layer gate insulation layer 15 is only arranged in the zone that does not have grid line and gate electrode 16.The total thickness of the thickness of second layer gate insulation layer 15 of this moment and grid line and gate electrode and ground floor gate insulation layer 14 is suitable, and whole like this gate electrode insulation surface is also horizontal substantially.Such gate electrode insulation surface, same because comparatively smooth, do not have step, help the deposition that follow-up active layer, source leak metal level, passivation layer (this layer in the TFT matrix structure that has shouldn't) and pixel electrode layer, avoid or reduced the generation that various metal wires break.Equally, flat gate electrode insulation surface also can reduce the stress formation in the gate insulation layer like this, helps the raising of rate of finished products.
Provide two kinds of specific implementation methods of making above-mentioned plat structure below.
Specific embodiment one:
Figure 1A-Fig. 1 E shows the process of the preparation planarization TFT matrix structure of the present invention's proposition
At first, on transparent glass substrate or quartzy 11, the method deposit thickness of employing sputter or thermal evaporation is about the grid metal level 12 of 100～3000 .The grid metal level can adopt individual layer, bilayer or sandwich construction, and metal can be selected metal or its alloys such as Cr, W, Ti, Ta, Mo, Al, Cu for use.Behind the grid layer metal deposition, form photoresist 13 figures by traditional photoetching process, wherein photoresist adopts positive photoresist, as Figure 1A.Adopt wet method or dry process to erode unwanted grid metal level, form grid line and gate electrode 16, and keep the photoresist 13 on grid line and the gate electrode 16 simultaneously, as Figure 1B.
Secondly, on transparent glass substrate or quartzy 11, photoresist 13, be about the ground floor gate insulation layer 14 of 100～3000 by plasma enhanced chemical vapor deposition (PECVD) method successive sedimentation thickness, and the thickness of its thickness and grid line and gate electrode 16 is suitable, as Fig. 1 C.Ground floor gate insulation layer 14 can be selected oxide, nitride or oxynitrides for use, and corresponding reacting gas can be SiH4, NH3, N2 or SiH2Cl2, NH3, N2.
Then, by chemical solution photoresist 13 is peeled off, deposition ground floor gate insulation layer 14 in the above also is removed simultaneously, as Fig. 1 D.
Then, on ground floor gate insulation layer 14, grid metal electrode 12, be about the second layer gate insulation layer 15 of 100～3000 , as Fig. 1 E by PECVD method successive sedimentation thickness.Second layer gate insulation layer 15 can be selected oxide, nitride or oxynitrides for use, and corresponding reacting gas can be SiH4, NH3, N2 or SiH2Cl2, NH3, N2.So just finished the making of smooth gate insulation layer.
At last, on smooth gate insulation layer, finish the preparation of other parts of active driving TFT matrix again.Because gate electrode insulation surface is horizontal, there is not step, help the deposition that follow-up active layer, source leak metal level, passivation layer (this layer in the TFT matrix structure that has shouldn't) and pixel electrode layer, avoid or reduced the generation of various metal wire broken strings, the stress that also reduces simultaneously in the gate insulation layer forms, and has improved rate of finished products.
Concrete enforcement two:
Fig. 2 A-Fig. 2 D shows the process two of the preparation planarization TFT matrix structure of the present invention's proposition.
At first, on transparent glass substrate or quartzy 11, successive sedimentation thickness is about the grid metal level 12 of 100～3000 and the ground floor gate insulation layer 14 that thickness is about 100～3000 .Grid metal level 12 can adopt individual layer, bilayer or sandwich construction, and metal can be selected metal or its alloys such as Cr, W, Ti, Ta, Mo, Al, Cu for use.Ground floor gate insulation layer 14 can be selected oxide, nitride or oxynitrides for use, and corresponding reacting gas can be SiH4, NH3, N2 or SiH2Cl2, NH3, N2.After ground floor gate insulation layer 14 depositions, form photoresist 13 figures by traditional photoetching process, photoresist 13 adopts positive photoresist, as Fig. 2 A.Adopt wet method or dry process to erode unwanted grid metal level 12 and ground floor gate insulation layer 14, form grid line and gate electrode 16 and the ground floor gate insulation layer 14 on it, and keep the photoresist 13 on it, as Fig. 2 B.
Secondly, on transparent glass substrate or quartzy 11, photoresist 13, the second layer gate insulation layer 15 that is about 200～6000 by plasma enhanced chemical vapor deposition (PECVD) method successive sedimentation thickness, and make the total thickness of the thickness of second layer gate insulation layer 15 and grid line and gate electrode 16 and ground floor gate insulation layer 14 suitable, as Fig. 2 C.Second layer gate insulation layer 15 can be selected oxide, nitride or oxynitrides for use, and corresponding reacting gas can be SiH4, NH3, N2 or SiH2Cl2, NH3, N2.
Then, by chemical solution photoresist 13 is peeled off, deposition second layer gate insulation layer 15 in the above also is removed simultaneously, as Fig. 2 D.So just finished the making of smooth gate insulation layer.
At last, on smooth gate insulation layer, finish the preparation of other parts of active driving TFT matrix construction again.Because gate electrode insulation surface is horizontal, there is not step, help the deposition that follow-up active layer, source leak metal level, passivation layer (this layer in the TFT matrix structure that has shouldn't) and pixel electrode layer, avoid or reduced the generation of various metal wire broken strings, also reduce simultaneously the formation of gate insulation layer internal stress, improved rate of finished products.
The above embodiment that proposes is best implementation method, and not exclusive implementation method.Can use different materials as required, realize it with equipment, as change each sedimentary condition and deposit used material, positive photoresist is changed to the similar means of negative photoresist or the like, in addition, only limit to gate insulation layer formation part before, go so it can be applied in various active driving matrix structures and the manufacture method because structure of the present invention is distinguished part with the inventive method mutually with prior art, as 4Mask, the structure of process such as 5Mask and formation.
It should be noted that at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art should can use different materials and equipment to realize it as required, promptly can make amendment or be equal to replacement, and not break away from the spirit and scope of technical solution of the present invention technical scheme of the present invention.
Claims (5)
1, a kind of flattening active driving TFT matrix structure, comprise: substrate, grid line, gate electrode and gate insulation layer, it is characterized in that: described grid line and gate electrode are coated on the substrate by gate insulation layer, the gate insulation layer upper surface is horizontal, and semiconductor layer, source-drain electrode and pixel electrode all are formed on the gate insulation layer.
2, matrix structure according to claim 1 is characterized in that: described grid line and gate electrode individual layer, bilayer or the sandwich construction for being made of Cr, W, Ti, Ta, Mo, Al or Cu metal or its alloy deposition.
3, according to the described matrix structure of claim 1, it is characterized in that: described gate insulation layer is oxide, nitride or oxynitrides.
4, a kind of manufacture method of flattening active driving TFT matrix structure is characterized in that, comprising:
Step 1, deposition grid metal level by mask and etching, forms grid line and gate electrode on substrate, and keeps the photoresist on grid line and the gate electrode;
Step 2, the ground floor gate insulation layer that deposit thickness is suitable with the grid metal layer thickness on the substrate of completing steps one is wherein above the deposition of the ground floor gate insulation layer on grid line and the gate electrode photoresist thereon;
Step 3 adopts photoresist stripping process to remove photoresist, and the ground floor gate insulation layer on the photoresist is also peeled off thereupon;
Step 4, deposition second layer gate insulation layer on the substrate of completing steps three;
Step 5 is finished the preparation of active driving TFT matrix on the substrate of completing steps four.
5, a kind of manufacture method of flattening active driving TFT matrix structure is characterized in that, comprising:
Step 1, successive sedimentation grid metal level and ground floor gate insulation layer on substrate, by mask and etching, shape is to grid line and gate electrode, and the photoresist on reservation grid line and the gate electrode;
Step 2, the total suitable second layer gate insulation layer of thickness of deposit thickness and grid metal level and ground floor gate insulation layer on the substrate of completing steps one is wherein above the deposition of the second layer gate insulation layer on grid line and the gate electrode photoresist thereon;
Step 3 on the substrate of completing steps two, adopts photoresist stripping process to remove photoresist, and the second layer gate insulation layer on the photoresist is also peeled off thereupon;
Step 4 is finished the preparation of active driving TFT matrix on the substrate of completing steps three.
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| CN112635496A (en) * | 2021-01-07 | 2021-04-09 | Tcl华星光电技术有限公司 | Array substrate, preparation method thereof and display panel |
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| TW490857B (en) * | 2001-02-05 | 2002-06-11 | Samsung Electronics Co Ltd | Thin film transistor array substrate for liquid crystal display and method of fabricating same |
| US6875664B1 (en) * | 2002-08-29 | 2005-04-05 | Advanced Micro Devices, Inc. | Formation of amorphous carbon ARC stack having graded transition between amorphous carbon and ARC material |
| CN1652003A (en) * | 2005-03-22 | 2005-08-10 | 广辉电子股份有限公司 | Method for mfg. film transistor and liquid crystal display |
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| CN112635496A (en) * | 2021-01-07 | 2021-04-09 | Tcl华星光电技术有限公司 | Array substrate, preparation method thereof and display panel |
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Effective date of registration: 20071012 Address after: 100176 No. 8 West Central Road, Beijing economic and Technological Development Zone Applicant after: Beijing BOE Photoelectricity Science & Technology Co., Ltd. Co-applicant after: BOE Technology Group Co., Ltd. Address before: No. 10 Jiuxianqiao Road, Beijing, Chaoyang District Applicant before: BOE Technology Group Co., Ltd. |
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