CN101064246B - Metal-induced crystallization of amorphous silicon and metal removal techniques - Google Patents

Metal-induced crystallization of amorphous silicon and metal removal techniques Download PDF


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CN101064246B CN 200610139876 CN200610139876A CN101064246B CN 101064246 B CN101064246 B CN 101064246B CN 200610139876 CN200610139876 CN 200610139876 CN 200610139876 A CN200610139876 A CN 200610139876A CN 101064246 B CN101064246 B CN 101064246B
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thin film
amorphous silicon
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The invention relates to a technology for producing a high quality and large area polycrystalline silicon thin film by amorphous silicon-metal-induced crystallization. Crystallization-inducing metal elements of controllable amount are introduced onto an initial amorphous silicon thin film. A first, low-temperature, heat-treatment induces nucleation of metal-induced crystallization (MIC), resulting in the formation of small polycrystalline silicon''islands''. A metal-gettering layer is formed on the resulting partially crystallized thin film. A second, low-temperature, heat-treatment completes the MIC process to form the desired polycrystalline silicon thin film. While the metal-gettering layer can be removed at random after crystallization heat-treatment.


非晶硅的金属诱导结晶和金属吸除技术 The metal induced crystallization of amorphous silicon and a metal gettering technology

技术领域 FIELD

[0001] 本发明讲述的是通过非晶硅金属诱导结晶制备高质量,大面积多晶硅薄膜的技术。 [0001] The present invention describes the preparation of high quality by induced crystallization of amorphous silicon metal, large-area polysilicon thin film technology. 此技术需要对起始的非晶硅薄膜引入可控量的诱导结晶金属元素;第一个低温热处理引起金属诱导结晶成核现象并形成很小的多晶硅“岛”;在此部分晶化薄膜材料上形成金属吸除层;金属诱导结晶过程经过第二个低温热处理过程中完成,并形成所期望的多晶硅薄膜;金属吸除层在完成结晶热处理之后去掉。 This technique requires the introduction of a controlled amount of crystallization-inducing metal element in the amorphous silicon film starting; first metal induced crystallization temperature heat treatment to cause nucleation and the formation of the polysilicon a small "island"; this partially crystallized film material formed on the metal absorption layer; metal induced crystallization process through the second low temperature heat treatment process is completed, and forming a desired polycrystalline silicon thin film; gettering metal layer is removed after completion of the heat treatment for crystallization.

背景技术 Background technique

[0002] TFT可以应用于有源矩阵液晶显示、有源矩阵有机发光二极管显示、有源矩阵电子书和有源矩阵图像传感器。 [0002] TFT can be applied to an active matrix liquid crystal display, active matrix organic light emitting diode display, an active matrix electronic book and an active matrix image sensor. 非晶硅TFT因为工作速度低、缺少P型器件而难于用来实现外围电路。 Si TFT because of the low operating speed, the lack of P-type device is difficult to implement a peripheral circuit. 这推动了通过退火炉或者激光加热得到的多晶硅器件的产生。 This facilitates the production of polycrystalline silicon by means of an annealing furnace or laser heating obtained. 通过传统的低压化学气相沉积得到多晶硅的工艺需要很高的温度(620-650°C ),并且得到的多晶硅材料性能很差。 Polycrystalline silicon obtained by a conventional low pressure chemical vapor deposition processes require very high temperatures (620-650 ° C), and the resulting poor performance of polysilicon material. 通过高温退火(ΙΟΟΟΌ以上)可以改善材料的性能,但是这种方法只适用于比较昂贵的石英衬底而不能用于一般的玻璃衬底。 You can improve the performance of the material by high-temperature annealing (ΙΟΟΟΌ above), but this method is only applicable to relatively expensive quartz substrate can not be used for general glass substrate.

[0003] 获得多晶硅薄膜的另外一种方法是金属诱导晶化(美国专利US5275851, US5879977和US2001018224)。 Another method [0003] to obtain a polysilicon thin film is a metal induced crystallization (U.S. Patent No. US5275851, US5879977 and US2001018224). 得到的材料包含大晶粒,但是多晶硅中残余的金属污染物降低了TFT的最终性能。 The resulting material comprises large grains, but the polysilicon residual metal contaminants reduce the ultimate performance of the TFT.

[0004] 因此引入了金属诱导横向晶化过程后吸除金属残余物的方法。 [0004] Thus a method of introducing a metal residue after gettering metal induced lateral crystallization process. 经过热氧化工艺后(美国专利US6465^7,US6100562)金属诱导横向晶化多晶硅薄膜的顶部部分被氧化并且残余的金属元素被顶部的氧化层吸收。 After a thermal oxidation process (U.S. Patent No. US6465 ^ 7, US6100562) metal induced lateral crystallization top portion of the polysilicon film is oxidized and the metal element is absorbed by the residual oxide layer on top. 氧化过程造成的多晶硅损耗是不希望得到的,尤其当多晶硅层比较薄的时候更是如此。 Polysilicon oxidation due to losses are undesired, particularly when a relatively thin polysilicon layer, especially when.

[0005] 在非晶硅层掺杂稀有气体(美国专利US6821828,US6821828, US2004121530, US6743700, US2002164843, US2002134981)或者掺杂五族元素(美国专利US6825072, US2004058486, US6420246, US6664144, US5700333, US2003134459, US6461943)或者从磷硅酸盐玻璃中扩散磷到所选择多晶硅区域实现金属吸除的方法被提出来。 [0005] In the amorphous silicon layer is doped with a rare gas (U.S. Patent No. US6821828, US6821828, US2004121530, US6743700, US2002164843, US2002134981) or doped Group 5 (U.S. Patent No. US6825072, US2004058486, US6420246, US6664144, US5700333, US2003134459, US6461943) polysilicon region or to a selected metal gettering implemented method is proposed diffusion of phosphorus from phosphorus silicate glass. 但是这样吸除过程发生在金属诱导横向晶化过程之后,延长了整个工艺的时间。 However, this process occurs after the gettering metal induced lateral crystallization process, extending the time of the entire process. 并在对撞晶界处,留下高密度缺陷态。 And collision grain boundaries, leaving a high density of defect states.

[0006] 吸除过程和金属诱导横向晶化同时进行的技术(美国专利US20021^884)的提出是在形成先驱物非晶硅之前预先沉积一层吸除层。 Before [0006] In addition to the suction technique proposed (U.S. Patent No. US20021 ^ 884) and metal induced lateral crystallization process of simultaneously forming precursor is previously deposited layer of amorphous silicon gettering layer. 但是这样吸除过程过早发生,会影响多晶硅的结晶质量和结晶速度,而且,吸除金属太接近多晶硅器件有源层,吸除层的存在会影响TFT的最终特性。 But this premature gettering process, will affect the rate of crystallization and the crystalline quality of polycrystalline silicon, but also, the presence of absorption characteristics of the final layer of metal removal can affect TFT device too close to the polysilicon active layer, the gettering.

[0007] 本发明提出在多晶硅晶粒生长过程中去除可控量的金属残余物的技术。 [0007] The present invention provides a controlled amount of metal removal techniques residue polysilicon grain growth. 引入金属诱导多晶硅晶核形成和生长,镍金属边吸除晶体边生长到全部晶化两个步骤。 Introducing metal induced nucleation and growth of polycrystalline silicon, the nickel gettering metal edge to all of the growing crystal side of the crystallization step two. 这样,一方面有效的将硅膜中的镍转移到吸收层磷硅玻璃(PSG)中,另一方面,随着硅膜中镍含量的减少,对撞晶界处的镍量会明显减少。 Thus, on the one hand the effective silicon film was transferred to the absorbent layer of nickel phosphosilicate glass (PSG) on the other hand, with the reduction of nickel content in the silicon film, the amount of nickel at the grain boundaries of the collision will be significantly reduced. 在热处理晶化过程完成后,吸收到磷硅玻璃(PSG)中的金属镍可以在去除PSG过程中一起去除,因此大大提高了多晶硅薄膜质量并且减少了金属残余污染物的数量。 After the heat treatment the crystallization process is completed, the absorbed nickel phosphosilicate glass (PSG) may be removed together in the removal of PSG process, thus greatly improving the quality of the polycrystalline silicon thin film and reduces the number of residual metal contaminants. 发明内容 SUMMARY

[0008] 本发明为制备高质量多晶硅薄膜材料的方法,并用此种多晶硅薄膜材料作为制备高质量多晶硅TFT的有原层。 [0008] The polycrystalline silicon thin film material of the present invention is a method for preparation of high quality, and with such a material as to produce high quality polycrystalline silicon thin film has the former layer polysilicon TFT. 多晶硅薄膜采用镍金属诱导晶化的方法,残余镍的吸除采用磷硅玻璃(PSG)吸除方法。 Polysilicon thin nickel metal induced crystallization method, absorption of residual nickel in addition to using phosphosilicate glass (PSG) gettering method. 本发明的技术核心,是将晶化与吸除过程进行了最优化的组合。 The core technology of the present invention, is removed by suction and the crystallization process was optimized combination. 第一步,在非晶硅薄膜表面引入微量的金属镍,在420-620°C下,1-2小时,诱导成核并以MILC的形式生长成为离散的,直径10-20微米的多晶硅斑。 The first step, the introduction of a trace amount of metallic nickel on the surface of the amorphous silicon film, at 420-620 ° C, 1-2 hours, induce nucleation and growth becomes MILC form discrete, polysilicon spot diameter of 10-20 microns . 第二步,在上述薄膜表面, 沉积300-700纳米的PSG薄膜,并在420-620温度下,退火2_3小时,完成整个多晶硅薄膜的晶化过程。 The second step, in the thin film surface, depositing a PSG film 300-700 nm, and at a temperature of 420-620, annealing 2_3 hours to complete the crystallization process of the entire polycrystalline silicon thin film. 第一步的部分晶化薄膜形成,减少了已有专利中所采用的PSG与晶化同时开始镍吸除所造成的对结晶质量和结晶速度的影响;第二步,对剩余的非晶硅区域,镍边被吸除,边去推动晶化,最后的对撞晶界中的镍含量,较已有专利中所提到的没有镍吸除情况下全部晶化的对撞晶界中的含量低。 The first step of partially crystallized thin film formation, and reducing the PSG prior patent crystallization started simultaneously employed a nickel gettering effects resulting crystalline quality and crystallization rate; a second step, the remaining amorphous silicon region, the nickel edge is removed by suction, side to promote crystallization, the nickel content of the final collision grain boundaries, than in the prior patents referred to gettering of nickel is not a case where all of the crystallization of the grain boundary collision low levels. 对一个低镍含量的晶界和高镍含量的晶界进行镍吸除, 前者的缺陷态较后者低。 A low nickel content of the grain boundaries and the grain boundary high nickel content nickel gettering, the former lower latter defect states. 因此,采用我们的发明制备的多晶硅材料的综合性能,高于已有专利技术所制备的多晶硅薄膜材料。 Therefore, the overall performance of the polysilicon material of our invention is prepared, it is higher than the polysilicon film material prepared by prior art patents.

[0009] 本发明所述的制备多晶硅薄膜的一种方法,其步骤至少包括 [0009] A method for producing polysilicon thin film according to the present invention, which comprises at least

[0010] 1 :在已经生长氮化硅氧化硅阻挡层的玻璃衬底上,沉积非晶硅层。 [0010] 1: glass substrate has been grown on a silicon nitride oxide barrier layer, an amorphous silicon layer is deposited.

[0011] 2:在非晶硅薄膜薄膜引入微量金属镍,并进行第一步退火过程,形成离散的部分晶化的多晶硅非晶硅混合薄膜。 [0011] 2: amorphous silicon thin film is introduced in the trace of nickel, and the first step in the annealing process, the polycrystalline silicon film amorphous mixture of discrete partially crystalline form.

[0012] 3 :在混合薄膜表面沉积PSG层,并进行第二步退火,形成完全的多晶硅薄膜。 [0012] 3: depositing a PSG film surface in the mixed layer, and annealing the second step, the polycrystalline silicon thin film is formed entirely.

[0013] 4 :去除PSG层和吸除在其中的金属镍。 [0013] 4: removing the PSG layer and the gettering of nickel metal therein.

[0014] 所述的玻璃衬底为但不限于康宁1737F,鹰2000等。 [0014] The glass substrate of Corning but not limited to 1737F, Eagle 2000 and the like.

[0015] 所述的氮化硅氧化硅阻挡层采用但不限于PECVD方法沉积,厚度为30-900纳米。 [0015] The silicon nitride silicon oxide barrier layer deposited using the PECVD method, but not limited, a thickness of 30-900 nm.

[0016] 所述的非晶硅指的是晶化硅的前驱物,为但不限于PECVD、LPCVD方法沉积,厚度为10-500纳米。 Said amorphous silicon [0016] refers to a crystalline silicon precursor, but not limited to deposition PECVD, LPCVD method, a thickness of 10 to 500 nm.

[0017] 所述的非晶硅薄膜薄膜引入微量的镍,采用但不限于溅射、蒸发、溶液浸泡、溶液旋涂和离子注入等,其量应为非晶硅中硅的0. -0.01%,为保证形成盘形多晶硅的镍量。 Amorphous silicon thin film [0017] The introduction of a trace amount of nickel employed, but not limited to sputtering, evaporation, solution immersion, spin-coated and ion implantation, in an amount of amorphous silicon of 0.5 -0.01 %, the amount of nickel is formed to ensure that the disc-shaped polysilicon.

[0018] 所述的第一步退火,是在氮气气氛下进行的,温度420_620°C,时间为1_2小时。 [0018] The first step of annealing is carried out under a nitrogen atmosphere, the temperature 420_620 ° C, time 1_2 hours.

[0019] 所述的部分晶化的多晶硅为离散的盘形多晶硅晶畴,直接为10-20微米。 [0019] crystallization of the polysilicon portion of the disc-shaped polysilicon discrete domains, directly 10-20 microns.

[0020] 所述的混合薄膜表面沉积PSG层,是采用但不限于PECVD、LPCVD生长,厚度为100-900 纳米。 Mixing the film surface [0020] of the PSG layer is deposited, but not limited to is the use of PECVD, LPCVD grown, with a thickness of 100-900 nm.

[0021] 所述的第二步退火,是在氮气气氛下进行的,温度420_620°C,时间为2_3小时。 [0021] The second step of annealing is carried out under a nitrogen atmosphere, the temperature 420_620 ° C, time 2_3 hours.

[0022] 所述的去除PSG的过程,采用LTO的腐蚀液(Β0Ε,氢氟酸等)去掉PSG层,同时去掉PSG中吸附的金属镍。 [0022] removing the PSG process, the etching solution with LTO (Β0Ε, hydrofluoric acid) to remove the PSG layer, while removing the PSG adsorbed metallic nickel.


[0023] 图1.覆盖了绝缘层102的衬底101上沉积的非晶硅薄膜103的截面示意图。 [0023] Figure 1 a schematic cross-sectional coverage of the amorphous silicon thin film 103 deposited on the substrate 101 insulating layer 102.

[0024] 图2.在非晶硅薄膜103表面的暴露区域形成金属或者含金属物质诱导层201的截面图 [0024] FIG 2. is formed of a metal or metal-containing species sectional view inducing layer 201 in the exposed region of the surface of the amorphous silicon film 103

[0025] 图3.第一个热处理过程中形成不连续的多晶硅“岛” 302的过程截面图。 [0025] Figure 3. The first heat treatment during formation of a sectional view of the "islands" of polysilicon 302 is discontinuous.

[0026] 图4.多晶硅“岛”的分布示意图 [0026] FIG. 4. polysilicon distribution diagram "islands"

[0027] 图5.在部分晶化后的薄膜301、302表面沉积金属吸收层501的截面图 [0027] Figure 5 a sectional view of the deposited metal layer 501 is absorbed in the surface of the rear portion of the film 301 crystallized

[0028] 图6.第二个热处理过程中诱导金属被吸收层吸收和非晶硅被晶化为多晶硅的截面图 [0028] Figure 6 a cross-sectional view of a second metal is induced during heat treatment absorbent layer and the amorphous silicon is crystallized into polysilicon

[0029] 图7.经过第二个热处理过程和去除金属吸收层以后得到的高质量金属诱导多晶硅薄膜的截面图 Cross-sectional view [0029] FIG. 7. After the second heat treatment process and after removing the metal absorber layer was a high-quality polycrystalline silicon thin film metal induced

[0030] 图8.制备薄膜晶体管工艺过程中离子注入和在高质量多晶硅材料上形成有源层的截面图 [0030] FIG. 8. Preparation of a thin film transistor ion implantation process and a sectional view of the active layer is formed on the polysilicon material of high quality

[0031] 图9.在高质量多晶硅材料上制作的的薄膜晶体管器件的截面图 [0031] FIG. 9 is a sectional view in the production of high-quality polycrystalline silicon thin film transistor device material

具体实施方式 detailed description

[0032] 本发明参照附图详述如下: [0032] The present invention is described below in detail with reference to the accompanying drawings:

[0033] 图1所示的是覆盖了阻挡层102的衬底101上沉积的非晶硅薄膜103的截面示意图。 [0033] FIG. 1 is a schematic sectional view of the cover of the amorphous silicon thin film 103 deposited on the barrier layer 102 of the substrate 101. 玻璃衬底101为康宁1737F、鹰2000等用于制备TFT的常用玻璃,厚度为0. 3-1. 5毫米。 Corning 1737F glass substrate 101, and the like Eagle 2000 glass commonly used for the preparation of a TFT, a thickness of 0. 3-1. 5 millimeters. 阻挡层102为采用PECVD或LPCVD方法生长的低温氮化硅、低温氧化硅或氮氧化硅层,厚度为30-900纳米。 The barrier layer 102 is LPCVD or PECVD method using low-temperature growth of silicon nitride, silicon oxide or low-temperature silicon oxynitride layer with a thickness of 30-900 nm. 该层在后面晶化等温度过程中,阻挡玻璃中的金属离子向硅膜中扩散。 This layer is later during the crystallization temperature and the like, a barrier metal ions in the glass diffuse into the silicon film. 非晶硅薄膜103为采用PECVD或LPCVD方法沉积的,厚度为10-500纳米。 Amorphous silicon thin film 103 is deposited by PECVD or LPCVD method to a thickness of 10 to 500 nm. 该层为制备多晶硅薄膜层的前驱物。 This layer is a thin layer of polycrystalline silicon prepared precursors.

[0034] 图2所示的是在非晶硅薄膜103表面沉积微量的镍或含镍物质201的截面示意图。 [0034] FIG. 2 is a trace amount of deposition of nickel or a nickel substance 201 contained in the cross-sectional schematic view of the surface of the amorphous silicon film 103 as shown. 该层微量的镍或含镍物质201是通过溅射、蒸发、离子注入、溶液浸泡或旋涂的方法获得。 , Dipping method or spin coating a solution of the obtained layer containing a trace amount of nickel or a nickel material 201 by sputtering, evaporation, ion implantation.

[0035] 图3所示的是上述样品,经过第一步退火过程,该过程通常在氮气气氛下进行,温度为550-590°C,时间1-2小时。 [0035] FIG. 3 is shown in the sample, the first step after the annealing process, the process is usually carried out under a nitrogen atmosphere, a temperature of 550-590 ° C, time of 1-2 hours. 在该退火过程中,在非晶硅薄膜中形成离散的诱导晶核,并生长成尺度为10-20微米的多晶硅岛302。 In the annealing process, to form discrete nuclei induced in the amorphous silicon film, and grown to 10 to 20 microns scale polysilicon island 302. 其他部分为尚未晶化的非晶硅区域301。 The other part is not yet crystallized amorphous silicon region 301.

[0036] 图4所示的是经过第一步退火过程后,多晶硅非晶硅混合薄膜的俯视图。 After the first step is the annealing process, the polycrystalline silicon film amorphous silicon top plan view of the mixing [0036] 4 as shown in FIG. 其中的多晶硅岛302为随即分布的圆形晶畴。 Wherein the polysilicon island 302 is then distributed circular domains. 其他部分为尚未晶化的非晶硅薄膜区域。 The other part is not yet crystallized amorphous silicon thin film region.

[0037] 第一步退火过程后,用稀释的氢氟酸去掉样品表面的自然氧化层,并清洗表面。 [0037] after the first annealing process to remove the native oxide layer of the sample surface with dilute hydrofluoric acid, and cleaning the surface. 之后步骤如图5所示,在多晶硅301非晶硅301混合薄膜的表面,沉积厚度为100-900纳米的PSG501。 After the step shown in FIG. 5, the surface of the polysilicon film 301 amorphous 301 mixed, deposited to a thickness of 100-900 nm PSG501.

[0038] 图6所示的是上述样品在第二个退火过程中,(该过程在氮气下进行,温度为420-620°C,时间为2-3小时)诱导金属镍被PSG 501逐渐吸除和同时金属诱导多晶硅前沿推进,非晶硅转变为多晶硅的截面示意图。 It is illustrated in [0038] FIG. 6 in the sample in the second annealing process (the process is carried out under nitrogen at a temperature of 420-620 ° C, the time is 2-3 hours) induced metallic nickel is gradually withdrawing PSG 501 in addition to the polysilicon and metal induced while advancing front, the amorphous silicon into polysilicon schematic cross-section. 图6(a)所示的是在第二步退火开始状态,在金属诱导横向晶化多晶硅的前沿的诱导峰中,存在较多的金属镍602,随着晶化过程的推进, 多晶硅、非晶硅、特别是诱导峰中的金属镍不断的被吸除到PSG层中,形成吸附在PSG中的镍601。 FIG 6 (a) is shown in the second step annealed initial state, the leading edge of the peak induced by metal induced lateral crystallization of polysilicon, there are more metallic nickel 602, with the advance of the crystallization process, polysilicon, non- crystalline silicon, in particular nickel-induced peaks is continuously sucked into the PSG layer, PSG is formed in the adsorbed nickel 601. 图6(b)所示的是上述退火过程进行到尾声时,催化峰中的镍已经很少,两边的晶粒将对撞在一起。 FIG 6 (b) is represented by the annealing process to an end when the catalytic nickel peaks have been few grains will hit both sides together. 这样的对撞晶粒中含镍量较小,镍吸除后,该处的缺陷态密度较低。 Such post containing a small amount of nickel grains hit, gettering of nickel, of a lower density of defect states thereat.

[0039] 在第二步退火过程之后,PSG层用氢氟酸或BOE等去除掉。 [0039] After the second anneal process, PSG layer with hydrofluoric acid or the like to remove BOE. 最后得到的金属诱导多晶硅薄膜701如图7所示。 The resulting metal induced polysilicon thin film 701 as shown in FIG.

[0040] 图8所示的是多晶硅TFT栅绝缘层802的形成示意图,其为但不限于氧化硅、氮化硅或氮氧化硅。 It is illustrated in [0040] Figure 8 a schematic view of a polysilicon TFT gate insulating layer 802, which is but not limited to silicon oxide, silicon nitride or silicon oxynitride. 在栅绝缘层上形成栅电极803,之后,N、P型掺杂源804离子注入到有源层中,并形成重掺杂的源漏区间801。 Forming a gate electrode on the gate insulating layer 803, and then, N, P type dopant ions implanted source 804 into the active layer, and forming a heavily doped source and drain regions 801. 然后采用激光、闪灯等快速退火或炉管热退火方式活化掺杂层。 Then using a laser flash annealing or other rapid thermal annealing furnace tubes manner activated doped layer.

[0041] 图9描述的是薄膜晶体管的截面示意图。 [0041] FIG. 9 is a cross-sectional schematic description of a thin film transistor. 沉积绝缘层901,开栅、源、漏电极的接触孔,沉积金属互连层902并形成相关电极图形。 Depositing an insulating layer 901, to open the gate, the source, the drain electrode contact hole, depositing a metal interconnect layer 902 and associated electrode pattern is formed.

[0042] 具体实施例制备方法是: [0042] Example embodiments are specifically prepared:

[0043] 1 :在1. 1毫米后的康宁1737F玻璃上101,PECVD沉积200纳米氮化硅、100纳米LTO做阻挡层102。 [0043] 1: On Corning 1737F glass was 1.1 mm 101, PECVD silicon nitride is deposited 200 nm, 100 nm LTO layer 102 as a barrier. LPCVD 550°C沉积50纳米非晶硅层103。 LPCVD 550 ° C 50 nm amorphous silicon layer 103 is deposited.

[0044] 2 :采用镍硅混合靶,氩氧气氛溅射,实现微量镍201在非晶硅表面附着。 [0044] 2: nickel mixed silicon target, a sputtering oxygen atmosphere of argon, 201 attached to the trace of nickel to achieve the amorphous silicon surface.

[0045] 3 :上述样品在氮气气氛下退火,温度为590°C,时间1小时。 [0045] 3: above sample annealed under a nitrogen atmosphere, a temperature of 590 ° C, 1 hour. 成为非晶硅膜301多晶硅膜302的混合膜。 A mixed film of an amorphous silicon film 301 polysilicon film 302.

[0046] 4 :用稀释的氢氟酸去掉样品表面的自然氧化层,并清洗表面。 [0046] 4: removing a native oxide layer of the sample surface with dilute hydrofluoric acid, and cleaning the surface. 之后,LPCVD沉积厚度为700纳米的PSG 501。 After, LPCVD deposited to a thickness of 700 nm PSG 501.

[0047] 5 :上述样品进行第二个退火过程,氮气气氛,温度为590°C,时间为2小时。 [0047] 5: The above samples second annealing process, a nitrogen atmosphere, a temperature of 590 ° C, 2 hours.

[0048] 6 :在第二步退火过程之后,PSG 501层用氢氟酸或BOE等去除掉,得到完全晶化的多晶硅薄膜701。 [0048] 6: after the second step annealing process, the PSG layer 501 with hydrofluoric acid or the like to remove BOE, to obtain complete crystallization of the polysilicon film 701.

[0049] 7 :用上述多晶硅薄膜加工TFT有源岛,沉积100纳米LTO栅氧化层。 [0049] 7: the above-described polycrystalline silicon thin film processing TFT active island, depositing a gate oxide layer LTO 100 nanometers.

[0050] 8 :形成栅电极803,并进行离子注入掺杂804。 [0050] 8: gate electrode 803 is formed, and ion implantation 804. 对N型TFT,采用磷源,能量为130KeV,浓度为4X IO15/平方厘米,对P型TFT,采用硼源,能量为40KeV,浓度为4X IO15/平方厘米。 N of the TFT type, use of a phosphorus source, energy of 130 keV, at a concentration of 4X IO15 / cm, the TFT of a P-type, boron source, energy of 40 KeV, at a concentration of 4X IO15 / cm. 之后550°C退火1小时,活化掺杂区域。 After one hour 550 ° C anneal, activation of the doped region.

[0051] 9 =PECVD沉积500纳米的电极绝缘层901,开接触孔,形成金属电极902。 [0051] 9 = PECVD deposition of the electrode 500 nanometers insulating layer 901, contact holes, the metal electrode 902 is formed.

6 6

Claims (12)

1.制备多晶硅薄膜的技术,包含以下步骤:•制备非晶硅薄膜;•在上述非晶硅薄膜表面引入微量金属镍或者含镍物质为诱导层;•对由上述样品进行第一步退火过程,以得到不连续的多晶硅“岛”;•在上述已部分晶化的薄膜上沉积金属吸收层;•完成金属诱导晶化的第二步退火过程;•去除金属吸收层。 1. Preparation of polysilicon thin film technology, comprising the following steps: • preparing amorphous silicon thin film; • introduction of trace metals in the above-described amorphous silicon thin film surface of a nickel or nickel-containing substance is inducing layer; • annealed by the first step of the process Sample , to obtain a discontinuous polycrystalline silicon "island"; • depositing a metal layer on the absorber partially crystallized film; • completion of the second step of the metal-induced crystallization annealing process; • removing the metal absorber layer.
2.权利要求1的技术,其中非晶硅薄膜采用但不限于低压化学气相沉积(LPCVD)、等离子增强型化学气相沉积(PECVD)和溅射方法沉积。 2. The technique of claim 1, wherein the amorphous silicon thin film but is not limited to using a low pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD) and sputtering deposition methods.
3.权利要求1的技术,其中非晶硅薄膜厚度为10-1000纳米。 Technique of claim 1, wherein the amorphous silicon thin film having a thickness of 10-1000 nm.
4.权利要求1的技术,其中所述金属为镍,采用的引入镍的方法包括溅射、蒸发、离子注入、溶液浸泡或旋涂。 Technique of claim 1, wherein said metal is nickel, the nickel was introduced using the method include sputtering, evaporation, ion implantation, solution immersion or spin coating.
5.权利要求1的技术,其中所述金属或含金属物质中的镍与所覆盖非晶硅中硅的原子个数比为0.01% -0. 1%ο Technique of claim 1, wherein said metal or metal-containing species and number of atoms of nickel covered with amorphous silicon ratio of 0.01% -0. 1% ο
6.权利要求1的技术,其中所述的第一步退火过程在氮气气氛下完成,退火温度550-590°C,时间1-2 小时。 Technique of claim 1, wherein the first step of the annealing process is completed in a nitrogen atmosphere, an annealing temperature of 550-590 ° C, time of 1-2 hours.
7.权利要求1的技术,其中所述不连续的多晶硅“岛”为金属诱导横向晶化多晶硅。 Technique of claim 1, wherein said polysilicon discontinuous "islands" of a metal induced lateral crystallization polysilicon.
8.权利要求1的技术,其中所述的金属吸收层材料是磷硅玻璃PSG,采用的磷硅玻璃的制备方法包括PECVD和LPCVD。 Technique of claim 1, wherein the metal layer of absorbent material is phosphosilicate glass PSG, using the method of preparation of phosphosilicate glass comprises PECVD and LPCVD.
9.权利要求1的技术,其中所述的金属吸收层的厚度为100-900纳米。 9. The technique of claim 1, wherein said absorbent metal layer has a thickness of 100-900 nm.
10.权利要求1的技术,其中所述的第二个退火过程在氮气气氛下完成,退火温度550-590°C,时间2-3 小时。 10. The technique of claim 1, wherein said second annealing process is performed under a nitrogen atmosphere, an annealing temperature of 550-590 ° C, 2-3 hours.
11.权利要求8的技术,其中所述去除金属吸收层过程,为采用稀释氢氟酸、BOE等腐蚀掉磷硅玻璃,吸附在其中的金属镍同时被除去。 11. The technique of claim 8, wherein the process of removing the metal absorption layer, is etched using dilute hydrofluoric acid phosphosilicate glass, the BOE the like, in which nickel is adsorbed is simultaneously removed.
12.应用权利要求1至11中所述的技术制备的多晶硅薄膜来制作薄膜晶体管,和相应电路、有源矩阵和显示基板。 Polycrystalline silicon thin film prepared according to art 1 to 11 12. Use as claimed in claim to make a thin film transistor, and the respective circuits, and the active matrix display substrate.
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