CN101043034A - Capacitance structure - Google Patents
Capacitance structure Download PDFInfo
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- CN101043034A CN101043034A CN200610071463.2A CN200610071463A CN101043034A CN 101043034 A CN101043034 A CN 101043034A CN 200610071463 A CN200610071463 A CN 200610071463A CN 101043034 A CN101043034 A CN 101043034A
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- conductive pattern
- those
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- capacitance structure
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- 238000007789 sealing Methods 0.000 claims description 30
- 239000003990 capacitor Substances 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 5
- 230000012447 hatching Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
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- Semiconductor Integrated Circuits (AREA)
Abstract
A capacitance structure includes conductive pattern which is stacked in several layers, and each of the conductive pattern includes a closed conductive ring, several main conductive bars which are parallel with each other and electric connected with the closed conductive ring, and several secondary conductive bars which are interlaced with main conductive bars and do not electric connected with the closed conductive ring. The main conductive bars and secondary conductive bars which are in odd layer are main conductive bars and secondary conductive bars which are separately corresponding with the conductive pattern in even layer.
Description
Technical field
The present invention relates to a kind of capacitance structure, relate in particular to a kind of capacitance structure with high capacity and high matching degree.
Background technology
Electric capacity is the element of store charge, is usually used in various integrated circuit, for example radio frequency integrated circuit (RFIC) and analog circuit (analog circuit).Basically, capacitance structure is made of the insulating barrier that two parallel battery lead plates and are located between above-mentioned two battery lead plates.Please refer to Fig. 1, Fig. 1 is the schematic diagram of an existing flat capacitor structure.As shown in Figure 1, flat capacitor structure 10 comprises that a substrate 12, one first battery lead plate 14 are arranged on the substrate 12, a capacitance dielectric layer 16 is arranged on first battery lead plate 14, and one second battery lead plate 18 is arranged on the capacitance dielectric layer 16.
Because first battery lead plate 14, capacitance dielectric layer 16 and second battery lead plate 18 of existing flat capacitor structure 10 are to utilize horizontal mode upwards to pile up, thereby must take sizable area, to significantly increase the area of capacitance structure thus, and cause the integrated level of integrated circuit to reduce.
In recent years, the capacitance structure that another kind has intersection (interdigitated) configuration between finger is suggested, and has replaced the traditional capacitance structure gradually, for example United States Patent (USP) the 5th, 583, No. 359 patent (US PatentNo.5,583,359) promptly disclosed cross capacitance structure between a kind of finger.Please refer to Fig. 2 and Fig. 3, wherein Fig. 2 is the schematic appearance of cross capacitance structure 30 between existing the finger, and Fig. 3 for cross capacitance structure 30 between existing the finger along the generalized section of the hatching line III-III of Fig. 2.As Fig. 2 and shown in Figure 3, cross capacitance structure 30 is made of one first electrode structure and one second electrode structure between existing the finger.First electrode structure comprises first conductive pattern 32 of a plurality of vertical stackings, and second electrode structure comprises second conductive pattern 34 of a plurality of vertical stackings, wherein each first conductive pattern 32 comprises one first peripheral bus 321 and a plurality of first finger-like buss 322 that are connected with the first peripheral bus 321, each second conductive pattern 34 comprises one second peripheral bus 341 and a plurality of second finger-like buss 342 that are connected with the second peripheral bus 341, and is provided with capacitance dielectric layer 38 (Fig. 2 does not show) between each first conductive pattern 32 and each second conductive pattern 34.Cross capacitance structure 30 also comprises a plurality of first attachment plugs 40 between finger, be arranged in the capacitance dielectric layer 38 between the first peripheral bus 321 of each first conductive pattern 32, so that each first conductive pattern 32 is electrically connected mutually, and a plurality of second attachment plugs 42, be arranged in the capacitance dielectric layer 38 between the second peripheral bus 341 of each second conductive pattern 34, so that each second conductive pattern 34 is electrically connected mutually.
As shown in Figure 2, each first conductive pattern 32 is by the connection of first attachment plug 40, constitute first electrode structure, each second conductive pattern 34 is by the connection of second attachment plug 42, constitute one second electrode structure, and first conductive pattern 32, second conductive pattern 34 and be located at first conductive pattern 32 and second conductive pattern 34 between capacitance dielectric layer promptly constitute cross capacitance structure 30 between existing the finger.As shown in Figure 3, the first finger-like bus 322 of first conductive pattern 32 is to be connected to positive voltage, and 342 of the second finger-like buss of second conductive pattern 34 are to be connected to negative voltage.
Than the flat capacitor structure, though the cross capacitance structure has preferable capacitance between existing the finger under identical size, must be electrically connected by the attachment plug of being located at peripheral position, make capacitance still treat further improvement.
Summary of the invention
One of purpose of the present invention is to provide a kind of capacitance structure, to promote capacitance and matching degree.
For reaching above-mentioned purpose, the invention provides a kind of capacitance structure.Above-mentioned capacitance structure comprises that a ground floor conductive pattern, a second layer conductive pattern are arranged at this ground floor conductive pattern top, a dielectric layer is arranged between this ground floor conductive pattern and this second layer conductive pattern, and a plurality of attachment plugs are arranged in this dielectric layer, in order to electrically connect this ground floor conductive pattern and this second layer conductive pattern.Above-mentioned ground floor conductive pattern comprises one first sealing conducting ring, a plurality of first main bus that is parallel to each other and electrically connects with this first sealing conducting ring, and a plurality of with those first main buss are crisscross arranged and not with want bus this first first time of sealing conducting ring electric connection.Above-mentioned second layer conductive pattern comprises one second sealing conducting ring, a plurality of second main bus that is parallel to each other and electrically connects with this second sealing conducting ring, and a plurality of with those second main buss are crisscross arranged and not with want bus this second second time of sealing conducting ring electric connection.Those first main buss and those want bus to electrically connect for the second time, and those second main buss and those are wanted the bus electric connection for the first time.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred implementation cited below particularly, and conjunction with figs. are described in detail below.Yet following preferred implementation and graphic only for reference and explanation usefulness are not to be used for the present invention is limited.
Description of drawings
Fig. 1 is the schematic diagram of an existing flat capacitor structure;
Fig. 2 and Fig. 3 are the schematic diagram of cross capacitance structure between existing the finger;
Fig. 4 is the schematic layout pattern of the ground floor conductive pattern of capacitance structure of the present invention;
Fig. 5 is the schematic diagram of the second layer conductive pattern of capacitance structure of the present invention;
Fig. 6 is the schematic appearance of capacitance structure one preferred embodiment of the present invention;
Fig. 7 then is a capacitance structure shown in Figure 6 generalized section along hatching line VII-VII.
The main element symbol description
10 flat capacitor structures, 12 substrates
14 first battery lead plates, 16 capacitance dielectric layers
Cross capacitance structure between 18 second battery lead plates 30 refer to
32 first conductive patterns, 321 first peripheral buss
322 first finger-like buss, 34 second conductive patterns
341 second peripheral bus 342 second finger-like buss
38 capacitance dielectric layers, 40 first attachment plugs
42 second attachment plugs, 50 ground floor conductive patterns
52 first sealing conducting rings, 54 first main buss
56 want bus 60 second layer conductive patterns for the first time
62 second sealing conducting rings, 64 second main buss
66 want bus 70 attachment plugs for the second time
72 attachment plugs, 74 attachment plugs
80 conductive patterns, 90 conductive patterns
100 dielectric layers
Embodiment
Please refer to Fig. 4 and Fig. 5.Fig. 4 is the schematic layout pattern of the ground floor conductive pattern 50 of capacitance structure of the present invention, and Fig. 5 is the schematic diagram of the second layer conductive pattern 60 of capacitance structure of the present invention, capacitance structure wherein of the present invention is not limited to only pile up the double-decker that forms by ground floor conductive pattern 50 and second layer conductive pattern 60, and can comprise the multilayer conductive pattern, and the layout of the conductive pattern of odd-level all is same as the layout of ground floor conductive pattern 50, and the layout of the conductive pattern of even level then all is same as the layout of second layer conductive pattern 60.As shown in Figure 4, ground floor conductive pattern 50 comprises one first sealing conducting ring 52, a plurality of first main bus 54 that is parallel to each other and electrically connects with the first sealing conducting ring 52, and a plurality of with the first main bus 54 is crisscross arranged and not with want bus 56 first first time of sealing conducting ring 52 electric connections.As shown in Figure 5, second layer conductive pattern 60 comprises one second sealing conducting ring 62, a plurality of second main bus 64 that is parallel to each other and electrically connects with the second sealing conducting ring 62, and a plurality of with the second main bus 64 is crisscross arranged and not with want bus 66 second second time of sealing conducting ring 62 electric connections.
Capacitance structure of the present invention is to constitute with second layer conductive pattern 60 by piling up above-mentioned ground floor conductive pattern 50, and the first sealing conducting ring, 52, the first main bus 54 of ground floor conductive pattern 50 is to correspond respectively to second of second layer conductive pattern 60 to seal conducting ring 62, want the bus 66 and the second main bus 64 for the second time with wanting for the first time bus 56.In addition, be provided with a dielectric layer (figure does not show) between ground floor conductive pattern 50 and the second layer conductive pattern 60 in addition, then comprise a plurality of attachment plugs 70 in the dielectric layer, want bus 66 in order to the first main bus 54 that electrically connects ground floor conductive pattern 50 with the second time of second layer conductive pattern 60 respectively, and want bus 56 first time of second main bus 64 of second layer conductive pattern 60 and ground floor conductive pattern 50.In addition, ground floor conductive pattern 50 comprises an I/O end (figure does not show) respectively with second layer conductive pattern, externally to make the usefulness of electric connection respectively.
The principal character of capacitance structure of the present invention can increase the matching degree of capacitance structure by this for the sealing conducting ring of each layer conductive pattern, main bus and less important bus all have a symmetrical shape.As Fig. 4 and shown in Figure 5, the first sealing conducting ring 52 and the second sealing conducting ring 62 are a straight-flanked ring respectively, and the first main bus 54, for the first time want bus 56, the second main bus 64 and to want bus 66 second time be a strip respectively, but the shape of above-mentioned each element is not limited to this, and can optionally do appropriateness change and be various symmetric shapes.
Please refer to Fig. 6 and Fig. 7.Fig. 6 is the schematic appearance of capacitance structure one preferred embodiment of the present invention, and Fig. 7 then is a capacitance structure shown in Figure 6 generalized section along hatching line VII-VII, and wherein present embodiment is that to pile up the capacitance structure that forms with one by four layers of conductive pattern be example.As Fig. 6 and shown in Figure 7, capacitance structure comprises the conductive pattern of multiple-level stack, wherein 80 layout patterns promptly is same as the layout patterns of ground floor conductive pattern 50 shown in Figure 4 to the conductive pattern of odd-level (ground floor and the 3rd layer), and the conductive pattern 90 of even level promptly is same as the layout patterns of second layer conductive pattern 60 shown in Figure 5.In addition, be provided with a dielectric layer 100 between the conductive pattern 80,90, attachment plug then is arranged in the dielectric layer 100, in order to connect conductive pattern 80,90, wherein attachment plug 72 is the less important buss in order to the conductive pattern 90 of main bus in the conductive pattern 80 that connects odd-level and even level, and attachment plug 74 then is the less important bus in order to the conductive pattern 80 of the main bus of the conductive pattern 90 that connects even level and odd-level.In addition, the effect of attachment plug 72,74 is to connect conductive pattern 80,90, so its shape, size and density etc. is set is not limited to Fig. 6 and the disclosed sample attitude of Fig. 7, and visual capacitance and matching degree etc. are considered and done optimized design.Moreover, capacitance structure of the present invention can be effectively and the metal interconnecting process integration, therefore the material of conductive pattern can be metal material, for example aluminium or copper etc., the material of attachment plug can be tungsten, copper or aluminium etc., and the material of dielectric layer can be silica, but conductive pattern also can be other any conductors, polysilicon for example, and dielectric layer also can be selected silica, silicon nitride, silicon oxynitride or any single or composite dielectric material according to the demand of dielectric constant for use.
The main feature of capacitance structure of the present invention is to have good symmetry on the layout, so capacitance structure has excellent matching.In addition, the capacitance of capacitance structure is by the main bus of the vertical capacitor value between each layer conductive pattern, each layer conductive pattern and the horizontal capacitor value between the less important bus, and the horizontal capacitor value between the attachment plug contributes, so the specific capacitance value of capacitance structure can effectively promote.
The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (16)
1. capacitance structure comprises:
One ground floor conductive pattern, this ground floor conductive pattern comprises one first sealing conducting ring, a plurality of first main bus that is parallel to each other and electrically connects with this first sealing conducting ring, and a plurality of with those first main buss are crisscross arranged and not with want bus this first first time of sealing conducting ring electric connection;
One second layer conductive pattern, be arranged at this ground floor conductive pattern top, this second layer conductive pattern comprises one second sealing conducting ring, a plurality of second main bus that is parallel to each other and electrically connects with this second sealing conducting ring, and it is a plurality of and those second main buss are crisscross arranged and want do not electrically connect with this second sealing conducting ring bus for the second time, wherein those first main buss are to want bus to electrically connect for the second time with those, and those second main buss are to want bus to electrically connect for the first time with those;
One dielectric layer is arranged between this ground floor conductive pattern and this second layer conductive pattern; And
A plurality of attachment plugs are arranged in this dielectric layer, in order to electrically connect this ground floor conductive pattern and this second layer conductive pattern.
2. capacitance structure as claimed in claim 1, wherein this first sealing conducting ring and this second sealing conducting ring have a symmetrical shape respectively.
3. capacitance structure as claimed in claim 1, wherein respectively this first main bus has a symmetrical shape respectively with this second main bus respectively.
4. capacitance structure as claimed in claim 1 is wherein respectively wanted bus this first time and is respectively wanted this second time bus to have a symmetrical shape respectively.
5. capacitance structure as claimed in claim 1, wherein this ground floor conductive pattern and this second layer conductive pattern comprise metal or polysilicon.
6. capacitance structure as claimed in claim 1, wherein this dielectric layer comprises silica, silicon nitride or silicon oxynitride.
7. capacitance structure as claimed in claim 1, wherein the capacitance of this capacitance structure is to want horizontal capacitor value, those second main buss between the bus and those to want horizontal capacitor value between the bus for the second time for the first time by the vertical capacitor value between this ground floor conductive pattern and this second layer conductive pattern, those first main buss and those, and the horizontal capacitor value between those attachment plugs is contributed.
8. capacitance structure as claimed in claim 1, also comprise one the 3rd layer of conductive pattern and one the 4th layer of conductive pattern, be stacked in the top of this second layer conductive pattern in regular turn, the 3rd layer of conductive pattern has identical layout patterns with this ground floor conductive pattern, and the 4th layer of conductive pattern has identical layout patterns with this second layer conductive pattern.
9. capacitance structure comprises:
The conductive pattern of multiple-level stack, respectively this conductive pattern comprise a sealing conducting ring, a plurality of be parallel to each other and with the main bus of this sealing conducting ring electric connection, and a plurality of and those main buss are crisscross arranged and the less important bus that do not electrically connect with this sealing conducting ring, those the main buss and those the less important buss that wherein are positioned at this conductive pattern of an odd-level are those less important buss and those the main buss that corresponds respectively to this conductive pattern that is positioned at an even level;
At least one dielectric layer is arranged between those conductive patterns; And
A plurality of attachment plugs, be arranged in this dielectric layer, those the main buss and those the less important buss that wherein are positioned at this conductive pattern of this odd-level are those less important buss and those the main buss that electrically connects this conductive pattern that is positioned at this even level by those attachment plugs respectively.
10. capacitance structure as claimed in claim 9, wherein respectively this sealing conducting ring has a symmetrical shape.
11. capacitance structure as claimed in claim 9, wherein respectively this main bus has a symmetrical shape.
12. capacitance structure as claimed in claim 9, wherein respectively this less important bus has a symmetrical shape.
13. capacitance structure as claimed in claim 9, wherein respectively this conductive pattern comprises metal.
14. capacitance structure as claimed in claim 9, wherein respectively this conductive pattern comprises polysilicon.
15. capacitance structure as claimed in claim 9, wherein this dielectric layer comprises silica, silicon nitride or silicon oxynitride.
16. capacitance structure as claimed in claim 9, wherein the capacitance of this capacitance structure is by those main buss of the vertical capacitor value between those conductive patterns, each conductive pattern and the horizontal capacitor value between those less important buss, and the horizontal capacitor value between those attachment plugs is contributed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100714632A CN100454550C (en) | 2006-03-24 | 2006-03-24 | Capacitance structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100714632A CN100454550C (en) | 2006-03-24 | 2006-03-24 | Capacitance structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101043034A true CN101043034A (en) | 2007-09-26 |
| CN100454550C CN100454550C (en) | 2009-01-21 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100714632A Active CN100454550C (en) | 2006-03-24 | 2006-03-24 | Capacitance structure |
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| Country | Link |
|---|---|
| CN (1) | CN100454550C (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8716778B2 (en) | 2008-11-17 | 2014-05-06 | Altera Corporation | Metal-insulator-metal capacitors |
| CN108235782A (en) * | 2016-10-10 | 2018-06-29 | 华为技术有限公司 | Capacitor cell, integrated capacitance and resonant element |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5583359A (en) * | 1995-03-03 | 1996-12-10 | Northern Telecom Limited | Capacitor structure for an integrated circuit |
| US6451667B1 (en) * | 2000-12-21 | 2002-09-17 | Infineon Technologies Ag | Self-aligned double-sided vertical MIMcap |
| EP1538640B1 (en) * | 2003-12-05 | 2016-11-16 | NGK Spark Plug Co., Ltd. | Capacitor and method for manufacturing the same |
| US7279217B2 (en) * | 2004-05-24 | 2007-10-09 | Tdk Corporation | Multilayer ceramic device, method for manufacturing the same, and ceramic device |
| US7154734B2 (en) * | 2004-09-20 | 2006-12-26 | Lsi Logic Corporation | Fully shielded capacitor cell structure |
-
2006
- 2006-03-24 CN CNB2006100714632A patent/CN100454550C/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8716778B2 (en) | 2008-11-17 | 2014-05-06 | Altera Corporation | Metal-insulator-metal capacitors |
| CN102217068B (en) * | 2008-11-17 | 2014-12-24 | 阿尔特拉公司 | Metal-insulator-metal capacitors |
| CN108235782A (en) * | 2016-10-10 | 2018-06-29 | 华为技术有限公司 | Capacitor cell, integrated capacitance and resonant element |
| US10998873B2 (en) | 2016-10-10 | 2021-05-04 | Huawei Technologies Co., Ltd. | Capacitor unit, integrated capacitor, and resonance unit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100454550C (en) | 2009-01-21 |
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