CN101015063A - Semiconductor radiation detector with a modified internal gate structure - Google Patents

Abstract

A semiconductor radiation detector device comprises a conductive backside layer (102) of first conductivity type and a bulk layer (103). Opposite to the conductive backside layer (102) there are a modified internal gate layer (104) of second conductivity type, a barrier layer (105) of the first conductivity type and pixel dopings (110, 112, 506, 510, 512) of the second conductivity type. The pixel dopings are adapted to be coupled to a pixel voltage, which is defined as a potential difference to a potential of the conductive backside layer (102), and which creates potential minima inside the detector material for trapping the signal charges.

Description

Semiconductor radiation detector with improved internal gate structure

Technical field

The present invention relates generally to the semiconductor radiation detector technology.Particularly, the semiconductor regions that the present invention relates to be doped with different impurities relative to each other is arranged in the mode in the detector, also relates to electromotive force how to handle the semiconductor regions that is doped with different impurities, so that make performance the best of semiconductor radiation detector.

Background technology

The operation principle of semiconductor radiation detector is based on the pn knot of reverse biased, sets up the so-called deplete semiconductor volume (depleted semiconductorvolume) that presents electric field.Incident photon (or particle, such as α or β particle or photon) cause photoelectric effect, it is right to form electrons/partly.The electric field isolation charge carrier of depleted region, wherein one type charge carrier is as signal charge.The signal charge amount of measuring is used for determining radiation intensity.

The known semiconductor radiation detector is CCD (charge coupled device), and it also can have the feature of charge-transfer device (CTD), and this expression electric charge may be transmitted long distance before measurement.Early stage CCD is a surface channel type device, and the expression electric charge transmits at the interface at silicon to silicon dioxide.Yet this interface has the exhibiting high surface defective of catching electric charge to be transmitted, thereby has reduced charge transfer efficiency.The main improvement of CCD performance is to change to buried channel type CCD, transmits in the raceway groove of signal charge in lower face in this buried channel type CCD.

In preceding (wherein incident radiation arrives (being made by polysilicon usually) electric charge transfer gate) in the formula device, the part of this grid and insulating material absorbed radiation of shining.For blue light, ultraviolet ray (UV) and soft x-rays radiation and for low energy particle, this absorption is strong especially, has weakened the so-called blue response of radiation detector.A kind of method of expecting easily of improving blue response is to use the back-illuminated type device, in the back-illuminated type device, is used for all electric charges of control circuit, and promptly radiosensitive thick material layer all is positioned at the front side of this device.

In order to obtain good blue response and to make these devices very thin (usually about 50 μ m or still less), must etch away the neutral substrate (neutralsubstrate) at traditional back lighting type CCD rear side place.The thinning difficulty in process also may cause lower productivity ratio.Thin substrate also can cause other problem.Red and the approaching penetration depth of ultrared photon in silicon is easy to the thickness greater than substrate, and this has caused harmful ruddiness response and edge effect, i.e. wavy pattern in the image.For example, in U.S. Pat 6,025, describe in 585 and US6,259,085, for the introduction of the thin bias voltage back side layer that combines with the high resistance substrate, make that thicker complete depletion type substrate can be used in the back lighting type CCD, and produce good ruddiness and blue response simultaneously.

Diffusing phenomenon is that the bright spot in image produces the disturbing effect that abundant signal charge is filled the charge-trapping well of respective pixel and taken place when beginning to fill neighbor.By using anti-disperse structure can prevent this phenomenon.But, U.S. Pat 6,259, the complete depletion type back lighting type CCD shown in 085 lacks so anti-disperse structure.When bright spot when all charge packets by its transmission increase electric charges, be hangover (smearing) in viewed another problem of charge transfer stage.

U.S. Pat 6,259, in 085 and an other problem that in CCD, occurs usually be, even may be only interested, also must transmit and read the entire image frame to a part of image, this makes that the operation of CCD is dumb and slow.These problems can not appear in the CMOS active pixel sensor (APS), read pixel and not transmission signals electric charge randomly in CMOS active pixel sensor, and this makes them hangover fast, flexibly and can not occur.Defect pixel on the APS detector will can not influence other pixel as CCD, this has improved productivity ratio and has reduced production cost.But, unless in each pixel, adhere to high-quality amplifier, picture quality may be relatively poor.The best approach that realizes amplifier is to use the internal gate of collected electric charge as unipolar transistor, is similar to node field-effect transistor (JFET) or metal-oxide semiconductor FET (MOSFET).In these transistors, JFET is preferred.Internal gate structure comprises the potential energy minimum point for the signal charge of FET raceway groove below.The signal charge of building up in the potential energy minimum point has been widened raceway groove, thereby has reduced channel resistance.The good amplifier performance of internal gate FET and its less total capacitance, the parasitic capacitance less with it are with the ratio of total capacitance and read relevant with the non-destructive that makes signal charge repeatedly to be read.

U.S. Pat 5,712 has illustrated a good example of internal gate structure in 498 (wherein, internal gate is called as grid, and actual grid is called as the back grid).In this patent, the JFET structure appears on the buried channel that forms internal gate.JFET source electrode and drain region by with semiconductor crystal wafer oxide isolated extraly.This amplifier architecture preferably is used as the APS device, but can be advantageously used in the CCD structure equally.This device be back-illuminated type and must be by thinning, so that obtain good blue response.Because the thin type characteristic of device, the ruddiness response is harmful to.Another prior art U.S. Pat 5,786,609 provides a kind of back-illuminated type APS radiation detector, and it has the JFET that internal gate structure and thicker complete depletion type substrate are housed.Therefore this device has good ruddiness and blue response simultaneously.In addition, this device also has 100% activity coefficient.

The final performance limitations that is used for semiconductor radiation detector is set by leakage or dark current, and this dark current mixes with signal charge, makes the signal measurement distortion.Leakage current can be divided into three components.One-component comes from the depleted region in the device.Because the operation of semiconductor detector is based on depleted region, so this current component can't be eliminated.Reduce the depleted region size and can reduce this current component, this can reduce the sensitivity for degree of depth transmitted radiation but then.Make that unique rational method of this current component minimum is the defects count minimum that makes in the semi-conducting material, promptly should use high-quality substrate and careful selection manufacturing process.

The second leakage current component is the dissufion current that comes from the depleted region border.But this component only depleted region boundary in high-resistance material is more remarkable.In the complete depletion type detector of being made by high-resistance material, this situation occurs over just the outside of active region, the i.e. outside in the zone that pixel was positioned at.This current component can be easy to eliminate, for example by utilizing the bias voltage guard ring to be surrounded with source region.

The 3rd leakage current also is the main source of leakage current usually, is the interface electric current, and it is also referred to as the surface and produces electric current.This current component comes from the semiconductor and the adjacent depleted region of semiconductor surface different materials or interface, and is represented as surface current hereinafter.

The reason that surface current forms a so big part in total leakage current is for such fact, and promptly the dense degree of defective reaches higher at the interface on the surface.Owing to be easy to obtain high-quality substrate, and because silicon to silicon dioxide interface has more a spot of relatively defective, so silicon has been widely used as detector material.Even in the detector arrangement of silicon substrate, surface current also is the main source of leakage current usually.For example, in U.S. Pat 6,259, in 085, surface current is the main source that leaks, although operate under how phase-locked (MPP) state at this device of electric charge accumulation phase.The MPP pattern is used for eliminating surface current at the electric charge accumulation period, but it can't use during charge transfer.U.S. Pat 6,259, the structure in 085 shows the question essence of leakage current well, and it has thicker complete depletion type silicon substrate, use the MPP operation at the electric charge accumulation period, and surface current is still the main source of leakage.

The known manner that is used to reduce leakage current is effectively to cool off.But, this peltier-element (peltierelement) that needs complicated liquid air cooling radiator cooler or energy to strengthen is cooled off, for the use in mancarried device, wherein any one is all attractive especially, and complexity and energy consumption both should keep minimum in mancarried device.

U.S. Pat 5,712, the weakness of structure does not promptly have anti-disperse structure and surface and produces electric charge and do not separate with signal charge from the following fact in 498.But the arrangement furthermore proposes of the version afterwards of this DEPFET device can be collected the surface by without hindrance contact (clearcontact is labeled as L in this patent) and be produced electric charge.Even internal gate structure has critical limitations.At first, the good especially homogeney that needs internal gate doping (in this patent, being labeled as 1).The second, because the MOSFET raceway groove must always be opened, mix mutually with the signal charge that is arranged in internal gate structure to prevent surface charge, so the use that MOSFET combines with internal gate structure is problematic.The 3rd, the use that bipolar transistor combines with internal gate structure is impossible.

Summary of the invention

The object of the present invention is to provide a kind of semiconductor radiation detector structure, wherein avoided above-mentioned the problems of the prior art.Another object of the present invention is to provide a kind of semiconductor radiation detector, it has improved precision and for the susceptibility of the reduction of leakage current in measurement.A further object of the present invention is to provide a kind of semiconductor radiation detector structure of enhancing, and it is used for non-destructive ground measuring-signal electric charge.It is 100% vertical anti-disperse structure that another purpose of the present invention is to provide a kind of activity coefficient that makes.

Realize these purposes of the present invention by improved internal gate (MIG) structure, this structure makes surperficial charge carrier and signal charge isolate.

Semiconductor radiation detector according to the present invention is characterised in that, at the feature described in the characteristic of the independent claims of semiconductor radiation detector.

The method that is used to detect radiation according to the present invention is characterised in that, at the feature described in the characteristic of the independent claims of this method.

The present invention's important principles behind is with signal charge and exhausts the interface isolation that this helps to realize the remarkable reduction of leakage current.In the detector arrangement of prior art (may except recent DEPFET monitor), signal charge not with exhaust interface zone and isolate, this means that the electric charge that produces in some regional places that exhaust the interface will be increased to signal charge.If signal charge fully with exhaust the interface and isolate and carry out non-destructive and read, the material that then is different from silicon may be used for radiation detector easilier, and because littler leakage current makes certainty of measurement to be improved.

In the present invention, this isolation realizes that by hierarchy wherein the semiconductor layer of different conductivity-type or zone replace in a suitable manner.

Any one from a plurality of different viewpoints can obtain to isolate the advantage that produces by surface current.A possibility is to exchange improved precision for the higher working temperature of this device, and this has reduced the needs for cooling.If liquid or gas cooled can be converted to the peltier-element cooling.Be very important, simplified the structure of detector.In germanium, silicon and other indirect bandgap material, photonic absorption is based on the following phonon of particular energy restriction and reacts to each other.The photonic absorption probability that phonon is assisted depends on phonon density, and phonon density and temperature correlation.Therefore, the working temperature of increase has improved the detector quantum efficiency that is used for nearly band-gap energy photon, is similar to the near-infrared photon in the silicon.Another important thing is, this interface is easy to radiation damage, and this has increased the surface current that exhausts the interface, and the useful life of therefore having reduced conventional detector; Isolation according to signal charge of the present invention and surface current helps avoid this shortcoming.

Exemplary embodiment of the present invention shown in the present patent application is not interpreted as the application of claims is provided with limitation.Verb " comprises " restriction that is used in conduct opening in the present patent application, and it is not got rid of and has other feature of not addressing.Feature described in the dependent claims can mutual free combination, unless stated other situation clearly.

Be considered to novel feature specifically statement in claims of feature of the present invention.But the present invention itself in conjunction with the accompanying drawings, (about its structure and its method of operation) and other purpose and advantage will be best understood from the description below in conjunction with the specific embodiment of accompanying drawing together.

Description of drawings

Fig. 1 shows the structural principle according to the embodiment of the invention;

Fig. 2 shows and uses the hole as the electron potential in the detector of signal charge;

Fig. 3 shows the electron potential of three dimensional form;

Fig. 4 shows and uses electronics as the electron potential in the detector of signal charge;

Fig. 5 shows interchangeable structural principle;

Fig. 6 shows and uses the hole as the electron potential in the detector of signal charge;

Fig. 7 A shows groove (trench) structure;

Fig. 7 B shows groove structure;

Fig. 7 C shows groove structure;

Fig. 7 D shows groove structure;

Fig. 7 E shows groove structure;

Fig. 7 F shows groove structure;

Fig. 7 G shows groove structure;

Fig. 7 H shows groove structure;

Fig. 7 I shows groove structure;

Fig. 8 A shows the border of MIG device;

Fig. 8 B shows the border of MIG device;

Fig. 9 A shows the border of MIG device;

Fig. 9 B shows the border of MIG device;

Figure 10 A shows the border of MIG device;

Figure 10 B shows the border of MIG device;

Figure 11 A shows the border of MIG device;

Figure 11 B shows the border of MIG device;

Figure 12 shows the border of MIG device;

Figure 13 A shows the border of MIG device;

Figure 13 B shows the border of MIG device;

Figure 14 shows the border of MIG device;

Figure 15 shows single pixel MIG device;

Figure 16 shows single pixel MIG device;

Figure 17 shows single pixel MIG device;

Figure 18 shows single pixel MIG device;

Figure 19 shows single pixel MIG device;

Figure 20 shows single pixel MIG device;

Figure 21 shows single pixel MIG device;

Figure 22 shows the plain MIG device of double image;

Figure 23 shows the plain MIG device of double image;

Figure 24 shows the plain MIG device of double image;

Figure 25 shows three pixel MIG devices;

Figure 26 shows the principle that signal charge detects;

Figure 27 A shows the operation principle of JFET IG structure;

Figure 27 B shows the operation principle of JFET MIG structure;

Figure 27 C shows the operation principle of another JFET MIG structure;

Figure 28 A further shows the operation principle of JFET IG structure;

Figure 28 B further shows the operation principle of JFET MIG structure;

Figure 29 A shows the operation principle of MOSFET IG structure;

Figure 29 B shows the operation principle of MOSFET MIG structure;

Figure 30 shows single pixel MIG device;

Figure 31 shows single pixel MIG device;

Figure 32 shows single pixel MIG device;

Figure 33 shows single pixel MIG device;

Figure 34 shows the emitter MIG device that floats;

Figure 35 A shows simple APS detector;

Figure 35 B shows has the APS device that channel cutoff is injected;

Figure 35 C shows another and has the APS device that channel cutoff is injected;

Figure 35 D shows CTD;

Figure 35 E shows another CTD.

Embodiment

Fig. 1 is the schematic cross section of back lighting type semiconductor detector.The rear surface is down in the accompanying drawings, and radiation enters detector by this rear surface.The edge towards the direction of front surface, can at first be optional antireflection scintillator or conductive coating 101 from the rear surface, and this electric conducting material for example is metal or transparent conductive oxide (TCO).At the conductive coating top is thin conductive layer 102, and this thin conductive layer is used to transmit the secondary current of active region outside.For example, this layer forms by the rear surface with the first type conductivity dopant doping body layer (bulk layer) 103.Modification for two layers 101 and 102 is provided in the pending application application of application number for Fl20040966, and its content is hereby expressly incorporated by reference.

The body layer 103 of detector is preferably by the high resistance (doping content about 10 of first or second conductivity type ¹²/ cm ³Or littler) semi-conducting material makes.Conductivity type is represented the positive and negative doped semiconductor here, and it has extra positive charge and negative electrical charge respectively.Further be the layer 104 of second conductivity type towards front surface, it is for example by injecting or making by epitaxial growth.Layer 104 is represented as improved internal gate (MIG) layer hereinafter.In the place ahead of MIG layer 104, be the layer 105 of first conductivity type once more, it is designed to the barrier layer here.For example can utilize injection or epitaxial growth to make barrier layer 105.Can protect the conductor layer of insulating barrier and formation wiring, grid, capacitor or the like at the top of layer 105.

Injection 111,112,113,114 that be patterned, that have second conductivity type, preferably pixel shape is formed in barrier layer 105, and is represented as the pixel doping hereinafter.Between pixel is mixed, play to make pixel isolation and for example collect such as the zone between 111 and 112 and exhausting the channel cutoff effect of the secondary charges of generation at the interface.The optionally unsteady or bias voltage formula channel cutoff of first conductivity type is injected 115,116,117,118,119 and can be arranged between the pixel.

Electrical potential difference between pixel doping 111 and the bias voltage back layer (layer 102 in Fig. 1 structure) is represented as pixel voltage V here _PPixel is mixed and just to be represented as the channel cutoff position in position intermediate between 111 and 112.Electrical potential difference between channel cutoff position and the bias voltage back layer is represented as channel cutoff voltage V _CSRemove the stage at signal charge, the electrical potential difference between doping of front side pixel and the bias voltage back layer 102 is to remove (clear) voltage V _CThe mutual order of these voltage swings is | V _C|＞| V _P|＞| V _CS|.

For the operation of the semiconductor detector of key-drawing 1, we suppose that at first back layer 102 is n ⁺Type, MIG layer 104 is P types, barrier layer 105 is n types, and pixel doping 111 is p types.Body layer 103 is made by the high ohmic semiconductor material of n or p type, and promptly this substrate almost is (i) of intrinsic.Fig. 2 show when different voltages be applied to pixel mix with the channel cutoff position between and on the bias voltage back layer 102 time, mix and the vertical front and back line of Fig. 1 hierarchy is passed and the potential function of the electronics measured in edge, channel cutoff position in pixel.Flat in the potential function is corresponding to the neutralization zone, and sloping portion is corresponding to depleted region.Curve 201 expression be when electrical potential difference be pixel mix and the bias voltage back layer between V _CThe time situation.Voltage V _CRelatively large negative value mean that electron potential is the dull droop line of the smallest point of maximum point to the bias voltage back layer 102 from pixel is mixed.As please number be as shown in the pending application of Fl 20040966 in above referenced, can be with following structure replacement conductive layer and optional layer 101, this structure has been utilized the accumulation horizon in the very approaching body layer 103 of described structure, sees the position 211 among Fig. 2.The formation of relevant accumulation horizon and be used for the details of the use of detector operation, application reference number is the pending application application of Fl20040966.

Curve 202 expression is along the electron potential of the vertically extending line that mixes from pixel, and this pixel is entrained between itself and the bias voltage back layer has pixel voltage V _PV _PAbsolute value less than V _CAbsolute value, this means that the potential function 202 that is used for electronics is not dull droop line, but carried out some complications on the way.Can find that local maximum point 215 is in pixel doping place, potential function drops to local smallest point 216 (for signal charge and secondary charges, position 216 is three-dimensional saddle points) the barrier layer 105 from this maximum point.The from then on local smallest point of potential function upwards is increased to the local maximum point 212 (for signal charge, position 212 is three-dimensional potential energy minimum points) in the MIG layer 104, and then 212 dullnesses drop to the local smallest point of conductive layer 102 surfaces to potential function from the position.By curve 203 expressions, it is corresponding to the voltage difference V between bias voltage or unsteady channel cutoff position and the bias voltage back layer along each electronics potential function of the vertical line that extends to the bias voltage back layer from the channel cutoff position _CSIn this case, potential function has local potential's smallest point 215 in the channel cutoff position, and has electromotive force maximum point 214 in MIG layer 104, drops to the local smallest point of conductive layer 102 surfaces from maximum point 214 these function dullnesses.

Come the scanning electron electromotive force if we cross detector, and alternately bump " pixel " (is coupled to voltage V _PPixel mix) and " channel cutoff position " (be coupled to V _CSThe channel cutoff position), then can obtain in Fig. 3, roughly to illustrate the waveform surface diagrammatic sketch of type.The potential lines accurately corresponding with curve 202 among Fig. 2 and 203 illustrates with thicker line in Fig. 3.Be easy to see in the MIG layer three-dimensional local potential maximum point 212 occurred corresponding to each pixel, these maximum points by with corresponding to than the low potential district and the each other lateral separation in channel cutoff position.Therewith correspondingly, three-dimensional local potential smallest point 213 occurred corresponding to each channel cutoff position in barrier layer 105, these smallest point are lateral separation each other by the high potential district consistent with pixel.Also show among Fig. 3 for the three-dimensional saddle point of corresponding signal charge of each pixel and secondary charges 216.Because what discuss is electron potential, therefore any mobile electron in the semi-conducting material will be easier to move towards the electron potential minimum position, the hole will be easier to accumulate in the position of electron potential maximum simultaneously, and this position is the minimum potential position naturally for the hole.

When photon or charged particle bump detector, a large amount of electronics and hole in body layer 103, have been formed.Consider the situation among Fig. 2, electric field drives electronics towards the rear surface of detector, is collected by conductive back side layer and possible accumulation horizon at this place, rear surface electronics.The hole is driven towards the MIG layer, at the MIG layer, because the behavior hole of above-mentioned electron potential is entrapped and pixel consistent location 212 places.On the other hand, the surface that appears at detector front surface place produces electronics by raceway groove 216 guiding, and is entrapped the local smallest point of electron potential 213 places corresponding to the channel cutoff position in the barrier layer.Generation hole, surface is collected in the local maximum point of electron potential 215 places in the pixel doping respectively.These surfaces produce the hole can increase signal charge usually.At this moment, the electromotive force behavior of detector inside makes surperficial generation hole and signal charge isolate, and in this case, it is the hole that is entrapped the radiation reduction of MIG layer that the surface produces the hole.

Fig. 4 shows the electron potential in the detector, and wherein, layer 102 is P ⁺Type, layer 104 is n types, layer 105 is p types, and pixel injection 111 is n types.Body layer is intrinsic (i).The behavior of the electric charge that radiation reduces is very similar to the behavior that observes that presents among Fig. 2 in detector, wherein the role in electronics and hole is opposite at this moment.What form signal charge is electronics, and electronics is collected into the electron potential trap consistent with pixel, and by the surface current electron collection is prevented that in pixel doping place the surface current electronics from disturbing with measuring.The surface current hole is entrapped in the barrier layer in the channel cutoff position.In Fig. 4, curve 401 is to use V _CThe electron potential curve that dullness during the clear signal electric charge between pixel doping and rear surface rises, curve 402 shows the electron potential (V of pixel position _P), and curve 403 shows the electron potential (V of channel cutoff position _CS).The electronics that radiation reduces is collected in 412 places, position, and the surface current hole is entrapped in 413 places, and the surface produces electronics and be collected in 415 places, that is, with Fig. 2 in position 211,214 and 216 corresponding pixels 411,414 and 416 places of mixing.

Fig. 5 shows replaceable structure, and wherein, the pixel layer 506 of second type is made by blank injection (blank implantation) on 105 tops, barrier layer or by grown epitaxial layer.Preferably, inject 516 by the reverse biased channel cutoff of first conductivity type and come discrete pixels to mix 511 and 512, these injections are positioned at pixel layer 506 inside.The channel cutoff injection 516 that also is represented as the channel cutoff position hereinafter can be identical with JFET grid or bipolar emitter injection, hereinafter will be introduced this.In this case, channel cutoff position 516 preferably with mix opposite reverse biased of pixel.See through layer 506 if inject 516, then situation basically with Fig. 1 in identical.

The electronics potential function of the structure among Fig. 5 has been shown among Fig. 6.From pixel 511 and 512 potential functions 201 and 202 that extend vertically up to bias voltage back layer 102 mix the situation when removing of being in and the situation of pixel electromotive force of remarked pixel respectively of mixing.They are identical with Fig. 2.In the channel cutoff position, corresponding potential function 603 be different from present among Fig. 2 203.In function 603, have other local maximum point 617 and other local smallest point 618.The local smallest point 213 of electron potential is collected the surface and is produced electronics, and raceway groove 617 produces the local maximum point of electron potential 215 places that the hole guides to pixel doping place with the surface.The channel cutoff voltage structure that potential function 604 expresses possibility, the electronics in this structure in the electromotive force smallest point 618 is discharged from (drain).This can realize by the absolute value that for example reduces the voltage difference between the forward and backward side of chip.Channel cutoff voltage also can be configured to continuously corresponding to potential function 604.

The border of not shown device in Fig. 1 and Fig. 5.The border should be neutral, so that avoid producing too much leakage current at the chip edge place, too much leakage current can significantly increase the energy consumption of device.By using the protection structure can obtain neutral borderline region.Some examples of this structure based on groove have been shown among Fig. 7 A-7H.Only show the MIG layer 104 of hierarchy among Fig. 1 and 5.The simple groove structure that is filled with insulating material 701 has been shown among Fig. 7 A.Among Fig. 7 B, before with the filling insulating material groove, utilize and vertically be infused in the dopant 710 that forms the first kind on the channel bottom.After this implantation step, also can use dark injection vertical or that tilt, promptly the high energy of second type injects, and forms the dopant (this also is applicable to the structure among Fig. 7 C and the 7D) of second type below the dopant 701 of the first kind.Before filling groove, can carry out wet etching.

More complicated groove structure has been shown among Fig. 7 C, and wherein, the injection of at first utilize is mixed with the dopant of second type wall to groove.Then, continue etching, and make the dopant 711 and 712 of this second type be formed on the wall of groove.After etch process, utilize vertically and inject, form the dopant 710 of the first kind in the bottom of groove.Before with insulating material 701 filling grooves, can carry out wet etch step.All these processing steps can utilize the single mask step to carry out.Optionally first kind injection 721 and 722 can be made before or after finishing groove.Should be noted that, if groove around a zone, then the inside and outside MIG layer of groove can be in different electromotive forces.Injecting 721 and 722 can be used to isolated M IG layer segment is connected to different electromotive forces.If groove is the point that is similar to the hole, then injects 721 and 722 and also can utilize injection to make.

Fig. 7 D shows even more complicated groove structure.Before trench fill technology, the processing step of this structure can be similar to the processing step of the structure among Fig. 7 C.In Fig. 7 D, depositing insulating layer on the wall of groove.Afterwards, the insulating barrier that will be in the channel bottom place etches away, and forms insulating barrier 702 and 703.Also can form dopant 710 in this stage.At last, for example use polycrystalline semiconductor material 704 filling grooves of the first kind, make dopant 710 bias voltages.Also can use metal or the insulator filling groove that is fit to.Can only use a mask to finish all above-mentioned processing steps.

The groove structure of another type has been shown among Fig. 7 E.This structure forms by following steps, i.e. etched trench, and the dopant of second type by forming dopant 713 comes the wall of groove is injected.Then, with insulating material 701 or with metal or polycrystalline material filling groove.Substantially the same among groove structure among Fig. 7 F and Fig. 7 E.This structure forms by following steps, i.e. etched trench and with polycrystalline material 705 filling grooves of second type.The zone 714,723 of the groove structure among Fig. 7 G is corresponding with the zone 713,721 and 722 of groove structure among Fig. 7 E with 724, except they are to be reversed the doping.Can before or after 714 injection, carry out the dark injection of second type.The zone 704,723 of the groove structure among Fig. 7 H is corresponding with the zone 705,721 and 723 of groove structure among Fig. 7 F with 724, except they are to be reversed the doping.Before the groove structure in blank map 7H, can with second or the injection of the first kind come trench wall is injected.The also available more shallow first kind is injected and is injected with the second darker type trench wall is injected.The doped region 715 of the first kind on the wall of the groove structure shown in Fig. 7 I and 716 can be similar to the doped region 711 and 712 and make of second type among Fig. 7 C.Structure 715 and 716 can be used to contact barrier layer 105.Also available first or the injection of second type come to be mixed in the bottom of groove, can carry out the dark injection of opposite types thereafter.

The border of device shown in Figure 1 has been shown among Fig. 8 A, and it has the body layer 103 that the first kind is mixed.Groove structure 821,822,823 and 824 can be the type shown in Fig. 7 A, 7B, 7C and the 7D for example.What second type was mixed is preferred for the protection structure 811 of ring-type is surrounded with source region, and this active region comprises pixel 812,813 and optional channel cutoff structure 816,817,818.Alternatively, the first kind preferred be that the protection structure 815 of ring-type is protected structure 811 around another.Can be by the mix barrier layer of 810 contact chip boundaries of the optional first kind.But also exist with groove structure between the contacting of zone.

Device among Fig. 8 A has following operation principle.By contact the bias voltage that can carry out from the back side with back layer 102 to body layer 103 and back layer 102.Replacedly, the groove structure shown in Fig. 7 D can be used to from the front side of device body layer and back layer be carried out bias voltage.Optionally doping 810 also is connected to the electromotive force identical with back layer and body layer.Reverse biased V _PBe applied between doping 811,812,813 of second type and the back layer 102.Size is || V _P|-| V _SC|| reverse biased can be applied to the optional first kind and mix between 815,816,817,818 and second type doping 811,812,813.Zone 811 and 815 can comprise selection and read electronic equipment, and they are connected to V _POr V _SCOther electromotive force in addition.The result of above-mentioned device bias voltage is, forms depleted region in the inside of device.Because groove structure 821-824, depleted region border 840 can not arrive chip boundary.That preferably float in zone between the groove structure 821-822 but also can be bias voltage.

By increasing the reverse biased between pixel doping and the back layer, can empty the signal charge in the MIG layer.This can realize by the voltage of change pixel doping or by the voltage that changes back layer 102.The advantage of preceding a kind of method is that if necessary, the signal charge in the pixel can be removed separately.But the result of single clear technology is the High-Field value (field value) on the front surface.In a kind of method in back, the signal charge of all pixels is eliminated simultaneously.But, the back a kind of method in, the electromotive force of pixel sometimes all be constant (for example being in ground potential), this helps to read and select design of electronic devices.In arbitrary method, can change channel cutoff voltage, remove to strengthen signal charge.

The body layer 103 of the device among Fig. 8 B is the doping of second type.In this case, press down (presessing) of both sides is necessary, so that produce first conductivity type protection structure 831-834 on the back side of device.Another problem of this device is must be wire bond with contacting of back layer.On the front side of device, only need a groove structure 825.For example, this groove structure can be any one that occurs among Fig. 7 E or Fig. 7 F.Use these groove structures can the bias voltage body layer.The doping 819 of the first kind is preferably the ring around the active region that comprises pixel.The doping 814 of second type can be the ring that is surrounded with source region or pixel.Read and select electronic equipment can be positioned at the outside, promptly on the left side of groove, and in doping 814 and 819.In addition, for example, also the point-like groove structure can be set on the left side of groove 825, to improve and the contacting of body layer.

In operating process, the neutral part of body layer 103 and optionally mix and 810 be in identical electromotive force.High reverse biased voltage is connected between the neutral part of back layer 102 and body layer 103.Protection structure 831-834 preferably floats, but also can be bias voltage.Reverse biased voltage is connected between the doping 819 and neutral body layer 103 of the first kind.This reverse biased voltage must be enough high, to cut off the raceway groove in the MIG layer 104.Voltage difference between back layer 102 and all second type doping 812-814 V preferably during signal charge integration _PFirst kind doping 816,817,819 preferably all is connected to channel cutoff voltage V _CS, and between they and the second type doping 812-814, have reverse biased.With with the identical mode clear signal electric charge of mode in Fig. 8 A shown device.

The border of installing shown in Fig. 5 has been shown among Fig. 9 A, and it has the body layer that the first kind is mixed.Groove structure in this device can with the device of Fig. 8 A in identical.Second type is mixed and 910 to be contacted with the second type pixel layer 506.This doping must be in same potential with neutral body layer 103.The operation principle of installing among Fig. 9 A has been explained in Fig. 6, and it is very similar to the operation principle of installing among Fig. 8 A.The border of the device shown in Fig. 5 has been shown among Fig. 9 B, and it has the body layer of second type.Groove structure in this device can with the device of Fig. 8 B in identical, perhaps also can use the structure shown in Fig. 7 I.This operation principle also is very similar to the operation principle of installing among Fig. 8 B.

Device shown in Figure 10 A and the 10B is corresponding to the device among Fig. 9 A and the 9B.In two at first referred devices, for example by using the injection that needs a masks to make layer 105 with structure.For example, the groove among Figure 10 A can be the type shown in Fig. 7 A, 7B and the 7D.But, do not need structure 711,712,721 and 722 in this case.In Figure 10 A, optional doping 1010 remains in the electromotive force identical with neutral body layer.Optional doping 1030 among Figure 10 B automatically is in identical electromotive force with neutral body.Optional doping 1020 can be float or bias voltage.1020 as the bias voltage guard ring if mix, and then mixing 811 also can be pixel.In this case, doping 1020 can be in pixel electromotive force V _P, and it can comprise selection and read electronic equipment.The operation principle of this device with install shown in Fig. 8 A identical.In the device of Figure 10 B, need not groove structure.The operation principle of installing among Fig. 8 B and Figure 10 B is identical.

Device among Figure 11 A and the 11B is corresponding to Fig. 9 A and 9B.In two devices of at first mentioning, for example, use injection to come complete layer 506 with structure.Groove structure among Figure 11 A can with Fig. 8 A and 9A in identical, and the groove structure among Figure 11 B can with Fig. 8 B and 9B in identical.For example, optional doping 1115 can be float or be biased in the groove cut-off potential.Doping 1115 also can comprise selects and reads electronic equipment.

For example, by using two injections to make the layer 104 and 105 that installs shown in Figure 12 with structure.Protection structure 1231-1234 preferably floats, but also can be bias voltage.In this case, need not groove structure.In Figure 13 A and 13B, for example, make layer 105 and 506 by using two injections with structure.For example, make the layer 104,105 and 506 that installs shown in Figure 14 by three injections with structure.The operation principle of the device among Fig. 8 A, 9A, 10A, 11A, 12, the 13A and 14 is very similar.This also is suitable for for the device among Fig. 8 B, 9B, 10B, 11B and the 13B.

The biased back layer 102 of the secondary charges that forms in the body layer 103 is collected, and these electric charges of Ceng inboard are transferred to the border of device overleaf.Mix 1210 with groove structure 821 can as with Fig. 9 A, 10A, 11A, 12,13A and 14 shown devices in the front side that contacts with bias voltage back layer 102 of body layer 103.After secondary charges was by neutral bulk diffusion, aforesaid secondary charges was collected in this contact.In the device shown in Fig. 8 B, 9B, 10B, 11B and the 13B, collect aforementioned secondary charges, be preferably located in the position in the active region outside with contacting of bias voltage back layer 102.Neutral body layer can be by doping 1030 or by groove structure 825 bias voltages in the device of back.

Can derive from Figure 10 A to Figure 14, Fig. 1 can be by different technology production with the structure among Fig. 5.For example, layer 104 can be made by epitaxial growth, and layer 105 can be to inject.Two layers 104 and 105 can be by injecting or making well equally by epitaxial growth.In structure shown in Figure 5, layer 506 also can be made by epitaxial growth or by injection.All aforementioned injections can be the blank injections of injecting or having structure, i.e. the injection carried out of photoresist (fotoresist) by patterning.Replacing injection and using diffusion is good too.

Can also have one or more floating or the guard ring of second conduction type of bias voltage between the pixel in Fig. 1 device.In the device of Fig. 5, between pixel, also can have one or more floating or the guard ring of first conductivity type of bias voltage.Between pixel even can use and float or the MOS guard ring of bias voltage.

Suitable bias voltage corresponding to the device of Fig. 1 and Fig. 5 is the key of the correct work of detector.Need body layer 103 below active region, to exhaust fully, and need be neutral at the boundary of device.For example, if the V of the voltage on the detector front surface from device (this device, body layer is that the first kind is mixed at some some place) _CSBe lowered in addition more, then the reverse biased at the pn interface between MIG layer and the body layer can become too low, this means that body layer will no longer may exhaust fully.Curve chart by 203 belows of the curve among Fig. 2 shows this situation, and this curve flat occurs at its low order end.And must have the protection structure of appropriate amount, otherwise depleted region may arrive the border of device.

Signal charge detects

Be easier to understand in order to make according to the detection of the signal charge in the semiconductor detector of embodiment of the invention principle, advantageously, at first consider on the top that pixel is mixed, to realize some possible mode of field-effect transistor (preferably MOSFET or JFET) or bipolar transistor.

The top of Figure 15 shows the plan view of basic MOSFET, and this basic MOSFET represents with the cross section that intercepts along the mark line in the top in the bottom of Figure 15.Accompanying drawing shows source dopant 1501 and drain electrode mixes 1502, and it mixes 111 corresponding to the second type pixel among Fig. 1.First kind channel cutoff optional unsteady or bias voltage among Fig. 1 mixes 115 corresponding to first kind doping 1505.MOSFET grid 1503 is positioned on the top of insulating barrier 1506.The optional local of MIG layer 104 that has the doping of second type below grid strengthens 1504.Also show the warpage (buckling) 1510 in the pixel doping among Figure 15.For example, use injection can also change the doping on the barrier layer 105 of grid below with structure.

Figure 16 shows annular JFET, and wherein, first kind grid doping 1603 is between source electrode 1601 and drain electrode 1602, and this source electrode and drain electrode are that second type is mixed and mixed corresponding to pixel.The position that should be noted that source electrode and drain electrode is interchangeable.The optional local enhancing 1504 that the MIG layer mixes preferably only is positioned at the below of the part of annular JFET grid.Square JFET has been shown among Figure 17, has wherein mixed 1505 as grid.Also show the additional warpage 1710 that pixel is mixed among Figure 17.Figure 18 shows the modification of JFET structure, wherein replaces grid doping with MOS structure 1803,1506.The additional warpage 1810 that pixel is mixed has been shown among Figure 18.Figure 19 shows another possible transistor arrangement, i.e. bipolar transistor, and it has and pixel corresponding first kind emitter 1902 and second type base stage 1901 of mixing of mixing.

Dot structure shown in Figure 15-19 is based on the device shown in Fig. 1.Provided the dot structure in Figure 20 and 21, as example based on the dot structure of the device shown in Fig. 5.Structure among Figure 20 is corresponding to the annular JFET structure among Figure 16.Unique difference has been to use pixel doped layer 506 to replace the pixel with structure and has mixed.The first kind mixes 2005 as channel cutoff.The first kind that also can be used as the channel cutoff structure of floating 2007 substitute dopings 2005 that mix.Structure among Figure 21 is corresponding to the dipolar configuration shown in Figure 19.

The dot structure of being made up of two MOSFET has been shown among Figure 22.Additional optional local enhancing of first kind doping 2201, additional gate 2203 and MIG layer doping 2204 as additional source electrode has been shown among Figure 22.This source electrode and drain locations are also interchangeable.By to mixing 1501,1502 and 2201 and apply suitable bias voltage (or bias pulse) to grid 1503 and 2203, the signal charge in the MIG layer can transmit between the position below the grid of MOSFET.This double transistor structure can be made of all devices shown in Figure 16-21.Provide in Figure 23 and 24 structure as an example.Double transistor structure among Figure 23 is corresponding to the dipolar configuration shown in Figure 19.Additional emitter 2302 and base stage 2301 has been shown in this accompanying drawing.Can use the MOS structure to replace optional second type doping 2303 between two transistors or another outside optional second type doping as this.By applying suitable bias voltage to 1901,1902,2301,2302 and 2303, signal charge can transmit between the position below the emitter.Can use common base to replace the base stage 1901 and 2301 of two separation.But in this case, only just can the transmission signals electric charge by apply suitable (reverse biased) electromotive force to emitter 1902 and 2302.Double transistor structure among Figure 24 is corresponding to the annular JFET structure shown in Figure 16.Additional source electrode 2401, drain electrode 2402 and grid 2403 have been shown in this accompanying drawing.By applying suitable bias voltage to 1601,1602,1603,2401,2402,2403 and 2303, signal charge can transmit between the position below the grid.Can use common source to replace the source electrode 1601 and 2401 of two separation.

The dot structure of being made up of three MOSFET has been shown among Figure 25.This structure has three 2501,2502 and 2503 and four grids 2504,2505,2506 and 2507 that mix as source electrode or drain electrode.By applying suitable bias voltage to 2501,2502,2503,2504,2505,2506 and 2507, signal charge can transmit between the position below grid 2504,2505 and 2506.When signal charge was in a grid below, this grid is the grid of unique unlatching preferably, promptly was that a unique raceway groove thereunder is open grid.Different electromotive forces is connected to two doping of the aforementioned unlatching grid of adjacency in 2501,2502 and 2503.The MIG layer mixes in Figure 25 optional local strengthen 1504 be positioned at each grid below.Can use following structure equally well, i.e. the optional local enhancing 1504 of MIG layer doping only is positioned at the below of grid 2504,2505,2506 and is not positioned at 2507 below.Structure among Figure 25 is biased on the MOSFET structure shown in Figure 15, but the structure shown in Figure 16-17 also can constitute similar structure.

Refer again to the detector that has as the hole of signal charge, it is how to be collected into owing to signal that pixel is mixed and the surperficial charge carrier of opposite types is collected into the channel cutoff position and changes that Figure 26 shows electron potential.Suppose to have the JFET relevant with pixel, wherein, its grid is connected to voltage V _J, the absolute value of this voltage is less than V _PAbsolute value.The actual injection of JFET with and can follow with the coupling of pixel, for example, with reference to the described exemplary model of Figure 16.

Among Figure 26, curve 2601 and 2602 be illustrated in signal charge begin to accumulate in the MIG layer before respectively in the electron potential of pixel and channel cutoff position.Curve 2611 and 2612 shows how these signal potential change after photon has clashed into detector under the situation of channel cutoff structure of floating.If the channel cutoff structure is a bias voltage, then 2612 will be clearly identical with 2602.The signal charge (hole) that accumulates in the MIG layer 104 in pixel doping place has reduced the electron potential at this some place, makes neutral (promptly smooth) part 2614 appear in the potential curve 2611.This is very important, because the flat of the potential curve in the pixel doping is also reducing aspect the length of X1 to X2 simultaneously.The length of described flat is represented the size and the corresponding electric current carrying capacity of JFET raceway groove.Can simply accurately measure the channel dimensions that reduces by the variation that observation is flowed through in the JFET electric current.When the bipolar transistor in using Figure 19 replaces JFET, use specific bias voltage forward and measure owing to narrow down variation in the emitter current that causes of base stage for emitter.Be important to note that the noise in base stage and the emitter current is coupled.By monitoring base stage and emitter current simultaneously, can certain degree ground reducing noise, this makes the absolute value of emitter current for example can deduct the absolute value of base current.Resulting like this electric current can be used as signal code.

Can explain vertical anti-disperse mechanism by means of Figure 26.Potential function 2613 has been described a kind of situation, and the MIG structure that wherein is in pixel doping below has been full of signal charge fully.In this case, the absolute value of the electromotive force in the flat 2615 of MIG structure is greater than the local maximum absolute value in the MIG layer 2616 of below, channel cutoff position.Therefore, too much signal charge vertically flows to pixel and mixes, rather than horizontal proliferation (bloom) is to neighbor.In other words, both full-pixel (full pixel) still has potential barrier in the horizontal, but in the vertical direction do not have, and is false conversely.With reference to potential curve 2612, be readily appreciated that, if the surface leak especially and cause the exhibiting high surface electric current, and if wish to use longer accumulated time, then must use bias voltage channel cutoff structure.Otherwise local maximum 2616 continue to raise, and horizontal proliferation will take place.

Remove electromotive force V by between pixel doping and bias voltage back layer 102, applying _C, can remove the signal charge in the MIG layer.Remove to carry out signal charge if regulate back side electromotive force, the part of charge in the channel cutoff of then floating will flow to the bias voltage back layer, and electron potential curve 2612 is back to initial position 2602.Also can be by the electrical potential difference that between channel cutoff and pixel, applies higher absolute value the clear signal electric charge.Another selection be pixel mix and channel cutoff between and pixel mix and the bias voltage back layer between apply the electrical potential difference of higher absolute value simultaneously.

Operation principle shown in Figure 26 makes that the detection of a few signals electric charge is feasible.But this is not unique possible principle.If the signal charge amount of each pixel is bigger on an average, then can use different operation principles, for example can be following content.Pixel is mixed and at first is connected to the removing electromotive force V that removes corresponding to signal charge _CThen, make pixel be entrained in V _CFloat in the place, it is corresponding to the signal charge integration stage.This means signal charge by directly collection of pixel doping, rather than collect by the MIG layer.Then, use its grid to be connected to the FET measuring-signal electric charge that pixel is mixed.This operation principle is corresponding to floating diffusion amplifier (floating diffusion amplifier).

In front in the transistor arrangement corresponding to Figure 15-19 of Jie Shaoing, pixel be entrained in Figure 15,17,18 with the structure of the emitter below that is in MOSFET and JFET raceway groove below and bipolar transistor of Figure 19 in have the different degree of depth.By means of warpage 1510,1710 and 1810, signal charge can be limited in MOSFET and JFET raceway groove and emitter below, the sensitiveness of modifying device.The other method of restricting signal electric charge realizes by following steps, that is, that uses that MIG layer for example mixes optional locally strengthens 1504 and the doping of the local MIG of change layer 104.A method again of restricting signal electric charge is the local doping that changes barrier layer 105.Do not having under the situation of these measures, signal charge will at first be filled the position of the drain electrode below of MOSFET and JFET pixel, and wherein signal charge only has slight influence to channel width.In bipolar pixel, signal charge will be propagated below whole base implant, and base width is had littler influence.

The warpage that exists two kinds of dissimilar pixels to mix.In the dot structure of Figure 17 and Figure 19, it is darker that pixel is entrained in the below of desired zone, and in Figure 15 and Figure 18, it is more shallow.According to the doped level in hierarchy middle level and thickness and according to the bias voltage of this structure, from these situations, select wherein a kind of.But dark warpage makes the MIG structure produce the less parasitic capacitance and the ratio of total capacitance.Can utilize emitter to advance effect (pusheffect) to obtain bipolar emitter among Figure 17 and Figure 19 and the self calibration of the dark warpage 1710 that the JFET grid injects the below.Grid cover in the MOS structure can be used to form the self calibration than dark warpage 1510 and 1810 among Figure 15 and Figure 18.Should be noted that this effect that can strengthen or remove warpage by two kinds of other preceding methods.

For example can make the optional local enhancing 1504 that MIG layer second type mixed by dark injection with structure.If first kind barrier layer 105 is by the epitaxial growth manufacturing, then the optional local enhancing 1504 of MIG layer doping also can be finished by used the injection with structure before grown epitaxial layer.The part that the injection that can use second type to have structure increases the doping of MIG layer strengthens second type doping of 1504 positions.Also the injection that can use the first kind to have structure reduces by second type that part that the MIG layer mixes strengthens the outside, 1504 positions and mixes.For example, in Figure 15, the optional local enhancing 1504 that the MIG layer mixes is located immediately at the grid below of MOSFET.But it can move a little towards source electrode.

Can the local doping that changes barrier layer 105, replace the part that the MIG layer mixes and strengthen 1504.For example, can inject the part change that barrier layer doping 105 is finished in the doping that reduces the barrier layer by use second type in 1504 positions.Also can inject the part change that barrier layer doping 105 is finished in the doping that increases the barrier layer by use the first kind in the outside of 1504 positions.In this case, the grid cover of MOS structure can be used for the self calibration purpose.Also can use the starting point adjustment to inject the doping that changes the barrier layer.

Be important to note that three kinds of aforesaid methods can be used in combination arbitrarily.The most promising in three kinds of methods may be the enhancing 1504 that MIG mixes.

If anti-disperse mechanism works, then the part of the too much signal charge that is caused by full MIG structure will increase corresponding to the MOSFET of Figure 15-18 and the measured drain current in the JFET structure.But this only is to have the only problem that has under the situation of very bright point in the image.If the measurement source current, then this phenomenon should not be a problem.

By means of the electron potential curve among Figure 27 A, 27B and the 27C, can further analyze the operation principle of MIG structure.All flats of this curve are represented the neutralization zone, and tilting zone is represented depleted region.Traditional internal gate (IG) structure of JFET has been shown in Figure 27 A, and wherein IG is formed in the layer 2704.Layer 2706 is that the JFET grid injects, and layer 2705 is JFET raceway grooves, the 2703rd, and substrate, and 2702 are bias voltage back layer.The situation of electronics potential function 2711 expressions when not having electric charge in the IG structure, and the situation of 2712 expressions when having electric charge among the IG.Electric charge in the IG structure has been widened the JFET raceway groove, i.e. the flat of the potential function in the layer 2705.According to Figure 17 A, obviously, the IG structure does not allow bipolar operation, because will flow to IG in 2704 from regional 2706 emitter currents.

Figure 27 B shows the MIG structure according to the JFET among Figure 16.The situation of electronics potential function 2713 expressions when not having electric charge in the MIG layer 104, and the situation of function 2714 expressions when in the MIG layer electric charge being arranged.This electric charge makes the JFET raceway groove in the layer 111 narrow down.MIG structure among Figure 27 B allows bipolar operation obviously, because emitter current will not flow to the MIG structure.Different MIG structures has been shown among Figure 27 C, and it has the operation principle with the IG similar.When electric charge was added in the MIG layer 104, it changed to 2716 with the electronics potential function from 2715, and promptly the electric charge in the MIG layer has been widened the JFET raceway groove in the layer 2705.But bipolar operation is possible.

Sum up the difference among Figure 27 A, 27B and the 27C, can be presented below, in the IG of Figure 27 A structure, the layer that between signal charge and FET raceway groove, has a pn knot and do not exhaust fully.In this structure, be monotonic function between the minimum and FET raceway groove of the signal charge of electronics potential function in internal gate structure.In the MIG of Figure 27 B structure, between signal charge and FET raceway groove or bipolar transistor base stage, have two pn knots and a layer that exhausts fully.This structure makes a saddle point that is used for secondary charges and signal charge can be formed between the signal charge minimum and FET raceway groove or bipolar base of MIG structure.Should be noted that, if the MIG structure well the design, if or manufacture process be not optimum, then may form little neutralization zone in this saddle point position.Such neutralization zone has increased noise for measuring, and therefore should be avoided by strictness.But this neutralization zone is the operation principle of modifier not.Compare with the IG structure among Figure 27 A, the structure among Figure 27 C comprises the layer 506,105 of two phase contra-dopings.

In the structure of Figure 27 C, between signal charge and FET raceway groove or bipolar transistor base stage, have three pn knots and two depletion layers.This structure makes two saddle points that are used for secondary charges and signal charge can be formed between the signal charge minimum and FET raceway groove or bipolar base of MIG structure.If two additional opposite doped layers are added in the structure of Figure 27 B, then may be formed for three saddle points of secondary charges and signal charge between the minimum of the signal charge in the MIG structure and FET raceway groove or the bipolar base.Signal charge in the MIG structure of this device will make FET raceway groove or bipolar base narrow down, and be similar to the situation among Figure 27 B.This structure will be not can not be that cost is that device among Figure 27 B increases any function with the ratio of the parasitic capacitance of more complicated structure and Geng Gao and total capacitance.Certainly can increase betwixt even more layer and knot, but such as has been stated, so do as and if can not have any benefit.

Further analyzed Figure 27 A among Figure 28 A and Figure 28 B and device shown in Figure 27 B operational different, wherein, suppose that IG and MIG mix to have to fluctuate and the raceway groove of JFET is closed.Situation when in potential function 2811 and the 2812 expression IG structures signal charge being arranged.Potential function 2811 is positioned at the position with maximum IG dopant atom.On the other hand, potential function 2812 is positioned at the position with minimum IG dopant atom.The signal charge electronics at first begins to accumulate in potential function 2811 smallest point in the IG layer 2704.This is by illustrating with the corresponding potential function 2813 in the position of potential function 2811.Because occupying of signal charge electronics caused the smooth neutral part of the potential function 2813 in the IG layer 2704.In this stage, the neutralization zone does not also reach potential function 2812 minimums in the IG layer 2704.

Can see that potential function 2812 has the highest local maximum in the JFET channel layer 2705 of all potential functions 2811,2812 and 2813.If the raceway groove of JFET is carefully opened, then Kai Fang electric current at first begins to flow in the position of potential function 2812, promptly in the position with minimum IG layer dopant atom.But in this position, signal charge is for the not influence of electric current of the JFET that flows through.Therefore the JFET raceway groove must be further open, makes electric current also flow in the position that is occupied by signal charge of IG layer.Potential function 2811 has minimum local minimum in all potential functions 2811,2812 and 2813.If therefore only detect signal charge seldom, then raceway groove must be open the widelyest.In other words, signal charge is few more, and the electric current of the JFET raceway groove of then flowing through is just high more.Clearly, a few signals electric charge causes the little variation in the big electric current, and this makes the detection of a few signals electric charge have challenge.IG doping that Here it is must extremely dull reason place.The problems referred to above also are applicable to the device shown in Figure 27 C.

Potential function 2814 and 2815 shows the situation when not having the signal charge hole in the MIG structure.Potential function 2814 is arranged in the position with maximum MIG dopant atom, and potential function 2815 is arranged in the position with minimum MIG dopant atom.Potential function 2814 has among both the highest local maximum at MIG layer 104 and JFET raceway groove 111.Because the local maximum in the JFET raceway groove has reduced, the signal charge hole at first begins to accumulate in the local maximum of the potential function 2814 in the MIG layer.This illustrates by potential function 2816.If the JFET raceway groove is carefully opened, then little electric current begins to flow in the position at signal charge place.Therefore, a few signals electric charge that is arranged in the MIG structure can cause the big variation of little electric current.Above-mentioned true certain degree ground helps the detection of a few signals electric charge.

Figure 29 A and Figure 29 B are corresponding to the MOSFET with IG and MIG structure.Suppose that IG and the MIG raceway groove with fluctuation and MOSFET that mixes closes.Potential function 2911 and 2914 is positioned at the position with maximum IG layer 2704 or MIG layer 104 dopant atom, and potential function 2912 and 2915 is positioned at the position with minimum IG or MIG dopant atom.Potential function 2913 and 2916 is corresponding to the potential function 2911 and 2914 that has signal charge in IG or MIG structure.Situation among Figure 29 A and Figure 29 B is similar to the situation among Figure 28 A and Figure 28 B.Variation in the electric current that causes owing to the specified quantitative signal charge is similar in device, but is to use the IG structure and the electric current certain degree ground of the MOSFET that flows through is higher than and uses the MIG structure and the electric current of the MOSFET that flows through.

With reference to Figure 28 B and Figure 29 B, clearly, that uses that MIG layer for example mixes optional locally strengthens 1504 (Figure 16,20 and 24 notices that 1504 doping profile also can be by hierarchical), and signal charge can only be limited in the below of the part of FET grid.This set has reduced the electric capacity of MIG structure, and has improved the detection of very a small amount of signal charge.But this must be impossible in the very dull IG structure below IG is entrained in the FET grid.Because this fact, the gate edge place in square MOSFET has produced problem.Here, gate edge represents not close on source electrode or drain electrode doped regions.Exceed gate edge if IG mixes, then in the IG of adjacent gate marginal position layer, form the signal charge potential energy minimum, do not influence the electric current of the MOSFET raceway groove of flowing through at this position signalling electric charge.If grid exceeds IG and mixes, the flow through MOSFET raceway groove at gate edge place of then a large amount of electric currents.Therefore clearly, must avoid misalignment, otherwise above-mentioned two problems may exist simultaneously.In square MOSFET, also need careful design marginal position, flow to IG to prevent surface leakage current.At US5, among 786,609 the square JFET, JFET grid and IG structure are connected JFET gate edge place, this means that the surface produces electric charge and will mix with signal charge.

Naturally, above-mentioned gate edge problem can not appear among the annular FET.But the area of grid among the annular FET (and then IG structural region) is sizable, and this has increased the electric capacity of IG structure.The large scale of IG structural region also is easy to cause IG doping fluctuation.The common shortcoming of square and annular IG MOSFET also is the following fact, and raceway groove must keep open in that institute is free, otherwise exhausting the electric charge that produces at the interface and will mix with signal charge between semiconductor and gate insulator.This makes the signal charge transmission difficulty more between the different I G structure in the pair transistor naturally.Than the IG structure, the benefit of MIG structure also is contact needn't be set again.

Some examples based on the device of MIG structure shown in Figure 27 C have been shown among Figure 30,31,32 and 33.Device among Figure 30 comprises square JFET, and it has source electrode 3001 and drain electrode 3002.Can see that the doping of pixel layer 506 inboards also can have warpage 3010.Device among Figure 31 comprises the bipolar transistor with base stage 3101 and emitter 3102.The device that comprises MOSFET has been shown among Figure 32, and it has source electrode 3201 and drain electrode 3202.Drawn in the accompanying drawing warpage 3210 with the MOS structurally associated.Device among Figure 33 is improved JFET, and wherein the MOS structure is as the JFET grid.Illustrated in the accompanying drawing and the relevant warpage 3310 of doping that forms source electrode 3301 and drain electrode 3302.

Can read signal charge in the MIG layer by for example following technology, in this technology, the drain electrode of amplifier (or source electrode) arow connects, and grid connects with embarking on journey.Can select required pixel by opening JFET in the delegation or MOSFET raceway groove with suitable grid voltage and being connected between the drain electrode of row drain electrodes (or source electrode) and the source electrode by voltage difference with correct polarity.Grid in all other row keeps closing, and the voltage in the drain electrode of all other row (or source electrode) is identical with this source electrode (or drain electrode) voltage.Then, export the signal charge that to determine the MIG layer from drain electrode (or source electrode) electric current or from correspondent voltage.This measurement also can be compared with the measurement of empty MIG structure.Under the situation of the pair transistor shown in Figure 22-24 (and three transistors among Figure 25), signal charge can exchange many times between the MIG of different crystal pipe structure, and can carry out many times in empty MIG structure and by the contrast between the measurement of the MIG structure that occupied.

Reading of structure shown in Figure 17 is different from other FET, because the grid voltage of each pixel can not change.For example can connect in the row drain electrode and the row in source electrode.Source electrode and drain electrode remain on same potential usually.By for example appropriate voltage being connected to a row drain electrode and reading by flow through the embark on journey electric current of source electrode of measurement.

By with the similar mode of FET (promptly by reducing the reverse biased of the emitter junction in a delegation's emitter and the row base stage), can read bipolar transistor, thereby only the emitter junction in selected pixel is connected).Then, from emitter current or from relevant voltage output measuring-signal electric charge.Be similar to and described, also can measure base current, so that reduce noise.Replace described read operation, also can select transistor to be increased in each pixel, but their are understood drain space and make structure more complicated.The another kind of method that reads signal charge is by using the flip chip technology (fct) detector chip that bonds to reading chip.

In the particle of X ray and gamma-ray detector, need in the incident of several whiles, find precise time, position and energy sometimes.But this comprises in use under the situation of unsteady source electrode FET of MIG structure and possibly can't realize.This is due to the fact that, i.e. the increase of signal charge amount even closed the raceway groove of FET more in the MIG structure.In having the unsteady source electrode FET of IG, situation is opposite: the increase of signal charge even opened the FET raceway groove more, this makes can form the pulse of instantaneous source electrode current.But can use the unsteady emitter bipolar transistor that comprises the MIG structure to replace the source electrode FET that floats.This set needs the base stage of emitter below depleted.Depleted base stage forms stopping for the emitter that floats.The increase of signal charge will reduce this and stop, make to form instantaneous emitter current pulse.

The unsteady emitter bipolar transistor that comprises the MIG structure has been shown among Figure 34.Optional second type doping 3401 and 3402 can be used for signal charge and removes.The reverse voltage that reduces between base stage and the channel cutoff by the short time can recharge unsteady emitter.Another selection is the drain electrode that the emitter that floats is connected to FET.During emitter was filled, the grid short time of FET was open.Make drain electrode float in addition.Should be noted that the size of emitter 1902 can strengthen 1504 greater than the part that MIG mixes.

Unsteady emitter can be covered by insulator layer, can be conductor layer 3403 at the insulator layer top.Conductor layer can be connected to and read chip.Also the emitter that floats can be connected to by insulating material and the conductor plate that insulate on every side.This floating conductor plate can cover by being connected to another conductor plate that for example reads chip.The conductor plate that is mentioned later also can be divided into three different pieces insulated from each other.These parts can further be connected to the other parts of the different pixels that forms line.By this way, each amplifier is connected to three different lines being electrically insulated from each other and advances towards three different directions.Then, the signal that comes from three (majority) lines that extend towards three different directions by observation can follow up the case.

For example can make the unsteady source electrode FET that comprises the MIG structure by covering source electrode with insulator layer.Then, insulator layer is covered by the conductor layer that forms condenser armature.Condenser armature can be connected to the FET grid maybe can be not attached to the FET grid.For example, the drain electrode of FET is connected to row, and condenser armature is connected to row.Condenser armature also can be connected to and read chip.The unsteady source electrode FET that comprises the MIG structure can be square or annular MOSFET or JFET.The unsteady source electrode FET that comprises the IG structure only can be the JFET of annular.With the standard FET contrast that comprises the MIG structure, the unsteady source electrode FET that comprises the MIG structure has a benefit.This benefit is that the start and end time in signal charge integration stage is accurately identical for all pixels.For example this can realize in following mode.

Apply removing electromotive force V by drain electrode to FET _C, signal charge is removed from the MIG layer.Then, the drain electrode with FET is connected to pixel electromotive force V _P, this has begun the signal charge integration stage.Importantly the raceway groove of FET is closed when accumulation phase begins.The raceway groove of FET is built up even closed more to signal charge in the MIG layer.Applying suitable potential pulse simultaneously by all drain electrodes to FET comes by accumulation phase.This potential pulse with the unsteady source electrode of FET be filled to should the MIG structure in the accurate pulse moment in the corresponding level of signal charge amount.Apply suitable electromotive force and, will read signal charge by the drain electrode on a line by the current impulse in the integration capacitance device printed line.This electric charge is more little, and then the signal charge in the MIG structure is just big more when accumulation phase finishes.After all drain electrodes all are connected to above-mentioned suitable electromotive force, drain electrode is connected to electromotive force V _C

Should be noted that, also the source electrode that floats can be connected to the unsteady drain electrode of additional FET.So, can begin and end accumulation phase by the grid of opening additional FET.Should be noted that all capacitors of introducing previously can be Any shape.For example can use the multilayer capacitor of banking up.

In order to reduce the ratio of parasitic capacitance and total capacitance, should do the layer on the body layer top thin as far as possible, that promptly processes tolerance and allowed is so thin.But the inner electric field value of device must be lower than the collapse breakdown value.If do not wish to have the increase of signal charge, then electric field value must be lower than the collapse generation limit.

Should be noted that the present invention needn't realize transistor at each pixel place.Can only electrically contact fully and with operations detector under the CTD pattern with each pixel, wherein, replacedly, pixel is coupled to the specific charge transmission voltage will causes signal charge to move, the transmission charge of each pixel in the specific read pixel in this end is used for this row of synchronous detecting again towards the end of each pixel row or column.But, contrast APS pattern, in the CTD pattern, detector more trends towards the negative effect of trailing to a greater degree, in the APS pattern, can read each independently pixel respectively.In the APS pattern, use other advantage of the present invention to be continuous read operation is fast concentrated on the part of only some picked at random of active region, the interesting phenomenon that wherein has been noted is may occur only with some clocklike long phenomenon that combines with " renewal " comprehensive read operation at interval.

Pixel and other patterning

Illustrated among Figure 35 A and Figure 35 B with Fig. 1 in the corresponding different pixels detector arrangement of structure.Figure 35 shows the channel cutoff detector arrangement of very simply floating.In the detector arrangement of Figure 35 B, channel cutoff doping 115 unsteady or bias voltage is added in the structure of Figure 35 A.Structure among Figure 35 C is corresponding to the device among Fig. 5.It can be discontinuous that channel cutoff among Figure 35 B is mixed, and is similar to the situation in the detector arrangement that can be used as CTD of Figure 35 D.Use the three-phase technology that for example is applied to different pixels doping electromotive force, can transmit the signal charge in the MIG layer.Also can with Figure 22 in identical mode between pixel is mixed, use the MOS structure, to be easy to the signal charge transmission.Structure among Figure 35 E is based on the structure of Figure 35 C, and it also can be used as CTD.Similarly float or bias voltage protection structure with noted earlier, can be added between the pixel doping and channel cutoff position among Figure 35 A, 35B, 35C, 35D and the 35E.This protection structure can be doped region and/or MOS structure.Use this protection structure, can form drift detector (drift detector) based on the MIG structure.The enhancing that warpage, MIG layer mix and the replacement body on barrier layer can be used to protect the shifted signal electric charge.The bias voltage of the optional MOS structure between pixel is mixed and pixel is mixed can be changed so that in the MIG layer, form local potential's minimum, and so that with controlled drift detector (CDD) in identical mode remove these local potential's minimums.The number of pixel and the shape of pixel are unrestricted.Also can use long and narrow pixel to form the strip detector.Be similar to shown in Figure 35 A, 35B, 35C, 35D and the 35E, constitute pixel active region can by first or second conductivity type float or bias voltage protection structure institute around, and these zones can comprise and read and select electronic equipment.

Be important to note that, in various semi-conducting materials, preferably Schottky and ohmic contact, substitute doping.For example, can replace that pixel mixes 111, channel cutoff is mixed 115 and 515 by proper metal, back layer 102 and for example source electrode, drain electrode, grid and emitter contact.On the other hand, for for example with mix 111,506,115 with 515 contact, it may be necessary that the contact of high dose is injected.Also the front side of device can be connected to the thin rear side of supporting substrate and device, so that this device reaches required thickness.Compare with the body layer of thick device, the body layer of thin device may be mixed by greater amount ground.Utilization contacts with substrate edges, also can finish the bias voltage of body layer.

Practical application

Semiconductor radiation detector according to embodiment can be advantageously used in detection UV radiation, visible light, near or far infrared radiation and/or soft x-rays most.By cover the rear surface of detector with scintillation material, this application can be significantly towards the energy type X ray expansion with the above quantum energy of 10keV.In this case, detector will can not detect incident X-rays as described, but detect the flicker quantum that causes when X ray bump scintillation material.

Can realize the reduction level of leakage current by the present invention, make detector to make, and other material of having considered hereinbefore forbid comprising high-level leakage current by other semi-conducting material beyond the silicon.Described these other semi-conducting materials include, but is not limited to germanium, GaAs and cadmium telluride.

Comprise that the device according to the detector of the embodiment of the invention also can comprise other semiconductor chip, some chips wherein can go between and be connected to the pixel of detector.This makes and can form very compact structure, and it has comprised detection, amplifies, has read, and in some cases even be stored in the very little space, is similar to MCM (multi-chip module).

The mode that influence behavior of field-effect transistor electricity by the signal charge of observe building up reads the non-destructive mode of the signal charge amount of being built up, and feasiblely can repeatedly read same electric charge before electric charge is eliminated.In other words, the accumulation of the electric charge at different pixels place can be monitored substantially continuously.

Claims (27)

1. semiconductor radiation detector device comprises:

-conductive back side layer (102); And

The body layer of-semi-conducting material (103),

It is characterized in that described device comprises in the following order on the surface of the described body layer (103) relative with described conductive back side layer (102):

-improved internal gate layer (104), it is second conductive-type semiconductor;

-barrier layer (105), it is first conductive-type semiconductor; And

-pixel doping (111,112,506,511,512), it is second conductive-type semiconductor, be suitable for being coupled at least one pixel voltage, so that form the pixel of mixing corresponding to pixel, described pixel voltage is defined by the electrical potential difference for the electromotive force of described conductive back side layer (102).

2. semiconductor radiation detector device according to claim 1, wherein, described improved internal gate layer (104) and described barrier layer (105) are continuous on the whole active region of the matrix that comprises pixel doping (111,112,506,511,512).

3. semiconductor radiation detector device according to claim 1, wherein, described improved internal gate layer (104) is the implanted layer that manufactures the material of described body layer (103), and described barrier layer (105) are epitaxially grown epitaxial loayers on the top of described improved internal gate layer (104).

4. semiconductor radiation detector device according to claim 3, wherein, described pixel doping (111,112,506,511,512) comprises that being injected with of described epitaxial loayer (105) makes described pixel doping (111,112) present the zone of the dopant of second type conductivity.

5. semiconductor radiation detector device according to claim 1, wherein, a plurality of pixels doping (111,112,506,511,512) comprise the special pixel transistor that is based upon in the described pixel doping, described transistor is field-effect transistor or bipolar transistor, and described semiconductor radiation detector device comprises that signal charge reads circuit, and described signal charge reads circuit and is suitable for measuring special pixel transistor and effective raceway groove described special pixel transistor or the relevant electrical characteristics of base stage size.

6. semiconductor radiation detector device according to claim 5, wherein, described signal charge reads the electrical characteristics relevant with reducing raceway groove or base width that circuit is suitable for measuring special pixel transistor, and described reducing caused by radioinduction hole or the electronics built up in described improved internal gate layer with the corresponding position of the pixel that comprises described special pixel transistor.

7. semiconductor radiation detector device according to claim 5, wherein, described signal charge read that circuit is suitable for measuring special pixel transistor with increase raceway groove or the relevant electrical characteristics of base width, described increase is caused by radioinduction electronics or the hole built up in described improved internal gate layer with the corresponding position of the pixel that comprises described special pixel transistor.

8. semiconductor radiation detector device according to claim 1 comprises:

-active region, it is in the part of semiconductor chip, and described active region comprises described pixel doping (111,112,506,511,512); And

-preceding side contacts (821,825,1030,1210), it is used for applying bias voltage to described semiconductor radiation detector device, described before side contacts (821,825,1030,1210) be in position between the edge of described active region and described semiconductor chip.

9. semiconductor radiation detector device according to claim 8, wherein, described preceding side contacts (821,825) comprises the groove structure that enough reaches described body layer (103).

10. semiconductor radiation detector device according to claim 9, comprise be positioned at described before a plurality of groove structures that separate (822,823,824) between side contacts (821) and the described active region.

11. semiconductor radiation detector device according to claim 1 comprises groove between pixel by mixing (115,116,515,516), described groove is suitable for unsteady or bias voltage by mix (115,116,515,516).

12. semiconductor radiation detector device according to claim 14, wherein, described groove is first conductivity type by mix (115,116,515,516), therefore presents the conduction type opposite with described pixel.

13. semiconductor radiation detector device according to claim 1 comprises floating or the MOS structure of bias voltage between pixel.

14. semiconductor radiation detector device according to claim 1 comprises:

-active region, it is in the part of semiconductor chip, and described active region comprises described pixel doping (111,112,506,511,512); And

-for the back side contacts of described back layer (102), being used for applying bias voltage to described semiconductor radiation detector device, described rear side contacts the position between the edge that is in described active region and described semiconductor chip.

15. semiconductor radiation detector device according to claim 1, comprise warpage (1510,1710,1810,3010,3210,3310) or the inboard injection of pixel doping that pixel is mixed, described warpage is extended the size that described pixel is mixed or injected towards described improved internal gate layer (104).

16. semiconductor radiation detector device according to claim 1 comprises that the part that described improved internal gate layer (104) mixes strengthens (1504).

17. semiconductor radiation detector device according to claim 1 comprises the change of mixing in described barrier layer (105).

18. semiconductor radiation detector device according to claim 5, wherein, the source electrode of FET or the emitter of bipolar transistor float.

19. semiconductor radiation detector device according to claim 5, wherein, the described unsteady source electrode of FET or the described unsteady emitter of bipolar transistor are connected to capacitor.

20. semiconductor radiation detector device according to claim 1, comprise first conductivity type that is in the active region outside or second conductivity type or first and second conductivity types both float or the described active region of additional doping (811,814,815,819,1020,1115) of bias voltage comprises the mix matrix of (111,112,506,511,512) of described pixel.

21. semiconductor radiation detector device according to claim 20 comprises being positioned at and reads and select electronic equipment in the described additional doping (811,814,815,819,1020,1115).

22. semiconductor radiation detector device according to claim 1 comprises the layer of making by injection (104,105).

23. semiconductor radiation detector device according to claim 1 comprises the layer of making by injection (506).

24. according to claim 22 or 23 or both described semiconductor radiation detector devices, wherein, to be that maskless is blank inject in described injection.

25. a method that is used to detect radiation, described method comprises:

-lip-deep a plurality of pixels (111,511) of semiconductor radiation detector device are coupled to pixel voltage;

The described semiconductor radiation detector of-usefulness radiation irradiation,

It is characterized in that described method comprises:

-will collect the local smallest point of the three-dimensional potential function that is used for described first kind electric charge from the first kind radioinduction signal charge of the body layer (103) of described semiconductor radiation detector, the position of described local smallest point is corresponding with near the pixel of improved internal gate layer (104) being arranged in described body layer (103);

And

-detection is collected into the signal charge amount with the corresponding described local smallest point of pixel (111).

26. method according to claim 25, wherein, the step that detects described signal charge amount comprises observes special pixel transistor and effective raceway groove described special pixel transistor or the relevant electrical characteristics of base stage size.

27. method according to claim 25, wherein, the step that detects described signal charge amount comprises the charge transfer relevant with pixel by a plurality of pixels and arrive read pixel, and comprises the electrical characteristics of observing described read pixel.

Images