CN101005270B - Nested transimpedance amplifier - Google Patents

Nested transimpedance amplifier Download PDF

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Publication number
CN101005270B
CN101005270B CN2007100024133A CN200710002413A CN101005270B CN 101005270 B CN101005270 B CN 101005270B CN 2007100024133 A CN2007100024133 A CN 2007100024133A CN 200710002413 A CN200710002413 A CN 200710002413A CN 101005270 B CN101005270 B CN 101005270B
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China
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homophase
input
output
phase
feedback
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CN2007100024133A
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CN101005270A (en
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塞哈特·苏塔迪嘉
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Kaiwei International Co
Marvell International Ltd
Marvell Asia Pte Ltd
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Mawier International Trade Co Ltd
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Priority claimed from US11/495,813 external-priority patent/US7551024B2/en
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Abstract

A differential transimpedance amplifier circuit comprises the following components: A first operational amplifier which includes a first inverting input, a first non-inverting input, a first inverting output and a first non-inverting output. A second operational amplifier includes a second inverting input, a second non-inverting input, a second inverting output and a second non-inverting output. The second inverting output communicates with the first non-inverting input, and the second non-inverting output communicates with the first inverting input. A first feedback element communicates with the first non-inverting input and the first inverting output. A second element communicates with the first inverting input and the first non-inverting output. A third feedback element communicates with the second inverting input and the first inverting output. And a fourth feedback element communicates with the first non-inverting input and the first non-inverting output.

Description

Nested transimpedance amplifier
Technical field
The present invention relates to transimpedance amplifier (transimpedance amplifier), relate in particular to nested transimpedance amplifier with bigger gain bandwidth product.
Background technology
Transimpedance amplifier (TIA) is a known electron-like circuit.Refer now to Fig. 1, TIA 100 comprises having gain parameter (g m) operational amplifier (opamp) 105.Opamp 105 is parallel-connected to resistor (R f) 110.The input of TIA 100 is an electric current (Δ i) 115.The output of TIA 100 is voltage (Δ v o) 120.
Refer now to Fig. 2, the opamp 105 of TIA 100 is by current source 205 and have gain-g mTransistor 210 replace.TIA 100 among Fig. 1 and Fig. 2 often is called as transconductance amplifier (transconductance amplifier), because it converts input current Δ i into output voltage Δ v o
Refer now to Fig. 3, TIA 300 is with input voltage (Δ v i) 305 convert output voltage (Δ v into o) 310.TIA 300 also comprises the resistor 315 that is connected to transistor 320.TIA 300 is generally used for requiring in the application of relatively low bandwidth.
Refer now to Fig. 4, TIA 400 is with input voltage (Δ v i) 405 convert output voltage (Δ v into o) in 410.TIA 400 comprises the 2nd opamp 415, and it is connected in series to resistor (R f) 420 with the parallel connection of opamp 425 combination.TIA 400 is generally used for bandwidth requirement than in the high application of TIA 300.
Usually, the limit of the bandwidth of TIA is the transistorized threshold frequency f that is used for opamp TCertain mark.Under the situation such as the such bipolar junction transistor (BJT) of GaAs (GaAs) transistor, the bandwidth of TIA approximates f T10%-20%.For metal-oxide semiconductor (MOS) (MOS) transistor, the bandwidth of TIA is f normally TA few percent (promptly being about 2%-6%).
Refer now to Fig. 5, TIA 500 can be configured to utilize two inputs of each opamp 502 and 504 to work differentially.Input 505 is served as reference with the ground or the mode on virtual ground that are similar among the standard configuration TIA.Input voltage Δ v iWith output voltage Δ v oBe measured as with reference to the voltage difference between input 505 and second input 510. Feedback resistor 514 and 516 is connected across in the input and output of opamp 504.
Refer now to Fig. 6, it is the TIA application of optical sensor that a kind of TIA with higher relatively bandwidth requirement uses.Optical sensor circuit 600 comprises the opamp 105 and resistor 110 of the TIA 100 that is coupled with photodiode 605.The output of photodiode 605 is electric current I Photo610, it serves as the input of TIA 100.
Use and require high bandwidth and high-gain more and more simultaneously.Example comprises such as the such optical sensor of fiber optic receiver, and the preamplifier write device that is used for high speed hard disk drives.
Summary of the invention
A kind of nested transimpedance amplifier (TIA) circuit comprises: have the zeroth order TIA of input and output, and first operational amplifier (opamp).This opamp comprises: with the input of the said output communication of said zeroth order TIA; By the first transistor of said input driving; The transistor seconds that is driven and communicate by letter by first bias voltage with said the first transistor; First current source of communicating by letter, and the output that is in the node place between the first transistor and the transistor seconds with said transistor seconds.
In other characteristics, second current source is communicated by letter with the first transistor.The gain of opamp is greater than the gain of zeroth order TIA.The bandwidth of opamp is less than the bandwidth of zeroth order TIA.
In other characteristics, zeroth order TIA comprises: comprise an opamp of first input and first output, and the 2nd opamp that comprises second input and second output.Second input and first output communication.Resistance comprise with an end of second output communication and with second end of second input communication.
A kind of nested differential mode transimpedance amplifier (TIA) circuit comprises: have the zeroth order differential mode TIA of first and second inputs and first and second outputs, and the first differential mode operational amplifier (opamp).This opamp comprises: with the input of corresponding output communication in the said output of said zeroth order differential mode TIA; By the first transistor of the said first input driving; By the transistor seconds of the said second input driving; The 3rd transistor that is driven and communicate by letter with said the first transistor by first bias voltage is by the 4th transistor that first bias voltage drives and communicates by letter with said transistor seconds, first current source of communicating by letter with said the 3rd transistor; First current source of communicating by letter with said the 4th transistor, and be between the first transistor and the 3rd transistor and the corresponding junction between transistor seconds and the 4th transistor first and second output.
In other characteristics, this nested differential mode TIA circuit comprises the 3rd current source of communicating by letter with transistor seconds with the first transistor.The gain of the first differential mode opamp is greater than the gain of zeroth order differential mode TIA.The bandwidth of the first differential mode opamp is less than the bandwidth of zeroth order differential mode TIA.
In other characteristics, this zeroth order differential mode TIA comprises: comprise the second differential mode opamp of input and output, and the 3rd differential mode opamp that comprises input and output.The corresponding output communication of the input of the 3rd differential mode opamp and the said second differential mode opamp.Resistance comprises first end and second end.The corresponding input and output communication of first and second ends and the 3rd differential mode opamp.
A kind of nested differential mode transimpedance amplifier (TIA) circuit comprises: have the zeroth order differential mode TIA of first and second inputs and first and second outputs, and the differential mode push-pull type opamp with first and second inputs and first and second outputs.Corresponding output communication during first and second inputs are exported with said first and second of said zeroth order differential mode TIA.
In other characteristics, the gain of differential mode push-pull type opamp is greater than the gain of zeroth order differential mode TIA, and the bandwidth of differential mode push-pull type opamp is less than the bandwidth of zeroth order differential mode TIA.
In other characteristics, this zeroth order differential mode TIA comprises: comprise the second differential mode opamp of input and output, and the 3rd differential mode opamp that comprises input and output.The corresponding output communication of the input of the 3rd differential mode opamp and the second differential mode opamp.Resistance comprises first end and second end.The corresponding input and output communication of first and second ends and the 3rd differential mode opamp.
A kind of nested transimpedance amplifier (TIA) circuit comprises: the zeroth order TIA with input and output; Have output and with first operational amplifier (opamp) of the input of the said output communication of said zeroth order TIA; Be used for applying first power supply input of first voltage to zeroth order TIA, and the second source input that is used to receive second voltage.The charge pump module forms tertiary voltage based on first voltage and second voltage.Tertiary voltage is applied to this opamp.
In other characteristics, this zeroth order TIA comprises: comprise an opamp of first input and first output, and the 2nd opamp that comprises second input and second output.Second input and first output communication.Resistance comprise with an end of second output communication and with second end of second input communication.
In other characteristics, voltage regulator is regulated second voltage.Light-emitting diode and opamp output communication.First voltage is greater than second voltage.Tertiary voltage approximate first voltage and second voltage with.First voltage otherwise be applied to analog circuit, and second voltage otherwise be applied to digital circuit.First voltage at about 2.5V between the 3.3V.Second voltage is about 1.2V.
A kind of differential transimpedance amplifier circuit comprises: first operational amplifier with first anti-phase input, the input of first homophase, first anti-phase output and the output of first homophase; Second operational amplifier with second anti-phase input, the input of second homophase, second anti-phase output and the output of second homophase, wherein second anti-phase output and the first homophase input communication, and the output of second homophase and the first anti-phase input communication; First feedback element with the input of first homophase and the first anti-phase output communication; Second feedback element with first anti-phase input and the first homophase output communication; The 3rd feedback element with second anti-phase input and the first anti-phase output communication; And with the 4th feedback element of first homophase input and the first homophase output communication.
In other characteristics, third and fourth feedback element comprises first and second resistance respectively.Third and fourth feedback element comprises first and second electric capacity respectively.First and second feedback elements comprise first and second resistance respectively.First and second feedback elements comprise first and second electric capacity respectively.First and second feedback elements comprise first resistance of connecting with the inductance and second resistance separately, and the said inductance and second resistance are parallelly connected with electric capacity.This electric capacity comprises variable capacitance.First and second feedback elements comprise and the electric capacity parallel resistor separately.This electric capacity comprises variable capacitance.
In other characteristics, first and second feedback elements comprise first resistance of connecting with inductance separately, and said first resistance and inductance are parallelly connected with the electric capacity and second resistance.This electric capacity comprises variable capacitance.First and second operational amplifiers are transconductance amplifiers.
In other characteristics, integrator comprises this differential transimpedance amplifier.
A kind of single nested transimpedance amplifier circuit comprises: the 3rd operational amplifier with the 3rd anti-phase input, the input of the 3rd homophase, the 3rd anti-phase output and the output of the 3rd homophase; And this differential transimpedance amplifier circuit.Second anti-phase input and the 3rd homophase output communication, and input of second homophase and the 3rd anti-phase output communication.
A kind of pair of nested transimpedance amplifier circuit comprises: single nested transimpedance amplifier circuit; And four-operational amplifier with the 4th anti-phase input, the input of the 4th homophase, the 4th anti-phase output and the output of the 4th homophase.The 4th anti-phase output and the 3rd homophase output communication, and output of the 4th homophase and the 3rd anti-phase input communication.
In other characteristics, the 5th feedback element and the 4th anti-phase output and the first anti-phase output communication.The 6th feedback element and the output of the 4th homophase and the first homophase output communication.The the 5th and the 6th feedback element comprises first and second resistance respectively.The the 5th and the 6th feedback element comprises first and second electric capacity.
A kind of Sigma-Delta analog to digital converter comprises this differential transimpedance amplifier.This Sigma-Delta analog to digital converter comprises: the differential amplifier module that comprises the input of a receiving inputted signal; Integrator module with the output communication of differential amplifier module; Receive the comparator module of the output of integrator module; And with the digital to analog converter module of another input communication of the output of comparator module and differential amplifier module.
In other characteristics, filter and the output of selecting module reception comparator module.In differential amplifier module, integrator module and the comparator module at least one comprises this differential transimpedance amplifier.
A kind of differential transimpedance amplifier circuit comprises: first amplifying device that is used to amplify with first anti-phase input, the input of first homophase, first anti-phase output and the output of first homophase; Second amplifying device that is used to amplify with second anti-phase input, the input of second homophase, second anti-phase output and the output of second homophase, wherein second anti-phase output and the first homophase input communication, and the output of second homophase and the first anti-phase input communication; First feedback device that is used to provide feedback with the input of first homophase and the first anti-phase output communication; Second feedback device that is used to provide feedback with first anti-phase input and the first homophase output communication; The 3rd feedback device that is used to provide feedback with second anti-phase input and the first anti-phase output communication; And with the 4th feedback device that is used to provide feedback of first homophase input and the first homophase output communication.
In other characteristics, third and fourth feedback device comprises first and second resistance devices that are used to provide resistance respectively.Third and fourth feedback device comprises first and second capacitive means that are used to provide electric capacity respectively.First and second feedback devices comprise first and second resistance devices that are used to provide resistance respectively.First and second feedback devices comprise first and second capacitive means that are used to provide electric capacity respectively.First and second feedback devices comprise first resistance device that is used to provide resistance of connecting with inductance device that is used to provide inductance and second resistance device that is used to provide resistance separately, the said inductance device and second resistance device be used to provide the capacitive means of electric capacity parallelly connected.This capacitive means provides variable capacitance.First and second feedback devices comprise the resistance device that resistance is provided with parallelly connected being used to of capacitive means that is used to provide electric capacity separately.This capacitive means provides variable capacitance.First and second feedback devices comprise first resistance device that is used to provide resistance of connecting with the inductance device that is used to provide inductance separately, said first resistance device and inductance device and the capacitive means that is used to provide electric capacity be used to provide second resistance device of resistance parallelly connected.This capacitive means provides variable capacitance.First and second amplifying devices comprise the transconductance amplifier.
A kind of single nested transimpedance amplifier circuit comprises: the 3rd amplifying device that is used to amplify with the 3rd anti-phase input, the input of the 3rd homophase, the 3rd anti-phase output and the output of the 3rd homophase; And this differential transimpedance amplifier circuit.Second anti-phase input and the 3rd homophase output communication, and input of second homophase and the 3rd anti-phase output communication.
A kind of pair of nested transimpedance amplifier circuit comprises: single nested transimpedance amplifier circuit; And the 4th amplifying device that is used to amplify with the 4th anti-phase input, the input of the 4th homophase, the 4th anti-phase output and the output of the 4th homophase.The 4th anti-phase output and the 3rd homophase output communication, and output of the 4th homophase and the 3rd anti-phase input communication.
In other characteristics, be used to provide the 5th feedback device and the 4th anti-phase output and the first anti-phase output communication of feedback.Be used to provide the 6th feedback device and the output of the 4th homophase and the first homophase output communication of feedback.The the 5th and the 6th feedback device comprises first and second resistance devices that are used to provide resistance respectively.
A kind of Sigma-Delta analog to digital converter comprises this differential transimpedance amplifier.This Sigma-Delta analog to digital converter comprises: the differential amplifier device that is used to amplify that comprises the input of a receiving inputted signal; The integrator arrangement that is used for integration with the output communication of differential amplifier device; Receive the comparator device that is used for comparison of the output of integrator arrangement; And with the digital-to-analogue conversion apparatus that is used to change of another input communication of the output of comparator device and differential amplifier device.
In other characteristics, be used for filtering and filter of selecting and the output of selecting device reception comparator device.In differential amplifier device, integrator arrangement and the comparator device at least one comprises this differential transimpedance amplifier.
A kind of differential transimpedance amplifier circuit comprises: first operational amplifier with first anti-phase input, the input of first homophase, first anti-phase output and the output of first homophase; Second operational amplifier with second anti-phase input, the input of second homophase, second anti-phase output and the output of second homophase, wherein second anti-phase output and the first homophase input communication, and the output of second homophase and the first anti-phase input communication; The 3rd operational amplifier with the 3rd anti-phase input, the input of the 3rd homophase, the 3rd anti-phase output and the output of the 3rd homophase; Wherein second anti-phase input and the 3rd homophase output communication, and input of second homophase and the 3rd anti-phase output communication; Four-operational amplifier with the 4th anti-phase input, the input of the 4th homophase, the 4th anti-phase output and the output of the 4th homophase with, wherein the 4th anti-phase output and the 3rd homophase output communication, and output of the 4th homophase and the 3rd anti-phase input communication; First feedback element with the input of second homophase and the second anti-phase output communication; Second feedback element with second anti-phase input and the second homophase output communication; The 3rd feedback element with the input of the 3rd homophase and the first anti-phase output communication; The 4th feedback element with the 3rd anti-phase input and the first homophase output communication; The 5th feedback element with the 4th anti-phase input and the first anti-phase output communication; And with the 6th feedback element of the 4th homophase output and the first homophase output communication.
In other characteristics, first and second feedback elements comprise first and second resistance respectively.Third and fourth feedback element comprises first and second resistance respectively.The the 5th and the 6th feedback element comprises first and second resistance respectively.
A kind of Sigma-Delta analog to digital converter comprises this differential transimpedance amplifier.This Sigma-Delta analog to digital converter comprises: the differential amplifier module that comprises the input of a receiving inputted signal; Integrator module with the output communication of differential amplifier module; Receive the comparator module of the output of integrator module; And with the digital to analog converter module of another input communication of the output of comparator module and differential amplifier module.
In other characteristics, filter and the output of selecting module reception comparator module.In differential amplifier module, integrator module and the comparator module at least one comprises this differential transimpedance amplifier.
A kind of differential transimpedance amplifier circuit comprises: first amplifying device that is used to amplify with first anti-phase input, the input of first homophase, first anti-phase output and the output of first homophase; Second amplifying device that is used to amplify with second anti-phase input, the input of second homophase, second anti-phase output and the output of second homophase, wherein second anti-phase output and the first homophase input communication, and the output of second homophase and the first anti-phase input communication; The 3rd amplifying device that is used to amplify with the 3rd anti-phase input, the input of the 3rd homophase, the 3rd anti-phase output and the output of the 3rd homophase; Wherein second anti-phase input and the 3rd homophase output communication, and input of second homophase and the 3rd anti-phase output communication; The 4th amplifying device that is used to amplify with the 4th anti-phase input, the input of the 4th homophase, the 4th anti-phase output and the output of the 4th homophase with, wherein the 4th anti-phase output and the 3rd homophase output communication, and output of the 4th homophase and the 3rd anti-phase input communication; First feedback device that is used to provide feedback with the input of second homophase and the second anti-phase output communication; Second feedback device that is used to provide feedback with second anti-phase input and the second homophase output communication; The 3rd feedback device that is used to provide feedback with the input of the 3rd homophase and the first anti-phase output communication; The 4th feedback device that is used to provide feedback with the 3rd anti-phase input and the first homophase output communication; The 5th feedback device that is used to provide feedback with the 4th anti-phase input and the first anti-phase output communication; And with the 6th feedback device that is used to provide feedback of the 4th homophase output and the first homophase output communication.
In other characteristics, first and second feedback devices comprise first and second resistance devices that are used to provide resistance respectively.Third and fourth feedback device comprises first and second resistance devices that are used to provide resistance respectively.The the 5th and the 6th feedback device comprises first and second resistance devices that are used to provide resistance respectively.
A kind of Sigma-Delta analog to digital converter comprises this differential transimpedance amplifier.This Sigma-Delta analog to digital converter comprises: the differential amplifier device that is used to amplify that comprises the input of a receiving inputted signal; The integrator arrangement that is used for integration with the output communication of differential amplifier device; Receive the comparator device that is used for comparison of the output of integrator arrangement; And with the digital-to-analogue conversion apparatus that is used to change of another input communication of the output of comparator device and differential amplifier device.
In other characteristics, be used for filtering and filter of selecting and the output of selecting device reception comparator device.In differential amplifier device, integrator arrangement and the comparator device at least one comprises this differential transimpedance amplifier.
A kind of transimpedance amplifier comprises first operational amplifier with input and output.Second operational amplifier have input and with the output of the input communication of first operational amplifier.First feedback element have with an end of the input communication of first operational amplifier and with the other end of the output communication of first operational amplifier, wherein first feedback element comprises first electric capacity.Second feedback element have with an end of the input communication of first operational amplifier and with the other end of the output communication of first operational amplifier.
In other characteristics, second feedback element comprises first resistance.First electric capacity comprises variable capacitance.First feedback element comprises first resistance parallelly connected with first electric capacity.Second feedback element comprises first resistance of connecting with first inductance.First electric capacity comprises variable capacitance.First resistance have the end of communicating by letter with the other end of first and second feedback elements and with the other end of the output communication of second operational amplifier.First feedback element also comprises first resistance with first capacitances in series, and second feedback element comprises first inductance parallelly connected with second resistance.A kind of differential transimpedance amplifier comprises this transimpedance amplifier.
A kind of Sigma-Delta modulus amplifier comprises this differential transimpedance amplifier.This Sigma-Delta analog to digital converter comprises: the differential amplifier module that comprises the input of a receiving inputted signal; Integrator module with the output communication of differential amplifier module; Receive the comparator module of the output of integrator module; And with the digital to analog converter module of another input communication of the output of comparator module and differential amplifier module.
In other characteristics, filter and the output of selecting module reception comparator module.In differential amplifier module, integrator module and the comparator module at least one comprises this differential transimpedance amplifier.
A kind of transimpedance amplifier comprises first amplifying device that is used to amplify with input and output.Second amplifying device that is used to amplify have input and with the output of the input communication of first amplifying device.Be used to provide first feedback device of feedback have with an end of the input communication of first amplifying device and with the other end of the output communication of first amplifying device.First feedback device comprises first capacitive means that is used to provide electric capacity.Be used to provide second feedback device of feedback have with an end of the input communication of first amplifying device and with the other end of the output communication of first amplifying device.
In other characteristics, second feedback device comprises first resistance device that is used to provide resistance.First capacitive means comprises the variable capacity device that is used to provide variable capacitance.First feedback device comprises first resistance device that resistance is provided with parallelly connected being used to of first capacitive means.Second feedback device comprises first resistance device that is used to provide resistance of connecting with first inductance device that is used to provide inductance.First capacitive means comprises the variable capacity device that is used to provide variable capacitance.An end that is used to provide first resistance device of resistance to have to communicate by letter with the other end of first and second feedback devices and with the other end of the output communication of second amplifying device.First feedback device also comprises first resistance device that is used to provide resistance of connecting with first capacitive means, and second feedback device comprises first inductance device that inductance is provided with parallelly connected being used to of second resistance device that is used to provide resistance.A kind of differential transimpedance amplifier comprises this transimpedance amplifier.
A kind of Sigma-Delta modulus amplifier comprises this differential transimpedance amplifier.This Sigma-Delta analog to digital converter comprises: the differential amplifier device that is used to amplify that comprises the input of a receiving inputted signal; The integrator arrangement that is used for integration with the output communication of differential amplifier device; Receive the comparator device that is used for comparison of the output of integrator arrangement; And with the digital-to-analogue conversion apparatus that is used to change of another input communication of the output of comparator device and differential amplifier device.
In other characteristics, filter and the output of selecting device reception comparator device.In differential amplifier device, integrator arrangement and the comparator device at least one comprises this differential transimpedance amplifier.
Other applications of the present invention will display from the following detailed description that provides.Indicate the preferred embodiments of the present invention though should be appreciated that detailed description and particular example, only desire to be used for explanation, and desire has not limited scope of the present invention.
Description of drawings
From detailed description and accompanying drawing, can more fully understand the present invention, in the accompanying drawing:
Fig. 1 and Fig. 2 are according to the electric current of the prior art basic circuit architecture to voltage TIA;
Fig. 3 and Fig. 4 are according to the voltage of the prior art basic circuit architecture to voltage TIA;
Fig. 5 is the basic circuit architecture according to the differential configuration of the TIA of prior art;
Fig. 6 illustrates the optical sensor that is coupled to the photodiode of TIA according to comprising of prior art;
Fig. 7 is the nested TIA of single order according to the present invention;
Fig. 8 is the nested TIA of second order according to the present invention;
Fig. 9 is according to the nested TIA in n of the present invention rank;
Figure 10 is according to the nested TIA of the single order of differential configuration of the present invention;
Figure 11 is the nested TIA in n rank according to differential configuration of the present invention;
Figure 12 is the figure of the exemplary gain bandwidth characteristic of TIA;
Figure 13 is the figure of the exemplary gain bandwidth characteristic of the nested TIA of single order;
Figure 14 is the figure of the exemplary gain bandwidth characteristic of the nested TIA of second order;
Figure 15 is the nested TIA of single order that has the capacitive cancellation of input parasitic capacitance according to of the present invention;
Figure 16 is the nested TIA of second order that has the capacitive cancellation of input parasitic capacitance according to of the present invention;
Figure 17 is the nested TIA in n rank that has the capacitive cancellation of input parasitic capacitance according to of the present invention;
Figure 18 is the nested TIA of single order that has the differential configuration of the capacitive cancellation of importing parasitic capacitance according to of the present invention;
Figure 19 is the nested TIA of second order that has the differential configuration of the capacitive cancellation of importing parasitic capacitance according to of the present invention;
Figure 20 illustrates the nested TIA of single order of the Fig. 7 with additional feedback resistance;
Figure 21 illustrates the nested TIA of second order of the Fig. 7 with additional feedback resistance;
Figure 22 illustrates the nested TIA of single order of the Figure 15 with additional feedback resistance;
Figure 23 illustrates the nested TIA of single order of the Fig. 7 with additional input electric capacity, feedback capacity and feedback resistance;
Figure 24 illustrates the single order differential mode TIA of the Figure 10 with additional input electric capacity, feedback capacity and feedback resistance;
Figure 25 illustrates and comprises the exemplary disc drive system that has according to the preamplifier of nested TIA of the present invention;
Figure 26 illustrates the nested TIA of single order of Fig. 7 of the opamp that comprises first configuration;
Figure 27 illustrates the nested TIA of differential single order of Figure 10 of the differential opamp that comprises first configuration;
Figure 28 illustrates the nested TIA of single order of Figure 26 of the opamp that comprises second configuration;
Figure 29 illustrates the nested TIA of differential single order of Figure 27 of the differential opamp that comprises second configuration;
Figure 30 illustrate comprise the differential opamp that recommends configuration the nested TIA of differential single order of Figure 10;
Figure 31-33 illustrates the first order and the partial gain curve family of nested TIA;
Figure 34 illustrates the functional block diagram of the power supply of nested TIA;
Figure 35 illustrates the exemplary L ED drive circuit of the power supply that uses Figure 34;
Figure 36 is the rough schematic view of differential single nested transimpedance amplifier according to an aspect of the present invention;
Figure 37 is the rough schematic view of differential and double nested transimpedance amplifier according to a second embodiment of the present invention;
Figure 38 is the rough schematic view of the nested differential amplifier of a third embodiment in accordance with the invention;
Figure 39 A and Figure 39 B are the sketch mapes that in feedback loop, has the differential and single-ended transimpedance amplifier of compensation condenser respectively;
Figure 40 A and Figure 40 B are the sketch mapes that has the differential and single-ended nested transimpedance amplifier of LC accumulator respectively;
Figure 41 A and Figure 41 B are the sketch mapes that in feedback loop, has the differential and single-ended transimpedance amplifier of LC accumulator and resistor according to the present invention respectively;
Figure 42 is the sketch map of alternative embodiment with transimpedance amplifier of LC accumulator;
Figure 43 A is the functional block diagram of hard disk drive;
Figure 43 B is the functional block diagram of digital versatile disc (DVD);
Figure 43 C is the functional block diagram of high definition TV;
Figure 43 D is the functional block diagram of vehicle control system;
Figure 43 E is cellular functional block diagram;
Figure 43 F is the functional block diagram of STB;
Figure 43 G is the functional block diagram of media player; And
Figure 44 is the functional block diagram of Delta-Sigma analog to digital converter (ADC).
Embodiment
Following description of preferred embodiments is exemplary, and is not intended to limit the present invention, its application or use.
The invention solves the demand of the gain bandwidth product that increases TIA.The raising of gain bandwidth product realizes with another TIA is nested through making one " TIA ".In other words, the additional circuit components such as feedback resistor, capacitor and/or opamp is added to input side and/or the output side of TIA.In Figure 15-17, the capacitive cancellation of input parasitic capacitance is provided.In Figure 20-24, additional feedback resistance is provided.In Figure 23 and Figure 24, input and/or feedback capacity are provided.
Refer now to Fig. 7, Fig. 8 and Fig. 9, constructed " nested " TIA through adding opamp, feedback resistor and/or capacitor to zeroth order TIA.In Figure 10 and Figure 11, can also construct the nested TIA that is operated in differential mode.
Refer now to Fig. 7, wherein show the nested TIA 700 of single order.Label from Fig. 4 is used among Fig. 7 with the sign similar elements.TIA 700 comprises traditional T IA 705 (also to be referred to as " zeroth order " TIA here), opamp 710 and feedback resistor 715.Feedback resistor 715 can be the fixed value resistor of standard, non-linear variable resistance or MOS resistor.Capacitor 720 also is connected between the input and ground (or virtual ground) of TIA 700.
Through nested TIA by this way, can realize the raising of gain bandwidth product.For example, use the nested TIA 700 of single order of MOS transistor can realize reaching threshold frequency f TThe bandwidth of 10%-20%.This scope has been represented the bandwidth bigger five to ten times than the bandwidth of corresponding zeroth order TIA.
Refer now to Figure 12 and Figure 13, wherein show the figure line of the characteristic gain bandwidth curve of diagram zeroth order TIA and the nested TIA of single order.In general, the gain of high value is associated with bandwidth than low value, is associated with the bandwidth of high value than the gain of low value.Be defined as output voltage Δ v oDivided by input voltage Δ v iGain A normally hundreds of or several thousand magnitudes (promptly approximate 10 2-10 3).0.13 the threshold frequency (f of μ mCMOS technology T) typical range be 30GHz-40GHz.
In Figure 12, show three illustrative properties curves.High-gain values produces the bandwidth value of about 1GHz.The medium gain value produces the bandwidth of about 2GHz.The gain of other values and bandwidth also are possible.For example, TIA can have and is higher than peaked characteristic yield value shown in Figure 12 and less than the bandwidth of 1GHz.TIA can have the characteristic yield value that is lower than minimum value shown in Figure 12 and greater than the bandwidth of 2GHz.Can recognize that bandwidth changes by the contrafunctional mode of gain.This function can be called as " expansion ".Use the ratio of the TIA of MOS transistor to use the expansion of bipolar junction transistor to want big.Thereby the demand that MOS transistor improves the TIA bandwidth performance is stronger than BJT transistor.
Example bandwidth shown in Figure 12 is worth unqualified bandwidth upper and lower bound.In many practical applications, the bandwidth of 1GHz or 2GHK magnitude is too low.Bandwidth such as the so many application requirements 10GHz magnitudes of OC 192 fibre optic receivers.The preamplifier of high speed hard disk drives also requires the bandwidth of a few GHz magnitudes usually.Refer now to Figure 13, the nested TIA of single order that is in the typical gains value can have the bandwidth of about 10GHz.
Refer now to Fig. 8, the nested TIA 800 of second order is structured on the nested TIA 700 of single order.Label from Fig. 4 and Fig. 7 is used among Fig. 8 with the sign similar elements.The nested TIA 800 of second order comprises the opamp 805 of input place that is in the nested TIA 700 of single order and the opamp 810 of output place that is in the nested TIA 700 of single order.Also added the additional feedback resistor 815 in the output of the input that is connected across opamp 805 and opamp 810.The exemplary gain bandwidth curve that uses nested TIA 800 generations of second order is shown in Figure 14.For the typical gains value, can realize the bandwidth of about 20GHz.
Refer now to Fig. 9,, can construct the more nested TIA of high-order through adding additional opamp and feedback resistor.Label from Fig. 4, Fig. 7 and Fig. 8 is used among Fig. 9 with the sign similar elements.For example, the nested TIA 900 in three rank comprises opamp 905 and 910 and feedback resistor 915.Through repeating gain or the bandwidth that technology of the present invention can realize higher value (or both).But because the power dissipation of parasitic noise and increase, circuit efficiency reduces along with adding additional nested rank.In general, nested TIA of single order or the nested TIA of second order will provide sufficient performance usually.
Refer now to Figure 10, wherein show the nested TIA 1000 of differential mode single order.Label from Fig. 5 is used among Figure 10 with the sign similar elements.Opamp 1002 is connected to the output of opamp 504. Feedback resistor 1006 and 1008 is connected to the input of differential mode TIA 500 and the output of opamp 1002.The gain bandwidth product of TIA has increased.
Refer now to Figure 11, constructed the nested TIA 1100 in differential mode n rank with the mode of the nested TIA in n rank that is similar to Fig. 9.Label from Fig. 5 and Figure 10 is used among Figure 11 with the sign similar elements.Connect additional opamp 1104 and 1108 and feedback resistor 1112 and 1114 with mode similarly.Gain bandwidth characteristic and the gain bandwidth characteristic shown in Figure 12-14 of differential mode TIA are similar basically.
Notice that the opamp that is used for nested TIA can adopt bipolar junction transistor (BJT) (for example GaAs (GaAs) transistor) or metal-oxide semiconductor (MOS) (MOS) transistor (for example CMOS or BICMOS transistor).From the actual consideration such as easy manufacturing and power consumption characteristics are better, the preferred embodiments of the present invention use MOS transistor.
Refer now to Figure 15, wherein show and have additional feedback capacity C 1The nested TIA700 of single order, this additional feedback capacitor C 1Basically offset the input capacitance C of input place of opamp 415 P1Effect.Feedback capacity C 1Have with first end of the input communication of opamp 415 and with second end of the output communication of opamp425.
Refer now to Figure 16, wherein show and have additional feedback capacity C 1And C 2The nested TIA 800 of second order of Fig. 8, these two additional feedback capacitor C 1And C 2Basically offset the input capacitance C of input place of opamp 415 and 805 respectively P1And C P2Effect.Feedback capacity C 1Have with first end of the input communication of opamp415 and with second end of the output communication of opamp 425.Feedback capacity C 2Have with first end of the input communication of opamp 805 and with second end of the output communication of opamp 710.
Refer now to Figure 17, wherein show and have additional feedback capacity C 1, C 2... and C NThe nested TIA in n rank of Fig. 9, these additional feedback capacitor C 1, C 2... and C NBasically offset the input capacitance C of input place of opamp 415,805 and 905 respectively P1, C P2... and C PNEffect.Feedback capacity C 1Have with first end of the input communication of opamp 415 and with second end of the output communication of opamp 425.Feedback capacity C 2Have with first end of the input communication of opamp 805 and with second end of the output communication of opamp 710.Feedback capacity C NHave with first end of the input communication of opamp 905 and with second end of the output communication of opamp 810.
Refer now to Figure 18, wherein show and have additional feedback condenser C 1AAnd C 1BThe nested differential mode TIA 1000 of single order, these two additional feedback capacitor C 1AAnd C 1BBasically offset the input parasitic capacitance C of input place of differential mode opamp 502 respectively P1And C P2Effect.Feedback capacity C 1AHave with first end of the input communication of differential mode opamp 502 and with second end of the output communication of differential mode opamp 504.In Figure 19, in a similar fashion, additional capacitor C 2AAnd C 2BBe added to the nested differential mode TIA of second order to offset parasitic capacitance C P2AAnd C P2BMore the circuit of high-order uses similar method.
Refer now to Figure 20, wherein show the nested TIA of single order of the Fig. 7 with additional feedback resistance 2010.Feedback resistance 2010 has first end with the input communication of opamp 710.Second end of resistance 2010 and the output communication of opamp 710.
Refer now to Figure 21, wherein show the nested TIA of second order of the Fig. 8 with additional feedback resistance 2110.Feedback resistance 2110 has first end with the input communication of opamp 810.Second end of resistance 2110 and the output communication of opamp 810.
Refer now to Figure 22, wherein show the nested TIA of single order of the Figure 15 with additional feedback resistance 2210.Feedback resistance 2210 has first end with the input communication of opamp 710.Second end of resistance 2210 and the output communication of opamp 710.
Refer now to Figure 23, wherein show and have input capacitance C IN, feedback capacity C FBThe nested TIA of single order with Fig. 7 of feedback resistance 2310.Input capacitance C INHave for first end of nested TIA 700 receiving inputted signals and with second end of the input communication of opamp 415.Feedback capacity C FBHave first end and second end of communicating by letter with an end of resistance 715 with the input communication of opamp 415.
Additional feedback resistance, input capacitance and/or feedback capacity also can be added to the nested TIA of differential mode.Refer now to Figure 24, wherein show and have the first and second input capacitance C IN1And C IN2, the first and second feedback capacity C FB1And C FB2And the nested TIA of single order differential mode of feedback resistance 2410 and Figure 10 of 2412.Input capacitance C IN1And C IN2Have for first end of nested differential mode TIA receiving inputted signal and with second end of the input communication of opamp 502.Feedback capacity C FB1And C FB2Have and first end of the input communication of opamp 502 and second end of communicating by letter with 1008 first end with resistance 1006 respectively.First and second feedback resistances 2410 and 2412 have first end and second end that is connected to the output of differential mode opamp 1002 of the input of being connected to.
Can recognize, feedback capacity (Figure 15-19), feedback resistance (Figure 20-24) and input and feedback capacity (Figure 23 and Figure 24) can by any combination be used for single order, second order ... or on nested TIA in n rank and/or the differential mode TIA.
Refer now to Figure 25, wherein show exemplary disc driving system 2500, this disc driving system 2500 comprises that the dish of writing disk drive 2514 drives write circuit 2510.Dish drive reading circuit 2516 comprise have realize in a manner described be designated 2520 nested TIA or the pre-amplification circuit 2518 of nested differential mode TIA.
Refer now to Figure 26, wherein show the nested TIA 700 of single order of the Fig. 7 that comprises that first of opamp 710 realizes.Opamp 710 comprises the first transistor 2600 of connecting with transistor seconds 2602.The grid of the first transistor 2600 is driven by the output of zeroth order TIA 705.The grid of transistor seconds 2602 is biased voltage V BDrive.The node that links to each other with the drain electrode of transistor seconds 2602 at the source electrode with the first transistor 2600 is obtained the signal output of TIA 700.First current source 2604 draws electric current from the source electrode of transistor seconds 2602.Drain voltage V capable of using Dd2Be opamp 710 power supplies.Power supply option is more described in detail hereinafter.
Refer now to Figure 27, wherein show the nested TIA 1000 of differential mode single order of the Figure 10 that comprises that first of opamp 1002 realizes.Opamp 1002 comprises the first transistor 2700 of communicating by letter with transistor seconds 2702.The grid of the first transistor 2700 is driven by the output of differential zeroth order TIA 500.The grid of transistor seconds 2702 is biased voltage V BDrive.The node that links to each other with the drain electrode of transistor seconds 2702 at the source electrode with the first transistor 2700 is obtained first signal output of TIA 1000.First current source 2704 draws electric current from the source electrode of transistor seconds 2702.
The 3rd transistor 2706 is communicated by letter with the 4th transistor 2708.The grid of the 3rd transistor 2706 is driven by another output of differential zeroth order TIA 500.The grid of the 4th transistor 2708 is by V BDrive.The node that links to each other with the drain electrode of the 4th transistor 2708 at the source electrode with the 3rd transistor 2706 is obtained the secondary signal output of TIA 1000.Second current source 2710 draws electric current from the source electrode of transistor seconds 2702.Drain voltage V capable of using Dd2Be opamp 1002 power supplies.Power supply option is more described in detail hereinafter.Stride the first and the 3rd transistor 2700,2706 separately the first and second signal outputs at source electrode place obtain differential wave output.
Refer now to Figure 28, wherein show the nested TIA 700 of single order of the Figure 26 that comprises that second of opamp 710 realizes.Second realization comprises that the drain electrode to the first transistor 2600 provides second current source 2610 of electric current.Second current source 2610 is from V Dd2Draw electric current.
Refer now to Figure 29, wherein show the nested TIA 1000 of differential mode single order of the Figure 27 that comprises that second of opamp 1002 realizes.Second realization comprises that the drain electrode to the first transistor 2700 and the 3rd transistor 2706 provides the 3rd current source 2712 of electric current.The 3rd current source 2712 is from V Dd2Draw electric current.
Refer now to Figure 30, wherein show the nested TIA 1000 of differential mode single order of the Figure 10 that comprises that the 3rd of opamp 1002 realizes.Opamp 1002 comprises the configuration of recommending as shown in the figure.Opamp 1002 receives positive bias voltage V BPWith negative bias voltage V BNCross-node V Out+And V Out-Obtain differential output signal.
Refer now to Figure 31-33, wherein show gain curve family.Gain curve is represented the typical gains pattern of the nested TIA of aforesaid various single orders.The logarithm vertical axis of each figure line is represented gain A=V Out/ V InThe logarithm trunnion axis representation signal frequency of each figure line.The figure line of Figure 31 is represented the gain curve 3100 of various opamp.Come compared with zeroth order TIA, opamp provides lower gain and higher bandwidth.The opamp gain is roll-offed with the speed of 20dB/ ten octaves.
The figure line of Figure 32 has been represented the gain curve family 3200 of various TIA.Gain curve 3200 with minimum bandwidth is corresponding to zeroth order TIA.Gain curve 3200 with high bandwidth more is corresponding to the increasingly high TIA of nested degree.Compare with opamp, TIA generally provides higher gain and Medium-bandwidth.Zeroth order TIA gain is roll-offed with the speed of 20dB/ ten octaves.
The figure line of Figure 33 is represented the gain curve family 3300 of the nested TIA of various single orders.Gain is relatively flat at the low-limit frequency place.Because the enhancement effect of opamp shown in Figure 31 roll-offs with the speed of 20dB/ ten octaves along with frequency increases gain.Because the combined effect of opamp and selected zeroth order TIA roll-offs with the speed of 40dB/ ten octaves along with frequency continues to increase gain.
Refer now to Figure 34, wherein show the functional block diagram of the power supply layout of the nested TIA of single order.Power supply is arranged as the TIA chip three unique voltage levels is provided, although it be two voltages with provide outside and be connected.Though Figure 34 shows the power supply of the nested TIA 700 of the single order that is connected to Fig. 7, those skilled in the art will appreciate that this power supply also can use with the nested TIA of other single-ended and differential single orders.Analog power V DdaOne of be connected with the outside and be associated and electric power be provided to zeroth order TIA.In certain embodiments, V DdaBe in about 2.5V between the 3.3V.
Analog power V DdaAlso electric power is provided to charge pump module 3400.Charge pump module 3400 also receives from digital power V DddElectric power.V DddJoin with the second outside join dependency during the outside is connected.Can the nested TIA with single order of charge pump module 3400 be processed on the same chip.In certain embodiments, V DddBe about 1.2V.In certain embodiments, V DddBefore being applied to charge pump module 3400, can be regulated by voltage regulator module 3402.Charge pump module 3400 generates and approximates V Dda+ V DddThe second digital voltage V Dd2So V Dd2＞V DdaThose skilled in the art will appreciate that, since intrinsic loss and/or the inefficiency of charge pump module 3400, V Dd2And inaccuracy equals V Dda+ V Ddd
Refer now to Figure 35, wherein show the application of the power supply of Figure 35.V DdaProvide by battery 3500.Battery 3500 can be voltage at 2.7V to the lithium ion battery between the 4.2V.The output communication of light-emitting diode (LED) and opamp 710.In certain embodiments, LED has the conducting voltage V of about 3.5V D Charge pump module 3400 will be from the V of battery 3500 DdaAdd V to Ddd, be used for the sufficient voltage of driving LED 3502 with generation.Because V DddAbout 1.2V generally only is provided, so it is can not coverlet private, and to come be LED 3502 power supplies.Charge pump module 3400 provides from V DdaAuxiliary voltage so that provide about 3.7V to 4.2V to LED, this has been higher than 3.5V V D3.7V considered the loss and/or the inefficiency of charge pump module 3400 to the scope of 4.2V, therefore and inaccuracy equal V Dda+ V Ddd
The present invention has also solved the demand that increases the gain bandwidth product of TIA.The raising of gain bandwidth product can realize with another TIA is nested through making one " TIA ".In other words, the additional circuit components such as feedback resistance, electric capacity and/or opamp is added to input side and/or the output side of TIA.
Refer now to Figure 36, wherein show nested transimpedance amplifier (TIA) circuit 3600 with inner TIA 3602.Transimpedance amplifier 3602 comprises first operational amplifier 3604 and second operational amplifier 3606.Each operational amplifier shown in this figure and the ensuing figure has homophase input and the homophase output that identifies there not to be " o " symbol, and is exported by the anti-phase input and the anti-phase of " o " symbol logo.Transimpedance amplifier 3602 also comprises first feedback resistance 3608 with homophase input and anti-phase output communication, and with second resistance 3610 of anti-phase input and homophase output communication.
Nested transimpedance amplifier 3600 comprises that also the 3rd operational amplifier 3612, the three operational amplifiers 3612 also have anti-phase input and output and homophase input and output.Operational amplifier 3612 has the anti-phase output with the homophase input communication of amplifier 3606, and with the homophase output of the anti-phase input communication of amplifier 3606.
Feedback resistance 3614 and the homophase output of amplifier 3612 and the anti-phase output communication of amplifier 3604.The anti-phase output of amplifier 3612 and the homophase output communication of amplifier 3604.That is, the anti-phase input communication of resistance 3614 and amplifier 3606, and the homophase input communication of resistance 3616 and amplifier 3606.
Refer now to Figure 37, wherein show two nested transimpedance amplifiers 3700.Two nested transimpedance amplifiers comprise the transimpedance amplifier 3602 and nested transimpedance amplifier structure 3600 of Figure 36.Therefore these public circuit units will no longer be described.In this embodiment, show another amplifier 3702 that also has anti-phase and homophase input and output.In this embodiment, the homophase input communication of the anti-phase output of amplifier 3702 and amplifier 3612.The homophase output of amplifier 3702 and the anti-phase input communication of amplifier 3612.The common node of the anti-phase output of feedback resistance 3704 and amplifier 3702 and the input of the homophase of amplifier 3612 is communicated by letter.Resistance 3704 also with the anti-phase output communication of amplifier 3604.The common node between the homophase output of second feedback resistance 3705 and amplifier 3702 and the anti-phase input of amplifier 3612 and the homophase output communication of amplifier 3604.
Through the differential and feedback arrangement shown in Figure 36 and Figure 37 is provided, other anti-phase still less of given nesting level has been proposed.The result is that device as shown in Figure 7 possibly carry out the operation of higher frequency.In these examples, nestedly occur in the output node place, thereby cause along with nested rank increases, output distortion strengthens.
Refer now to Figure 38, mutual impedance structure 3602 shown in Figure 36 is used among the nested TIA 3800.In this embodiment, the homophase output communication of the anti-phase input of operational amplifier 3802 and amplifier 3604.The homophase input of amplifier 3802 and the anti-phase output communication of amplifier 3604.
Another amplifier 3804 has the anti-phase output with the homophase input communication of amplifier 3606.The homophase output of amplifier 3804 and the anti-phase input communication of amplifier 3606.Another operational amplifier 3806 have with the anti-phase output of the homophase input communication of amplifier 3804 and with the homophase output of the anti-phase input communication of amplifier 3804.The common node between the anti-phase output of first feedback resistance 3808 and amplifier 3804 and the input of the homophase of amplifier 3606 and the anti-phase output communication of amplifier 3802.The common node between the homophase output of another feedback resistance 3810 and amplifier 3804 and the anti-phase input of amplifier 3606 and the homophase output communication of amplifier 3802.
The common node between the homophase output of feedback resistance 3812 and amplifier 3806 and the anti-phase input of amplifier 3804 and the anti-phase output communication of amplifier 3802.The common node between the anti-phase output of another resistance 3814 and amplifier 3806 and the input of the homophase of amplifier 3804 and the homophase output communication of amplifier 3802.
Can carry out dissimilar nested to make up the more nested transimpedance amplifier of high-order.Amplifier 3802 for nested be unessential.The input of ifs circuit is electric current rather than voltage, then possibly not need amplifier 3806.
Refer now to Figure 39 A and Figure 39 B, wherein show differential and single-ended transimpedance amplifier respectively with capacitive feedback.In Figure 39 A, show the transimpedance amplifier 3602 similar differential transimpedance amplifiers 3900 with Figure 36, it has first electric capacity 3902 parallelly connected with resistance 3608 and second electric capacity 3904 parallelly connected with resistance 3610.In this embodiment, can improve mutual impedance network frequency response or stability through comprising electric capacity 3902 and 3904.Can recognize, can replace electric capacity with inductance if necessary.
In Figure 39 B, show and the similar single-ended transimpedance amplifier 3900 ' of the differential configuration shown in Figure 39 A.In Figure 39 B, with apostrophe " ' " come the element of designate similar.Amplifier 3604 ' and/or 3606 ' transconductance g mCan be negatively, and/or signal can be coupled to the anti-phase input of amplifier 3604 ' and/or 3606 '.
Refer now to Figure 40 A and Figure 40 B, in the feedback of differential and single-ended transimpedance amplifier, comprised the LC accumulator respectively.In Figure 40 A, show differential transimpedance amplifier 4000.In this embodiment, first operational amplifier 4002 has the homophase input with the anti-phase output communication of amplifier 4004.The anti-phase input of amplifier 4002 and the homophase output communication of amplifier 4004.The common node of the homophase input of feedback element 4006 and amplifier 4002 and the anti-phase output of amplifier 4004 and the anti-phase output communication of amplifier 4002.Similarly, the common node of the homophase output of the anti-phase input of second feedback element 4008 and amplifier 4002 and amplifier 4004 and the homophase output communication of amplifier 4002.
Feedback element 4006 comprises the tandem compound of resistance 4010 and resistance 4012 and inductance 4014.In some implementations, inductance 4014 can be a variable inductance.The tandem compound parallel coupled of variable capacitance 4016 and inductance 4012 and inductance 4014.This parallel connection combination and resistance 4010 series coupled.Similarly, feedback element 4,008 second resistance 4022 and the variable capacitance 4026 that are configured to have resistance 4020 in a similar fashion, connect with inductance 4024.
Variable capacitance 4016 and 4026 is used to explain that the various resonance frequencys of LC accumulator can adjust through changing capacitance.In practical embodiments, can use the fixed capacity that is set to required resident frequency.Circuit 4000 can be suitable for as the RF amplifier in the TV tuner of hoping to comprise ultrabroad band operation (for example 50MHz-1GHz).Circuit utilizes the LC energy storage through the transimpedance amplifier attribute that combines broadband operation, thereby the degree that the feasible signal that needs is exaggerated is greater than unwanted signal.Parallel connection LC accumulator makes feedback network under the resonance frequency of LC accumulator, have high impedance.
Structure shown in Figure 40 also can be nested in the amplifier architecture as implied above.Utilize each follow-up nested, have only interested signal frequency to be exaggerated, thus make nested behavior under the resident frequency of LC energy-storage travelling wave tube effectively.Therefore, the selectivity of nested LC accumulator transimpedance amplifier is significantly improved, and out of band signal is not exaggerated.This has improved the distortion performance of amplifier through not amplifying unwanted signal.Simultaneously, because the character of nested transimpedance amplifier, inband signaling is exaggerated with extremely low distortion.
In Figure 40 B, show and the similar single-ended transimpedance amplifier 4000 ' of the differential configuration shown in Figure 40 A.In Figure 40 B, with apostrophe " ' " come the element of designate similar.Amplifier 4002 ' and/or 4004 ' transconductance g mCan be negatively, and/or signal can be coupled to the anti-phase input of amplifier 4002 ' and/or 4004 '.
Refer now to Figure 41 A and Figure 41 B, wherein show the sketch map of another embodiment of differential and single-ended transimpedance amplifier respectively.In Figure 41 A, show in the differential transimpedance amplifier 4100 that uses lc circuit.In this embodiment, first operational amplifier 4102 is communicated by letter with second amplifier 4104.The anti-phase output of amplifier 4104 and the homophase input communication of amplifier 4102.The homophase output of amplifier 4104 and the anti-phase input communication of amplifier 4102.First lc circuit 4106 and the homophase input of amplifier 4102 and the anti-phase output communication of amplifier 4102.The anti-phase input and the homophase output communication of second lc circuit 4108 and amplifier 4102.
Lc circuit 4106 comprises the inductance 4110 of connecting with resistance 4112.Lc circuit 4106 also comprises the electric capacity 4114 of connecting with resistance 4116.The tandem compound of electric capacity 4114 and resistance 4116 is parallelly connected with the tandem compound of inductance 4110 and resistance 4112.
Lc circuit 4108 is to dispose with the mode that is similar to lc circuit 4106.Lc circuit 4108 comprises the inductance 4120 of connecting with resistance 4122.Electric capacity 4124 is connected with resistance 4126.The series combination of inductance 4120 and resistance 4122 is parallelly connected with the series combination of electric capacity 4124 and resistance 4126.
Provide and LC accumulator parallel resistor through shown in figure 40, perhaps all add resistance, can avoid the vibration of circuit to inductance and electric capacity.Compare with Figure 40, extra resistance has prevented the change in polarity of amplifier under high-frequency.This is used to prevent the feedback operation in the nested mutual impedance structure.
In Figure 41 B, show and the similar single-ended transimpedance amplifier 4100 ' of the differential configuration shown in Figure 41 A.In Figure 41 B, with apostrophe " ' " come the element of designate similar.Amplifier 4102 ' and/or 4104 ' transconductance g mCan be negatively, and/or signal can be coupled to the anti-phase input of amplifier 4102 ' and/or 4104 '.
Refer now to Figure 42, wherein show the integrator 4200 that utilizes nested transimpedance amplifier to form.This embodiment is identical with two nested transimpedance amplifiers shown in Figure 37, and only resistance 3704 and 3705 is replaced by electric capacity 4202 and 4204.
Because the mutual impedance configuration, integrator 4200 has high bandwidth.Even under high-frequency, impedance output is also very low.Because low output impedance, integrator 4200 can be used for driving large capacitive load.An application of integrator 4200 can be the Sigma-Delta analog to digital converter with the sample frequency work of gigahertz.
Refer now to Figure 43 A-43G, wherein show various typical implementation of the present invention.Refer now to Figure 43 A, present invention can be implemented in the amplifier and/or integrator of hard disk drive 4300.The present invention can realize and/or be implemented among any one or both in signal processing and/or the control circuit (in Figure 43 A with its unified are designated 4302) and/or the power supply 4303.In some implementations, but signal processing among the HDD 4300 and/or control circuit 4302 and/or other circuit (not shown) deal with data, carry out coding and/or encrypt, carry out and calculate, the data that output to and/or be received from magnetic storage medium 4306 are formatd.
HDD 4300 can via one or more wired or wireless communication link 4308 with such as the such main process equipment (not shown) of computer, mobile computing device and/or other devices communicatings such as personal digital assistant, cell phone, medium or MP3 player.HDD 4300 can be connected to memory 4309, for example random access storage device (RAM), such as the such low latency nonvolatile memory of flash memory, read-only memory (ROM) and/or other suitable electronic data storage device structures.
Refer now to Figure 43 B, present invention can be implemented in the amplifier and/or integrator of digital versatile disc (DVD) driver 4310.The present invention can realize and/or be implemented in bulk data storage device and/or the power supply 4313 of any one or both in signal processing and/or the control circuit (in Figure 43 B with its unified are designated 4312), DVD driver 4310.But signal processing among the DVD 4310 and/or control circuit 4312 and/or other circuit (not shown) deal with data, execution coding and/or encryption, execution are calculated, the data that read certainly and/or be written to optical storage media 4316 are formatd.In certain embodiments, signal processing among the DVD 4310 and/or control circuit 4312 and/or other circuit (not shown) also can be carried out other functions such as coding and/or decoding and/or any other signal processing function that is associated with the DVD driver.
DVD driver 4310 can be communicated by letter with the output equipment (not shown) such as computer, TV or other equipment via one or more wired or wireless communication link 4317.DVD 4310 can communicate by letter with the bulk data storage device 4318 of storing data with non-volatile mode.Bulk data storage device 4318 can comprise hard disk drive (HDD).HDD can have the configuration shown in Figure 43 A.HDD comprises that one or more diameters are less than about 1.8 " the pocket HDD of disc.DVD 4310 can be connected to memory 4319, for example RAM, ROM, such as flash memory such low latency volatile memory and/or other suitable electronic data storage device structures.
Refer now to Figure 43 C, present invention can be implemented in the amplifier and/or integrator of high definition TV (HDTV) 4320.The present invention can realize and/or be implemented in bulk data storage device and/or the power supply 4323 of any one or both in signal processing and/or the control circuit (in Figure 43 C with its unified are designated 4322), WLAN interface, HDTV 4320.HDTV 4320 receives the HDTV input signal of wired or wireless form, and generates the HDTV output signal that is used for display 4326.In some implementations, but signal processing among the HDTV 4320 and/or control circuit 4322 and/or other circuit (not shown) deal with data, carry out coding and/or the HDTV that encrypts, carry out calculating, formatted data and/or carry out any other type that possibly need handles.
HDTV 4320 can communicate by letter with the bulk data storage device 4327 of storing data with non-volatile mode such as light and/or this type of magnetic storage apparatus.At least one HDD can have the configuration shown in Figure 43 A, and/or at least one DVD can have the configuration shown in Figure 43 B.HDD comprises that one or more diameters are less than about 1.8 " the pocket HDD of disc.HDTV 4320 can be connected to memory 4328, for example RAM, ROM, such as flash memory such low latency volatile memory and/or other suitable electronic data storage device structures.HDTV 4320 also can support being connected via wlan network interface 4329 and WLAN.
Refer now to Figure 43 D, the present invention can realize and/or be implemented in the mass storage device and/or power supply 4333 of amplifier and/or integrator, WLAN interface, vehicle control system of the control system of vehicle 4330.In some implementations; The present invention has realized power transmission control system 4332; This system receives from the input of one or more transducers and/or generates one or more output control signals; Said transducer for example is a temperature sensor, and pressure sensor, rotation sensor, pneumatic sensor and/or any other right sensors, said output control signal for example are engine operation parameter, transmission device operating parameter and/or other control signals.
Present invention may also be implemented in the other control system 4340 of vehicle 4330.Control system 4340 can receive similarly from the signal of input pickup 4342 and/or with control signal and output to one or more output equipments 4344.In some implementations, control system 4340 can be the part of anti-lock braking system (ABS), navigation system, teleprocessing system, vehicle remote information processing system, deviation system, adaptivity cruise control system, the vehicle entertainment system such as stero set, DVD, CD player.Other implementations have also been conceived.
Power transmission control system 4332 can be communicated by letter with the bulk data storage device 4346 of storing data with non-volatile mode.Bulk data storage device 4346 can comprise light and/or magnetic storage apparatus, for example hard disk drive HDD and/or DVD.At least one HDD can have the configuration shown in Figure 43 A, and/or at least one DVD can have the configuration shown in Figure 43 B.HDD comprises that one or more diameters are less than about 1.8 " the pocket HDD of disc.Power transmission control system 4332 can be connected to memory 4347, for example RAM, ROM, such as flash memory such low latency nonvolatile memory and/or other suitable electronic data storage device structures.Power transmission control system 4332 also can be supported being connected via wlan network interface 4348 and WLAN.Control system 4340 also can comprise bulk data storage device, memory and/or WLAN interface (all not shown).
Refer now to Figure 43 E, present invention can be implemented in the amplifier and/or amplifier of the cell phone 4350 that can comprise cellular antenna 4351.The present invention can realize and/or be implemented in the bulk data storage device and/or power supply 4353 of any one or both in signal processing and/or the control circuit (in Figure 43 E with its unified are designated 4352), WLAN interface, cell phone 4350.In some implementations; Cell phone 4350 comprises microphone 4356, audio frequency output 4358, display 4360 and/or input equipment 4362; Said audio frequency output for example is loud speaker and/or audio frequency output jack, and said input equipment for example is keypad, indicating equipment, voice-activated and/or other input equipments.But signal processing in the cell phone 4350 and/or control circuit 4352 and/or other circuit (not shown) deal with data, execution are encoded and/or are encrypted, carry out calculating, formatted data and/or carry out other cellular telephone functions.
Cell phone 4350 can be communicated by letter with bulk data storage device 4364, and this bulk data storage device 4364 for example is light and/or magnetic storage apparatus (for example hard disk drive HDD and/or DVD), and it stores data with non-volatile mode.At least one HDD can have the configuration shown in Figure 43 A, and/or at least one DVD can have the configuration shown in Figure 43 B.HDD comprises that one or more diameters are less than about 1.8 " the pocket HDD of disc.Cell phone 4350 can be connected to memory 4366, for example RAM, ROM, such as flash memory such low latency nonvolatile memory and/or other suitable electronic data storage device structures.Cell phone 4350 also can be supported being connected via wlan network interface 4368 and WLAN.
Refer now to Figure 43 F, present invention can be implemented in the amplifier and/or integrator of STB 4380.The present invention can realize and/or be implemented in the bulk data storage device and/or power supply 4383 of any one or both in signal processing and/or the control circuit (in Figure 43 F with its unified are designated 4384), WLAN interface, STB 4380.STB 4380 receives standard and/or the high definition audio/vision signal that is applicable to display 4388 from signal and output such as the such source of broad band source, and said display for example is television set and/or monitor and/or other video and/or audio output equipments.But the signal processing of STB 4380 and/or control circuit 4384 and/or other circuit (not shown) deal with data, execution are encoded and/or are encrypted, carry out calculating, formatted data and/or carry out other set-top box functionality.
STB 4380 can be communicated by letter with the bulk data storage device 4390 of storing data with non-volatile mode.Bulk data storage device 4390 can comprise light and/or magnetic storage apparatus, for example hard disk drive HDD and/or DVD.At least one HDD can have the configuration shown in Figure 43 A, and/or at least one DVD can have the configuration shown in Figure 43 B.HDD comprises that one or more diameters are less than about 1.8 " the pocket HDD of disc.STB 4380 can be connected to memory 4394, for example RAM, ROM, such as flash memory such low latency nonvolatile memory and/or other suitable electronic data storage device structures.STB 4380 also can be supported being connected via wlan network interface 4396 and WLAN.
Refer now to Figure 43 G, present invention can be implemented in the amplifier and/or integrator of media player 4400.The present invention can realize and/or be implemented in the bulk data storage device and/or power supply 4403 of any one or both in signal processing and/or the control circuit (in Figure 43 G with its unified are designated 4404), WLAN interface, media player 4400.In some implementations, media player 4400 comprises that display 4407 and/or the user such as keypad, touch pad import 4408.In some implementations, media player 4400 can adopt graphic user interface (GUI), and this graphic user interface adopts usually via display 4407 and/or user and imports 4408 menu, drop-down menu, icon and/or point to the click interface.Media player 4400 also comprises audio frequency output 4409, for example loud speaker and/or audio frequency output jack.But the signal processing of media player 4400 and/or control circuit 4404 and/or other circuit (not shown) deal with data, execution are encoded and/or are encrypted, carry out calculating, formatted data and/or carry out other functions.
Media player 4400 can with communicate by letter with the bulk data storage device 4410 of non-volatile mode store compressed audio frequency and/or video content.In some implementations, compacted voice file comprises the file of following MP3 format or other proper compression audio frequency and/or video format.Bulk data storage device can comprise light and/or magnetic storage apparatus, for example hard disk drive HDD and/or DVD.At least one HDD can have the configuration shown in Figure 43 A, and/or at least one DVD can have the configuration shown in Figure 43 B.HDD comprises that one or more diameters are less than about 1.8 " the pocket HDD of disc.Media player 4400 can be connected to memory 4414, for example RAM, ROM, such as flash memory such low latency nonvolatile memory and/or other suitable electronic data storage device structures.Media player 4400 also can be supported being connected via wlan network interface 4416 and WLAN.Except that above-mentioned implementation, other implementations have also been conceived.
Refer now to Figure 44, wherein show Sigma Delta analog to digital converter (ADC) module 4510.Sigma Delta ADC module 4510 comprises the differential amplifier module 4514 that receives analog input signal.The output of differential amplifier module 4514 is imported into integrator module 4518.The output of integrator module 4518 is inputs of comparator module 4520.Another input of comparator module 4520 can be connected to reference potential, such as ground.The output of comparator module 4520 is imported into filter and decimator module 4524, this filter and decimator module 4524 output digital signals.The output of comparator module 4520 is imported into digital to analog converter (DAC) module 4528.DAC module 4528 can be a bit DAC.The output of DAC module 4528 is imported into the anti-phase input of differential amplifier module 4514.
In use, the output of DAC module 4528 is deducted from input signal.Resulting signal is integrated device module 4518 integrations.Integrator output voltage is converted to monobit digital output (1 or 0) by comparator module 4520.Resulting bit has become the input of DAC module 4528.This closed loop procedure can be carried out with very high over-sampling rate.The numerical data of comparator module output is 1 and 0 stream, and 1 the density that the value of signal and comparator module are exported is proportional.For the value that increases, 1 density increases.For the value that reduces, 1 density reduces.Through error voltage is sued for peace, integrator serves as low pass filter to input signal, and quantizing noise is served as high pass filter.Bit stream is by filter and decimator module digital filtering, so that the output of binary format to be provided.
Can recognize that the TIA amplifier of describing in the foregoing description can be used for realizing one or more in differential amplifier module, integrator module and the comparison module in the Sigma DeltaDAC module.
Those skilled in the art can recognize from aforementioned description that now broad teachings of the present invention can realize in a variety of forms.Therefore, though combine concrete example of the present invention to describe the present invention, true scope of the present invention should not be limited to this, and this is because those skilled in the art will understand other modifications after research accompanying drawing, specification and appended claims.
The application is the U.S. Patent application No.11/495 that submitted on July 28th, 2006,813 continuity case, this U.S. Patent application No.11/495; 813 require the U.S. Provisional Patent Application No.60/817 that submitted on June 29th, 2006, the U.S. Provisional Patent Application No.60/798 that on May 8th, 268,2006 submitted, the U.S. Provisional Patent Application No.60/798 that on May 8th, 480,2006 submitted; The U.S. Provisional Patent Application No.60/759 that on January 18th, 567 and 2006 submitted, 899 priority, and be the U.S. Patent application No.10/459 that submitted on June 11st, 2003; 731 cip application, and this U.S. Patent application No.10/459,731 is the United States Patent(USP) No.s 6 of authorizing on July 13rd, 2004; 762; 644 cip application, this United States Patent(USP) No. 6,762; 644 require the U.S. Provisional Application No.60/275 that submits March 13 calendar year 2001,109 priority.Here by reference that above-mentioned application is all incorporated.

Claims (30)

1. differential transimpedance amplifier circuit comprises:
First operational amplifier with first anti-phase input, the input of first homophase, first anti-phase output and the output of first homophase;
Second operational amplifier with second anti-phase input, the input of second homophase, second anti-phase output and the output of second homophase; Wherein said second anti-phase output is connected with said first homophase input, and the output of said second homophase is connected with said first anti-phase input;
Export first feedback element that is connected with said first homophase input with said first anti-phase;
Export second feedback element that is connected with said first anti-phase input with said first homophase;
Export the 3rd feedback element that is connected with said second anti-phase input with said first anti-phase; And
Export the 4th feedback element that is connected with said second homophase input with said first homophase.
2. differential transimpedance amplifier circuit as claimed in claim 1, wherein said third and fourth feedback element comprises first and second resistance respectively.
3. differential transimpedance amplifier circuit as claimed in claim 1, wherein said third and fourth feedback element comprises first and second electric capacity respectively.
4. differential transimpedance amplifier circuit as claimed in claim 1, wherein said first and second feedback elements comprise first and second resistance respectively.
5. differential transimpedance amplifier circuit as claimed in claim 1, wherein said first and second feedback elements comprise first and second electric capacity respectively.
6. differential transimpedance amplifier circuit comprises:
First operational amplifier with first anti-phase input, the input of first homophase, first anti-phase output and the output of first homophase;
Second operational amplifier with second anti-phase input, the input of second homophase, second anti-phase output and the output of second homophase; Wherein said second anti-phase output is connected with said first homophase input, and the output of said second homophase is connected with said first anti-phase input;
Export first feedback element that is connected with said first homophase input with said first anti-phase;
Export second feedback element that is connected with said first anti-phase input with said first homophase;
Export the 3rd feedback element that is connected with said second anti-phase input with said first anti-phase; And
Export the 4th feedback element that is connected with said second homophase input with said first homophase,
Wherein said first and second feedback elements comprise first resistance of connecting with the inductance and second resistance separately, and the said inductance and second resistance are parallelly connected with electric capacity.
7. differential transimpedance amplifier circuit as claimed in claim 6, wherein said electric capacity comprises variable capacitance.
8. differential transimpedance amplifier circuit as claimed in claim 1, wherein said first and second feedback elements comprise and the electric capacity parallel resistor separately.
9. differential transimpedance amplifier circuit comprises:
First operational amplifier with first anti-phase input, the input of first homophase, first anti-phase output and the output of first homophase;
Second operational amplifier with second anti-phase input, the input of second homophase, second anti-phase output and the output of second homophase; Wherein said second anti-phase output is connected with said first homophase input, and the output of said second homophase is connected with said first anti-phase input;
Export first feedback element that is connected with said first homophase input with said first anti-phase;
Export second feedback element that is connected with said first anti-phase input with said first homophase;
Export the 3rd feedback element that is connected with said second anti-phase input with said first anti-phase; And
Export the 4th feedback element that is connected with said second homophase input with said first homophase,
Wherein, said first and second feedback elements comprise the resistance of communicating by letter with electric capacity separately, and
Wherein said electric capacity comprises variable capacitance.
10. differential transimpedance amplifier circuit as claimed in claim 1, wherein said first and second feedback elements comprise first resistance of connecting with inductance separately, said first resistance and inductance are parallelly connected with the electric capacity and second resistance.
11. differential transimpedance amplifier circuit as claimed in claim 10, wherein said electric capacity comprises variable capacitance.
12. differential transimpedance amplifier circuit as claimed in claim 1, wherein said first and second operational amplifiers are transconductance amplifiers.
13. a single nested transimpedance amplifier circuit comprises:
The 3rd operational amplifier with the 3rd anti-phase input, the input of the 3rd homophase, the 3rd anti-phase output and the output of the 3rd homophase; And
Differential transimpedance amplifier circuit as claimed in claim 1;
Wherein said second anti-phase input is connected with said the 3rd homophase output, and the input of said second homophase is connected with said the 3rd anti-phase output.
14. a two nested differential transimpedance amplifier circuit comprises:
Single nested transimpedance amplifier circuit comprises:
The 3rd operational amplifier with the 3rd anti-phase input, the input of the 3rd homophase, the 3rd anti-phase output and the output of the 3rd homophase; And
Differential transimpedance amplifier circuit comprises:
First operational amplifier with first anti-phase input, the input of first homophase, first anti-phase output and the output of first homophase;
Second operational amplifier with second anti-phase input, the input of second homophase, second anti-phase output and the output of second homophase; Wherein said second anti-phase output is connected with said first homophase input, and the output of said second homophase is connected with said first anti-phase input;
Export first feedback element that is connected with said first homophase input with said first anti-phase;
Export second feedback element that is connected with said first anti-phase input with said first homophase;
Export the 3rd feedback element that is connected with said second anti-phase input with said first anti-phase; And
Export the 4th feedback element that is connected with said second homophase input with said first homophase; And
Four-operational amplifier with the 4th anti-phase input, the input of the 4th homophase, the 4th anti-phase output and the output of the 4th homophase,
Wherein, said second anti-phase input is connected with said the 3rd homophase output, and said second homophase imports to export with said the 3rd anti-phase and be connected, and
Wherein said the 4th anti-phase output is connected with said the 3rd homophase input, and the output of said the 4th homophase is connected with said the 3rd anti-phase input.
15. two nested differential transimpedance amplifier as claimed in claim 14 also comprises:
Export the 5th feedback element that is connected with said the 4th anti-phase output with said first anti-phase; And
Export the 6th feedback element that is connected with said the 4th homophase output with said first homophase.
16. two nested differential transimpedance amplifier as claimed in claim 15, the wherein said the 5th and the 6th feedback element comprises first and second resistance respectively.
17. the nested differential transimpedance amplifier of list as claimed in claim 13 also comprises
Export the 5th feedback element that is connected with said the 3rd homophase input with said first anti-phase; And
Export the 6th feedback element that is connected with said the 3rd anti-phase input with said first homophase.
18. the nested differential transimpedance amplifier of list as claimed in claim 17, the wherein said the 5th and the 6th feedback element comprises first and second electric capacity.
19. a Sigma-Delta analog to digital converter comprises differential transimpedance amplifier as claimed in claim 1.
20. Sigma-Delta analog to digital converter as claimed in claim 19 also comprises:
The differential amplifier module that comprises the input of a receiving inputted signal;
The integrator module that is connected with the output of said differential amplifier module;
Receive the comparator module of the output of said integrator module; And
The digital to analog converter module that is connected with another input of the output of said comparator module and said differential amplifier module.
21. Sigma-Delta analog to digital converter as claimed in claim 20 also comprises the filter of the output that receives said comparator module and selects module.
22. Sigma-Delta analog to digital converter as claimed in claim 20, at least one in wherein said differential amplifier module, said integrator module and the said comparator module comprises said differential transimpedance amplifier.
23. a differential transimpedance amplifier circuit comprises:
First amplifying device that is used to amplify, this first amplifying device have first anti-phase input, the input of first homophase, first anti-phase output and the output of first homophase;
Second amplifying device that is used to amplify; This second amplifying device has second anti-phase input, the input of second homophase, second anti-phase output and the output of second homophase; Wherein said second anti-phase output is connected with said first homophase input, and the output of said second homophase is connected with said first anti-phase input;
Be used to provide first feedback device of feedback, this first feedback device is connected with said first anti-phase output with said first homophase input;
Be used to provide second feedback device of feedback, this second feedback device is connected with said first homophase output with said first anti-phase input;
Be used to provide the 3rd feedback device of feedback, the 3rd feedback device is connected with said first anti-phase output with said second anti-phase input; And
Be used to provide the 4th feedback device of feedback, the 4th feedback device is connected with said first homophase output with said second homophase input.
24. differential transimpedance amplifier circuit as claimed in claim 23, wherein said third and fourth feedback device comprises first and second resistance devices that are used to provide resistance respectively.
25. differential transimpedance amplifier circuit as claimed in claim 23, wherein said third and fourth feedback device comprises first and second capacitive means that are used to provide electric capacity respectively.
26. differential transimpedance amplifier circuit as claimed in claim 23, wherein said first and second feedback devices comprise first and second resistance devices that are used to provide resistance respectively.
27. like the said differential transimpedance amplifier circuit of claim 23, wherein, said first and second feedback devices comprise first and second capacitive means that are used to provide electric capacity respectively.
28. a differential transimpedance amplifier circuit comprises:
First amplifying device that is used to amplify, this first amplifying device have first anti-phase input, the input of first homophase, first anti-phase output and the output of first homophase;
Second amplifying device that is used to amplify; This second amplifying device has second anti-phase input, the input of second homophase, second anti-phase output and the output of second homophase; Wherein said second anti-phase output is connected with said first homophase input, and the output of said second homophase is connected with said first anti-phase input;
Be used to provide first feedback device of feedback, this first feedback device is connected with said first anti-phase output with said first homophase input;
Be used to provide second feedback device of feedback, this second feedback device is connected with said first homophase output with said first anti-phase input;
Be used to provide the 3rd feedback device of feedback, the 3rd feedback device is connected with said first anti-phase output with said second anti-phase input; And
Be used to provide the 4th feedback device of feedback, the 4th feedback device is connected with said first homophase output with said second homophase input,
Wherein, Said first and second feedback devices comprise first resistance device that is used to provide resistance separately; This first resistance device and the inductance device that is used to provide inductance be used to provide second resistance device of resistance to connect, said inductance device and said second resistance device be used to provide the capacitive means of electric capacity parallelly connected.
29. differential transimpedance amplifier circuit as claimed in claim 28, wherein, said capacitive means provides variable capacitance.
30. differential transimpedance amplifier circuit as claimed in claim 23, wherein, said first and second feedback devices comprise the resistance device that is used to provide resistance separately, this resistance device be used to provide the capacitive means of electric capacity parallelly connected.
CN2007100024133A 2006-01-18 2007-01-17 Nested transimpedance amplifier Expired - Fee Related CN101005270B (en)

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US75989906P 2006-01-18 2006-01-18
US60/759,899 2006-01-18
US79848006P 2006-05-08 2006-05-08
US79856706P 2006-05-08 2006-05-08
US60/798,480 2006-05-08
US60/798,567 2006-05-08
US81726806P 2006-06-29 2006-06-29
US60/817,268 2006-06-29
US11/495,813 2006-07-28
US11/495,813 US7551024B2 (en) 2001-03-13 2006-07-28 Nested transimpedance amplifier
US11/643,432 US7405616B2 (en) 2001-03-13 2006-12-21 Nested transimpendance amplifier
US11/643,432 2006-12-21
US11/643,089 2006-12-21
US11/643,089 US7616057B2 (en) 2001-03-13 2006-12-21 Nested transimpedance amplifier

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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101505140B (en) * 2009-03-04 2012-01-18 中国电力科学研究院 Trans-impedance amplifier with low noise and high gain-bandwidth product
US10663490B2 (en) * 2016-06-30 2020-05-26 Keithley Instruments, Llc Nested ammeter
ES2701334T3 (en) * 2016-08-01 2019-02-21 Knowledge Dev For Pof Sl LED controller for high speed optical communications based on linear modulations
WO2018167449A1 (en) * 2017-03-16 2018-09-20 Isotopx Ltd An amplifier
CN109274341A (en) * 2018-08-19 2019-01-25 天津大学 Fully differential transimpedance amplifier based on standard CMOS process visible light communication
CN110190816B (en) * 2019-04-17 2021-05-14 西安电子科技大学 Self-feedback low-noise amplifier applied to biopotential treatment
CN114189217B (en) * 2021-12-17 2022-08-30 中船重工安谱（湖北）仪器有限公司 High-gain pulse current amplifying circuit
CN114785292A (en) * 2022-04-19 2022-07-22 瑞声声学科技(深圳)有限公司 Single-end-to-differential microphone circuit

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN86108247A (en) * 1985-12-16 1987-06-17 西门子公司 Optical receiver
US5822104A (en) * 1995-02-24 1998-10-13 Nec Corporation Digital optical receiving apparatus
US5982232A (en) * 1998-04-01 1999-11-09 International Business Machines Corporation Low noise, bandwidth compensated transimpedance amplifier
US6552605B1 (en) * 2002-02-11 2003-04-22 Intel Corporation Differential transimpedance amplifier for optical communication
US6713749B2 (en) * 2000-10-11 2004-03-30 Vitesse Semiconductor Corporation Monolithic loss-of-signal detect circuitry
US6762644B1 (en) * 2001-03-13 2004-07-13 Marvell International, Ltd. Apparatus and method for a nested transimpedance amplifier

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4731590A (en) * 1986-07-03 1988-03-15 American Telephone And Telegraph Company, At&T Bell Laboratories Circuits with multiple controlled gain elements
US6040793A (en) * 1998-03-18 2000-03-21 Analog Devices, Inc. Switched-capacitor sigma-delta analog-to-digital converter with input voltage overload protection
US6529070B1 (en) * 1999-10-25 2003-03-04 Texas Instruments Incorporated Low-voltage, broadband operational amplifier
JP2004516766A (en) * 2000-12-22 2004-06-03 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Amplifier circuit and method for reducing stray feedback
JP3827542B2 (en) * 2001-07-10 2006-09-27 シャープ株式会社 Optical amplifier and optical pickup device using the same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN86108247A (en) * 1985-12-16 1987-06-17 西门子公司 Optical receiver
US5822104A (en) * 1995-02-24 1998-10-13 Nec Corporation Digital optical receiving apparatus
US5982232A (en) * 1998-04-01 1999-11-09 International Business Machines Corporation Low noise, bandwidth compensated transimpedance amplifier
US6713749B2 (en) * 2000-10-11 2004-03-30 Vitesse Semiconductor Corporation Monolithic loss-of-signal detect circuitry
US6762644B1 (en) * 2001-03-13 2004-07-13 Marvell International, Ltd. Apparatus and method for a nested transimpedance amplifier
US6552605B1 (en) * 2002-02-11 2003-04-22 Intel Corporation Differential transimpedance amplifier for optical communication

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