CN100562079C - A kind of mobile TV receiving circuit - Google Patents
A kind of mobile TV receiving circuit Download PDFInfo
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- CN100562079C CN100562079C CNB2007100730220A CN200710073022A CN100562079C CN 100562079 C CN100562079 C CN 100562079C CN B2007100730220 A CNB2007100730220 A CN B2007100730220A CN 200710073022 A CN200710073022 A CN 200710073022A CN 100562079 C CN100562079 C CN 100562079C
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Abstract
The invention discloses a kind of mobile TV receiving circuit, this mobile TV receiving circuit comprises input circuit, internal storage location, output circuit, signal processor and four hardware-accelerated unit, described input circuit, internal storage location and output circuit link to each other successively, described signal processor and four hardware-accelerated unit link to each other with internal storage location respectively, the work of described signal processor control hardware accelerator module.This circuit cost and low in energy consumption, and can adapt to the variation of communication standard and the requirement of many standards.
Description
Technical field
The present invention relates generally to the television reception circuit field, especially the mobile TV receiving circuit.
Background technology
Current, the realization of mobile TV receiving circuit runs into three problems: the first, the mobile TV receiving circuit will improve along with the progress of mobile TV standard, and this is even more important in the issue of mobile TV standard early stage; The second, the mobile TV receiving circuit will be supported many standard state of mobile TV, and this exploitation world market under the situation that the many standards in the whole world exist is extremely important; Three, mobile TV receiving circuit cost is low; This is even more important under the business environment of global enterprise high competition.In a word, the mobile TV receiving circuit will reach the unification of low-cost and high flexibility.
The solution of existing mobile TV receiving circuit is divided into the pure hardware solution of employing and adopts the pure software solution.
Seeing also Fig. 1, is the schematic diagram of the mobile TV receiving circuit of the pure hardware of existing employing.The mobile TV receiving circuit of this pure hardware comprises RF radio frequency interface, EQ synchronous circuit, RS (Reed-Solomon) decoder, the mutual circuit of deinterleaver, Viterbi decoder, Sync SM (SM:state machine) synchronous state machine and Operation SM running status machine.The solution of the mobile TV receiving circuit of this pure hardware realizes fixing algorithm by fixing hardware, but this scheme is difficult to adapt to the variation of communication standard and the requirement of many standards, lacks flexibility.
Seeing also Fig. 2, is the schematic diagram of the mobile TV receiving circuit of existing employing pure software.The mobile TV receiving circuit of this pure software comprises input circuit, internal storage location, an output circuit and N signal processor and N PM (programmemory, program internal memory).This pure software solution is barricaded as hardware platform with a plurality of signal processors earlier, realizes in the above then and debugging algorithm.But the pure software scheme need adopt a plurality of signal processors, and its cost and power consumption are all too high, does not possess competitiveness.
Therefore, develop a kind of new mobile TV receiving circuit and become exigence.
Summary of the invention
The object of the present invention is to provide a kind of mobile TV receiving circuit, this circuit cost and low in energy consumption, and can adapt to the variation of communication standard and the requirement of many standards.
In order to solve the problems of the technologies described above, the technical solution used in the present invention comprises a kind of mobile TV receiving circuit, this mobile TV receiving circuit comprises input circuit, internal storage location, output circuit, signal processor and four hardware-accelerated unit, described input circuit, internal storage location and output circuit link to each other successively, described signal processor and four hardware-accelerated unit link to each other with internal storage location respectively, the work of described signal processor control hardware accelerator module, described four hardware-accelerated unit comprise:
The Viterbi decoding of various forms is finished in the first hardware-accelerated unit, the described first hardware-accelerated unit;
The RS decoding of various forms is finished in the second hardware-accelerated unit, the described second hardware-accelerated unit;
The 3rd hardware-accelerated unit, the multiply-add operation of various forms is finished in the described the 3rd hardware-accelerated unit; And
The 4th hardware-accelerated unit, the data-moving of various forms is finished in the described the 4th hardware-accelerated unit.
Described signal processor is a programmable signal processor, realizes by general embedded signal processor.
Described internal storage location is made up of polylith multiport memory cell, and it guarantees the exchanges data between each hardware-accelerated unit.
Described programmable signal processor links to each other with primary processor by interface circuit, and described primary processor is downloaded the programmable signal processor working procedure, and notifies described mobile TV receiving circuit to want the sub-channel information of demodulation.
Described mobile TV receiving circuit is according to the express passway information table of baseband signal of input, these subchannels of demodulation, and send these subchannel code streams to primary processor with the form of bag.
Adopt technique scheme, in conjunction with the following embodiment that will describe in detail, beneficial technical effects of the present invention is: mobile TV receiving circuit of the present invention adopts programmable signal processor and several hardware-accelerated unit to form, this circuit adopts programmable signal processor, its cost and low in energy consumption, and can adapt to the variation of communication standard and the requirement of many standards, both guarantee flexibility, guarantee the power consumption cost again.
Feature of the present invention and advantage will be elaborated in conjunction with the accompanying drawings by embodiment.
Description of drawings
Fig. 1 is the schematic diagram of the mobile TV receiving circuit of the pure hardware of existing employing;
Fig. 2 is the schematic diagram of the mobile TV receiving circuit of existing employing pure software;
Fig. 3 is the circuit diagram of the embodiment of mobile TV receiving circuit of the present invention.
Embodiment
As shown in Figure 3, be the circuit diagram of the embodiment of mobile TV receiving circuit of the present invention.This mobile TV receiving circuit adopts programmable signal processor and several hardware-accelerated unit to form.It had both guaranteed flexibility, had guaranteed the power consumption cost again.This mobile TV receiving circuit comprises input circuit, output circuit, internal storage location, signal processor and four hardware-accelerated unit, this input circuit, internal storage location and output circuit link to each other successively, this signal processor and hardware-accelerated unit link to each other with internal memory respectively, and this program internal memory links to each other with signal processor.
This programmable signal processor realizes the flow process and the not frequent operation of operand of wireless receiving algorithm, and is for example synchronous, insert, and control etc., and utilize interruption and timer to control the work of each acceleration hardware unit.The realization of this programmable signal processor is finished by general embedded signal processor.
In the present embodiment, this mobile TV receiving circuit adopts four hardware-accelerated unit, is respectively the first hardware-accelerated unit, the second hardware-accelerated unit, the 3rd hardware-accelerated unit and the 4th hardware-accelerated unit.This first hardware-accelerated unit, the second hardware-accelerated unit, the 3rd hardware-accelerated unit and the 4th hardware-accelerated unit link to each other with internal storage location respectively.The Viterbi decoding (comprising Turbo and LDPC) of various forms is finished in the first hardware-accelerated unit; The RS decoding of various forms is finished in the second hardware-accelerated unit; The multiply-add operation of various forms, for example EQ and FFT are finished in the 3rd hardware-accelerated unit; The data-moving of various forms, for example De-interleave are finished in the 4th hardware-accelerated unit.This internal memory is made up of polylith multiport memory cell, and it guarantees the exchanges data between each hardware-accelerated unit.
This programmable signal processor links to each other with primary processor by interface circuit, this primary processor is downloaded the programmable signal processor working procedure, and notify receiver to want subchannel (sub-channels) information of demodulation, this receiver is that receiving circuit of the present invention is corresponding to primary processor.Usually this information comprises the information of express passway; Then, receiver is according to the express passway information table of the baseband signal of input, these subchannels of demodulation.The content of demodulation comprises the synchronous and data error correcting of baseband signal; At last, receiver sends these subchannel code streams to primary processor with the form (subchannel number, length, data) of bag, to finish the reception of signal, transmits usually and carries out with the form of running simultaneously.
The above; only for the preferable concrete true mode of the present invention, but protection scope of the present invention is not limited thereto, and anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claims.
Claims (5)
1, a kind of mobile TV receiving circuit, comprise input circuit, internal storage location and output circuit, described input circuit, internal storage location and output circuit link to each other successively, it is characterized in that: also comprise signal processor and four hardware-accelerated unit, described signal processor and four hardware-accelerated unit link to each other with internal storage location respectively, the work of described signal processor control hardware accelerator module, described four hardware-accelerated unit comprise:
The Viterbi decoding of various forms is finished in the first hardware-accelerated unit, the described first hardware-accelerated unit;
The RS decoding of various forms is finished in the second hardware-accelerated unit, the described second hardware-accelerated unit;
The 3rd hardware-accelerated unit, the multiply-add operation of various forms is finished in the described the 3rd hardware-accelerated unit; And
The 4th hardware-accelerated unit, the data-moving of various forms is finished in the described the 4th hardware-accelerated unit.
2, mobile TV receiving circuit as claimed in claim 1, it is characterized in that: described signal processor is a programmable signal processor, realizes by general embedded signal processor.
3, mobile TV receiving circuit as claimed in claim 1 is characterized in that: described internal storage location is made up of polylith multiport memory cell, and it guarantees the exchanges data between each hardware-accelerated unit.
4, mobile TV receiving circuit as claimed in claim 2, it is characterized in that: described programmable signal processor links to each other with primary processor by interface circuit, described primary processor is downloaded the programmable signal processor working procedure, and notifies described mobile TV receiving circuit to want the sub-channel information of demodulation.
5, mobile TV receiving circuit as claimed in claim 4, it is characterized in that: described mobile TV receiving circuit is according to the express passway information table of the baseband signal of input, these subchannels of demodulation, and with these subchannel code streams with the bag form send primary processor to.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007100730220A CN100562079C (en) | 2007-01-23 | 2007-01-23 | A kind of mobile TV receiving circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2007100730220A CN100562079C (en) | 2007-01-23 | 2007-01-23 | A kind of mobile TV receiving circuit |
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| CN101014104A CN101014104A (en) | 2007-08-08 |
| CN100562079C true CN100562079C (en) | 2009-11-18 |
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| CN104184687B (en) * | 2013-05-23 | 2018-03-09 | 北京信威通信技术股份有限公司 | A kind of flow control method and hardware accelerator circuit of communications baseband processing |
| CN104683860B (en) * | 2015-02-02 | 2018-11-30 | 北京神州天脉网络计算机有限公司 | A kind of acoustic-video multi-way concurrently decodes accelerator card and its decoding accelerated method |
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Owner name: ANKAI (GUANGZHOU) MICROELECTRONICS TECHNOLOGY CO., Free format text: FORMER OWNER: SHENZHEN ANKAI MICROELECTRONICS TECHNOLOGY CO., LTD. Effective date: 20100129 |
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Effective date of registration: 20100129 Address after: 3 floor, C1 District, Chuangxin Road, No. 182, science Avenue, Guangzhou Science City, Guangdong Patentee after: Anyka (Guangzhou) Microelectronics Technology Co., Ltd. Address before: A3, building 2, building, Shenzhen digital technology park, Nanshan District hi tech Industrial Park, Shenzhen, Guangdong, China Patentee before: Shenzhen Anyka Microelectronics Technology Co., Ltd. |
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Address after: 510600, Guangzhou Science City, Guangdong science Road, 182 innovation building, C1 District, 3 floor Patentee after: Guangzhou Ankai Microelectronics Co.,Ltd. Address before: 510600, Guangzhou Science City, Guangdong science Road, 182 innovation building, C1 District, 3 floor Patentee before: ANYKA (GUANGZHOU) MICROELECTRONICS TECHNOLOGY Co.,Ltd. |
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Address after: 510555 No. 107 Bowen Road, Huangpu District, Guangzhou, Guangdong Patentee after: Guangzhou Ankai Microelectronics Co.,Ltd. Address before: 510600, Guangzhou Science City, Guangdong science Road, 182 innovation building, C1 District, 3 floor Patentee before: Guangzhou Ankai Microelectronics Co.,Ltd. |
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